2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/spinlock.h>
16 #include <linux/list.h>
17 #include <linux/pci.h>
18 #include <linux/delay.h>
19 #include <linux/completion.h>
20 #include <linux/etherdevice.h>
21 #include <net/mac80211.h>
22 #include <linux/moduleparam.h>
23 #include <linux/firmware.h>
24 #include <linux/workqueue.h>
26 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
27 #define MWL8K_NAME KBUILD_MODNAME
28 #define MWL8K_VERSION "0.10"
30 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table
) = {
31 { PCI_VDEVICE(MARVELL
, 0x2a2b), .driver_data
= 8687, },
32 { PCI_VDEVICE(MARVELL
, 0x2a30), .driver_data
= 8687, },
35 MODULE_DEVICE_TABLE(pci
, mwl8k_table
);
37 /* Register definitions */
38 #define MWL8K_HIU_GEN_PTR 0x00000c10
39 #define MWL8K_MODE_STA 0x0000005a
40 #define MWL8K_MODE_AP 0x000000a5
41 #define MWL8K_HIU_INT_CODE 0x00000c14
42 #define MWL8K_FWSTA_READY 0xf0f1f2f4
43 #define MWL8K_FWAP_READY 0xf1f2f4a5
44 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
45 #define MWL8K_HIU_SCRATCH 0x00000c40
47 /* Host->device communications */
48 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
49 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
50 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
51 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
52 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
53 #define MWL8K_H2A_INT_DUMMY (1 << 20)
54 #define MWL8K_H2A_INT_RESET (1 << 15)
55 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
56 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
58 /* Device->host communications */
59 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
60 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
61 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
62 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
63 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
64 #define MWL8K_A2H_INT_DUMMY (1 << 20)
65 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
66 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
67 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
68 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
69 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
70 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
71 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
72 #define MWL8K_A2H_INT_RX_READY (1 << 1)
73 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
75 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
76 MWL8K_A2H_INT_CHNL_SWITCHED | \
77 MWL8K_A2H_INT_QUEUE_EMPTY | \
78 MWL8K_A2H_INT_RADAR_DETECT | \
79 MWL8K_A2H_INT_RADIO_ON | \
80 MWL8K_A2H_INT_RADIO_OFF | \
81 MWL8K_A2H_INT_MAC_EVENT | \
82 MWL8K_A2H_INT_OPC_DONE | \
83 MWL8K_A2H_INT_RX_READY | \
84 MWL8K_A2H_INT_TX_DONE)
86 /* WME stream classes */
87 #define WME_AC_BE 0 /* best effort */
88 #define WME_AC_BK 1 /* background */
89 #define WME_AC_VI 2 /* video */
90 #define WME_AC_VO 3 /* voice */
92 #define MWL8K_RX_QUEUES 1
93 #define MWL8K_TX_QUEUES 4
95 struct mwl8k_rx_queue
{
98 /* hw receives here */
101 /* refill descs here */
104 struct mwl8k_rx_desc
*rx_desc_area
;
105 dma_addr_t rx_desc_dma
;
106 struct sk_buff
**rx_skb
;
109 struct mwl8k_tx_queue
{
110 /* hw transmits here */
113 /* sw appends here */
116 struct ieee80211_tx_queue_stats tx_stats
;
117 struct mwl8k_tx_desc
*tx_desc_area
;
118 dma_addr_t tx_desc_dma
;
119 struct sk_buff
**tx_skb
;
122 /* Pointers to the firmware data and meta information about it. */
123 struct mwl8k_firmware
{
125 struct firmware
*ucode
;
127 /* Boot helper code */
128 struct firmware
*helper
;
133 struct ieee80211_hw
*hw
;
135 struct pci_dev
*pdev
;
137 /* firmware files and meta data */
138 struct mwl8k_firmware fw
;
141 /* firmware access */
142 struct mutex fw_mutex
;
143 struct task_struct
*fw_mutex_owner
;
145 struct completion
*hostcmd_wait
;
147 /* lock held over TX and TX reap */
150 /* TX quiesce completion, protected by fw_mutex and tx_lock */
151 struct completion
*tx_wait
;
153 struct ieee80211_vif
*vif
;
155 struct ieee80211_channel
*current_channel
;
157 /* power management status cookie from firmware */
159 dma_addr_t cookie_dma
;
166 * Running count of TX packets in flight, to avoid
167 * iterating over the transmit rings each time.
171 struct mwl8k_rx_queue rxq
[MWL8K_RX_QUEUES
];
172 struct mwl8k_tx_queue txq
[MWL8K_TX_QUEUES
];
175 struct ieee80211_supported_band band
;
176 struct ieee80211_channel channels
[14];
177 struct ieee80211_rate rates
[12];
180 bool radio_short_preamble
;
183 /* XXX need to convert this to handle multiple interfaces */
185 u8 capture_bssid
[ETH_ALEN
];
186 struct sk_buff
*beacon_skb
;
189 * This FJ worker has to be global as it is scheduled from the
190 * RX handler. At this point we don't know which interface it
191 * belongs to until the list of bssids waiting to complete join
194 struct work_struct finalize_join_worker
;
196 /* Tasklet to reclaim TX descriptors and buffers after tx */
197 struct tasklet_struct tx_reclaim_task
;
199 /* Work thread to serialize configuration requests */
200 struct workqueue_struct
*config_wq
;
203 /* Per interface specific private data */
205 /* backpointer to parent config block */
206 struct mwl8k_priv
*priv
;
208 /* BSS config of AP or IBSS from mac80211*/
209 struct ieee80211_bss_conf bss_info
;
211 /* BSSID of AP or IBSS */
213 u8 mac_addr
[ETH_ALEN
];
216 * Subset of supported legacy rates.
217 * Intersection of AP and STA supported rates.
219 struct ieee80211_rate legacy_rates
[12];
221 /* number of supported legacy rates */
224 /* Index into station database.Returned by update_sta_db call */
227 /* Non AMPDU sequence number assigned by driver */
231 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
233 static const struct ieee80211_channel mwl8k_channels
[] = {
234 { .center_freq
= 2412, .hw_value
= 1, },
235 { .center_freq
= 2417, .hw_value
= 2, },
236 { .center_freq
= 2422, .hw_value
= 3, },
237 { .center_freq
= 2427, .hw_value
= 4, },
238 { .center_freq
= 2432, .hw_value
= 5, },
239 { .center_freq
= 2437, .hw_value
= 6, },
240 { .center_freq
= 2442, .hw_value
= 7, },
241 { .center_freq
= 2447, .hw_value
= 8, },
242 { .center_freq
= 2452, .hw_value
= 9, },
243 { .center_freq
= 2457, .hw_value
= 10, },
244 { .center_freq
= 2462, .hw_value
= 11, },
247 static const struct ieee80211_rate mwl8k_rates
[] = {
248 { .bitrate
= 10, .hw_value
= 2, },
249 { .bitrate
= 20, .hw_value
= 4, },
250 { .bitrate
= 55, .hw_value
= 11, },
251 { .bitrate
= 60, .hw_value
= 12, },
252 { .bitrate
= 90, .hw_value
= 18, },
253 { .bitrate
= 110, .hw_value
= 22, },
254 { .bitrate
= 120, .hw_value
= 24, },
255 { .bitrate
= 180, .hw_value
= 36, },
256 { .bitrate
= 240, .hw_value
= 48, },
257 { .bitrate
= 360, .hw_value
= 72, },
258 { .bitrate
= 480, .hw_value
= 96, },
259 { .bitrate
= 540, .hw_value
= 108, },
262 /* Set or get info from Firmware */
263 #define MWL8K_CMD_SET 0x0001
264 #define MWL8K_CMD_GET 0x0000
266 /* Firmware command codes */
267 #define MWL8K_CMD_CODE_DNLD 0x0001
268 #define MWL8K_CMD_GET_HW_SPEC 0x0003
269 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
270 #define MWL8K_CMD_GET_STAT 0x0014
271 #define MWL8K_CMD_RADIO_CONTROL 0x001c
272 #define MWL8K_CMD_RF_TX_POWER 0x001e
273 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
274 #define MWL8K_CMD_SET_POST_SCAN 0x0108
275 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
276 #define MWL8K_CMD_SET_AID 0x010d
277 #define MWL8K_CMD_SET_RATE 0x0110
278 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
279 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
280 #define MWL8K_CMD_SET_SLOT 0x0114
281 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
282 #define MWL8K_CMD_SET_WMM_MODE 0x0123
283 #define MWL8K_CMD_MIMO_CONFIG 0x0125
284 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
285 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
286 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
287 #define MWL8K_CMD_UPDATE_STADB 0x1123
289 static const char *mwl8k_cmd_name(u16 cmd
, char *buf
, int bufsize
)
291 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
292 snprintf(buf, bufsize, "%s", #x);\
295 switch (cmd
& ~0x8000) {
296 MWL8K_CMDNAME(CODE_DNLD
);
297 MWL8K_CMDNAME(GET_HW_SPEC
);
298 MWL8K_CMDNAME(MAC_MULTICAST_ADR
);
299 MWL8K_CMDNAME(GET_STAT
);
300 MWL8K_CMDNAME(RADIO_CONTROL
);
301 MWL8K_CMDNAME(RF_TX_POWER
);
302 MWL8K_CMDNAME(SET_PRE_SCAN
);
303 MWL8K_CMDNAME(SET_POST_SCAN
);
304 MWL8K_CMDNAME(SET_RF_CHANNEL
);
305 MWL8K_CMDNAME(SET_AID
);
306 MWL8K_CMDNAME(SET_RATE
);
307 MWL8K_CMDNAME(SET_FINALIZE_JOIN
);
308 MWL8K_CMDNAME(RTS_THRESHOLD
);
309 MWL8K_CMDNAME(SET_SLOT
);
310 MWL8K_CMDNAME(SET_EDCA_PARAMS
);
311 MWL8K_CMDNAME(SET_WMM_MODE
);
312 MWL8K_CMDNAME(MIMO_CONFIG
);
313 MWL8K_CMDNAME(USE_FIXED_RATE
);
314 MWL8K_CMDNAME(ENABLE_SNIFFER
);
315 MWL8K_CMDNAME(SET_RATEADAPT_MODE
);
316 MWL8K_CMDNAME(UPDATE_STADB
);
318 snprintf(buf
, bufsize
, "0x%x", cmd
);
325 /* Hardware and firmware reset */
326 static void mwl8k_hw_reset(struct mwl8k_priv
*priv
)
328 iowrite32(MWL8K_H2A_INT_RESET
,
329 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
330 iowrite32(MWL8K_H2A_INT_RESET
,
331 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
335 /* Release fw image */
336 static void mwl8k_release_fw(struct firmware
**fw
)
340 release_firmware(*fw
);
344 static void mwl8k_release_firmware(struct mwl8k_priv
*priv
)
346 mwl8k_release_fw(&priv
->fw
.ucode
);
347 mwl8k_release_fw(&priv
->fw
.helper
);
350 /* Request fw image */
351 static int mwl8k_request_fw(struct mwl8k_priv
*priv
,
352 const char *fname
, struct firmware
**fw
)
354 /* release current image */
356 mwl8k_release_fw(fw
);
358 return request_firmware((const struct firmware
**)fw
,
359 fname
, &priv
->pdev
->dev
);
362 static int mwl8k_request_firmware(struct mwl8k_priv
*priv
, u32 part_num
)
367 priv
->part_num
= part_num
;
369 snprintf(filename
, sizeof(filename
),
370 "mwl8k/helper_%u.fw", priv
->part_num
);
372 rc
= mwl8k_request_fw(priv
, filename
, &priv
->fw
.helper
);
374 printk(KERN_ERR
"%s: Error requesting helper firmware "
375 "file %s\n", pci_name(priv
->pdev
), filename
);
379 snprintf(filename
, sizeof(filename
),
380 "mwl8k/fmimage_%u.fw", priv
->part_num
);
382 rc
= mwl8k_request_fw(priv
, filename
, &priv
->fw
.ucode
);
384 printk(KERN_ERR
"%s: Error requesting firmware file %s\n",
385 pci_name(priv
->pdev
), filename
);
386 mwl8k_release_fw(&priv
->fw
.helper
);
393 struct mwl8k_cmd_pkt
{
399 } __attribute__((packed
));
405 mwl8k_send_fw_load_cmd(struct mwl8k_priv
*priv
, void *data
, int length
)
407 void __iomem
*regs
= priv
->regs
;
411 dma_addr
= pci_map_single(priv
->pdev
, data
, length
, PCI_DMA_TODEVICE
);
412 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
415 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
416 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
417 iowrite32(MWL8K_H2A_INT_DOORBELL
,
418 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
419 iowrite32(MWL8K_H2A_INT_DUMMY
,
420 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
426 int_code
= ioread32(regs
+ MWL8K_HIU_INT_CODE
);
427 if (int_code
== MWL8K_INT_CODE_CMD_FINISHED
) {
428 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
435 pci_unmap_single(priv
->pdev
, dma_addr
, length
, PCI_DMA_TODEVICE
);
437 return loops
? 0 : -ETIMEDOUT
;
440 static int mwl8k_load_fw_image(struct mwl8k_priv
*priv
,
441 const u8
*data
, size_t length
)
443 struct mwl8k_cmd_pkt
*cmd
;
447 cmd
= kmalloc(sizeof(*cmd
) + 256, GFP_KERNEL
);
451 cmd
->code
= cpu_to_le16(MWL8K_CMD_CODE_DNLD
);
457 int block_size
= length
> 256 ? 256 : length
;
459 memcpy(cmd
->payload
, data
+ done
, block_size
);
460 cmd
->length
= cpu_to_le16(block_size
);
462 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
,
463 sizeof(*cmd
) + block_size
);
468 length
-= block_size
;
473 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
, sizeof(*cmd
));
481 static int mwl8k_feed_fw_image(struct mwl8k_priv
*priv
,
482 const u8
*data
, size_t length
)
484 unsigned char *buffer
;
485 int may_continue
, rc
= 0;
486 u32 done
, prev_block_size
;
488 buffer
= kmalloc(1024, GFP_KERNEL
);
495 while (may_continue
> 0) {
498 block_size
= ioread32(priv
->regs
+ MWL8K_HIU_SCRATCH
);
499 if (block_size
& 1) {
503 done
+= prev_block_size
;
504 length
-= prev_block_size
;
507 if (block_size
> 1024 || block_size
> length
) {
517 if (block_size
== 0) {
524 prev_block_size
= block_size
;
525 memcpy(buffer
, data
+ done
, block_size
);
527 rc
= mwl8k_send_fw_load_cmd(priv
, buffer
, block_size
);
532 if (!rc
&& length
!= 0)
540 static int mwl8k_load_firmware(struct ieee80211_hw
*hw
)
542 struct mwl8k_priv
*priv
= hw
->priv
;
543 struct firmware
*fw
= priv
->fw
.ucode
;
547 if (!memcmp(fw
->data
, "\x01\x00\x00\x00", 4)) {
548 struct firmware
*helper
= priv
->fw
.helper
;
550 if (helper
== NULL
) {
551 printk(KERN_ERR
"%s: helper image needed but none "
552 "given\n", pci_name(priv
->pdev
));
556 rc
= mwl8k_load_fw_image(priv
, helper
->data
, helper
->size
);
558 printk(KERN_ERR
"%s: unable to load firmware "
559 "helper image\n", pci_name(priv
->pdev
));
564 rc
= mwl8k_feed_fw_image(priv
, fw
->data
, fw
->size
);
566 rc
= mwl8k_load_fw_image(priv
, fw
->data
, fw
->size
);
570 printk(KERN_ERR
"%s: unable to load firmware image\n",
571 pci_name(priv
->pdev
));
575 iowrite32(MWL8K_MODE_STA
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
580 if (ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
)
581 == MWL8K_FWSTA_READY
)
586 return loops
? 0 : -ETIMEDOUT
;
591 * Defines shared between transmission and reception.
593 /* HT control fields for firmware */
598 } __attribute__((packed
));
600 /* Firmware Station database operations */
601 #define MWL8K_STA_DB_ADD_ENTRY 0
602 #define MWL8K_STA_DB_MODIFY_ENTRY 1
603 #define MWL8K_STA_DB_DEL_ENTRY 2
604 #define MWL8K_STA_DB_FLUSH 3
606 /* Peer Entry flags - used to define the type of the peer node */
607 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
609 #define MWL8K_IEEE_LEGACY_DATA_RATES 12
610 #define MWL8K_MCS_BITMAP_SIZE 16
612 struct peer_capability_info
{
613 /* Peer type - AP vs. STA. */
616 /* Basic 802.11 capabilities from assoc resp. */
619 /* Set if peer supports 802.11n high throughput (HT). */
622 /* Valid if HT is supported. */
624 __u8 extended_ht_caps
;
625 struct ewc_ht_info ewc_info
;
627 /* Legacy rate table. Intersection of our rates and peer rates. */
628 __u8 legacy_rates
[MWL8K_IEEE_LEGACY_DATA_RATES
];
630 /* HT rate table. Intersection of our rates and peer rates. */
631 __u8 ht_rates
[MWL8K_MCS_BITMAP_SIZE
];
634 /* If set, interoperability mode, no proprietary extensions. */
638 __le16 amsdu_enabled
;
639 } __attribute__((packed
));
641 /* Inline functions to manipulate QoS field in data descriptor. */
642 static inline u16
mwl8k_qos_setbit_eosp(u16 qos
)
644 u16 val_mask
= 1 << 4;
646 /* End of Service Period Bit 4 */
647 return qos
| val_mask
;
650 static inline u16
mwl8k_qos_setbit_ack(u16 qos
, u8 ack_policy
)
654 u16 qos_mask
= ~(val_mask
<< shift
);
656 /* Ack Policy Bit 5-6 */
657 return (qos
& qos_mask
) | ((ack_policy
& val_mask
) << shift
);
660 static inline u16
mwl8k_qos_setbit_amsdu(u16 qos
)
662 u16 val_mask
= 1 << 7;
664 /* AMSDU present Bit 7 */
665 return qos
| val_mask
;
668 static inline u16
mwl8k_qos_setbit_qlen(u16 qos
, u8 len
)
672 u16 qos_mask
= ~(val_mask
<< shift
);
674 /* Queue Length Bits 8-15 */
675 return (qos
& qos_mask
) | ((len
& val_mask
) << shift
);
678 /* DMA header used by firmware and hardware. */
679 struct mwl8k_dma_data
{
681 struct ieee80211_hdr wh
;
682 } __attribute__((packed
));
684 /* Routines to add/remove DMA header from skb. */
685 static inline void mwl8k_remove_dma_header(struct sk_buff
*skb
)
687 struct mwl8k_dma_data
*tr
= (struct mwl8k_dma_data
*)skb
->data
;
688 void *dst
, *src
= &tr
->wh
;
689 int hdrlen
= ieee80211_hdrlen(tr
->wh
.frame_control
);
690 u16 space
= sizeof(struct mwl8k_dma_data
) - hdrlen
;
692 dst
= (void *)tr
+ space
;
694 memmove(dst
, src
, hdrlen
);
695 skb_pull(skb
, space
);
699 static inline void mwl8k_add_dma_header(struct sk_buff
*skb
)
701 struct ieee80211_hdr
*wh
;
703 struct mwl8k_dma_data
*tr
;
705 wh
= (struct ieee80211_hdr
*)skb
->data
;
706 hdrlen
= ieee80211_hdrlen(wh
->frame_control
);
710 * Copy up/down the 802.11 header; the firmware requires
711 * we present a 2-byte payload length followed by a
712 * 4-address header (w/o QoS), followed (optionally) by
713 * any WEP/ExtIV header (but only filled in for CCMP).
715 if (hdrlen
!= sizeof(struct mwl8k_dma_data
))
716 skb_push(skb
, sizeof(struct mwl8k_dma_data
) - hdrlen
);
718 tr
= (struct mwl8k_dma_data
*)skb
->data
;
720 memmove(&tr
->wh
, wh
, hdrlen
);
723 memset(tr
->wh
.addr4
, 0, ETH_ALEN
);
726 * Firmware length is the length of the fully formed "802.11
727 * payload". That is, everything except for the 802.11 header.
728 * This includes all crypto material including the MIC.
730 tr
->fwlen
= cpu_to_le16(pktlen
- hdrlen
);
737 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
739 struct mwl8k_rx_desc
{
743 __le32 pkt_phys_addr
;
744 __le32 next_rx_desc_phys_addr
;
754 } __attribute__((packed
));
756 #define MWL8K_RX_DESCS 256
757 #define MWL8K_RX_MAXSZ 3800
759 static int mwl8k_rxq_init(struct ieee80211_hw
*hw
, int index
)
761 struct mwl8k_priv
*priv
= hw
->priv
;
762 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
766 rxq
->rx_desc_count
= 0;
770 size
= MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
);
773 pci_alloc_consistent(priv
->pdev
, size
, &rxq
->rx_desc_dma
);
774 if (rxq
->rx_desc_area
== NULL
) {
775 printk(KERN_ERR
"%s: failed to alloc RX descriptors\n",
776 wiphy_name(hw
->wiphy
));
779 memset(rxq
->rx_desc_area
, 0, size
);
781 rxq
->rx_skb
= kmalloc(MWL8K_RX_DESCS
*
782 sizeof(*rxq
->rx_skb
), GFP_KERNEL
);
783 if (rxq
->rx_skb
== NULL
) {
784 printk(KERN_ERR
"%s: failed to alloc RX skbuff list\n",
785 wiphy_name(hw
->wiphy
));
786 pci_free_consistent(priv
->pdev
, size
,
787 rxq
->rx_desc_area
, rxq
->rx_desc_dma
);
790 memset(rxq
->rx_skb
, 0, MWL8K_RX_DESCS
* sizeof(*rxq
->rx_skb
));
792 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
793 struct mwl8k_rx_desc
*rx_desc
;
796 rx_desc
= rxq
->rx_desc_area
+ i
;
797 nexti
= (i
+ 1) % MWL8K_RX_DESCS
;
799 rx_desc
->next_rx_desc_phys_addr
=
800 cpu_to_le32(rxq
->rx_desc_dma
801 + nexti
* sizeof(*rx_desc
));
802 rx_desc
->rx_ctrl
= MWL8K_RX_CTRL_OWNED_BY_HOST
;
808 static int rxq_refill(struct ieee80211_hw
*hw
, int index
, int limit
)
810 struct mwl8k_priv
*priv
= hw
->priv
;
811 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
815 while (rxq
->rx_desc_count
< MWL8K_RX_DESCS
&& limit
--) {
819 skb
= dev_alloc_skb(MWL8K_RX_MAXSZ
);
823 rxq
->rx_desc_count
++;
826 rxq
->rx_tail
= (rx
+ 1) % MWL8K_RX_DESCS
;
828 rxq
->rx_desc_area
[rx
].pkt_phys_addr
=
829 cpu_to_le32(pci_map_single(priv
->pdev
, skb
->data
,
830 MWL8K_RX_MAXSZ
, DMA_FROM_DEVICE
));
832 rxq
->rx_desc_area
[rx
].pkt_len
= cpu_to_le16(MWL8K_RX_MAXSZ
);
833 rxq
->rx_skb
[rx
] = skb
;
835 rxq
->rx_desc_area
[rx
].rx_ctrl
= 0;
843 /* Must be called only when the card's reception is completely halted */
844 static void mwl8k_rxq_deinit(struct ieee80211_hw
*hw
, int index
)
846 struct mwl8k_priv
*priv
= hw
->priv
;
847 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
850 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
851 if (rxq
->rx_skb
[i
] != NULL
) {
854 addr
= le32_to_cpu(rxq
->rx_desc_area
[i
].pkt_phys_addr
);
855 pci_unmap_single(priv
->pdev
, addr
, MWL8K_RX_MAXSZ
,
857 kfree_skb(rxq
->rx_skb
[i
]);
858 rxq
->rx_skb
[i
] = NULL
;
865 pci_free_consistent(priv
->pdev
,
866 MWL8K_RX_DESCS
* sizeof(struct mwl8k_rx_desc
),
867 rxq
->rx_desc_area
, rxq
->rx_desc_dma
);
868 rxq
->rx_desc_area
= NULL
;
873 * Scan a list of BSSIDs to process for finalize join.
874 * Allows for extension to process multiple BSSIDs.
877 mwl8k_capture_bssid(struct mwl8k_priv
*priv
, struct ieee80211_hdr
*wh
)
879 return priv
->capture_beacon
&&
880 ieee80211_is_beacon(wh
->frame_control
) &&
881 !compare_ether_addr(wh
->addr3
, priv
->capture_bssid
);
884 static inline void mwl8k_save_beacon(struct mwl8k_priv
*priv
,
887 priv
->capture_beacon
= false;
888 memset(priv
->capture_bssid
, 0, ETH_ALEN
);
891 * Use GFP_ATOMIC as rxq_process is called from
892 * the primary interrupt handler, memory allocation call
895 priv
->beacon_skb
= skb_copy(skb
, GFP_ATOMIC
);
896 if (priv
->beacon_skb
!= NULL
)
897 queue_work(priv
->config_wq
,
898 &priv
->finalize_join_worker
);
901 static int rxq_process(struct ieee80211_hw
*hw
, int index
, int limit
)
903 struct mwl8k_priv
*priv
= hw
->priv
;
904 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
908 while (rxq
->rx_desc_count
&& limit
--) {
909 struct mwl8k_rx_desc
*rx_desc
;
911 struct ieee80211_rx_status status
;
913 struct ieee80211_hdr
*wh
;
915 rx_desc
= rxq
->rx_desc_area
+ rxq
->rx_head
;
916 if (!(rx_desc
->rx_ctrl
& MWL8K_RX_CTRL_OWNED_BY_HOST
))
920 skb
= rxq
->rx_skb
[rxq
->rx_head
];
923 rxq
->rx_skb
[rxq
->rx_head
] = NULL
;
925 rxq
->rx_head
= (rxq
->rx_head
+ 1) % MWL8K_RX_DESCS
;
926 rxq
->rx_desc_count
--;
928 addr
= le32_to_cpu(rx_desc
->pkt_phys_addr
);
929 pci_unmap_single(priv
->pdev
, addr
,
930 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
932 skb_put(skb
, le16_to_cpu(rx_desc
->pkt_len
));
933 mwl8k_remove_dma_header(skb
);
935 wh
= (struct ieee80211_hdr
*)skb
->data
;
938 * Check for a pending join operation. Save a
939 * copy of the beacon and schedule a tasklet to
940 * send a FINALIZE_JOIN command to the firmware.
942 if (mwl8k_capture_bssid(priv
, wh
))
943 mwl8k_save_beacon(priv
, skb
);
945 memset(&status
, 0, sizeof(status
));
947 status
.signal
= -rx_desc
->rssi
;
948 status
.noise
= -rx_desc
->noise_level
;
949 status
.qual
= rx_desc
->link_quality
;
953 status
.band
= IEEE80211_BAND_2GHZ
;
954 status
.freq
= ieee80211_channel_to_frequency(rx_desc
->channel
);
955 memcpy(IEEE80211_SKB_RXCB(skb
), &status
, sizeof(status
));
956 ieee80211_rx_irqsafe(hw
, skb
);
966 * Packet transmission.
969 /* Transmit queue assignment. */
971 MWL8K_WME_AC_BK
= 0, /* background access */
972 MWL8K_WME_AC_BE
= 1, /* best effort access */
973 MWL8K_WME_AC_VI
= 2, /* video access */
974 MWL8K_WME_AC_VO
= 3, /* voice access */
977 /* Transmit packet ACK policy */
978 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
979 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
981 #define GET_TXQ(_ac) (\
982 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
983 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
984 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
987 #define MWL8K_TXD_STATUS_OK 0x00000001
988 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
989 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
990 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
991 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
993 struct mwl8k_tx_desc
{
998 __le32 pkt_phys_addr
;
1000 __u8 dest_MAC_addr
[ETH_ALEN
];
1001 __le32 next_tx_desc_phys_addr
;
1006 } __attribute__((packed
));
1008 #define MWL8K_TX_DESCS 128
1010 static int mwl8k_txq_init(struct ieee80211_hw
*hw
, int index
)
1012 struct mwl8k_priv
*priv
= hw
->priv
;
1013 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1017 memset(&txq
->tx_stats
, 0, sizeof(struct ieee80211_tx_queue_stats
));
1018 txq
->tx_stats
.limit
= MWL8K_TX_DESCS
;
1022 size
= MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
);
1025 pci_alloc_consistent(priv
->pdev
, size
, &txq
->tx_desc_dma
);
1026 if (txq
->tx_desc_area
== NULL
) {
1027 printk(KERN_ERR
"%s: failed to alloc TX descriptors\n",
1028 wiphy_name(hw
->wiphy
));
1031 memset(txq
->tx_desc_area
, 0, size
);
1033 txq
->tx_skb
= kmalloc(MWL8K_TX_DESCS
* sizeof(*txq
->tx_skb
),
1035 if (txq
->tx_skb
== NULL
) {
1036 printk(KERN_ERR
"%s: failed to alloc TX skbuff list\n",
1037 wiphy_name(hw
->wiphy
));
1038 pci_free_consistent(priv
->pdev
, size
,
1039 txq
->tx_desc_area
, txq
->tx_desc_dma
);
1042 memset(txq
->tx_skb
, 0, MWL8K_TX_DESCS
* sizeof(*txq
->tx_skb
));
1044 for (i
= 0; i
< MWL8K_TX_DESCS
; i
++) {
1045 struct mwl8k_tx_desc
*tx_desc
;
1048 tx_desc
= txq
->tx_desc_area
+ i
;
1049 nexti
= (i
+ 1) % MWL8K_TX_DESCS
;
1051 tx_desc
->status
= 0;
1052 tx_desc
->next_tx_desc_phys_addr
=
1053 cpu_to_le32(txq
->tx_desc_dma
+
1054 nexti
* sizeof(*tx_desc
));
1060 static inline void mwl8k_tx_start(struct mwl8k_priv
*priv
)
1062 iowrite32(MWL8K_H2A_INT_PPA_READY
,
1063 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1064 iowrite32(MWL8K_H2A_INT_DUMMY
,
1065 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1066 ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
1069 struct mwl8k_txq_info
{
1078 static int mwl8k_scan_tx_ring(struct mwl8k_priv
*priv
,
1079 struct mwl8k_txq_info
*txinfo
)
1081 int count
, desc
, status
;
1082 struct mwl8k_tx_queue
*txq
;
1083 struct mwl8k_tx_desc
*tx_desc
;
1086 memset(txinfo
, 0, MWL8K_TX_QUEUES
* sizeof(struct mwl8k_txq_info
));
1088 for (count
= 0; count
< MWL8K_TX_QUEUES
; count
++) {
1089 txq
= priv
->txq
+ count
;
1090 txinfo
[count
].len
= txq
->tx_stats
.len
;
1091 txinfo
[count
].head
= txq
->tx_head
;
1092 txinfo
[count
].tail
= txq
->tx_tail
;
1093 for (desc
= 0; desc
< MWL8K_TX_DESCS
; desc
++) {
1094 tx_desc
= txq
->tx_desc_area
+ desc
;
1095 status
= le32_to_cpu(tx_desc
->status
);
1097 if (status
& MWL8K_TXD_STATUS_FW_OWNED
)
1098 txinfo
[count
].fw_owned
++;
1100 txinfo
[count
].drv_owned
++;
1102 if (tx_desc
->pkt_len
== 0)
1103 txinfo
[count
].unused
++;
1111 * Must be called with priv->fw_mutex held and tx queues stopped.
1113 static int mwl8k_tx_wait_empty(struct ieee80211_hw
*hw
)
1115 struct mwl8k_priv
*priv
= hw
->priv
;
1116 DECLARE_COMPLETION_ONSTACK(tx_wait
);
1118 unsigned long timeout
;
1122 spin_lock_bh(&priv
->tx_lock
);
1123 count
= priv
->pending_tx_pkts
;
1125 priv
->tx_wait
= &tx_wait
;
1126 spin_unlock_bh(&priv
->tx_lock
);
1129 struct mwl8k_txq_info txinfo
[MWL8K_TX_QUEUES
];
1133 timeout
= wait_for_completion_timeout(&tx_wait
,
1134 msecs_to_jiffies(5000));
1138 spin_lock_bh(&priv
->tx_lock
);
1139 priv
->tx_wait
= NULL
;
1140 newcount
= priv
->pending_tx_pkts
;
1141 mwl8k_scan_tx_ring(priv
, txinfo
);
1142 spin_unlock_bh(&priv
->tx_lock
);
1144 printk(KERN_ERR
"%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1145 __func__
, __LINE__
, count
, newcount
);
1147 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++)
1148 printk(KERN_ERR
"TXQ:%u L:%u H:%u T:%u FW:%u "
1154 txinfo
[index
].fw_owned
,
1155 txinfo
[index
].drv_owned
,
1156 txinfo
[index
].unused
);
1164 #define MWL8K_TXD_SUCCESS(status) \
1165 ((status) & (MWL8K_TXD_STATUS_OK | \
1166 MWL8K_TXD_STATUS_OK_RETRY | \
1167 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1169 static void mwl8k_txq_reclaim(struct ieee80211_hw
*hw
, int index
, int force
)
1171 struct mwl8k_priv
*priv
= hw
->priv
;
1172 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1175 while (txq
->tx_stats
.len
> 0) {
1177 struct mwl8k_tx_desc
*tx_desc
;
1180 struct sk_buff
*skb
;
1181 struct ieee80211_tx_info
*info
;
1185 tx_desc
= txq
->tx_desc_area
+ tx
;
1187 status
= le32_to_cpu(tx_desc
->status
);
1189 if (status
& MWL8K_TXD_STATUS_FW_OWNED
) {
1193 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
);
1196 txq
->tx_head
= (tx
+ 1) % MWL8K_TX_DESCS
;
1197 BUG_ON(txq
->tx_stats
.len
== 0);
1198 txq
->tx_stats
.len
--;
1199 priv
->pending_tx_pkts
--;
1201 addr
= le32_to_cpu(tx_desc
->pkt_phys_addr
);
1202 size
= le16_to_cpu(tx_desc
->pkt_len
);
1203 skb
= txq
->tx_skb
[tx
];
1204 txq
->tx_skb
[tx
] = NULL
;
1206 BUG_ON(skb
== NULL
);
1207 pci_unmap_single(priv
->pdev
, addr
, size
, PCI_DMA_TODEVICE
);
1209 mwl8k_remove_dma_header(skb
);
1211 /* Mark descriptor as unused */
1212 tx_desc
->pkt_phys_addr
= 0;
1213 tx_desc
->pkt_len
= 0;
1215 info
= IEEE80211_SKB_CB(skb
);
1216 ieee80211_tx_info_clear_status(info
);
1217 if (MWL8K_TXD_SUCCESS(status
))
1218 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1220 ieee80211_tx_status_irqsafe(hw
, skb
);
1225 if (wake
&& priv
->radio_on
&& !mutex_is_locked(&priv
->fw_mutex
))
1226 ieee80211_wake_queue(hw
, index
);
1229 /* must be called only when the card's transmit is completely halted */
1230 static void mwl8k_txq_deinit(struct ieee80211_hw
*hw
, int index
)
1232 struct mwl8k_priv
*priv
= hw
->priv
;
1233 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1235 mwl8k_txq_reclaim(hw
, index
, 1);
1240 pci_free_consistent(priv
->pdev
,
1241 MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
),
1242 txq
->tx_desc_area
, txq
->tx_desc_dma
);
1243 txq
->tx_desc_area
= NULL
;
1247 mwl8k_txq_xmit(struct ieee80211_hw
*hw
, int index
, struct sk_buff
*skb
)
1249 struct mwl8k_priv
*priv
= hw
->priv
;
1250 struct ieee80211_tx_info
*tx_info
;
1251 struct mwl8k_vif
*mwl8k_vif
;
1252 struct ieee80211_hdr
*wh
;
1253 struct mwl8k_tx_queue
*txq
;
1254 struct mwl8k_tx_desc
*tx
;
1260 wh
= (struct ieee80211_hdr
*)skb
->data
;
1261 if (ieee80211_is_data_qos(wh
->frame_control
))
1262 qos
= le16_to_cpu(*((__le16
*)ieee80211_get_qos_ctl(wh
)));
1266 mwl8k_add_dma_header(skb
);
1267 wh
= &((struct mwl8k_dma_data
*)skb
->data
)->wh
;
1269 tx_info
= IEEE80211_SKB_CB(skb
);
1270 mwl8k_vif
= MWL8K_VIF(tx_info
->control
.vif
);
1272 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
1273 u16 seqno
= mwl8k_vif
->seqno
;
1275 wh
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
1276 wh
->seq_ctrl
|= cpu_to_le16(seqno
<< 4);
1277 mwl8k_vif
->seqno
= seqno
++ % 4096;
1280 /* Setup firmware control bit fields for each frame type. */
1283 if (ieee80211_is_mgmt(wh
->frame_control
) ||
1284 ieee80211_is_ctl(wh
->frame_control
)) {
1286 qos
= mwl8k_qos_setbit_eosp(qos
);
1287 /* Set Queue size to unspecified */
1288 qos
= mwl8k_qos_setbit_qlen(qos
, 0xff);
1289 } else if (ieee80211_is_data(wh
->frame_control
)) {
1291 if (is_multicast_ether_addr(wh
->addr1
))
1292 txstatus
|= MWL8K_TXD_STATUS_MULTICAST_TX
;
1294 /* Send pkt in an aggregate if AMPDU frame. */
1295 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1296 qos
= mwl8k_qos_setbit_ack(qos
,
1297 MWL8K_TXD_ACK_POLICY_BLOCKACK
);
1299 qos
= mwl8k_qos_setbit_ack(qos
,
1300 MWL8K_TXD_ACK_POLICY_NORMAL
);
1302 if (qos
& IEEE80211_QOS_CONTROL_A_MSDU_PRESENT
)
1303 qos
= mwl8k_qos_setbit_amsdu(qos
);
1306 dma
= pci_map_single(priv
->pdev
, skb
->data
,
1307 skb
->len
, PCI_DMA_TODEVICE
);
1309 if (pci_dma_mapping_error(priv
->pdev
, dma
)) {
1310 printk(KERN_DEBUG
"%s: failed to dma map skb, "
1311 "dropping TX frame.\n", wiphy_name(hw
->wiphy
));
1313 return NETDEV_TX_OK
;
1316 spin_lock_bh(&priv
->tx_lock
);
1318 txq
= priv
->txq
+ index
;
1320 BUG_ON(txq
->tx_skb
[txq
->tx_tail
] != NULL
);
1321 txq
->tx_skb
[txq
->tx_tail
] = skb
;
1323 tx
= txq
->tx_desc_area
+ txq
->tx_tail
;
1324 tx
->data_rate
= txdatarate
;
1325 tx
->tx_priority
= index
;
1326 tx
->qos_control
= cpu_to_le16(qos
);
1327 tx
->pkt_phys_addr
= cpu_to_le32(dma
);
1328 tx
->pkt_len
= cpu_to_le16(skb
->len
);
1330 tx
->peer_id
= mwl8k_vif
->peer_id
;
1332 tx
->status
= cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
| txstatus
);
1334 txq
->tx_stats
.count
++;
1335 txq
->tx_stats
.len
++;
1336 priv
->pending_tx_pkts
++;
1339 if (txq
->tx_tail
== MWL8K_TX_DESCS
)
1342 if (txq
->tx_head
== txq
->tx_tail
)
1343 ieee80211_stop_queue(hw
, index
);
1345 mwl8k_tx_start(priv
);
1347 spin_unlock_bh(&priv
->tx_lock
);
1349 return NETDEV_TX_OK
;
1356 * We have the following requirements for issuing firmware commands:
1357 * - Some commands require that the packet transmit path is idle when
1358 * the command is issued. (For simplicity, we'll just quiesce the
1359 * transmit path for every command.)
1360 * - There are certain sequences of commands that need to be issued to
1361 * the hardware sequentially, with no other intervening commands.
1363 * This leads to an implementation of a "firmware lock" as a mutex that
1364 * can be taken recursively, and which is taken by both the low-level
1365 * command submission function (mwl8k_post_cmd) as well as any users of
1366 * that function that require issuing of an atomic sequence of commands,
1367 * and quiesces the transmit path whenever it's taken.
1369 static int mwl8k_fw_lock(struct ieee80211_hw
*hw
)
1371 struct mwl8k_priv
*priv
= hw
->priv
;
1373 if (priv
->fw_mutex_owner
!= current
) {
1376 mutex_lock(&priv
->fw_mutex
);
1377 ieee80211_stop_queues(hw
);
1379 rc
= mwl8k_tx_wait_empty(hw
);
1381 ieee80211_wake_queues(hw
);
1382 mutex_unlock(&priv
->fw_mutex
);
1387 priv
->fw_mutex_owner
= current
;
1390 priv
->fw_mutex_depth
++;
1395 static void mwl8k_fw_unlock(struct ieee80211_hw
*hw
)
1397 struct mwl8k_priv
*priv
= hw
->priv
;
1399 if (!--priv
->fw_mutex_depth
) {
1400 ieee80211_wake_queues(hw
);
1401 priv
->fw_mutex_owner
= NULL
;
1402 mutex_unlock(&priv
->fw_mutex
);
1408 * Command processing.
1411 /* Timeout firmware commands after 2000ms */
1412 #define MWL8K_CMD_TIMEOUT_MS 2000
1414 static int mwl8k_post_cmd(struct ieee80211_hw
*hw
, struct mwl8k_cmd_pkt
*cmd
)
1416 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1417 struct mwl8k_priv
*priv
= hw
->priv
;
1418 void __iomem
*regs
= priv
->regs
;
1419 dma_addr_t dma_addr
;
1420 unsigned int dma_size
;
1422 unsigned long timeout
= 0;
1425 cmd
->result
= 0xffff;
1426 dma_size
= le16_to_cpu(cmd
->length
);
1427 dma_addr
= pci_map_single(priv
->pdev
, cmd
, dma_size
,
1428 PCI_DMA_BIDIRECTIONAL
);
1429 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
1432 rc
= mwl8k_fw_lock(hw
);
1434 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1435 PCI_DMA_BIDIRECTIONAL
);
1439 priv
->hostcmd_wait
= &cmd_wait
;
1440 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
1441 iowrite32(MWL8K_H2A_INT_DOORBELL
,
1442 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1443 iowrite32(MWL8K_H2A_INT_DUMMY
,
1444 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1446 timeout
= wait_for_completion_timeout(&cmd_wait
,
1447 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS
));
1449 priv
->hostcmd_wait
= NULL
;
1451 mwl8k_fw_unlock(hw
);
1453 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1454 PCI_DMA_BIDIRECTIONAL
);
1457 printk(KERN_ERR
"%s: Command %s timeout after %u ms\n",
1458 wiphy_name(hw
->wiphy
),
1459 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1460 MWL8K_CMD_TIMEOUT_MS
);
1463 rc
= cmd
->result
? -EINVAL
: 0;
1465 printk(KERN_ERR
"%s: Command %s error 0x%x\n",
1466 wiphy_name(hw
->wiphy
),
1467 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1468 le16_to_cpu(cmd
->result
));
1477 struct mwl8k_cmd_get_hw_spec
{
1478 struct mwl8k_cmd_pkt header
;
1480 __u8 host_interface
;
1482 __u8 perm_addr
[ETH_ALEN
];
1487 __u8 mcs_bitmap
[16];
1488 __le32 rx_queue_ptr
;
1489 __le32 num_tx_queues
;
1490 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1492 __le32 num_tx_desc_per_queue
;
1493 __le32 total_rx_desc
;
1494 } __attribute__((packed
));
1496 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw
*hw
)
1498 struct mwl8k_priv
*priv
= hw
->priv
;
1499 struct mwl8k_cmd_get_hw_spec
*cmd
;
1503 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1507 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1508 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1510 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1511 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1512 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rx_desc_dma
);
1513 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1514 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1515 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].tx_desc_dma
);
1516 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1517 cmd
->total_rx_desc
= cpu_to_le32(MWL8K_RX_DESCS
);
1519 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1522 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1523 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1524 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1525 priv
->hw_rev
= cmd
->hw_rev
;
1533 * CMD_MAC_MULTICAST_ADR.
1535 struct mwl8k_cmd_mac_multicast_adr
{
1536 struct mwl8k_cmd_pkt header
;
1539 __u8 addr
[0][ETH_ALEN
];
1542 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1543 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1544 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1545 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1547 static struct mwl8k_cmd_pkt
*
1548 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw
*hw
,
1549 int mc_count
, struct dev_addr_list
*mclist
)
1551 struct mwl8k_priv
*priv
= hw
->priv
;
1552 struct mwl8k_cmd_mac_multicast_adr
*cmd
;
1557 if (mc_count
> priv
->num_mcaddrs
) {
1562 size
= sizeof(*cmd
) + mc_count
* ETH_ALEN
;
1564 cmd
= kzalloc(size
, GFP_ATOMIC
);
1568 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR
);
1569 cmd
->header
.length
= cpu_to_le16(size
);
1570 cmd
->action
= cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED
|
1571 MWL8K_ENABLE_RX_BROADCAST
);
1574 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST
);
1575 } else if (mc_count
) {
1578 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST
);
1579 cmd
->numaddr
= cpu_to_le16(mc_count
);
1580 for (i
= 0; i
< mc_count
&& mclist
; i
++) {
1581 if (mclist
->da_addrlen
!= ETH_ALEN
) {
1585 memcpy(cmd
->addr
[i
], mclist
->da_addr
, ETH_ALEN
);
1586 mclist
= mclist
->next
;
1590 return &cmd
->header
;
1594 * CMD_802_11_GET_STAT.
1596 struct mwl8k_cmd_802_11_get_stat
{
1597 struct mwl8k_cmd_pkt header
;
1599 } __attribute__((packed
));
1601 #define MWL8K_STAT_ACK_FAILURE 9
1602 #define MWL8K_STAT_RTS_FAILURE 12
1603 #define MWL8K_STAT_FCS_ERROR 24
1604 #define MWL8K_STAT_RTS_SUCCESS 11
1606 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw
*hw
,
1607 struct ieee80211_low_level_stats
*stats
)
1609 struct mwl8k_cmd_802_11_get_stat
*cmd
;
1612 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1616 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_STAT
);
1617 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1619 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1621 stats
->dot11ACKFailureCount
=
1622 le32_to_cpu(cmd
->stats
[MWL8K_STAT_ACK_FAILURE
]);
1623 stats
->dot11RTSFailureCount
=
1624 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_FAILURE
]);
1625 stats
->dot11FCSErrorCount
=
1626 le32_to_cpu(cmd
->stats
[MWL8K_STAT_FCS_ERROR
]);
1627 stats
->dot11RTSSuccessCount
=
1628 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_SUCCESS
]);
1636 * CMD_802_11_RADIO_CONTROL.
1638 struct mwl8k_cmd_802_11_radio_control
{
1639 struct mwl8k_cmd_pkt header
;
1643 } __attribute__((packed
));
1646 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw
*hw
, bool enable
, bool force
)
1648 struct mwl8k_priv
*priv
= hw
->priv
;
1649 struct mwl8k_cmd_802_11_radio_control
*cmd
;
1652 if (enable
== priv
->radio_on
&& !force
)
1655 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1659 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RADIO_CONTROL
);
1660 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1661 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1662 cmd
->control
= cpu_to_le16(priv
->radio_short_preamble
? 3 : 1);
1663 cmd
->radio_on
= cpu_to_le16(enable
? 0x0001 : 0x0000);
1665 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1669 priv
->radio_on
= enable
;
1674 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw
*hw
)
1676 return mwl8k_cmd_802_11_radio_control(hw
, 0, 0);
1679 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw
*hw
)
1681 return mwl8k_cmd_802_11_radio_control(hw
, 1, 0);
1685 mwl8k_set_radio_preamble(struct ieee80211_hw
*hw
, bool short_preamble
)
1687 struct mwl8k_priv
*priv
;
1689 if (hw
== NULL
|| hw
->priv
== NULL
)
1693 priv
->radio_short_preamble
= short_preamble
;
1695 return mwl8k_cmd_802_11_radio_control(hw
, 1, 1);
1699 * CMD_802_11_RF_TX_POWER.
1701 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1703 struct mwl8k_cmd_802_11_rf_tx_power
{
1704 struct mwl8k_cmd_pkt header
;
1706 __le16 support_level
;
1707 __le16 current_level
;
1709 __le16 power_level_list
[MWL8K_TX_POWER_LEVEL_TOTAL
];
1710 } __attribute__((packed
));
1712 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw
*hw
, int dBm
)
1714 struct mwl8k_cmd_802_11_rf_tx_power
*cmd
;
1717 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1721 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_TX_POWER
);
1722 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1723 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1724 cmd
->support_level
= cpu_to_le16(dBm
);
1726 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1735 struct mwl8k_cmd_set_pre_scan
{
1736 struct mwl8k_cmd_pkt header
;
1737 } __attribute__((packed
));
1739 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw
*hw
)
1741 struct mwl8k_cmd_set_pre_scan
*cmd
;
1744 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1748 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN
);
1749 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1751 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1758 * CMD_SET_POST_SCAN.
1760 struct mwl8k_cmd_set_post_scan
{
1761 struct mwl8k_cmd_pkt header
;
1763 __u8 bssid
[ETH_ALEN
];
1764 } __attribute__((packed
));
1767 mwl8k_cmd_set_post_scan(struct ieee80211_hw
*hw
, __u8
*mac
)
1769 struct mwl8k_cmd_set_post_scan
*cmd
;
1772 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1776 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_POST_SCAN
);
1777 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1779 memcpy(cmd
->bssid
, mac
, ETH_ALEN
);
1781 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1788 * CMD_SET_RF_CHANNEL.
1790 struct mwl8k_cmd_set_rf_channel
{
1791 struct mwl8k_cmd_pkt header
;
1793 __u8 current_channel
;
1794 __le32 channel_flags
;
1795 } __attribute__((packed
));
1797 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw
*hw
,
1798 struct ieee80211_channel
*channel
)
1800 struct mwl8k_cmd_set_rf_channel
*cmd
;
1803 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1807 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL
);
1808 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1809 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1810 cmd
->current_channel
= channel
->hw_value
;
1811 if (channel
->band
== IEEE80211_BAND_2GHZ
)
1812 cmd
->channel_flags
= cpu_to_le32(0x00000081);
1814 cmd
->channel_flags
= cpu_to_le32(0x00000000);
1816 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1825 struct mwl8k_cmd_set_slot
{
1826 struct mwl8k_cmd_pkt header
;
1829 } __attribute__((packed
));
1831 static int mwl8k_cmd_set_slot(struct ieee80211_hw
*hw
, bool short_slot_time
)
1833 struct mwl8k_cmd_set_slot
*cmd
;
1836 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1840 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_SLOT
);
1841 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1842 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1843 cmd
->short_slot
= short_slot_time
;
1845 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1854 struct mwl8k_cmd_mimo_config
{
1855 struct mwl8k_cmd_pkt header
;
1857 __u8 rx_antenna_map
;
1858 __u8 tx_antenna_map
;
1859 } __attribute__((packed
));
1861 static int mwl8k_cmd_mimo_config(struct ieee80211_hw
*hw
, __u8 rx
, __u8 tx
)
1863 struct mwl8k_cmd_mimo_config
*cmd
;
1866 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1870 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MIMO_CONFIG
);
1871 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1872 cmd
->action
= cpu_to_le32((u32
)MWL8K_CMD_SET
);
1873 cmd
->rx_antenna_map
= rx
;
1874 cmd
->tx_antenna_map
= tx
;
1876 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1883 * CMD_ENABLE_SNIFFER.
1885 struct mwl8k_cmd_enable_sniffer
{
1886 struct mwl8k_cmd_pkt header
;
1888 } __attribute__((packed
));
1890 static int mwl8k_enable_sniffer(struct ieee80211_hw
*hw
, bool enable
)
1892 struct mwl8k_cmd_enable_sniffer
*cmd
;
1895 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1899 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER
);
1900 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1901 cmd
->action
= cpu_to_le32(!!enable
);
1903 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1910 * CMD_SET_RATEADAPT_MODE.
1912 struct mwl8k_cmd_set_rate_adapt_mode
{
1913 struct mwl8k_cmd_pkt header
;
1916 } __attribute__((packed
));
1918 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw
*hw
, __u16 mode
)
1920 struct mwl8k_cmd_set_rate_adapt_mode
*cmd
;
1923 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1927 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE
);
1928 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1929 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1930 cmd
->mode
= cpu_to_le16(mode
);
1932 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1941 struct mwl8k_cmd_set_wmm
{
1942 struct mwl8k_cmd_pkt header
;
1944 } __attribute__((packed
));
1946 static int mwl8k_set_wmm(struct ieee80211_hw
*hw
, bool enable
)
1948 struct mwl8k_priv
*priv
= hw
->priv
;
1949 struct mwl8k_cmd_set_wmm
*cmd
;
1952 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1956 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_WMM_MODE
);
1957 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1958 cmd
->action
= cpu_to_le16(!!enable
);
1960 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1964 priv
->wmm_enabled
= enable
;
1970 * CMD_SET_RTS_THRESHOLD.
1972 struct mwl8k_cmd_rts_threshold
{
1973 struct mwl8k_cmd_pkt header
;
1976 } __attribute__((packed
));
1978 static int mwl8k_rts_threshold(struct ieee80211_hw
*hw
,
1979 u16 action
, u16 threshold
)
1981 struct mwl8k_cmd_rts_threshold
*cmd
;
1984 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1988 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD
);
1989 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1990 cmd
->action
= cpu_to_le16(action
);
1991 cmd
->threshold
= cpu_to_le16(threshold
);
1993 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2000 * CMD_SET_EDCA_PARAMS.
2002 struct mwl8k_cmd_set_edca_params
{
2003 struct mwl8k_cmd_pkt header
;
2005 /* See MWL8K_SET_EDCA_XXX below */
2008 /* TX opportunity in units of 32 us */
2011 /* Log exponent of max contention period: 0...15*/
2014 /* Log exponent of min contention period: 0...15 */
2017 /* Adaptive interframe spacing in units of 32us */
2020 /* TX queue to configure */
2022 } __attribute__((packed
));
2024 #define MWL8K_SET_EDCA_CW 0x01
2025 #define MWL8K_SET_EDCA_TXOP 0x02
2026 #define MWL8K_SET_EDCA_AIFS 0x04
2028 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2029 MWL8K_SET_EDCA_TXOP | \
2030 MWL8K_SET_EDCA_AIFS)
2033 mwl8k_set_edca_params(struct ieee80211_hw
*hw
, __u8 qnum
,
2034 __u16 cw_min
, __u16 cw_max
,
2035 __u8 aifs
, __u16 txop
)
2037 struct mwl8k_cmd_set_edca_params
*cmd
;
2040 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2044 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS
);
2045 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2046 cmd
->action
= cpu_to_le16(MWL8K_SET_EDCA_ALL
);
2047 cmd
->txop
= cpu_to_le16(txop
);
2048 cmd
->log_cw_max
= (u8
)ilog2(cw_max
+ 1);
2049 cmd
->log_cw_min
= (u8
)ilog2(cw_min
+ 1);
2053 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2060 * CMD_FINALIZE_JOIN.
2063 /* FJ beacon buffer size is compiled into the firmware. */
2064 #define MWL8K_FJ_BEACON_MAXLEN 128
2066 struct mwl8k_cmd_finalize_join
{
2067 struct mwl8k_cmd_pkt header
;
2068 __le32 sleep_interval
; /* Number of beacon periods to sleep */
2069 __u8 beacon_data
[MWL8K_FJ_BEACON_MAXLEN
];
2070 } __attribute__((packed
));
2072 static int mwl8k_finalize_join(struct ieee80211_hw
*hw
, void *frame
,
2073 __u16 framelen
, __u16 dtim
)
2075 struct mwl8k_cmd_finalize_join
*cmd
;
2076 struct ieee80211_mgmt
*payload
= frame
;
2084 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2088 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN
);
2089 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2090 cmd
->sleep_interval
= cpu_to_le32(dtim
? dtim
: 1);
2092 hdrlen
= ieee80211_hdrlen(payload
->frame_control
);
2094 payload_len
= framelen
> hdrlen
? framelen
- hdrlen
: 0;
2096 /* XXX TBD Might just have to abort and return an error */
2097 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2098 printk(KERN_ERR
"%s(): WARNING: Incomplete beacon "
2099 "sent to firmware. Sz=%u MAX=%u\n", __func__
,
2100 payload_len
, MWL8K_FJ_BEACON_MAXLEN
);
2102 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2103 payload_len
= MWL8K_FJ_BEACON_MAXLEN
;
2105 if (payload
&& payload_len
)
2106 memcpy(cmd
->beacon_data
, &payload
->u
.beacon
, payload_len
);
2108 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2116 struct mwl8k_cmd_update_sta_db
{
2117 struct mwl8k_cmd_pkt header
;
2119 /* See STADB_ACTION_TYPE */
2122 /* Peer MAC address */
2123 __u8 peer_addr
[ETH_ALEN
];
2127 /* Peer info - valid during add/update. */
2128 struct peer_capability_info peer_info
;
2129 } __attribute__((packed
));
2131 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw
*hw
,
2132 struct ieee80211_vif
*vif
, __u32 action
)
2134 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2135 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2136 struct mwl8k_cmd_update_sta_db
*cmd
;
2137 struct peer_capability_info
*peer_info
;
2138 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2142 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2146 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_UPDATE_STADB
);
2147 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2149 cmd
->action
= cpu_to_le32(action
);
2150 peer_info
= &cmd
->peer_info
;
2151 memcpy(cmd
->peer_addr
, mv_vif
->bssid
, ETH_ALEN
);
2154 case MWL8K_STA_DB_ADD_ENTRY
:
2155 case MWL8K_STA_DB_MODIFY_ENTRY
:
2156 /* Build peer_info block */
2157 peer_info
->peer_type
= MWL8K_PEER_TYPE_ACCESSPOINT
;
2158 peer_info
->basic_caps
= cpu_to_le16(info
->assoc_capability
);
2159 peer_info
->interop
= 1;
2160 peer_info
->amsdu_enabled
= 0;
2162 rates
= peer_info
->legacy_rates
;
2163 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2164 rates
[count
] = bitrates
[count
].hw_value
;
2166 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2168 mv_vif
->peer_id
= peer_info
->station_id
;
2172 case MWL8K_STA_DB_DEL_ENTRY
:
2173 case MWL8K_STA_DB_FLUSH
:
2175 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2177 mv_vif
->peer_id
= 0;
2188 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2190 #define MWL8K_FRAME_PROT_DISABLED 0x00
2191 #define MWL8K_FRAME_PROT_11G 0x07
2192 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2193 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2195 struct mwl8k_cmd_update_set_aid
{
2196 struct mwl8k_cmd_pkt header
;
2199 /* AP's MAC address (BSSID) */
2200 __u8 bssid
[ETH_ALEN
];
2201 __le16 protection_mode
;
2202 __u8 supp_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2203 } __attribute__((packed
));
2205 static int mwl8k_cmd_set_aid(struct ieee80211_hw
*hw
,
2206 struct ieee80211_vif
*vif
)
2208 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2209 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2210 struct mwl8k_cmd_update_set_aid
*cmd
;
2211 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2216 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2220 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_AID
);
2221 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2222 cmd
->aid
= cpu_to_le16(info
->aid
);
2224 memcpy(cmd
->bssid
, mv_vif
->bssid
, ETH_ALEN
);
2226 if (info
->use_cts_prot
) {
2227 prot_mode
= MWL8K_FRAME_PROT_11G
;
2229 switch (info
->ht_operation_mode
&
2230 IEEE80211_HT_OP_MODE_PROTECTION
) {
2231 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
:
2232 prot_mode
= MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY
;
2234 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED
:
2235 prot_mode
= MWL8K_FRAME_PROT_11N_HT_ALL
;
2238 prot_mode
= MWL8K_FRAME_PROT_DISABLED
;
2242 cmd
->protection_mode
= cpu_to_le16(prot_mode
);
2244 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2245 cmd
->supp_rates
[count
] = bitrates
[count
].hw_value
;
2247 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2256 struct mwl8k_cmd_update_rateset
{
2257 struct mwl8k_cmd_pkt header
;
2258 __u8 legacy_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2260 /* Bitmap for supported MCS codes. */
2261 __u8 mcs_set
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2262 __u8 reserved
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2263 } __attribute__((packed
));
2265 static int mwl8k_update_rateset(struct ieee80211_hw
*hw
,
2266 struct ieee80211_vif
*vif
)
2268 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2269 struct mwl8k_cmd_update_rateset
*cmd
;
2270 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2274 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2278 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATE
);
2279 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2281 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2282 cmd
->legacy_rates
[count
] = bitrates
[count
].hw_value
;
2284 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2291 * CMD_USE_FIXED_RATE.
2293 #define MWL8K_RATE_TABLE_SIZE 8
2294 #define MWL8K_UCAST_RATE 0
2295 #define MWL8K_USE_AUTO_RATE 0x0002
2297 struct mwl8k_rate_entry
{
2298 /* Set to 1 if HT rate, 0 if legacy. */
2301 /* Set to 1 to use retry_count field. */
2302 __le32 enable_retry
;
2304 /* Specified legacy rate or MCS. */
2307 /* Number of allowed retries. */
2309 } __attribute__((packed
));
2311 struct mwl8k_rate_table
{
2312 /* 1 to allow specified rate and below */
2313 __le32 allow_rate_drop
;
2315 struct mwl8k_rate_entry rate_entry
[MWL8K_RATE_TABLE_SIZE
];
2316 } __attribute__((packed
));
2318 struct mwl8k_cmd_use_fixed_rate
{
2319 struct mwl8k_cmd_pkt header
;
2321 struct mwl8k_rate_table rate_table
;
2323 /* Unicast, Broadcast or Multicast */
2327 } __attribute__((packed
));
2329 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw
*hw
,
2330 u32 action
, u32 rate_type
, struct mwl8k_rate_table
*rate_table
)
2332 struct mwl8k_cmd_use_fixed_rate
*cmd
;
2336 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2340 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE
);
2341 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2343 cmd
->action
= cpu_to_le32(action
);
2344 cmd
->rate_type
= cpu_to_le32(rate_type
);
2346 if (rate_table
!= NULL
) {
2348 * Copy over each field manually so that endian
2349 * conversion can be done.
2351 cmd
->rate_table
.allow_rate_drop
=
2352 cpu_to_le32(rate_table
->allow_rate_drop
);
2353 cmd
->rate_table
.num_rates
=
2354 cpu_to_le32(rate_table
->num_rates
);
2356 for (count
= 0; count
< rate_table
->num_rates
; count
++) {
2357 struct mwl8k_rate_entry
*dst
=
2358 &cmd
->rate_table
.rate_entry
[count
];
2359 struct mwl8k_rate_entry
*src
=
2360 &rate_table
->rate_entry
[count
];
2362 dst
->is_ht_rate
= cpu_to_le32(src
->is_ht_rate
);
2363 dst
->enable_retry
= cpu_to_le32(src
->enable_retry
);
2364 dst
->rate
= cpu_to_le32(src
->rate
);
2365 dst
->retry_count
= cpu_to_le32(src
->retry_count
);
2369 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2377 * Interrupt handling.
2379 static irqreturn_t
mwl8k_interrupt(int irq
, void *dev_id
)
2381 struct ieee80211_hw
*hw
= dev_id
;
2382 struct mwl8k_priv
*priv
= hw
->priv
;
2385 status
= ioread32(priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2386 iowrite32(~status
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2391 if (status
& MWL8K_A2H_INT_TX_DONE
)
2392 tasklet_schedule(&priv
->tx_reclaim_task
);
2394 if (status
& MWL8K_A2H_INT_RX_READY
) {
2395 while (rxq_process(hw
, 0, 1))
2396 rxq_refill(hw
, 0, 1);
2399 if (status
& MWL8K_A2H_INT_OPC_DONE
) {
2400 if (priv
->hostcmd_wait
!= NULL
)
2401 complete(priv
->hostcmd_wait
);
2404 if (status
& MWL8K_A2H_INT_QUEUE_EMPTY
) {
2405 if (!mutex_is_locked(&priv
->fw_mutex
) &&
2406 priv
->radio_on
&& priv
->pending_tx_pkts
)
2407 mwl8k_tx_start(priv
);
2415 * Core driver operations.
2417 static int mwl8k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2419 struct mwl8k_priv
*priv
= hw
->priv
;
2420 int index
= skb_get_queue_mapping(skb
);
2423 if (priv
->current_channel
== NULL
) {
2424 printk(KERN_DEBUG
"%s: dropped TX frame since radio "
2425 "disabled\n", wiphy_name(hw
->wiphy
));
2427 return NETDEV_TX_OK
;
2430 rc
= mwl8k_txq_xmit(hw
, index
, skb
);
2435 static int mwl8k_start(struct ieee80211_hw
*hw
)
2437 struct mwl8k_priv
*priv
= hw
->priv
;
2440 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2441 IRQF_SHARED
, MWL8K_NAME
, hw
);
2443 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2444 wiphy_name(hw
->wiphy
));
2448 /* Enable tx reclaim tasklet */
2449 tasklet_enable(&priv
->tx_reclaim_task
);
2451 /* Enable interrupts */
2452 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2454 rc
= mwl8k_fw_lock(hw
);
2456 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2459 rc
= mwl8k_cmd_set_pre_scan(hw
);
2462 rc
= mwl8k_cmd_set_post_scan(hw
,
2463 "\x00\x00\x00\x00\x00\x00");
2466 rc
= mwl8k_cmd_setrateadaptmode(hw
, 0);
2469 rc
= mwl8k_set_wmm(hw
, 0);
2472 rc
= mwl8k_enable_sniffer(hw
, 0);
2474 mwl8k_fw_unlock(hw
);
2478 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2479 free_irq(priv
->pdev
->irq
, hw
);
2480 tasklet_disable(&priv
->tx_reclaim_task
);
2486 static void mwl8k_stop(struct ieee80211_hw
*hw
)
2488 struct mwl8k_priv
*priv
= hw
->priv
;
2491 mwl8k_cmd_802_11_radio_disable(hw
);
2493 ieee80211_stop_queues(hw
);
2495 /* Disable interrupts */
2496 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2497 free_irq(priv
->pdev
->irq
, hw
);
2499 /* Stop finalize join worker */
2500 cancel_work_sync(&priv
->finalize_join_worker
);
2501 if (priv
->beacon_skb
!= NULL
)
2502 dev_kfree_skb(priv
->beacon_skb
);
2504 /* Stop tx reclaim tasklet */
2505 tasklet_disable(&priv
->tx_reclaim_task
);
2507 /* Stop config thread */
2508 flush_workqueue(priv
->config_wq
);
2510 /* Return all skbs to mac80211 */
2511 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2512 mwl8k_txq_reclaim(hw
, i
, 1);
2515 static int mwl8k_add_interface(struct ieee80211_hw
*hw
,
2516 struct ieee80211_if_init_conf
*conf
)
2518 struct mwl8k_priv
*priv
= hw
->priv
;
2519 struct mwl8k_vif
*mwl8k_vif
;
2522 * We only support one active interface at a time.
2524 if (priv
->vif
!= NULL
)
2528 * We only support managed interfaces for now.
2530 if (conf
->type
!= NL80211_IFTYPE_STATION
)
2533 /* Clean out driver private area */
2534 mwl8k_vif
= MWL8K_VIF(conf
->vif
);
2535 memset(mwl8k_vif
, 0, sizeof(*mwl8k_vif
));
2537 /* Save the mac address */
2538 memcpy(mwl8k_vif
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2540 /* Back pointer to parent config block */
2541 mwl8k_vif
->priv
= priv
;
2543 /* Setup initial PHY parameters */
2544 memcpy(mwl8k_vif
->legacy_rates
,
2545 priv
->rates
, sizeof(mwl8k_vif
->legacy_rates
));
2546 mwl8k_vif
->legacy_nrates
= ARRAY_SIZE(priv
->rates
);
2548 /* Set Initial sequence number to zero */
2549 mwl8k_vif
->seqno
= 0;
2551 priv
->vif
= conf
->vif
;
2552 priv
->current_channel
= NULL
;
2557 static void mwl8k_remove_interface(struct ieee80211_hw
*hw
,
2558 struct ieee80211_if_init_conf
*conf
)
2560 struct mwl8k_priv
*priv
= hw
->priv
;
2562 if (priv
->vif
== NULL
)
2568 static int mwl8k_config(struct ieee80211_hw
*hw
, u32 changed
)
2570 struct ieee80211_conf
*conf
= &hw
->conf
;
2571 struct mwl8k_priv
*priv
= hw
->priv
;
2574 if (conf
->flags
& IEEE80211_CONF_IDLE
) {
2575 mwl8k_cmd_802_11_radio_disable(hw
);
2576 priv
->current_channel
= NULL
;
2580 rc
= mwl8k_fw_lock(hw
);
2584 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2588 rc
= mwl8k_cmd_set_rf_channel(hw
, conf
->channel
);
2592 priv
->current_channel
= conf
->channel
;
2594 if (conf
->power_level
> 18)
2595 conf
->power_level
= 18;
2596 rc
= mwl8k_cmd_802_11_rf_tx_power(hw
, conf
->power_level
);
2600 if (mwl8k_cmd_mimo_config(hw
, 0x7, 0x7))
2604 mwl8k_fw_unlock(hw
);
2609 static void mwl8k_bss_info_changed(struct ieee80211_hw
*hw
,
2610 struct ieee80211_vif
*vif
,
2611 struct ieee80211_bss_conf
*info
,
2614 struct mwl8k_priv
*priv
= hw
->priv
;
2615 struct mwl8k_vif
*mwl8k_vif
= MWL8K_VIF(vif
);
2618 if (changed
& BSS_CHANGED_BSSID
)
2619 memcpy(mwl8k_vif
->bssid
, info
->bssid
, ETH_ALEN
);
2621 if ((changed
& BSS_CHANGED_ASSOC
) == 0)
2624 priv
->capture_beacon
= false;
2626 rc
= mwl8k_fw_lock(hw
);
2631 memcpy(&mwl8k_vif
->bss_info
, info
,
2632 sizeof(struct ieee80211_bss_conf
));
2635 rc
= mwl8k_update_rateset(hw
, vif
);
2639 /* Turn on rate adaptation */
2640 rc
= mwl8k_cmd_use_fixed_rate(hw
, MWL8K_USE_AUTO_RATE
,
2641 MWL8K_UCAST_RATE
, NULL
);
2645 /* Set radio preamble */
2646 rc
= mwl8k_set_radio_preamble(hw
, info
->use_short_preamble
);
2651 rc
= mwl8k_cmd_set_slot(hw
, info
->use_short_slot
);
2655 /* Update peer rate info */
2656 rc
= mwl8k_cmd_update_sta_db(hw
, vif
,
2657 MWL8K_STA_DB_MODIFY_ENTRY
);
2662 rc
= mwl8k_cmd_set_aid(hw
, vif
);
2667 * Finalize the join. Tell rx handler to process
2668 * next beacon from our BSSID.
2670 memcpy(priv
->capture_bssid
, mwl8k_vif
->bssid
, ETH_ALEN
);
2671 priv
->capture_beacon
= true;
2673 rc
= mwl8k_cmd_update_sta_db(hw
, vif
, MWL8K_STA_DB_DEL_ENTRY
);
2674 memset(&mwl8k_vif
->bss_info
, 0,
2675 sizeof(struct ieee80211_bss_conf
));
2676 memset(mwl8k_vif
->bssid
, 0, ETH_ALEN
);
2680 mwl8k_fw_unlock(hw
);
2683 static u64
mwl8k_prepare_multicast(struct ieee80211_hw
*hw
,
2684 int mc_count
, struct dev_addr_list
*mclist
)
2686 struct mwl8k_cmd_pkt
*cmd
;
2688 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, mc_count
, mclist
);
2690 return (unsigned long)cmd
;
2693 static void mwl8k_configure_filter(struct ieee80211_hw
*hw
,
2694 unsigned int changed_flags
,
2695 unsigned int *total_flags
,
2698 struct mwl8k_priv
*priv
= hw
->priv
;
2699 struct mwl8k_cmd_pkt
*multicast_adr_cmd
;
2701 /* Clear unsupported feature flags */
2702 *total_flags
&= FIF_BCN_PRBRESP_PROMISC
;
2704 if (mwl8k_fw_lock(hw
))
2707 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
2708 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
)
2709 mwl8k_cmd_set_pre_scan(hw
);
2713 bssid
= "\x00\x00\x00\x00\x00\x00";
2714 if (priv
->vif
!= NULL
)
2715 bssid
= MWL8K_VIF(priv
->vif
)->bssid
;
2717 mwl8k_cmd_set_post_scan(hw
, bssid
);
2721 multicast_adr_cmd
= (void *)(unsigned long)multicast
;
2722 if (multicast_adr_cmd
!= NULL
) {
2723 mwl8k_post_cmd(hw
, multicast_adr_cmd
);
2724 kfree(multicast_adr_cmd
);
2727 mwl8k_fw_unlock(hw
);
2730 static int mwl8k_set_rts_threshold(struct ieee80211_hw
*hw
, u32 value
)
2732 return mwl8k_rts_threshold(hw
, MWL8K_CMD_SET
, value
);
2735 static int mwl8k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
2736 const struct ieee80211_tx_queue_params
*params
)
2738 struct mwl8k_priv
*priv
= hw
->priv
;
2741 rc
= mwl8k_fw_lock(hw
);
2743 if (!priv
->wmm_enabled
)
2744 rc
= mwl8k_set_wmm(hw
, 1);
2747 rc
= mwl8k_set_edca_params(hw
, queue
,
2753 mwl8k_fw_unlock(hw
);
2759 static int mwl8k_get_tx_stats(struct ieee80211_hw
*hw
,
2760 struct ieee80211_tx_queue_stats
*stats
)
2762 struct mwl8k_priv
*priv
= hw
->priv
;
2763 struct mwl8k_tx_queue
*txq
;
2766 spin_lock_bh(&priv
->tx_lock
);
2767 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++) {
2768 txq
= priv
->txq
+ index
;
2769 memcpy(&stats
[index
], &txq
->tx_stats
,
2770 sizeof(struct ieee80211_tx_queue_stats
));
2772 spin_unlock_bh(&priv
->tx_lock
);
2777 static int mwl8k_get_stats(struct ieee80211_hw
*hw
,
2778 struct ieee80211_low_level_stats
*stats
)
2780 return mwl8k_cmd_802_11_get_stat(hw
, stats
);
2783 static const struct ieee80211_ops mwl8k_ops
= {
2785 .start
= mwl8k_start
,
2787 .add_interface
= mwl8k_add_interface
,
2788 .remove_interface
= mwl8k_remove_interface
,
2789 .config
= mwl8k_config
,
2790 .bss_info_changed
= mwl8k_bss_info_changed
,
2791 .prepare_multicast
= mwl8k_prepare_multicast
,
2792 .configure_filter
= mwl8k_configure_filter
,
2793 .set_rts_threshold
= mwl8k_set_rts_threshold
,
2794 .conf_tx
= mwl8k_conf_tx
,
2795 .get_tx_stats
= mwl8k_get_tx_stats
,
2796 .get_stats
= mwl8k_get_stats
,
2799 static void mwl8k_tx_reclaim_handler(unsigned long data
)
2802 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*) data
;
2803 struct mwl8k_priv
*priv
= hw
->priv
;
2805 spin_lock_bh(&priv
->tx_lock
);
2806 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2807 mwl8k_txq_reclaim(hw
, i
, 0);
2809 if (priv
->tx_wait
!= NULL
&& !priv
->pending_tx_pkts
) {
2810 complete(priv
->tx_wait
);
2811 priv
->tx_wait
= NULL
;
2813 spin_unlock_bh(&priv
->tx_lock
);
2816 static void mwl8k_finalize_join_worker(struct work_struct
*work
)
2818 struct mwl8k_priv
*priv
=
2819 container_of(work
, struct mwl8k_priv
, finalize_join_worker
);
2820 struct sk_buff
*skb
= priv
->beacon_skb
;
2821 u8 dtim
= MWL8K_VIF(priv
->vif
)->bss_info
.dtim_period
;
2823 mwl8k_finalize_join(priv
->hw
, skb
->data
, skb
->len
, dtim
);
2826 priv
->beacon_skb
= NULL
;
2829 static int __devinit
mwl8k_probe(struct pci_dev
*pdev
,
2830 const struct pci_device_id
*id
)
2832 static int printed_version
= 0;
2833 struct ieee80211_hw
*hw
;
2834 struct mwl8k_priv
*priv
;
2838 if (!printed_version
) {
2839 printk(KERN_INFO
"%s version %s\n", MWL8K_DESC
, MWL8K_VERSION
);
2840 printed_version
= 1;
2843 rc
= pci_enable_device(pdev
);
2845 printk(KERN_ERR
"%s: Cannot enable new PCI device\n",
2850 rc
= pci_request_regions(pdev
, MWL8K_NAME
);
2852 printk(KERN_ERR
"%s: Cannot obtain PCI resources\n",
2857 pci_set_master(pdev
);
2859 hw
= ieee80211_alloc_hw(sizeof(*priv
), &mwl8k_ops
);
2861 printk(KERN_ERR
"%s: ieee80211 alloc failed\n", MWL8K_NAME
);
2869 priv
->wmm_enabled
= false;
2870 priv
->pending_tx_pkts
= 0;
2872 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
2873 pci_set_drvdata(pdev
, hw
);
2875 priv
->regs
= pci_iomap(pdev
, 1, 0x10000);
2876 if (priv
->regs
== NULL
) {
2877 printk(KERN_ERR
"%s: Cannot map device memory\n",
2878 wiphy_name(hw
->wiphy
));
2882 memcpy(priv
->channels
, mwl8k_channels
, sizeof(mwl8k_channels
));
2883 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
2884 priv
->band
.channels
= priv
->channels
;
2885 priv
->band
.n_channels
= ARRAY_SIZE(mwl8k_channels
);
2886 priv
->band
.bitrates
= priv
->rates
;
2887 priv
->band
.n_bitrates
= ARRAY_SIZE(mwl8k_rates
);
2888 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
2890 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(mwl8k_rates
));
2891 memcpy(priv
->rates
, mwl8k_rates
, sizeof(mwl8k_rates
));
2894 * Extra headroom is the size of the required DMA header
2895 * minus the size of the smallest 802.11 frame (CTS frame).
2897 hw
->extra_tx_headroom
=
2898 sizeof(struct mwl8k_dma_data
) - sizeof(struct ieee80211_cts
);
2900 hw
->channel_change_time
= 10;
2902 hw
->queues
= MWL8K_TX_QUEUES
;
2904 hw
->wiphy
->interface_modes
= BIT(NL80211_IFTYPE_STATION
);
2906 /* Set rssi and noise values to dBm */
2907 hw
->flags
|= IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_NOISE_DBM
;
2908 hw
->vif_data_size
= sizeof(struct mwl8k_vif
);
2911 /* Set default radio state and preamble */
2913 priv
->radio_short_preamble
= 0;
2915 /* Finalize join worker */
2916 INIT_WORK(&priv
->finalize_join_worker
, mwl8k_finalize_join_worker
);
2918 /* TX reclaim tasklet */
2919 tasklet_init(&priv
->tx_reclaim_task
,
2920 mwl8k_tx_reclaim_handler
, (unsigned long)hw
);
2921 tasklet_disable(&priv
->tx_reclaim_task
);
2923 /* Config workthread */
2924 priv
->config_wq
= create_singlethread_workqueue("mwl8k_config");
2925 if (priv
->config_wq
== NULL
)
2928 /* Power management cookie */
2929 priv
->cookie
= pci_alloc_consistent(priv
->pdev
, 4, &priv
->cookie_dma
);
2930 if (priv
->cookie
== NULL
)
2933 rc
= mwl8k_rxq_init(hw
, 0);
2936 rxq_refill(hw
, 0, INT_MAX
);
2938 mutex_init(&priv
->fw_mutex
);
2939 priv
->fw_mutex_owner
= NULL
;
2940 priv
->fw_mutex_depth
= 0;
2941 priv
->hostcmd_wait
= NULL
;
2943 spin_lock_init(&priv
->tx_lock
);
2945 priv
->tx_wait
= NULL
;
2947 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++) {
2948 rc
= mwl8k_txq_init(hw
, i
);
2950 goto err_free_queues
;
2953 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2954 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2955 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL
);
2956 iowrite32(0xffffffff, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK
);
2958 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2959 IRQF_SHARED
, MWL8K_NAME
, hw
);
2961 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2962 wiphy_name(hw
->wiphy
));
2963 goto err_free_queues
;
2966 /* Reset firmware and hardware */
2967 mwl8k_hw_reset(priv
);
2969 /* Ask userland hotplug daemon for the device firmware */
2970 rc
= mwl8k_request_firmware(priv
, (u32
)id
->driver_data
);
2972 printk(KERN_ERR
"%s: Firmware files not found\n",
2973 wiphy_name(hw
->wiphy
));
2977 /* Load firmware into hardware */
2978 rc
= mwl8k_load_firmware(hw
);
2980 printk(KERN_ERR
"%s: Cannot start firmware\n",
2981 wiphy_name(hw
->wiphy
));
2982 goto err_stop_firmware
;
2985 /* Reclaim memory once firmware is successfully loaded */
2986 mwl8k_release_firmware(priv
);
2989 * Temporarily enable interrupts. Initial firmware host
2990 * commands use interrupts and avoids polling. Disable
2991 * interrupts when done.
2993 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2995 /* Get config data, mac addrs etc */
2996 rc
= mwl8k_cmd_get_hw_spec(hw
);
2998 printk(KERN_ERR
"%s: Cannot initialise firmware\n",
2999 wiphy_name(hw
->wiphy
));
3000 goto err_stop_firmware
;
3003 /* Turn radio off */
3004 rc
= mwl8k_cmd_802_11_radio_disable(hw
);
3006 printk(KERN_ERR
"%s: Cannot disable\n", wiphy_name(hw
->wiphy
));
3007 goto err_stop_firmware
;
3010 /* Disable interrupts */
3011 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3012 free_irq(priv
->pdev
->irq
, hw
);
3014 rc
= ieee80211_register_hw(hw
);
3016 printk(KERN_ERR
"%s: Cannot register device\n",
3017 wiphy_name(hw
->wiphy
));
3018 goto err_stop_firmware
;
3021 printk(KERN_INFO
"%s: 88w%u v%d, %pM, firmware version %u.%u.%u.%u\n",
3022 wiphy_name(hw
->wiphy
), priv
->part_num
, priv
->hw_rev
,
3023 hw
->wiphy
->perm_addr
,
3024 (priv
->fw_rev
>> 24) & 0xff, (priv
->fw_rev
>> 16) & 0xff,
3025 (priv
->fw_rev
>> 8) & 0xff, priv
->fw_rev
& 0xff);
3030 mwl8k_hw_reset(priv
);
3031 mwl8k_release_firmware(priv
);
3034 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3035 free_irq(priv
->pdev
->irq
, hw
);
3038 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3039 mwl8k_txq_deinit(hw
, i
);
3040 mwl8k_rxq_deinit(hw
, 0);
3043 if (priv
->cookie
!= NULL
)
3044 pci_free_consistent(priv
->pdev
, 4,
3045 priv
->cookie
, priv
->cookie_dma
);
3047 if (priv
->regs
!= NULL
)
3048 pci_iounmap(pdev
, priv
->regs
);
3050 if (priv
->config_wq
!= NULL
)
3051 destroy_workqueue(priv
->config_wq
);
3053 pci_set_drvdata(pdev
, NULL
);
3054 ieee80211_free_hw(hw
);
3057 pci_release_regions(pdev
);
3058 pci_disable_device(pdev
);
3063 static void __devexit
mwl8k_shutdown(struct pci_dev
*pdev
)
3065 printk(KERN_ERR
"===>%s(%u)\n", __func__
, __LINE__
);
3068 static void __devexit
mwl8k_remove(struct pci_dev
*pdev
)
3070 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
3071 struct mwl8k_priv
*priv
;
3078 ieee80211_stop_queues(hw
);
3080 ieee80211_unregister_hw(hw
);
3082 /* Remove tx reclaim tasklet */
3083 tasklet_kill(&priv
->tx_reclaim_task
);
3085 /* Stop config thread */
3086 destroy_workqueue(priv
->config_wq
);
3089 mwl8k_hw_reset(priv
);
3091 /* Return all skbs to mac80211 */
3092 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3093 mwl8k_txq_reclaim(hw
, i
, 1);
3095 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3096 mwl8k_txq_deinit(hw
, i
);
3098 mwl8k_rxq_deinit(hw
, 0);
3100 pci_free_consistent(priv
->pdev
, 4, priv
->cookie
, priv
->cookie_dma
);
3102 pci_iounmap(pdev
, priv
->regs
);
3103 pci_set_drvdata(pdev
, NULL
);
3104 ieee80211_free_hw(hw
);
3105 pci_release_regions(pdev
);
3106 pci_disable_device(pdev
);
3109 static struct pci_driver mwl8k_driver
= {
3111 .id_table
= mwl8k_table
,
3112 .probe
= mwl8k_probe
,
3113 .remove
= __devexit_p(mwl8k_remove
),
3114 .shutdown
= __devexit_p(mwl8k_shutdown
),
3117 static int __init
mwl8k_init(void)
3119 return pci_register_driver(&mwl8k_driver
);
3122 static void __exit
mwl8k_exit(void)
3124 pci_unregister_driver(&mwl8k_driver
);
3127 module_init(mwl8k_init
);
3128 module_exit(mwl8k_exit
);
3130 MODULE_DESCRIPTION(MWL8K_DESC
);
3131 MODULE_VERSION(MWL8K_VERSION
);
3132 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3133 MODULE_LICENSE("GPL");