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mac80211: let drivers wake but not start queues
[deliverable/linux.git] / drivers / net / wireless / p54 / p54common.c
1
2 /*
3 * Common code for mac80211 Prism54 drivers
4 *
5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
7 *
8 * Based on the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/init.h>
17 #include <linux/firmware.h>
18 #include <linux/etherdevice.h>
19
20 #include <net/mac80211.h>
21
22 #include "p54.h"
23 #include "p54common.h"
24
25 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
26 MODULE_DESCRIPTION("Softmac Prism54 common code");
27 MODULE_LICENSE("GPL");
28 MODULE_ALIAS("prism54common");
29
30 static struct ieee80211_rate p54_rates[] = {
31 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
32 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
33 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
34 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35 { .bitrate = 60, .hw_value = 4, },
36 { .bitrate = 90, .hw_value = 5, },
37 { .bitrate = 120, .hw_value = 6, },
38 { .bitrate = 180, .hw_value = 7, },
39 { .bitrate = 240, .hw_value = 8, },
40 { .bitrate = 360, .hw_value = 9, },
41 { .bitrate = 480, .hw_value = 10, },
42 { .bitrate = 540, .hw_value = 11, },
43 };
44
45 static struct ieee80211_channel p54_channels[] = {
46 { .center_freq = 2412, .hw_value = 1, },
47 { .center_freq = 2417, .hw_value = 2, },
48 { .center_freq = 2422, .hw_value = 3, },
49 { .center_freq = 2427, .hw_value = 4, },
50 { .center_freq = 2432, .hw_value = 5, },
51 { .center_freq = 2437, .hw_value = 6, },
52 { .center_freq = 2442, .hw_value = 7, },
53 { .center_freq = 2447, .hw_value = 8, },
54 { .center_freq = 2452, .hw_value = 9, },
55 { .center_freq = 2457, .hw_value = 10, },
56 { .center_freq = 2462, .hw_value = 11, },
57 { .center_freq = 2467, .hw_value = 12, },
58 { .center_freq = 2472, .hw_value = 13, },
59 { .center_freq = 2484, .hw_value = 14, },
60 };
61
62 static struct ieee80211_supported_band band_2GHz = {
63 .channels = p54_channels,
64 .n_channels = ARRAY_SIZE(p54_channels),
65 .bitrates = p54_rates,
66 .n_bitrates = ARRAY_SIZE(p54_rates),
67 };
68
69
70 void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
71 {
72 struct p54_common *priv = dev->priv;
73 struct bootrec_exp_if *exp_if;
74 struct bootrec *bootrec;
75 u32 *data = (u32 *)fw->data;
76 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
77 u8 *fw_version = NULL;
78 size_t len;
79 int i;
80
81 if (priv->rx_start)
82 return;
83
84 while (data < end_data && *data)
85 data++;
86
87 while (data < end_data && !*data)
88 data++;
89
90 bootrec = (struct bootrec *) data;
91
92 while (bootrec->data <= end_data &&
93 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
94 u32 code = le32_to_cpu(bootrec->code);
95 switch (code) {
96 case BR_CODE_COMPONENT_ID:
97 switch (be32_to_cpu(*(__be32 *)bootrec->data)) {
98 case FW_FMAC:
99 printk(KERN_INFO "p54: FreeMAC firmware\n");
100 break;
101 case FW_LM20:
102 printk(KERN_INFO "p54: LM20 firmware\n");
103 break;
104 case FW_LM86:
105 printk(KERN_INFO "p54: LM86 firmware\n");
106 break;
107 case FW_LM87:
108 printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
109 break;
110 default:
111 printk(KERN_INFO "p54: unknown firmware\n");
112 break;
113 }
114 break;
115 case BR_CODE_COMPONENT_VERSION:
116 /* 24 bytes should be enough for all firmwares */
117 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
118 fw_version = (unsigned char*)bootrec->data;
119 break;
120 case BR_CODE_DESCR:
121 priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]);
122 /* FIXME add sanity checking */
123 priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500;
124 break;
125 case BR_CODE_EXPOSED_IF:
126 exp_if = (struct bootrec_exp_if *) bootrec->data;
127 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
128 if (exp_if[i].if_id == cpu_to_le16(0x1a))
129 priv->fw_var = le16_to_cpu(exp_if[i].variant);
130 break;
131 case BR_CODE_DEPENDENT_IF:
132 break;
133 case BR_CODE_END_OF_BRA:
134 case LEGACY_BR_CODE_END_OF_BRA:
135 end_data = NULL;
136 break;
137 default:
138 break;
139 }
140 bootrec = (struct bootrec *)&bootrec->data[len];
141 }
142
143 if (fw_version)
144 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
145 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
146
147 if (priv->fw_var >= 0x300) {
148 /* Firmware supports QoS, use it! */
149 priv->tx_stats[0].limit = 3;
150 priv->tx_stats[1].limit = 4;
151 priv->tx_stats[2].limit = 3;
152 priv->tx_stats[3].limit = 1;
153 dev->queues = 4;
154 }
155 }
156 EXPORT_SYMBOL_GPL(p54_parse_firmware);
157
158 static int p54_convert_rev0_to_rev1(struct ieee80211_hw *dev,
159 struct pda_pa_curve_data *curve_data)
160 {
161 struct p54_common *priv = dev->priv;
162 struct pda_pa_curve_data_sample_rev1 *rev1;
163 struct pda_pa_curve_data_sample_rev0 *rev0;
164 size_t cd_len = sizeof(*curve_data) +
165 (curve_data->points_per_channel*sizeof(*rev1) + 2) *
166 curve_data->channels;
167 unsigned int i, j;
168 void *source, *target;
169
170 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
171 if (!priv->curve_data)
172 return -ENOMEM;
173
174 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
175 source = curve_data->data;
176 target = priv->curve_data->data;
177 for (i = 0; i < curve_data->channels; i++) {
178 __le16 *freq = source;
179 source += sizeof(__le16);
180 *((__le16 *)target) = *freq;
181 target += sizeof(__le16);
182 for (j = 0; j < curve_data->points_per_channel; j++) {
183 rev1 = target;
184 rev0 = source;
185
186 rev1->rf_power = rev0->rf_power;
187 rev1->pa_detector = rev0->pa_detector;
188 rev1->data_64qam = rev0->pcv;
189 /* "invent" the points for the other modulations */
190 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
191 rev1->data_16qam = SUB(rev0->pcv, 12);
192 rev1->data_qpsk = SUB(rev1->data_16qam, 12);
193 rev1->data_bpsk = SUB(rev1->data_qpsk, 12);
194 rev1->data_barker= SUB(rev1->data_bpsk, 14);
195 #undef SUB
196 target += sizeof(*rev1);
197 source += sizeof(*rev0);
198 }
199 }
200
201 return 0;
202 }
203
204 int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
205 {
206 struct p54_common *priv = dev->priv;
207 struct eeprom_pda_wrap *wrap = NULL;
208 struct pda_entry *entry;
209 unsigned int data_len, entry_len;
210 void *tmp;
211 int err;
212 u8 *end = (u8 *)eeprom + len;
213
214 wrap = (struct eeprom_pda_wrap *) eeprom;
215 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
216
217 /* verify that at least the entry length/code fits */
218 while ((u8 *)entry <= end - sizeof(*entry)) {
219 entry_len = le16_to_cpu(entry->len);
220 data_len = ((entry_len - 1) << 1);
221
222 /* abort if entry exceeds whole structure */
223 if ((u8 *)entry + sizeof(*entry) + data_len > end)
224 break;
225
226 switch (le16_to_cpu(entry->code)) {
227 case PDR_MAC_ADDRESS:
228 SET_IEEE80211_PERM_ADDR(dev, entry->data);
229 break;
230 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
231 if (data_len < 2) {
232 err = -EINVAL;
233 goto err;
234 }
235
236 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
237 err = -EINVAL;
238 goto err;
239 }
240
241 priv->output_limit = kmalloc(entry->data[1] *
242 sizeof(*priv->output_limit), GFP_KERNEL);
243
244 if (!priv->output_limit) {
245 err = -ENOMEM;
246 goto err;
247 }
248
249 memcpy(priv->output_limit, &entry->data[2],
250 entry->data[1]*sizeof(*priv->output_limit));
251 priv->output_limit_len = entry->data[1];
252 break;
253 case PDR_PRISM_PA_CAL_CURVE_DATA:
254 if (data_len < sizeof(struct pda_pa_curve_data)) {
255 err = -EINVAL;
256 goto err;
257 }
258
259 if (((struct pda_pa_curve_data *)entry->data)->cal_method_rev) {
260 priv->curve_data = kmalloc(data_len, GFP_KERNEL);
261 if (!priv->curve_data) {
262 err = -ENOMEM;
263 goto err;
264 }
265
266 memcpy(priv->curve_data, entry->data, data_len);
267 } else {
268 err = p54_convert_rev0_to_rev1(dev, (struct pda_pa_curve_data *)entry->data);
269 if (err)
270 goto err;
271 }
272
273 break;
274 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
275 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
276 if (!priv->iq_autocal) {
277 err = -ENOMEM;
278 goto err;
279 }
280
281 memcpy(priv->iq_autocal, entry->data, data_len);
282 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
283 break;
284 case PDR_INTERFACE_LIST:
285 tmp = entry->data;
286 while ((u8 *)tmp < entry->data + data_len) {
287 struct bootrec_exp_if *exp_if = tmp;
288 if (le16_to_cpu(exp_if->if_id) == 0xF)
289 priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
290 tmp += sizeof(struct bootrec_exp_if);
291 }
292 break;
293 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
294 priv->version = *(u8 *)(entry->data + 1);
295 break;
296 case PDR_END:
297 /* make it overrun */
298 entry_len = len;
299 break;
300 default:
301 printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
302 le16_to_cpu(entry->code));
303 break;
304 }
305
306 entry = (void *)entry + (entry_len + 1)*2;
307 }
308
309 if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
310 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
311 err = -EINVAL;
312 goto err;
313 }
314
315 return 0;
316
317 err:
318 if (priv->iq_autocal) {
319 kfree(priv->iq_autocal);
320 priv->iq_autocal = NULL;
321 }
322
323 if (priv->output_limit) {
324 kfree(priv->output_limit);
325 priv->output_limit = NULL;
326 }
327
328 if (priv->curve_data) {
329 kfree(priv->curve_data);
330 priv->curve_data = NULL;
331 }
332
333 printk(KERN_ERR "p54: eeprom parse failed!\n");
334 return err;
335 }
336 EXPORT_SYMBOL_GPL(p54_parse_eeprom);
337
338 void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
339 {
340 struct p54_eeprom_lm86 *eeprom_hdr;
341
342 hdr->magic1 = cpu_to_le16(0x8000);
343 hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
344 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
345 hdr->retry1 = hdr->retry2 = 0;
346 eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
347 eeprom_hdr->offset = 0x0;
348 eeprom_hdr->len = cpu_to_le16(0x2000);
349 }
350 EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
351
352 static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
353 {
354 struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
355 struct ieee80211_rx_status rx_status = {0};
356 u16 freq = le16_to_cpu(hdr->freq);
357
358 rx_status.signal = hdr->rssi;
359 /* XX correct? */
360 rx_status.rate_idx = hdr->rate & 0xf;
361 rx_status.freq = freq;
362 rx_status.band = IEEE80211_BAND_2GHZ;
363 rx_status.antenna = hdr->antenna;
364 rx_status.mactime = le64_to_cpu(hdr->timestamp);
365 rx_status.flag |= RX_FLAG_TSFT;
366
367 skb_pull(skb, sizeof(*hdr));
368 skb_trim(skb, le16_to_cpu(hdr->len));
369
370 ieee80211_rx_irqsafe(dev, skb, &rx_status);
371 }
372
373 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
374 {
375 struct p54_common *priv = dev->priv;
376 int i;
377
378 for (i = 0; i < dev->queues; i++)
379 if (priv->tx_stats[i].len < priv->tx_stats[i].limit)
380 ieee80211_wake_queue(dev, i);
381 }
382
383 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
384 {
385 struct p54_common *priv = dev->priv;
386 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
387 struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
388 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
389 u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
390 struct memrecord *range = NULL;
391 u32 freed = 0;
392 u32 last_addr = priv->rx_start;
393
394 while (entry != (struct sk_buff *)&priv->tx_queue) {
395 range = (struct memrecord *)&entry->cb;
396 if (range->start_addr == addr) {
397 struct ieee80211_tx_status status;
398 struct p54_control_hdr *entry_hdr;
399 struct p54_tx_control_allocdata *entry_data;
400 int pad = 0;
401
402 if (entry->next != (struct sk_buff *)&priv->tx_queue)
403 freed = ((struct memrecord *)&entry->next->cb)->start_addr - last_addr;
404 else
405 freed = priv->rx_end - last_addr;
406
407 last_addr = range->end_addr;
408 __skb_unlink(entry, &priv->tx_queue);
409 if (!range->control) {
410 kfree_skb(entry);
411 break;
412 }
413 memset(&status, 0, sizeof(status));
414 memcpy(&status.control, range->control,
415 sizeof(status.control));
416 kfree(range->control);
417 priv->tx_stats[status.control.queue].len--;
418 entry_hdr = (struct p54_control_hdr *) entry->data;
419 entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
420 if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
421 pad = entry_data->align[0];
422
423 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
424 if (!(payload->status & 0x01))
425 status.flags |= IEEE80211_TX_STATUS_ACK;
426 else
427 status.excessive_retries = 1;
428 }
429 status.retry_count = payload->retries - 1;
430 status.ack_signal = le16_to_cpu(payload->ack_rssi);
431 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
432 ieee80211_tx_status_irqsafe(dev, entry, &status);
433 break;
434 } else
435 last_addr = range->end_addr;
436 entry = entry->next;
437 }
438
439 if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
440 sizeof(struct p54_control_hdr))
441 p54_wake_free_queues(dev);
442 }
443
444 static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
445 {
446 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
447
448 switch (le16_to_cpu(hdr->type)) {
449 case P54_CONTROL_TYPE_TXDONE:
450 p54_rx_frame_sent(dev, skb);
451 break;
452 case P54_CONTROL_TYPE_BBP:
453 break;
454 default:
455 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
456 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
457 break;
458 }
459 }
460
461 /* returns zero if skb can be reused */
462 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
463 {
464 u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
465 switch (type) {
466 case 0x00:
467 case 0x01:
468 p54_rx_data(dev, skb);
469 return -1;
470 case 0x4d:
471 /* TODO: do something better... but then again, I've never seen this happen */
472 printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
473 wiphy_name(dev->wiphy));
474 break;
475 case 0x80:
476 p54_rx_control(dev, skb);
477 break;
478 default:
479 printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
480 wiphy_name(dev->wiphy), type);
481 break;
482 }
483 return 0;
484 }
485 EXPORT_SYMBOL_GPL(p54_rx);
486
487 /*
488 * So, the firmware is somewhat stupid and doesn't know what places in its
489 * memory incoming data should go to. By poking around in the firmware, we
490 * can find some unused memory to upload our packets to. However, data that we
491 * want the card to TX needs to stay intact until the card has told us that
492 * it is done with it. This function finds empty places we can upload to and
493 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
494 * allocated areas.
495 */
496 static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
497 struct p54_control_hdr *data, u32 len,
498 struct ieee80211_tx_control *control)
499 {
500 struct p54_common *priv = dev->priv;
501 struct sk_buff *entry = priv->tx_queue.next;
502 struct sk_buff *target_skb = NULL;
503 struct memrecord *range;
504 u32 last_addr = priv->rx_start;
505 u32 largest_hole = 0;
506 u32 target_addr = priv->rx_start;
507 unsigned long flags;
508 unsigned int left;
509 len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
510
511 spin_lock_irqsave(&priv->tx_queue.lock, flags);
512 left = skb_queue_len(&priv->tx_queue);
513 while (left--) {
514 u32 hole_size;
515 range = (struct memrecord *)&entry->cb;
516 hole_size = range->start_addr - last_addr;
517 if (!target_skb && hole_size >= len) {
518 target_skb = entry->prev;
519 hole_size -= len;
520 target_addr = last_addr;
521 }
522 largest_hole = max(largest_hole, hole_size);
523 last_addr = range->end_addr;
524 entry = entry->next;
525 }
526 if (!target_skb && priv->rx_end - last_addr >= len) {
527 target_skb = priv->tx_queue.prev;
528 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
529 if (!skb_queue_empty(&priv->tx_queue)) {
530 range = (struct memrecord *)&target_skb->cb;
531 target_addr = range->end_addr;
532 }
533 } else
534 largest_hole = max(largest_hole, priv->rx_end - last_addr);
535
536 if (skb) {
537 range = (struct memrecord *)&skb->cb;
538 range->start_addr = target_addr;
539 range->end_addr = target_addr + len;
540 range->control = control;
541 __skb_queue_after(&priv->tx_queue, target_skb, skb);
542 if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
543 sizeof(struct p54_control_hdr))
544 ieee80211_stop_queues(dev);
545 }
546 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
547
548 data->req_id = cpu_to_le32(target_addr + 0x70);
549 }
550
551 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
552 struct ieee80211_tx_control *control)
553 {
554 struct ieee80211_tx_queue_stats *current_queue;
555 struct p54_common *priv = dev->priv;
556 struct p54_control_hdr *hdr;
557 struct p54_tx_control_allocdata *txhdr;
558 struct ieee80211_tx_control *control_copy;
559 size_t padding, len;
560 u8 rate;
561
562 current_queue = &priv->tx_stats[control->queue];
563 if (unlikely(current_queue->len > current_queue->limit))
564 return NETDEV_TX_BUSY;
565 current_queue->len++;
566 current_queue->count++;
567 if (current_queue->len == current_queue->limit)
568 ieee80211_stop_queue(dev, control->queue);
569
570 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
571 len = skb->len;
572
573 control_copy = kmalloc(sizeof(*control), GFP_ATOMIC);
574 if (control_copy)
575 memcpy(control_copy, control, sizeof(*control));
576
577 txhdr = (struct p54_tx_control_allocdata *)
578 skb_push(skb, sizeof(*txhdr) + padding);
579 hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
580
581 if (padding)
582 hdr->magic1 = cpu_to_le16(0x4010);
583 else
584 hdr->magic1 = cpu_to_le16(0x0010);
585 hdr->len = cpu_to_le16(len);
586 hdr->type = (control->flags & IEEE80211_TXCTL_NO_ACK) ? 0 : cpu_to_le16(1);
587 hdr->retry1 = hdr->retry2 = control->retry_limit;
588 p54_assign_address(dev, skb, hdr, skb->len, control_copy);
589
590 memset(txhdr->wep_key, 0x0, 16);
591 txhdr->padding = 0;
592 txhdr->padding2 = 0;
593
594 /* TODO: add support for alternate retry TX rates */
595 rate = control->tx_rate->hw_value;
596 if (control->flags & IEEE80211_TXCTL_SHORT_PREAMBLE)
597 rate |= 0x10;
598 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
599 rate |= 0x40;
600 else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
601 rate |= 0x20;
602 memset(txhdr->rateset, rate, 8);
603 txhdr->wep_key_present = 0;
604 txhdr->wep_key_len = 0;
605 txhdr->frame_type = cpu_to_le32(control->queue + 4);
606 txhdr->magic4 = 0;
607 txhdr->antenna = (control->antenna_sel_tx == 0) ?
608 2 : control->antenna_sel_tx - 1;
609 txhdr->output_power = 0x7f; // HW Maximum
610 txhdr->magic5 = (control->flags & IEEE80211_TXCTL_NO_ACK) ?
611 0 : ((rate > 0x3) ? cpu_to_le32(0x33) : cpu_to_le32(0x23));
612 if (padding)
613 txhdr->align[0] = padding;
614
615 priv->tx(dev, hdr, skb->len, 0);
616 return 0;
617 }
618
619 static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
620 const u8 *dst, const u8 *src, u8 antenna,
621 u32 magic3, u32 magic8, u32 magic9)
622 {
623 struct p54_common *priv = dev->priv;
624 struct p54_control_hdr *hdr;
625 struct p54_tx_control_filter *filter;
626
627 hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
628 priv->tx_hdr_len, GFP_ATOMIC);
629 if (!hdr)
630 return -ENOMEM;
631
632 hdr = (void *)hdr + priv->tx_hdr_len;
633
634 filter = (struct p54_tx_control_filter *) hdr->data;
635 hdr->magic1 = cpu_to_le16(0x8001);
636 hdr->len = cpu_to_le16(sizeof(*filter));
637 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter), NULL);
638 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
639
640 filter->filter_type = cpu_to_le16(filter_type);
641 memcpy(filter->dst, dst, ETH_ALEN);
642 if (!src)
643 memset(filter->src, ~0, ETH_ALEN);
644 else
645 memcpy(filter->src, src, ETH_ALEN);
646 filter->antenna = antenna;
647 filter->magic3 = cpu_to_le32(magic3);
648 filter->rx_addr = cpu_to_le32(priv->rx_end);
649 filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
650 filter->rxhw = priv->rxhw;
651 filter->magic8 = cpu_to_le16(magic8);
652 filter->magic9 = cpu_to_le16(magic9);
653
654 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
655 return 0;
656 }
657
658 static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
659 {
660 struct p54_common *priv = dev->priv;
661 struct p54_control_hdr *hdr;
662 struct p54_tx_control_channel *chan;
663 unsigned int i;
664 size_t payload_len = sizeof(*chan) + sizeof(u32)*2 +
665 sizeof(*chan->curve_data) *
666 priv->curve_data->points_per_channel;
667 void *entry;
668
669 hdr = kzalloc(sizeof(*hdr) + payload_len +
670 priv->tx_hdr_len, GFP_KERNEL);
671 if (!hdr)
672 return -ENOMEM;
673
674 hdr = (void *)hdr + priv->tx_hdr_len;
675
676 chan = (struct p54_tx_control_channel *) hdr->data;
677
678 hdr->magic1 = cpu_to_le16(0x8001);
679 hdr->len = cpu_to_le16(sizeof(*chan));
680 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
681 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + payload_len, NULL);
682
683 chan->magic1 = cpu_to_le16(0x1);
684 chan->magic2 = cpu_to_le16(0x0);
685
686 for (i = 0; i < priv->iq_autocal_len; i++) {
687 if (priv->iq_autocal[i].freq != freq)
688 continue;
689
690 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
691 sizeof(*priv->iq_autocal));
692 break;
693 }
694 if (i == priv->iq_autocal_len)
695 goto err;
696
697 for (i = 0; i < priv->output_limit_len; i++) {
698 if (priv->output_limit[i].freq != freq)
699 continue;
700
701 chan->val_barker = 0x38;
702 chan->val_bpsk = priv->output_limit[i].val_bpsk;
703 chan->val_qpsk = priv->output_limit[i].val_qpsk;
704 chan->val_16qam = priv->output_limit[i].val_16qam;
705 chan->val_64qam = priv->output_limit[i].val_64qam;
706 break;
707 }
708 if (i == priv->output_limit_len)
709 goto err;
710
711 chan->pa_points_per_curve = priv->curve_data->points_per_channel;
712
713 entry = priv->curve_data->data;
714 for (i = 0; i < priv->curve_data->channels; i++) {
715 if (*((__le16 *)entry) != freq) {
716 entry += sizeof(__le16);
717 entry += sizeof(struct pda_pa_curve_data_sample_rev1) *
718 chan->pa_points_per_curve;
719 continue;
720 }
721
722 entry += sizeof(__le16);
723 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
724 chan->pa_points_per_curve);
725 break;
726 }
727
728 memcpy(hdr->data + payload_len - 4, &chan->val_bpsk, 4);
729
730 priv->tx(dev, hdr, sizeof(*hdr) + payload_len, 1);
731 return 0;
732
733 err:
734 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
735 kfree(hdr);
736 return -EINVAL;
737 }
738
739 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
740 {
741 struct p54_common *priv = dev->priv;
742 struct p54_control_hdr *hdr;
743 struct p54_tx_control_led *led;
744
745 hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
746 priv->tx_hdr_len, GFP_KERNEL);
747 if (!hdr)
748 return -ENOMEM;
749
750 hdr = (void *)hdr + priv->tx_hdr_len;
751 hdr->magic1 = cpu_to_le16(0x8001);
752 hdr->len = cpu_to_le16(sizeof(*led));
753 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
754 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led), NULL);
755
756 led = (struct p54_tx_control_led *) hdr->data;
757 led->mode = cpu_to_le16(mode);
758 led->led_permanent = cpu_to_le16(link);
759 led->led_temporary = cpu_to_le16(act);
760 led->duration = cpu_to_le16(1000);
761
762 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
763
764 return 0;
765 }
766
767 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
768 do { \
769 queue.aifs = cpu_to_le16(ai_fs); \
770 queue.cwmin = cpu_to_le16(cw_min); \
771 queue.cwmax = cpu_to_le16(cw_max); \
772 queue.txop = cpu_to_le16(_txop); \
773 } while(0)
774
775 static void p54_init_vdcf(struct ieee80211_hw *dev)
776 {
777 struct p54_common *priv = dev->priv;
778 struct p54_control_hdr *hdr;
779 struct p54_tx_control_vdcf *vdcf;
780
781 /* all USB V1 adapters need a extra headroom */
782 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
783 hdr->magic1 = cpu_to_le16(0x8001);
784 hdr->len = cpu_to_le16(sizeof(*vdcf));
785 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
786 hdr->req_id = cpu_to_le32(priv->rx_start);
787
788 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
789
790 P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
791 P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
792 P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
793 P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
794 }
795
796 static void p54_set_vdcf(struct ieee80211_hw *dev)
797 {
798 struct p54_common *priv = dev->priv;
799 struct p54_control_hdr *hdr;
800 struct p54_tx_control_vdcf *vdcf;
801
802 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
803
804 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf), NULL);
805
806 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
807
808 if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
809 vdcf->slottime = 9;
810 vdcf->magic1 = 0x00;
811 vdcf->magic2 = 0x10;
812 } else {
813 vdcf->slottime = 20;
814 vdcf->magic1 = 0x0a;
815 vdcf->magic2 = 0x06;
816 }
817
818 /* (see prism54/isl_oid.h for further details) */
819 vdcf->frameburst = cpu_to_le16(0);
820
821 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
822 }
823
824 static int p54_start(struct ieee80211_hw *dev)
825 {
826 struct p54_common *priv = dev->priv;
827 int err;
828
829 err = priv->open(dev);
830 if (!err)
831 priv->mode = IEEE80211_IF_TYPE_MNTR;
832
833 return err;
834 }
835
836 static void p54_stop(struct ieee80211_hw *dev)
837 {
838 struct p54_common *priv = dev->priv;
839 struct sk_buff *skb;
840 while ((skb = skb_dequeue(&priv->tx_queue))) {
841 struct memrecord *range = (struct memrecord *)&skb->cb;
842 if (range->control)
843 kfree(range->control);
844 kfree_skb(skb);
845 }
846 priv->stop(dev);
847 priv->mode = IEEE80211_IF_TYPE_INVALID;
848 }
849
850 static int p54_add_interface(struct ieee80211_hw *dev,
851 struct ieee80211_if_init_conf *conf)
852 {
853 struct p54_common *priv = dev->priv;
854
855 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
856 return -EOPNOTSUPP;
857
858 switch (conf->type) {
859 case IEEE80211_IF_TYPE_STA:
860 priv->mode = conf->type;
861 break;
862 default:
863 return -EOPNOTSUPP;
864 }
865
866 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
867
868 p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
869 p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
870
871 switch (conf->type) {
872 case IEEE80211_IF_TYPE_STA:
873 p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
874 break;
875 default:
876 BUG(); /* impossible */
877 break;
878 }
879
880 p54_set_leds(dev, 1, 0, 0);
881
882 return 0;
883 }
884
885 static void p54_remove_interface(struct ieee80211_hw *dev,
886 struct ieee80211_if_init_conf *conf)
887 {
888 struct p54_common *priv = dev->priv;
889 priv->mode = IEEE80211_IF_TYPE_MNTR;
890 memset(priv->mac_addr, 0, ETH_ALEN);
891 p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
892 }
893
894 static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
895 {
896 int ret;
897
898 ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
899 p54_set_vdcf(dev);
900 return ret;
901 }
902
903 static int p54_config_interface(struct ieee80211_hw *dev,
904 struct ieee80211_vif *vif,
905 struct ieee80211_if_conf *conf)
906 {
907 struct p54_common *priv = dev->priv;
908
909 p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
910 p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
911 p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
912 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
913 return 0;
914 }
915
916 static void p54_configure_filter(struct ieee80211_hw *dev,
917 unsigned int changed_flags,
918 unsigned int *total_flags,
919 int mc_count, struct dev_mc_list *mclist)
920 {
921 struct p54_common *priv = dev->priv;
922
923 *total_flags &= FIF_BCN_PRBRESP_PROMISC;
924
925 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
926 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
927 p54_set_filter(dev, 0, priv->mac_addr,
928 NULL, 2, 0, 0, 0);
929 else
930 p54_set_filter(dev, 0, priv->mac_addr,
931 priv->bssid, 2, 0, 0, 0);
932 }
933 }
934
935 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
936 const struct ieee80211_tx_queue_params *params)
937 {
938 struct p54_common *priv = dev->priv;
939 struct p54_tx_control_vdcf *vdcf;
940
941 vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
942 ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
943
944 if ((params) && !(queue > 4)) {
945 P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
946 params->cw_min, params->cw_max, params->txop);
947 } else
948 return -EINVAL;
949
950 p54_set_vdcf(dev);
951
952 return 0;
953 }
954
955 static int p54_get_stats(struct ieee80211_hw *dev,
956 struct ieee80211_low_level_stats *stats)
957 {
958 /* TODO */
959 return 0;
960 }
961
962 static int p54_get_tx_stats(struct ieee80211_hw *dev,
963 struct ieee80211_tx_queue_stats *stats)
964 {
965 struct p54_common *priv = dev->priv;
966
967 memcpy(stats, &priv->tx_stats, sizeof(stats[0]) * dev->queues);
968
969 return 0;
970 }
971
972 static const struct ieee80211_ops p54_ops = {
973 .tx = p54_tx,
974 .start = p54_start,
975 .stop = p54_stop,
976 .add_interface = p54_add_interface,
977 .remove_interface = p54_remove_interface,
978 .config = p54_config,
979 .config_interface = p54_config_interface,
980 .configure_filter = p54_configure_filter,
981 .conf_tx = p54_conf_tx,
982 .get_stats = p54_get_stats,
983 .get_tx_stats = p54_get_tx_stats
984 };
985
986 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
987 {
988 struct ieee80211_hw *dev;
989 struct p54_common *priv;
990
991 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
992 if (!dev)
993 return NULL;
994
995 priv = dev->priv;
996 priv->mode = IEEE80211_IF_TYPE_INVALID;
997 skb_queue_head_init(&priv->tx_queue);
998 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
999 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
1000 IEEE80211_HW_RX_INCLUDES_FCS |
1001 IEEE80211_HW_SIGNAL_UNSPEC;
1002 dev->channel_change_time = 1000; /* TODO: find actual value */
1003 dev->max_signal = 127;
1004
1005 priv->tx_stats[0].limit = 5;
1006 dev->queues = 1;
1007
1008 dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
1009 sizeof(struct p54_tx_control_allocdata);
1010
1011 priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf) +
1012 priv->tx_hdr_len + sizeof(struct p54_control_hdr), GFP_KERNEL);
1013
1014 if (!priv->cached_vdcf) {
1015 ieee80211_free_hw(dev);
1016 return NULL;
1017 }
1018
1019 p54_init_vdcf(dev);
1020
1021 return dev;
1022 }
1023 EXPORT_SYMBOL_GPL(p54_init_common);
1024
1025 void p54_free_common(struct ieee80211_hw *dev)
1026 {
1027 struct p54_common *priv = dev->priv;
1028 kfree(priv->iq_autocal);
1029 kfree(priv->output_limit);
1030 kfree(priv->curve_data);
1031 kfree(priv->cached_vdcf);
1032 }
1033 EXPORT_SYMBOL_GPL(p54_free_common);
1034
1035 static int __init p54_init(void)
1036 {
1037 return 0;
1038 }
1039
1040 static void __exit p54_exit(void)
1041 {
1042 }
1043
1044 module_init(p54_init);
1045 module_exit(p54_exit);
Linux kernel - Deliverables
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