projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
mac80211/drivers: rewrite the rate control API
[deliverable/linux.git] / drivers / net / wireless / p54 / p54common.c
1
2 /*
3 * Common code for mac80211 Prism54 drivers
4 *
5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
7 *
8 * Based on the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/init.h>
17 #include <linux/firmware.h>
18 #include <linux/etherdevice.h>
19
20 #include <net/mac80211.h>
21
22 #include "p54.h"
23 #include "p54common.h"
24
25 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
26 MODULE_DESCRIPTION("Softmac Prism54 common code");
27 MODULE_LICENSE("GPL");
28 MODULE_ALIAS("prism54common");
29
30 static struct ieee80211_rate p54_bgrates[] = {
31 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
32 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
33 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
34 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35 { .bitrate = 60, .hw_value = 4, },
36 { .bitrate = 90, .hw_value = 5, },
37 { .bitrate = 120, .hw_value = 6, },
38 { .bitrate = 180, .hw_value = 7, },
39 { .bitrate = 240, .hw_value = 8, },
40 { .bitrate = 360, .hw_value = 9, },
41 { .bitrate = 480, .hw_value = 10, },
42 { .bitrate = 540, .hw_value = 11, },
43 };
44
45 static struct ieee80211_channel p54_bgchannels[] = {
46 { .center_freq = 2412, .hw_value = 1, },
47 { .center_freq = 2417, .hw_value = 2, },
48 { .center_freq = 2422, .hw_value = 3, },
49 { .center_freq = 2427, .hw_value = 4, },
50 { .center_freq = 2432, .hw_value = 5, },
51 { .center_freq = 2437, .hw_value = 6, },
52 { .center_freq = 2442, .hw_value = 7, },
53 { .center_freq = 2447, .hw_value = 8, },
54 { .center_freq = 2452, .hw_value = 9, },
55 { .center_freq = 2457, .hw_value = 10, },
56 { .center_freq = 2462, .hw_value = 11, },
57 { .center_freq = 2467, .hw_value = 12, },
58 { .center_freq = 2472, .hw_value = 13, },
59 { .center_freq = 2484, .hw_value = 14, },
60 };
61
62 static struct ieee80211_supported_band band_2GHz = {
63 .channels = p54_bgchannels,
64 .n_channels = ARRAY_SIZE(p54_bgchannels),
65 .bitrates = p54_bgrates,
66 .n_bitrates = ARRAY_SIZE(p54_bgrates),
67 };
68
69 static struct ieee80211_rate p54_arates[] = {
70 { .bitrate = 60, .hw_value = 4, },
71 { .bitrate = 90, .hw_value = 5, },
72 { .bitrate = 120, .hw_value = 6, },
73 { .bitrate = 180, .hw_value = 7, },
74 { .bitrate = 240, .hw_value = 8, },
75 { .bitrate = 360, .hw_value = 9, },
76 { .bitrate = 480, .hw_value = 10, },
77 { .bitrate = 540, .hw_value = 11, },
78 };
79
80 static struct ieee80211_channel p54_achannels[] = {
81 { .center_freq = 4920 },
82 { .center_freq = 4940 },
83 { .center_freq = 4960 },
84 { .center_freq = 4980 },
85 { .center_freq = 5040 },
86 { .center_freq = 5060 },
87 { .center_freq = 5080 },
88 { .center_freq = 5170 },
89 { .center_freq = 5180 },
90 { .center_freq = 5190 },
91 { .center_freq = 5200 },
92 { .center_freq = 5210 },
93 { .center_freq = 5220 },
94 { .center_freq = 5230 },
95 { .center_freq = 5240 },
96 { .center_freq = 5260 },
97 { .center_freq = 5280 },
98 { .center_freq = 5300 },
99 { .center_freq = 5320 },
100 { .center_freq = 5500 },
101 { .center_freq = 5520 },
102 { .center_freq = 5540 },
103 { .center_freq = 5560 },
104 { .center_freq = 5580 },
105 { .center_freq = 5600 },
106 { .center_freq = 5620 },
107 { .center_freq = 5640 },
108 { .center_freq = 5660 },
109 { .center_freq = 5680 },
110 { .center_freq = 5700 },
111 { .center_freq = 5745 },
112 { .center_freq = 5765 },
113 { .center_freq = 5785 },
114 { .center_freq = 5805 },
115 { .center_freq = 5825 },
116 };
117
118 static struct ieee80211_supported_band band_5GHz = {
119 .channels = p54_achannels,
120 .n_channels = ARRAY_SIZE(p54_achannels),
121 .bitrates = p54_arates,
122 .n_bitrates = ARRAY_SIZE(p54_arates),
123 };
124
125 int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
126 {
127 struct p54_common *priv = dev->priv;
128 struct bootrec_exp_if *exp_if;
129 struct bootrec *bootrec;
130 u32 *data = (u32 *)fw->data;
131 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
132 u8 *fw_version = NULL;
133 size_t len;
134 int i;
135
136 if (priv->rx_start)
137 return 0;
138
139 while (data < end_data && *data)
140 data++;
141
142 while (data < end_data && !*data)
143 data++;
144
145 bootrec = (struct bootrec *) data;
146
147 while (bootrec->data <= end_data &&
148 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
149 u32 code = le32_to_cpu(bootrec->code);
150 switch (code) {
151 case BR_CODE_COMPONENT_ID:
152 priv->fw_interface = be32_to_cpup((__be32 *)
153 bootrec->data);
154 switch (priv->fw_interface) {
155 case FW_FMAC:
156 printk(KERN_INFO "p54: FreeMAC firmware\n");
157 break;
158 case FW_LM20:
159 printk(KERN_INFO "p54: LM20 firmware\n");
160 break;
161 case FW_LM86:
162 printk(KERN_INFO "p54: LM86 firmware\n");
163 break;
164 case FW_LM87:
165 printk(KERN_INFO "p54: LM87 firmware\n");
166 break;
167 default:
168 printk(KERN_INFO "p54: unknown firmware\n");
169 break;
170 }
171 break;
172 case BR_CODE_COMPONENT_VERSION:
173 /* 24 bytes should be enough for all firmwares */
174 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
175 fw_version = (unsigned char*)bootrec->data;
176 break;
177 case BR_CODE_DESCR: {
178 struct bootrec_desc *desc =
179 (struct bootrec_desc *)bootrec->data;
180 priv->rx_start = le32_to_cpu(desc->rx_start);
181 /* FIXME add sanity checking */
182 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
183 priv->headroom = desc->headroom;
184 priv->tailroom = desc->tailroom;
185 if (le32_to_cpu(bootrec->len) == 11)
186 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
187 else
188 priv->rx_mtu = (size_t)
189 0x620 - priv->tx_hdr_len;
190 break;
191 }
192 case BR_CODE_EXPOSED_IF:
193 exp_if = (struct bootrec_exp_if *) bootrec->data;
194 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
195 if (exp_if[i].if_id == cpu_to_le16(0x1a))
196 priv->fw_var = le16_to_cpu(exp_if[i].variant);
197 break;
198 case BR_CODE_DEPENDENT_IF:
199 break;
200 case BR_CODE_END_OF_BRA:
201 case LEGACY_BR_CODE_END_OF_BRA:
202 end_data = NULL;
203 break;
204 default:
205 break;
206 }
207 bootrec = (struct bootrec *)&bootrec->data[len];
208 }
209
210 if (fw_version)
211 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
212 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
213
214 if (priv->fw_var >= 0x300) {
215 /* Firmware supports QoS, use it! */
216 priv->tx_stats[4].limit = 3;
217 priv->tx_stats[5].limit = 4;
218 priv->tx_stats[6].limit = 3;
219 priv->tx_stats[7].limit = 1;
220 dev->queues = 4;
221 }
222
223 return 0;
224 }
225 EXPORT_SYMBOL_GPL(p54_parse_firmware);
226
227 static int p54_convert_rev0(struct ieee80211_hw *dev,
228 struct pda_pa_curve_data *curve_data)
229 {
230 struct p54_common *priv = dev->priv;
231 struct p54_pa_curve_data_sample *dst;
232 struct pda_pa_curve_data_sample_rev0 *src;
233 size_t cd_len = sizeof(*curve_data) +
234 (curve_data->points_per_channel*sizeof(*dst) + 2) *
235 curve_data->channels;
236 unsigned int i, j;
237 void *source, *target;
238
239 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
240 if (!priv->curve_data)
241 return -ENOMEM;
242
243 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
244 source = curve_data->data;
245 target = priv->curve_data->data;
246 for (i = 0; i < curve_data->channels; i++) {
247 __le16 *freq = source;
248 source += sizeof(__le16);
249 *((__le16 *)target) = *freq;
250 target += sizeof(__le16);
251 for (j = 0; j < curve_data->points_per_channel; j++) {
252 dst = target;
253 src = source;
254
255 dst->rf_power = src->rf_power;
256 dst->pa_detector = src->pa_detector;
257 dst->data_64qam = src->pcv;
258 /* "invent" the points for the other modulations */
259 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
260 dst->data_16qam = SUB(src->pcv, 12);
261 dst->data_qpsk = SUB(dst->data_16qam, 12);
262 dst->data_bpsk = SUB(dst->data_qpsk, 12);
263 dst->data_barker = SUB(dst->data_bpsk, 14);
264 #undef SUB
265 target += sizeof(*dst);
266 source += sizeof(*src);
267 }
268 }
269
270 return 0;
271 }
272
273 static int p54_convert_rev1(struct ieee80211_hw *dev,
274 struct pda_pa_curve_data *curve_data)
275 {
276 struct p54_common *priv = dev->priv;
277 struct p54_pa_curve_data_sample *dst;
278 struct pda_pa_curve_data_sample_rev1 *src;
279 size_t cd_len = sizeof(*curve_data) +
280 (curve_data->points_per_channel*sizeof(*dst) + 2) *
281 curve_data->channels;
282 unsigned int i, j;
283 void *source, *target;
284
285 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
286 if (!priv->curve_data)
287 return -ENOMEM;
288
289 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
290 source = curve_data->data;
291 target = priv->curve_data->data;
292 for (i = 0; i < curve_data->channels; i++) {
293 __le16 *freq = source;
294 source += sizeof(__le16);
295 *((__le16 *)target) = *freq;
296 target += sizeof(__le16);
297 for (j = 0; j < curve_data->points_per_channel; j++) {
298 memcpy(target, source, sizeof(*src));
299
300 target += sizeof(*dst);
301 source += sizeof(*src);
302 }
303 source++;
304 }
305
306 return 0;
307 }
308
309 static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
310 "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
311 static int p54_init_xbow_synth(struct ieee80211_hw *dev);
312
313 static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
314 {
315 struct p54_common *priv = dev->priv;
316 struct eeprom_pda_wrap *wrap = NULL;
317 struct pda_entry *entry;
318 unsigned int data_len, entry_len;
319 void *tmp;
320 int err;
321 u8 *end = (u8 *)eeprom + len;
322 u16 synth = 0;
323
324 wrap = (struct eeprom_pda_wrap *) eeprom;
325 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
326
327 /* verify that at least the entry length/code fits */
328 while ((u8 *)entry <= end - sizeof(*entry)) {
329 entry_len = le16_to_cpu(entry->len);
330 data_len = ((entry_len - 1) << 1);
331
332 /* abort if entry exceeds whole structure */
333 if ((u8 *)entry + sizeof(*entry) + data_len > end)
334 break;
335
336 switch (le16_to_cpu(entry->code)) {
337 case PDR_MAC_ADDRESS:
338 SET_IEEE80211_PERM_ADDR(dev, entry->data);
339 break;
340 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
341 if (data_len < 2) {
342 err = -EINVAL;
343 goto err;
344 }
345
346 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
347 err = -EINVAL;
348 goto err;
349 }
350
351 priv->output_limit = kmalloc(entry->data[1] *
352 sizeof(*priv->output_limit), GFP_KERNEL);
353
354 if (!priv->output_limit) {
355 err = -ENOMEM;
356 goto err;
357 }
358
359 memcpy(priv->output_limit, &entry->data[2],
360 entry->data[1]*sizeof(*priv->output_limit));
361 priv->output_limit_len = entry->data[1];
362 break;
363 case PDR_PRISM_PA_CAL_CURVE_DATA: {
364 struct pda_pa_curve_data *curve_data =
365 (struct pda_pa_curve_data *)entry->data;
366 if (data_len < sizeof(*curve_data)) {
367 err = -EINVAL;
368 goto err;
369 }
370
371 switch (curve_data->cal_method_rev) {
372 case 0:
373 err = p54_convert_rev0(dev, curve_data);
374 break;
375 case 1:
376 err = p54_convert_rev1(dev, curve_data);
377 break;
378 default:
379 printk(KERN_ERR "p54: unknown curve data "
380 "revision %d\n",
381 curve_data->cal_method_rev);
382 err = -ENODEV;
383 break;
384 }
385 if (err)
386 goto err;
387
388 }
389 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
390 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
391 if (!priv->iq_autocal) {
392 err = -ENOMEM;
393 goto err;
394 }
395
396 memcpy(priv->iq_autocal, entry->data, data_len);
397 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
398 break;
399 case PDR_INTERFACE_LIST:
400 tmp = entry->data;
401 while ((u8 *)tmp < entry->data + data_len) {
402 struct bootrec_exp_if *exp_if = tmp;
403 if (le16_to_cpu(exp_if->if_id) == 0xf)
404 synth = le16_to_cpu(exp_if->variant);
405 tmp += sizeof(struct bootrec_exp_if);
406 }
407 break;
408 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
409 priv->version = *(u8 *)(entry->data + 1);
410 break;
411 case PDR_END:
412 /* make it overrun */
413 entry_len = len;
414 break;
415 default:
416 printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
417 le16_to_cpu(entry->code));
418 break;
419 }
420
421 entry = (void *)entry + (entry_len + 1)*2;
422 }
423
424 if (!synth || !priv->iq_autocal || !priv->output_limit ||
425 !priv->curve_data) {
426 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
427 err = -EINVAL;
428 goto err;
429 }
430
431 priv->rxhw = synth & 0x07;
432 if (priv->rxhw == 4)
433 p54_init_xbow_synth(dev);
434 if (!(synth & 0x40))
435 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
436 if (!(synth & 0x80))
437 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
438
439 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
440 u8 perm_addr[ETH_ALEN];
441
442 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
443 wiphy_name(dev->wiphy));
444 random_ether_addr(perm_addr);
445 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
446 }
447
448 printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
449 wiphy_name(dev->wiphy),
450 dev->wiphy->perm_addr,
451 priv->version, p54_rf_chips[priv->rxhw]);
452
453 return 0;
454
455 err:
456 if (priv->iq_autocal) {
457 kfree(priv->iq_autocal);
458 priv->iq_autocal = NULL;
459 }
460
461 if (priv->output_limit) {
462 kfree(priv->output_limit);
463 priv->output_limit = NULL;
464 }
465
466 if (priv->curve_data) {
467 kfree(priv->curve_data);
468 priv->curve_data = NULL;
469 }
470
471 printk(KERN_ERR "p54: eeprom parse failed!\n");
472 return err;
473 }
474
475 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
476 {
477 /* TODO: get the rssi_add & rssi_mul data from the eeprom */
478 return ((rssi * 0x83) / 64 - 400) / 4;
479 }
480
481 static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
482 {
483 struct p54_common *priv = dev->priv;
484 struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
485 struct ieee80211_rx_status rx_status = {0};
486 u16 freq = le16_to_cpu(hdr->freq);
487 size_t header_len = sizeof(*hdr);
488 u32 tsf32;
489
490 if (!(hdr->magic & cpu_to_le16(0x0001))) {
491 if (priv->filter_flags & FIF_FCSFAIL)
492 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
493 else
494 return 0;
495 }
496
497 rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
498 rx_status.noise = priv->noise;
499 /* XX correct? */
500 rx_status.qual = (100 * hdr->rssi) / 127;
501 rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
502 hdr->rate : (hdr->rate - 4)) & 0xf;
503 rx_status.freq = freq;
504 rx_status.band = dev->conf.channel->band;
505 rx_status.antenna = hdr->antenna;
506
507 tsf32 = le32_to_cpu(hdr->tsf32);
508 if (tsf32 < priv->tsf_low32)
509 priv->tsf_high32++;
510 rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
511 priv->tsf_low32 = tsf32;
512
513 rx_status.flag |= RX_FLAG_TSFT;
514
515 if (hdr->magic & cpu_to_le16(0x4000))
516 header_len += hdr->align[0];
517
518 skb_pull(skb, header_len);
519 skb_trim(skb, le16_to_cpu(hdr->len));
520
521 ieee80211_rx_irqsafe(dev, skb, &rx_status);
522
523 return -1;
524 }
525
526 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
527 {
528 struct p54_common *priv = dev->priv;
529 int i;
530
531 for (i = 0; i < dev->queues; i++)
532 if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
533 ieee80211_wake_queue(dev, i);
534 }
535
536 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
537 {
538 struct p54_common *priv = dev->priv;
539 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
540 struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
541 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
542 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
543 struct memrecord *range = NULL;
544 u32 freed = 0;
545 u32 last_addr = priv->rx_start;
546 unsigned long flags;
547
548 spin_lock_irqsave(&priv->tx_queue.lock, flags);
549 while (entry != (struct sk_buff *)&priv->tx_queue) {
550 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
551 range = (void *)info->rate_driver_data;
552 if (range->start_addr == addr) {
553 struct p54_control_hdr *entry_hdr;
554 struct p54_tx_control_allocdata *entry_data;
555 int pad = 0;
556
557 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
558 struct ieee80211_tx_info *ni;
559 struct memrecord *mr;
560
561 ni = IEEE80211_SKB_CB(entry->next);
562 mr = (struct memrecord *)ni->rate_driver_data;
563 freed = mr->start_addr - last_addr;
564 } else
565 freed = priv->rx_end - last_addr;
566
567 last_addr = range->end_addr;
568 __skb_unlink(entry, &priv->tx_queue);
569 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
570
571 ieee80211_tx_info_clear_status(info);
572 entry_hdr = (struct p54_control_hdr *) entry->data;
573 entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
574 if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
575 pad = entry_data->align[0];
576
577 priv->tx_stats[entry_data->hw_queue].len--;
578 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
579 if (!(payload->status & 0x01))
580 info->flags |= IEEE80211_TX_STAT_ACK;
581 }
582 info->status.rates[0].count = payload->retries;
583 info->status.ack_signal = p54_rssi_to_dbm(dev,
584 le16_to_cpu(payload->ack_rssi));
585 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
586 ieee80211_tx_status_irqsafe(dev, entry);
587 goto out;
588 } else
589 last_addr = range->end_addr;
590 entry = entry->next;
591 }
592 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
593
594 out:
595 if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
596 sizeof(struct p54_control_hdr))
597 p54_wake_free_queues(dev);
598 }
599
600 static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
601 struct sk_buff *skb)
602 {
603 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
604 struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
605 struct p54_common *priv = dev->priv;
606
607 if (!priv->eeprom)
608 return ;
609
610 memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
611
612 complete(&priv->eeprom_comp);
613 }
614
615 static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
616 {
617 struct p54_common *priv = dev->priv;
618 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
619 struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
620 u32 tsf32 = le32_to_cpu(stats->tsf32);
621
622 if (tsf32 < priv->tsf_low32)
623 priv->tsf_high32++;
624 priv->tsf_low32 = tsf32;
625
626 priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
627 priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
628 priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
629
630 priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
631 complete(&priv->stats_comp);
632
633 mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
634 }
635
636 static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
637 {
638 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
639
640 switch (le16_to_cpu(hdr->type)) {
641 case P54_CONTROL_TYPE_TXDONE:
642 p54_rx_frame_sent(dev, skb);
643 break;
644 case P54_CONTROL_TYPE_BBP:
645 break;
646 case P54_CONTROL_TYPE_STAT_READBACK:
647 p54_rx_stats(dev, skb);
648 break;
649 case P54_CONTROL_TYPE_EEPROM_READBACK:
650 p54_rx_eeprom_readback(dev, skb);
651 break;
652 default:
653 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
654 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
655 break;
656 }
657
658 return 0;
659 }
660
661 /* returns zero if skb can be reused */
662 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
663 {
664 u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
665
666 if (type == 0x80)
667 return p54_rx_control(dev, skb);
668 else
669 return p54_rx_data(dev, skb);
670 }
671 EXPORT_SYMBOL_GPL(p54_rx);
672
673 /*
674 * So, the firmware is somewhat stupid and doesn't know what places in its
675 * memory incoming data should go to. By poking around in the firmware, we
676 * can find some unused memory to upload our packets to. However, data that we
677 * want the card to TX needs to stay intact until the card has told us that
678 * it is done with it. This function finds empty places we can upload to and
679 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
680 * allocated areas.
681 */
682 static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
683 struct p54_control_hdr *data, u32 len)
684 {
685 struct p54_common *priv = dev->priv;
686 struct sk_buff *entry = priv->tx_queue.next;
687 struct sk_buff *target_skb = NULL;
688 u32 last_addr = priv->rx_start;
689 u32 largest_hole = 0;
690 u32 target_addr = priv->rx_start;
691 unsigned long flags;
692 unsigned int left;
693 len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
694
695 spin_lock_irqsave(&priv->tx_queue.lock, flags);
696 left = skb_queue_len(&priv->tx_queue);
697 while (left--) {
698 u32 hole_size;
699 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
700 struct memrecord *range = (void *)info->rate_driver_data;
701 hole_size = range->start_addr - last_addr;
702 if (!target_skb && hole_size >= len) {
703 target_skb = entry->prev;
704 hole_size -= len;
705 target_addr = last_addr;
706 }
707 largest_hole = max(largest_hole, hole_size);
708 last_addr = range->end_addr;
709 entry = entry->next;
710 }
711 if (!target_skb && priv->rx_end - last_addr >= len) {
712 target_skb = priv->tx_queue.prev;
713 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
714 if (!skb_queue_empty(&priv->tx_queue)) {
715 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
716 struct memrecord *range = (void *)info->rate_driver_data;
717 target_addr = range->end_addr;
718 }
719 } else
720 largest_hole = max(largest_hole, priv->rx_end - last_addr);
721
722 if (skb) {
723 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
724 struct memrecord *range = (void *)info->rate_driver_data;
725 range->start_addr = target_addr;
726 range->end_addr = target_addr + len;
727 __skb_queue_after(&priv->tx_queue, target_skb, skb);
728 if (largest_hole < priv->rx_mtu + priv->headroom +
729 priv->tailroom +
730 sizeof(struct p54_control_hdr))
731 ieee80211_stop_queues(dev);
732 }
733 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
734
735 data->req_id = cpu_to_le32(target_addr + priv->headroom);
736 }
737
738 int p54_read_eeprom(struct ieee80211_hw *dev)
739 {
740 struct p54_common *priv = dev->priv;
741 struct p54_control_hdr *hdr = NULL;
742 struct p54_eeprom_lm86 *eeprom_hdr;
743 size_t eeprom_size = 0x2020, offset = 0, blocksize;
744 int ret = -ENOMEM;
745 void *eeprom = NULL;
746
747 hdr = (struct p54_control_hdr *)kzalloc(sizeof(*hdr) +
748 sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN, GFP_KERNEL);
749 if (!hdr)
750 goto free;
751
752 priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
753 if (!priv->eeprom)
754 goto free;
755
756 eeprom = kzalloc(eeprom_size, GFP_KERNEL);
757 if (!eeprom)
758 goto free;
759
760 hdr->magic1 = cpu_to_le16(0x8000);
761 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
762 hdr->retry1 = hdr->retry2 = 0;
763 eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
764
765 while (eeprom_size) {
766 blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
767 hdr->len = cpu_to_le16(blocksize + sizeof(*eeprom_hdr));
768 eeprom_hdr->offset = cpu_to_le16(offset);
769 eeprom_hdr->len = cpu_to_le16(blocksize);
770 p54_assign_address(dev, NULL, hdr, le16_to_cpu(hdr->len) +
771 sizeof(*hdr));
772 priv->tx(dev, hdr, le16_to_cpu(hdr->len) + sizeof(*hdr), 0);
773
774 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
775 printk(KERN_ERR "%s: device does not respond!\n",
776 wiphy_name(dev->wiphy));
777 ret = -EBUSY;
778 goto free;
779 }
780
781 memcpy(eeprom + offset, priv->eeprom, blocksize);
782 offset += blocksize;
783 eeprom_size -= blocksize;
784 }
785
786 ret = p54_parse_eeprom(dev, eeprom, offset);
787 free:
788 kfree(priv->eeprom);
789 priv->eeprom = NULL;
790 kfree(hdr);
791 kfree(eeprom);
792
793 return ret;
794 }
795 EXPORT_SYMBOL_GPL(p54_read_eeprom);
796
797 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
798 {
799 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
800 struct ieee80211_tx_queue_stats *current_queue;
801 struct p54_common *priv = dev->priv;
802 struct p54_control_hdr *hdr;
803 struct p54_tx_control_allocdata *txhdr;
804 size_t padding, len;
805 u8 rate;
806 u8 cts_rate = 0x20;
807 u8 rc_flags;
808
809 current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
810 if (unlikely(current_queue->len > current_queue->limit))
811 return NETDEV_TX_BUSY;
812 current_queue->len++;
813 current_queue->count++;
814 if (current_queue->len == current_queue->limit)
815 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
816
817 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
818 len = skb->len;
819
820 txhdr = (struct p54_tx_control_allocdata *)
821 skb_push(skb, sizeof(*txhdr) + padding);
822 hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
823
824 if (padding)
825 hdr->magic1 = cpu_to_le16(0x4010);
826 else
827 hdr->magic1 = cpu_to_le16(0x0010);
828 hdr->len = cpu_to_le16(len);
829 hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
830 hdr->retry1 = hdr->retry2 = info->control.rates[0].count;
831
832 /* TODO: add support for alternate retry TX rates */
833 rate = ieee80211_get_tx_rate(dev, info)->hw_value;
834 rc_flags = info->control.rates[0].flags;
835 if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
836 rate |= 0x10;
837 cts_rate |= 0x10;
838 }
839 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
840 rate |= 0x40;
841 cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
842 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
843 rate |= 0x20;
844 cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
845 }
846 memset(txhdr->rateset, rate, 8);
847 txhdr->key_type = 0;
848 txhdr->key_len = 0;
849 txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
850 txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
851 2 : info->antenna_sel_tx - 1;
852 txhdr->output_power = priv->output_power;
853 txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
854 0 : cts_rate;
855 if (padding)
856 txhdr->align[0] = padding;
857
858 /* modifies skb->cb and with it info, so must be last! */
859 p54_assign_address(dev, skb, hdr, skb->len);
860
861 priv->tx(dev, hdr, skb->len, 0);
862 return 0;
863 }
864
865 static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
866 const u8 *bssid)
867 {
868 struct p54_common *priv = dev->priv;
869 struct p54_control_hdr *hdr;
870 struct p54_tx_control_filter *filter;
871 size_t data_len;
872
873 hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
874 priv->tx_hdr_len, GFP_ATOMIC);
875 if (!hdr)
876 return -ENOMEM;
877
878 hdr = (void *)hdr + priv->tx_hdr_len;
879
880 filter = (struct p54_tx_control_filter *) hdr->data;
881 hdr->magic1 = cpu_to_le16(0x8001);
882 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
883
884 priv->filter_type = filter->filter_type = cpu_to_le16(filter_type);
885 memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
886 if (!bssid)
887 memset(filter->bssid, ~0, ETH_ALEN);
888 else
889 memcpy(filter->bssid, bssid, ETH_ALEN);
890 filter->rx_antenna = priv->rx_antenna;
891 if (priv->fw_var < 0x500) {
892 data_len = P54_TX_CONTROL_FILTER_V1_LEN;
893 filter->v1.basic_rate_mask = cpu_to_le32(0x15f);
894 filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
895 filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
896 filter->v1.rxhw = cpu_to_le16(priv->rxhw);
897 filter->v1.wakeup_timer = cpu_to_le16(500);
898 } else {
899 data_len = P54_TX_CONTROL_FILTER_V2_LEN;
900 filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
901 filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
902 filter->v2.rxhw = cpu_to_le16(priv->rxhw);
903 filter->v2.timer = cpu_to_le16(1000);
904 }
905 hdr->len = cpu_to_le16(data_len);
906 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
907 priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
908 return 0;
909 }
910
911 static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
912 {
913 struct p54_common *priv = dev->priv;
914 struct p54_control_hdr *hdr;
915 struct p54_tx_control_channel *chan;
916 unsigned int i;
917 size_t data_len;
918 void *entry;
919
920 hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
921 priv->tx_hdr_len, GFP_KERNEL);
922 if (!hdr)
923 return -ENOMEM;
924
925 hdr = (void *)hdr + priv->tx_hdr_len;
926
927 chan = (struct p54_tx_control_channel *) hdr->data;
928
929 hdr->magic1 = cpu_to_le16(0x8001);
930
931 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
932
933 chan->flags = cpu_to_le16(0x1);
934 chan->dwell = cpu_to_le16(0x0);
935
936 for (i = 0; i < priv->iq_autocal_len; i++) {
937 if (priv->iq_autocal[i].freq != freq)
938 continue;
939
940 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
941 sizeof(*priv->iq_autocal));
942 break;
943 }
944 if (i == priv->iq_autocal_len)
945 goto err;
946
947 for (i = 0; i < priv->output_limit_len; i++) {
948 if (priv->output_limit[i].freq != freq)
949 continue;
950
951 chan->val_barker = 0x38;
952 chan->val_bpsk = chan->dup_bpsk =
953 priv->output_limit[i].val_bpsk;
954 chan->val_qpsk = chan->dup_qpsk =
955 priv->output_limit[i].val_qpsk;
956 chan->val_16qam = chan->dup_16qam =
957 priv->output_limit[i].val_16qam;
958 chan->val_64qam = chan->dup_64qam =
959 priv->output_limit[i].val_64qam;
960 break;
961 }
962 if (i == priv->output_limit_len)
963 goto err;
964
965 entry = priv->curve_data->data;
966 for (i = 0; i < priv->curve_data->channels; i++) {
967 if (*((__le16 *)entry) != freq) {
968 entry += sizeof(__le16);
969 entry += sizeof(struct p54_pa_curve_data_sample) *
970 priv->curve_data->points_per_channel;
971 continue;
972 }
973
974 entry += sizeof(__le16);
975 chan->pa_points_per_curve =
976 min(priv->curve_data->points_per_channel, (u8) 8);
977
978 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
979 chan->pa_points_per_curve);
980 break;
981 }
982
983 if (priv->fw_var < 0x500) {
984 data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
985 chan->v1.rssical_mul = cpu_to_le16(130);
986 chan->v1.rssical_add = cpu_to_le16(0xfe70);
987 } else {
988 data_len = P54_TX_CONTROL_CHANNEL_V2_LEN;
989 chan->v2.rssical_mul = cpu_to_le16(130);
990 chan->v2.rssical_add = cpu_to_le16(0xfe70);
991 chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
992 }
993
994 hdr->len = cpu_to_le16(data_len);
995 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
996 priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
997 return 0;
998
999 err:
1000 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1001 kfree(hdr);
1002 return -EINVAL;
1003 }
1004
1005 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1006 {
1007 struct p54_common *priv = dev->priv;
1008 struct p54_control_hdr *hdr;
1009 struct p54_tx_control_led *led;
1010
1011 hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
1012 priv->tx_hdr_len, GFP_KERNEL);
1013 if (!hdr)
1014 return -ENOMEM;
1015
1016 hdr = (void *)hdr + priv->tx_hdr_len;
1017 hdr->magic1 = cpu_to_le16(0x8001);
1018 hdr->len = cpu_to_le16(sizeof(*led));
1019 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
1020 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
1021
1022 led = (struct p54_tx_control_led *) hdr->data;
1023 led->mode = cpu_to_le16(mode);
1024 led->led_permanent = cpu_to_le16(link);
1025 led->led_temporary = cpu_to_le16(act);
1026 led->duration = cpu_to_le16(1000);
1027
1028 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
1029
1030 return 0;
1031 }
1032
1033 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
1034 do { \
1035 queue.aifs = cpu_to_le16(ai_fs); \
1036 queue.cwmin = cpu_to_le16(cw_min); \
1037 queue.cwmax = cpu_to_le16(cw_max); \
1038 queue.txop = cpu_to_le16(_txop); \
1039 } while(0)
1040
1041 static void p54_init_vdcf(struct ieee80211_hw *dev)
1042 {
1043 struct p54_common *priv = dev->priv;
1044 struct p54_control_hdr *hdr;
1045 struct p54_tx_control_vdcf *vdcf;
1046
1047 /* all USB V1 adapters need a extra headroom */
1048 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
1049 hdr->magic1 = cpu_to_le16(0x8001);
1050 hdr->len = cpu_to_le16(sizeof(*vdcf));
1051 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
1052 hdr->req_id = cpu_to_le32(priv->rx_start);
1053
1054 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
1055
1056 P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
1057 P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
1058 P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
1059 P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
1060 }
1061
1062 static void p54_set_vdcf(struct ieee80211_hw *dev)
1063 {
1064 struct p54_common *priv = dev->priv;
1065 struct p54_control_hdr *hdr;
1066 struct p54_tx_control_vdcf *vdcf;
1067
1068 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
1069
1070 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf));
1071
1072 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
1073
1074 if (priv->use_short_slot) {
1075 vdcf->slottime = 9;
1076 vdcf->magic1 = 0x10;
1077 vdcf->magic2 = 0x00;
1078 } else {
1079 vdcf->slottime = 20;
1080 vdcf->magic1 = 0x0a;
1081 vdcf->magic2 = 0x06;
1082 }
1083
1084 /* (see prism54/isl_oid.h for further details) */
1085 vdcf->frameburst = cpu_to_le16(0);
1086
1087 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
1088 }
1089
1090 static int p54_start(struct ieee80211_hw *dev)
1091 {
1092 struct p54_common *priv = dev->priv;
1093 int err;
1094
1095 if (!priv->cached_vdcf) {
1096 priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
1097 priv->tx_hdr_len + sizeof(struct p54_control_hdr),
1098 GFP_KERNEL);
1099
1100 if (!priv->cached_vdcf)
1101 return -ENOMEM;
1102 }
1103
1104 if (!priv->cached_stats) {
1105 priv->cached_stats = kzalloc(sizeof(struct p54_statistics) +
1106 priv->tx_hdr_len + sizeof(struct p54_control_hdr),
1107 GFP_KERNEL);
1108
1109 if (!priv->cached_stats) {
1110 kfree(priv->cached_vdcf);
1111 priv->cached_vdcf = NULL;
1112 return -ENOMEM;
1113 }
1114 }
1115
1116 err = priv->open(dev);
1117 if (!err)
1118 priv->mode = NL80211_IFTYPE_MONITOR;
1119
1120 p54_init_vdcf(dev);
1121 mod_timer(&priv->stats_timer, jiffies + HZ);
1122 return err;
1123 }
1124
1125 static void p54_stop(struct ieee80211_hw *dev)
1126 {
1127 struct p54_common *priv = dev->priv;
1128 struct sk_buff *skb;
1129
1130 del_timer(&priv->stats_timer);
1131 while ((skb = skb_dequeue(&priv->tx_queue)))
1132 kfree_skb(skb);
1133 priv->stop(dev);
1134 priv->tsf_high32 = priv->tsf_low32 = 0;
1135 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1136 }
1137
1138 static int p54_add_interface(struct ieee80211_hw *dev,
1139 struct ieee80211_if_init_conf *conf)
1140 {
1141 struct p54_common *priv = dev->priv;
1142
1143 if (priv->mode != NL80211_IFTYPE_MONITOR)
1144 return -EOPNOTSUPP;
1145
1146 switch (conf->type) {
1147 case NL80211_IFTYPE_STATION:
1148 priv->mode = conf->type;
1149 break;
1150 default:
1151 return -EOPNOTSUPP;
1152 }
1153
1154 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1155
1156 p54_set_filter(dev, 0, NULL);
1157
1158 switch (conf->type) {
1159 case NL80211_IFTYPE_STATION:
1160 p54_set_filter(dev, 1, NULL);
1161 break;
1162 default:
1163 BUG(); /* impossible */
1164 break;
1165 }
1166
1167 p54_set_leds(dev, 1, 0, 0);
1168
1169 return 0;
1170 }
1171
1172 static void p54_remove_interface(struct ieee80211_hw *dev,
1173 struct ieee80211_if_init_conf *conf)
1174 {
1175 struct p54_common *priv = dev->priv;
1176 priv->mode = NL80211_IFTYPE_MONITOR;
1177 memset(priv->mac_addr, 0, ETH_ALEN);
1178 p54_set_filter(dev, 0, NULL);
1179 }
1180
1181 static int p54_config(struct ieee80211_hw *dev, u32 changed)
1182 {
1183 int ret;
1184 struct p54_common *priv = dev->priv;
1185 struct ieee80211_conf *conf = &dev->conf;
1186
1187 mutex_lock(&priv->conf_mutex);
1188 priv->rx_antenna = 2; /* automatic */
1189 priv->output_power = conf->power_level << 2;
1190 ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
1191 p54_set_vdcf(dev);
1192 mutex_unlock(&priv->conf_mutex);
1193 return ret;
1194 }
1195
1196 static int p54_config_interface(struct ieee80211_hw *dev,
1197 struct ieee80211_vif *vif,
1198 struct ieee80211_if_conf *conf)
1199 {
1200 struct p54_common *priv = dev->priv;
1201
1202 mutex_lock(&priv->conf_mutex);
1203 p54_set_filter(dev, 0, conf->bssid);
1204 p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
1205 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1206 mutex_unlock(&priv->conf_mutex);
1207 return 0;
1208 }
1209
1210 static void p54_configure_filter(struct ieee80211_hw *dev,
1211 unsigned int changed_flags,
1212 unsigned int *total_flags,
1213 int mc_count, struct dev_mc_list *mclist)
1214 {
1215 struct p54_common *priv = dev->priv;
1216
1217 *total_flags &= FIF_BCN_PRBRESP_PROMISC |
1218 FIF_PROMISC_IN_BSS |
1219 FIF_FCSFAIL;
1220
1221 priv->filter_flags = *total_flags;
1222
1223 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1224 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1225 p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1226 NULL);
1227 else
1228 p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1229 priv->bssid);
1230 }
1231
1232 if (changed_flags & FIF_PROMISC_IN_BSS) {
1233 if (*total_flags & FIF_PROMISC_IN_BSS)
1234 p54_set_filter(dev, le16_to_cpu(priv->filter_type) |
1235 0x8, NULL);
1236 else
1237 p54_set_filter(dev, le16_to_cpu(priv->filter_type) &
1238 ~0x8, priv->bssid);
1239 }
1240 }
1241
1242 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
1243 const struct ieee80211_tx_queue_params *params)
1244 {
1245 struct p54_common *priv = dev->priv;
1246 struct p54_tx_control_vdcf *vdcf;
1247
1248 vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
1249 ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
1250
1251 if ((params) && !(queue > 4)) {
1252 P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
1253 params->cw_min, params->cw_max, params->txop);
1254 } else
1255 return -EINVAL;
1256
1257 p54_set_vdcf(dev);
1258
1259 return 0;
1260 }
1261
1262 static int p54_init_xbow_synth(struct ieee80211_hw *dev)
1263 {
1264 struct p54_common *priv = dev->priv;
1265 struct p54_control_hdr *hdr;
1266 struct p54_tx_control_xbow_synth *xbow;
1267
1268 hdr = kzalloc(sizeof(*hdr) + sizeof(*xbow) +
1269 priv->tx_hdr_len, GFP_KERNEL);
1270 if (!hdr)
1271 return -ENOMEM;
1272
1273 hdr = (void *)hdr + priv->tx_hdr_len;
1274 hdr->magic1 = cpu_to_le16(0x8001);
1275 hdr->len = cpu_to_le16(sizeof(*xbow));
1276 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_XBOW_SYNTH_CFG);
1277 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*xbow));
1278
1279 xbow = (struct p54_tx_control_xbow_synth *) hdr->data;
1280 xbow->magic1 = cpu_to_le16(0x1);
1281 xbow->magic2 = cpu_to_le16(0x2);
1282 xbow->freq = cpu_to_le16(5390);
1283
1284 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*xbow), 1);
1285
1286 return 0;
1287 }
1288
1289 static void p54_statistics_timer(unsigned long data)
1290 {
1291 struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
1292 struct p54_common *priv = dev->priv;
1293 struct p54_control_hdr *hdr;
1294 struct p54_statistics *stats;
1295
1296 BUG_ON(!priv->cached_stats);
1297
1298 hdr = (void *)priv->cached_stats + priv->tx_hdr_len;
1299 hdr->magic1 = cpu_to_le16(0x8000);
1300 hdr->len = cpu_to_le16(sizeof(*stats));
1301 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_STAT_READBACK);
1302 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*stats));
1303
1304 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*stats), 0);
1305 }
1306
1307 static int p54_get_stats(struct ieee80211_hw *dev,
1308 struct ieee80211_low_level_stats *stats)
1309 {
1310 struct p54_common *priv = dev->priv;
1311
1312 del_timer(&priv->stats_timer);
1313 p54_statistics_timer((unsigned long)dev);
1314
1315 if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
1316 printk(KERN_ERR "%s: device does not respond!\n",
1317 wiphy_name(dev->wiphy));
1318 return -EBUSY;
1319 }
1320
1321 memcpy(stats, &priv->stats, sizeof(*stats));
1322
1323 return 0;
1324 }
1325
1326 static int p54_get_tx_stats(struct ieee80211_hw *dev,
1327 struct ieee80211_tx_queue_stats *stats)
1328 {
1329 struct p54_common *priv = dev->priv;
1330
1331 memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
1332
1333 return 0;
1334 }
1335
1336 static void p54_bss_info_changed(struct ieee80211_hw *dev,
1337 struct ieee80211_vif *vif,
1338 struct ieee80211_bss_conf *info,
1339 u32 changed)
1340 {
1341 struct p54_common *priv = dev->priv;
1342
1343 if (changed & BSS_CHANGED_ERP_SLOT) {
1344 priv->use_short_slot = info->use_short_slot;
1345 p54_set_vdcf(dev);
1346 }
1347 }
1348
1349 static const struct ieee80211_ops p54_ops = {
1350 .tx = p54_tx,
1351 .start = p54_start,
1352 .stop = p54_stop,
1353 .add_interface = p54_add_interface,
1354 .remove_interface = p54_remove_interface,
1355 .config = p54_config,
1356 .config_interface = p54_config_interface,
1357 .bss_info_changed = p54_bss_info_changed,
1358 .configure_filter = p54_configure_filter,
1359 .conf_tx = p54_conf_tx,
1360 .get_stats = p54_get_stats,
1361 .get_tx_stats = p54_get_tx_stats
1362 };
1363
1364 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
1365 {
1366 struct ieee80211_hw *dev;
1367 struct p54_common *priv;
1368
1369 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
1370 if (!dev)
1371 return NULL;
1372
1373 priv = dev->priv;
1374 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1375 skb_queue_head_init(&priv->tx_queue);
1376 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
1377 IEEE80211_HW_RX_INCLUDES_FCS |
1378 IEEE80211_HW_SIGNAL_DBM |
1379 IEEE80211_HW_NOISE_DBM;
1380
1381 /*
1382 * XXX: when this driver gets support for any mode that
1383 * requires beacons (AP, MESH, IBSS) then it must
1384 * implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1385 */
1386 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1387
1388 dev->channel_change_time = 1000; /* TODO: find actual value */
1389 priv->tx_stats[0].limit = 1;
1390 priv->tx_stats[1].limit = 1;
1391 priv->tx_stats[2].limit = 1;
1392 priv->tx_stats[3].limit = 1;
1393 priv->tx_stats[4].limit = 5;
1394 dev->queues = 1;
1395 priv->noise = -94;
1396 dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
1397 sizeof(struct p54_tx_control_allocdata);
1398
1399 mutex_init(&priv->conf_mutex);
1400 init_completion(&priv->eeprom_comp);
1401 init_completion(&priv->stats_comp);
1402 setup_timer(&priv->stats_timer, p54_statistics_timer,
1403 (unsigned long)dev);
1404
1405 return dev;
1406 }
1407 EXPORT_SYMBOL_GPL(p54_init_common);
1408
1409 void p54_free_common(struct ieee80211_hw *dev)
1410 {
1411 struct p54_common *priv = dev->priv;
1412 kfree(priv->cached_stats);
1413 kfree(priv->iq_autocal);
1414 kfree(priv->output_limit);
1415 kfree(priv->curve_data);
1416 kfree(priv->cached_vdcf);
1417 }
1418 EXPORT_SYMBOL_GPL(p54_free_common);
1419
1420 static int __init p54_init(void)
1421 {
1422 return 0;
1423 }
1424
1425 static void __exit p54_exit(void)
1426 {
1427 }
1428
1429 module_init(p54_init);
1430 module_exit(p54_exit);
Linux kernel - Deliverables
This page took 0.116032 seconds and 5 git commands to generate.