headers: remove sched.h from interrupt.h
[deliverable/linux.git] / drivers / net / wireless / prism54 / islpci_dev.c
1 /*
2 * Copyright (C) 2002 Intersil Americas Inc.
3 * Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
4 * Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21 #include <linux/module.h>
22
23 #include <linux/netdevice.h>
24 #include <linux/ethtool.h>
25 #include <linux/pci.h>
26 #include <linux/sched.h>
27 #include <linux/etherdevice.h>
28 #include <linux/delay.h>
29 #include <linux/if_arp.h>
30
31 #include <asm/io.h>
32
33 #include "prismcompat.h"
34 #include "isl_38xx.h"
35 #include "isl_ioctl.h"
36 #include "islpci_dev.h"
37 #include "islpci_mgt.h"
38 #include "islpci_eth.h"
39 #include "oid_mgt.h"
40
41 #define ISL3877_IMAGE_FILE "isl3877"
42 #define ISL3886_IMAGE_FILE "isl3886"
43 #define ISL3890_IMAGE_FILE "isl3890"
44
45 static int prism54_bring_down(islpci_private *);
46 static int islpci_alloc_memory(islpci_private *);
47
48 /* Temporary dummy MAC address to use until firmware is loaded.
49 * The idea there is that some tools (such as nameif) may query
50 * the MAC address before the netdev is 'open'. By using a valid
51 * OUI prefix, they can process the netdev properly.
52 * Of course, this is not the final/real MAC address. It doesn't
53 * matter, as you are suppose to be able to change it anytime via
54 * ndev->set_mac_address. Jean II */
55 static const unsigned char dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
56
57 static int
58 isl_upload_firmware(islpci_private *priv)
59 {
60 u32 reg, rc;
61 void __iomem *device_base = priv->device_base;
62
63 /* clear the RAMBoot and the Reset bit */
64 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
65 reg &= ~ISL38XX_CTRL_STAT_RESET;
66 reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
67 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
68 wmb();
69 udelay(ISL38XX_WRITEIO_DELAY);
70
71 /* set the Reset bit without reading the register ! */
72 reg |= ISL38XX_CTRL_STAT_RESET;
73 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
74 wmb();
75 udelay(ISL38XX_WRITEIO_DELAY);
76
77 /* clear the Reset bit */
78 reg &= ~ISL38XX_CTRL_STAT_RESET;
79 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
80 wmb();
81
82 /* wait a while for the device to reboot */
83 mdelay(50);
84
85 {
86 const struct firmware *fw_entry = NULL;
87 long fw_len;
88 const u32 *fw_ptr;
89
90 rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
91 if (rc) {
92 printk(KERN_ERR
93 "%s: request_firmware() failed for '%s'\n",
94 "prism54", priv->firmware);
95 return rc;
96 }
97 /* prepare the Direct Memory Base register */
98 reg = ISL38XX_DEV_FIRMWARE_ADDRES;
99
100 fw_ptr = (u32 *) fw_entry->data;
101 fw_len = fw_entry->size;
102
103 if (fw_len % 4) {
104 printk(KERN_ERR
105 "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
106 "prism54", priv->firmware);
107 release_firmware(fw_entry);
108 return -EILSEQ; /* Illegal byte sequence */;
109 }
110
111 while (fw_len > 0) {
112 long _fw_len =
113 (fw_len >
114 ISL38XX_MEMORY_WINDOW_SIZE) ?
115 ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
116 u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
117
118 /* set the card's base address for writing the data */
119 isl38xx_w32_flush(device_base, reg,
120 ISL38XX_DIR_MEM_BASE_REG);
121 wmb(); /* be paranoid */
122
123 /* increment the write address for next iteration */
124 reg += _fw_len;
125 fw_len -= _fw_len;
126
127 /* write the data to the Direct Memory Window 32bit-wise */
128 /* memcpy_toio() doesn't guarantee 32bit writes :-| */
129 while (_fw_len > 0) {
130 /* use non-swapping writel() */
131 __raw_writel(*fw_ptr, dev_fw_ptr);
132 fw_ptr++, dev_fw_ptr++;
133 _fw_len -= 4;
134 }
135
136 /* flush PCI posting */
137 (void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
138 wmb(); /* be paranoid again */
139
140 BUG_ON(_fw_len != 0);
141 }
142
143 BUG_ON(fw_len != 0);
144
145 /* Firmware version is at offset 40 (also for "newmac") */
146 printk(KERN_DEBUG "%s: firmware version: %.8s\n",
147 priv->ndev->name, fw_entry->data + 40);
148
149 release_firmware(fw_entry);
150 }
151
152 /* now reset the device
153 * clear the Reset & ClkRun bit, set the RAMBoot bit */
154 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
155 reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
156 reg &= ~ISL38XX_CTRL_STAT_RESET;
157 reg |= ISL38XX_CTRL_STAT_RAMBOOT;
158 isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
159 wmb();
160 udelay(ISL38XX_WRITEIO_DELAY);
161
162 /* set the reset bit latches the host override and RAMBoot bits
163 * into the device for operation when the reset bit is reset */
164 reg |= ISL38XX_CTRL_STAT_RESET;
165 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
166 /* don't do flush PCI posting here! */
167 wmb();
168 udelay(ISL38XX_WRITEIO_DELAY);
169
170 /* clear the reset bit should start the whole circus */
171 reg &= ~ISL38XX_CTRL_STAT_RESET;
172 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
173 /* don't do flush PCI posting here! */
174 wmb();
175 udelay(ISL38XX_WRITEIO_DELAY);
176
177 return 0;
178 }
179
180 /******************************************************************************
181 Device Interrupt Handler
182 ******************************************************************************/
183
184 irqreturn_t
185 islpci_interrupt(int irq, void *config)
186 {
187 u32 reg;
188 islpci_private *priv = config;
189 struct net_device *ndev = priv->ndev;
190 void __iomem *device = priv->device_base;
191 int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
192
193 /* lock the interrupt handler */
194 spin_lock(&priv->slock);
195
196 /* received an interrupt request on a shared IRQ line
197 * first check whether the device is in sleep mode */
198 reg = readl(device + ISL38XX_CTRL_STAT_REG);
199 if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
200 /* device is in sleep mode, IRQ was generated by someone else */
201 {
202 #if VERBOSE > SHOW_ERROR_MESSAGES
203 DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
204 #endif
205 spin_unlock(&priv->slock);
206 return IRQ_NONE;
207 }
208
209
210 /* check whether there is any source of interrupt on the device */
211 reg = readl(device + ISL38XX_INT_IDENT_REG);
212
213 /* also check the contents of the Interrupt Enable Register, because this
214 * will filter out interrupt sources from other devices on the same irq ! */
215 reg &= readl(device + ISL38XX_INT_EN_REG);
216 reg &= ISL38XX_INT_SOURCES;
217
218 if (reg != 0) {
219 if (islpci_get_state(priv) != PRV_STATE_SLEEP)
220 powerstate = ISL38XX_PSM_ACTIVE_STATE;
221
222 /* reset the request bits in the Identification register */
223 isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
224
225 #if VERBOSE > SHOW_ERROR_MESSAGES
226 DEBUG(SHOW_FUNCTION_CALLS,
227 "IRQ: Identification register 0x%p 0x%x \n", device, reg);
228 #endif
229
230 /* check for each bit in the register separately */
231 if (reg & ISL38XX_INT_IDENT_UPDATE) {
232 #if VERBOSE > SHOW_ERROR_MESSAGES
233 /* Queue has been updated */
234 DEBUG(SHOW_TRACING, "IRQ: Update flag \n");
235
236 DEBUG(SHOW_QUEUE_INDEXES,
237 "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
238 le32_to_cpu(priv->control_block->
239 driver_curr_frag[0]),
240 le32_to_cpu(priv->control_block->
241 driver_curr_frag[1]),
242 le32_to_cpu(priv->control_block->
243 driver_curr_frag[2]),
244 le32_to_cpu(priv->control_block->
245 driver_curr_frag[3]),
246 le32_to_cpu(priv->control_block->
247 driver_curr_frag[4]),
248 le32_to_cpu(priv->control_block->
249 driver_curr_frag[5])
250 );
251
252 DEBUG(SHOW_QUEUE_INDEXES,
253 "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
254 le32_to_cpu(priv->control_block->
255 device_curr_frag[0]),
256 le32_to_cpu(priv->control_block->
257 device_curr_frag[1]),
258 le32_to_cpu(priv->control_block->
259 device_curr_frag[2]),
260 le32_to_cpu(priv->control_block->
261 device_curr_frag[3]),
262 le32_to_cpu(priv->control_block->
263 device_curr_frag[4]),
264 le32_to_cpu(priv->control_block->
265 device_curr_frag[5])
266 );
267 #endif
268
269 /* cleanup the data low transmit queue */
270 islpci_eth_cleanup_transmit(priv, priv->control_block);
271
272 /* device is in active state, update the
273 * powerstate flag if necessary */
274 powerstate = ISL38XX_PSM_ACTIVE_STATE;
275
276 /* check all three queues in priority order
277 * call the PIMFOR receive function until the
278 * queue is empty */
279 if (isl38xx_in_queue(priv->control_block,
280 ISL38XX_CB_RX_MGMTQ) != 0) {
281 #if VERBOSE > SHOW_ERROR_MESSAGES
282 DEBUG(SHOW_TRACING,
283 "Received frame in Management Queue\n");
284 #endif
285 islpci_mgt_receive(ndev);
286
287 islpci_mgt_cleanup_transmit(ndev);
288
289 /* Refill slots in receive queue */
290 islpci_mgmt_rx_fill(ndev);
291
292 /* no need to trigger the device, next
293 islpci_mgt_transaction does it */
294 }
295
296 while (isl38xx_in_queue(priv->control_block,
297 ISL38XX_CB_RX_DATA_LQ) != 0) {
298 #if VERBOSE > SHOW_ERROR_MESSAGES
299 DEBUG(SHOW_TRACING,
300 "Received frame in Data Low Queue \n");
301 #endif
302 islpci_eth_receive(priv);
303 }
304
305 /* check whether the data transmit queues were full */
306 if (priv->data_low_tx_full) {
307 /* check whether the transmit is not full anymore */
308 if (ISL38XX_CB_TX_QSIZE -
309 isl38xx_in_queue(priv->control_block,
310 ISL38XX_CB_TX_DATA_LQ) >=
311 ISL38XX_MIN_QTHRESHOLD) {
312 /* nope, the driver is ready for more network frames */
313 netif_wake_queue(priv->ndev);
314
315 /* reset the full flag */
316 priv->data_low_tx_full = 0;
317 }
318 }
319 }
320
321 if (reg & ISL38XX_INT_IDENT_INIT) {
322 /* Device has been initialized */
323 #if VERBOSE > SHOW_ERROR_MESSAGES
324 DEBUG(SHOW_TRACING,
325 "IRQ: Init flag, device initialized \n");
326 #endif
327 wake_up(&priv->reset_done);
328 }
329
330 if (reg & ISL38XX_INT_IDENT_SLEEP) {
331 /* Device intends to move to powersave state */
332 #if VERBOSE > SHOW_ERROR_MESSAGES
333 DEBUG(SHOW_TRACING, "IRQ: Sleep flag \n");
334 #endif
335 isl38xx_handle_sleep_request(priv->control_block,
336 &powerstate,
337 priv->device_base);
338 }
339
340 if (reg & ISL38XX_INT_IDENT_WAKEUP) {
341 /* Device has been woken up to active state */
342 #if VERBOSE > SHOW_ERROR_MESSAGES
343 DEBUG(SHOW_TRACING, "IRQ: Wakeup flag \n");
344 #endif
345
346 isl38xx_handle_wakeup(priv->control_block,
347 &powerstate, priv->device_base);
348 }
349 } else {
350 #if VERBOSE > SHOW_ERROR_MESSAGES
351 DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
352 #endif
353 spin_unlock(&priv->slock);
354 return IRQ_NONE;
355 }
356
357 /* sleep -> ready */
358 if (islpci_get_state(priv) == PRV_STATE_SLEEP
359 && powerstate == ISL38XX_PSM_ACTIVE_STATE)
360 islpci_set_state(priv, PRV_STATE_READY);
361
362 /* !sleep -> sleep */
363 if (islpci_get_state(priv) != PRV_STATE_SLEEP
364 && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
365 islpci_set_state(priv, PRV_STATE_SLEEP);
366
367 /* unlock the interrupt handler */
368 spin_unlock(&priv->slock);
369
370 return IRQ_HANDLED;
371 }
372
373 /******************************************************************************
374 Network Interface Control & Statistical functions
375 ******************************************************************************/
376 static int
377 islpci_open(struct net_device *ndev)
378 {
379 u32 rc;
380 islpci_private *priv = netdev_priv(ndev);
381
382 /* reset data structures, upload firmware and reset device */
383 rc = islpci_reset(priv,1);
384 if (rc) {
385 prism54_bring_down(priv);
386 return rc; /* Returns informative message */
387 }
388
389 netif_start_queue(ndev);
390
391 /* Turn off carrier if in STA or Ad-hoc mode. It will be turned on
392 * once the firmware receives a trap of being associated
393 * (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we
394 * should just leave the carrier on as its expected the firmware
395 * won't send us a trigger. */
396 if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC)
397 netif_carrier_off(ndev);
398 else
399 netif_carrier_on(ndev);
400
401 return 0;
402 }
403
404 static int
405 islpci_close(struct net_device *ndev)
406 {
407 islpci_private *priv = netdev_priv(ndev);
408
409 printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
410
411 netif_stop_queue(ndev);
412
413 return prism54_bring_down(priv);
414 }
415
416 static int
417 prism54_bring_down(islpci_private *priv)
418 {
419 void __iomem *device_base = priv->device_base;
420 u32 reg;
421 /* we are going to shutdown the device */
422 islpci_set_state(priv, PRV_STATE_PREBOOT);
423
424 /* disable all device interrupts in case they weren't */
425 isl38xx_disable_interrupts(priv->device_base);
426
427 /* For safety reasons, we may want to ensure that no DMA transfer is
428 * currently in progress by emptying the TX and RX queues. */
429
430 /* wait until interrupts have finished executing on other CPUs */
431 synchronize_irq(priv->pdev->irq);
432
433 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
434 reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
435 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
436 wmb();
437 udelay(ISL38XX_WRITEIO_DELAY);
438
439 reg |= ISL38XX_CTRL_STAT_RESET;
440 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
441 wmb();
442 udelay(ISL38XX_WRITEIO_DELAY);
443
444 /* clear the Reset bit */
445 reg &= ~ISL38XX_CTRL_STAT_RESET;
446 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
447 wmb();
448
449 /* wait a while for the device to reset */
450 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
451
452 return 0;
453 }
454
455 static int
456 islpci_upload_fw(islpci_private *priv)
457 {
458 islpci_state_t old_state;
459 u32 rc;
460
461 old_state = islpci_set_state(priv, PRV_STATE_BOOT);
462
463 printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
464
465 rc = isl_upload_firmware(priv);
466 if (rc) {
467 /* error uploading the firmware */
468 printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
469 priv->ndev->name, priv->firmware);
470
471 islpci_set_state(priv, old_state);
472 return rc;
473 }
474
475 printk(KERN_DEBUG "%s: firmware upload complete\n",
476 priv->ndev->name);
477
478 islpci_set_state(priv, PRV_STATE_POSTBOOT);
479
480 return 0;
481 }
482
483 static int
484 islpci_reset_if(islpci_private *priv)
485 {
486 long remaining;
487 int result = -ETIME;
488 int count;
489
490 DEFINE_WAIT(wait);
491 prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
492
493 /* now the last step is to reset the interface */
494 isl38xx_interface_reset(priv->device_base, priv->device_host_address);
495 islpci_set_state(priv, PRV_STATE_PREINIT);
496
497 for(count = 0; count < 2 && result; count++) {
498 /* The software reset acknowledge needs about 220 msec here.
499 * Be conservative and wait for up to one second. */
500
501 remaining = schedule_timeout_uninterruptible(HZ);
502
503 if(remaining > 0) {
504 result = 0;
505 break;
506 }
507
508 /* If we're here it's because our IRQ hasn't yet gone through.
509 * Retry a bit more...
510 */
511 printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n",
512 priv->ndev->name);
513 }
514
515 finish_wait(&priv->reset_done, &wait);
516
517 if (result) {
518 printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
519 return result;
520 }
521
522 islpci_set_state(priv, PRV_STATE_INIT);
523
524 /* Now that the device is 100% up, let's allow
525 * for the other interrupts --
526 * NOTE: this is not *yet* true since we've only allowed the
527 * INIT interrupt on the IRQ line. We can perhaps poll
528 * the IRQ line until we know for sure the reset went through */
529 isl38xx_enable_common_interrupts(priv->device_base);
530
531 down_write(&priv->mib_sem);
532 result = mgt_commit(priv);
533 if (result) {
534 printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
535 up_write(&priv->mib_sem);
536 return result;
537 }
538 up_write(&priv->mib_sem);
539
540 islpci_set_state(priv, PRV_STATE_READY);
541
542 printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name);
543 return 0;
544 }
545
546 int
547 islpci_reset(islpci_private *priv, int reload_firmware)
548 {
549 isl38xx_control_block *cb = /* volatile not needed */
550 (isl38xx_control_block *) priv->control_block;
551 unsigned counter;
552 int rc;
553
554 if (reload_firmware)
555 islpci_set_state(priv, PRV_STATE_PREBOOT);
556 else
557 islpci_set_state(priv, PRV_STATE_POSTBOOT);
558
559 printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
560
561 /* disable all device interrupts in case they weren't */
562 isl38xx_disable_interrupts(priv->device_base);
563
564 /* flush all management queues */
565 priv->index_mgmt_tx = 0;
566 priv->index_mgmt_rx = 0;
567
568 /* clear the indexes in the frame pointer */
569 for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
570 cb->driver_curr_frag[counter] = cpu_to_le32(0);
571 cb->device_curr_frag[counter] = cpu_to_le32(0);
572 }
573
574 /* reset the mgmt receive queue */
575 for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
576 isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
577 frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
578 frag->flags = 0;
579 frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
580 }
581
582 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
583 cb->rx_data_low[counter].address =
584 cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
585 }
586
587 /* since the receive queues are filled with empty fragments, now we can
588 * set the corresponding indexes in the Control Block */
589 priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
590 cpu_to_le32(ISL38XX_CB_RX_QSIZE);
591 priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
592 cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
593
594 /* reset the remaining real index registers and full flags */
595 priv->free_data_rx = 0;
596 priv->free_data_tx = 0;
597 priv->data_low_tx_full = 0;
598
599 if (reload_firmware) { /* Should we load the firmware ? */
600 /* now that the data structures are cleaned up, upload
601 * firmware and reset interface */
602 rc = islpci_upload_fw(priv);
603 if (rc) {
604 printk(KERN_ERR "%s: islpci_reset: failure\n",
605 priv->ndev->name);
606 return rc;
607 }
608 }
609
610 /* finally reset interface */
611 rc = islpci_reset_if(priv);
612 if (rc)
613 printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
614 return rc;
615 }
616
617 /******************************************************************************
618 Network device configuration functions
619 ******************************************************************************/
620 static int
621 islpci_alloc_memory(islpci_private *priv)
622 {
623 int counter;
624
625 #if VERBOSE > SHOW_ERROR_MESSAGES
626 printk(KERN_DEBUG "islpci_alloc_memory\n");
627 #endif
628
629 /* remap the PCI device base address to accessable */
630 if (!(priv->device_base =
631 ioremap(pci_resource_start(priv->pdev, 0),
632 ISL38XX_PCI_MEM_SIZE))) {
633 /* error in remapping the PCI device memory address range */
634 printk(KERN_ERR "PCI memory remapping failed \n");
635 return -1;
636 }
637
638 /* memory layout for consistent DMA region:
639 *
640 * Area 1: Control Block for the device interface
641 * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
642 * the number of supported stations in the AP determines the minimal
643 * size of the buffer !
644 */
645
646 /* perform the allocation */
647 priv->driver_mem_address = pci_alloc_consistent(priv->pdev,
648 HOST_MEM_BLOCK,
649 &priv->
650 device_host_address);
651
652 if (!priv->driver_mem_address) {
653 /* error allocating the block of PCI memory */
654 printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
655 "prism54");
656 return -1;
657 }
658
659 /* assign the Control Block to the first address of the allocated area */
660 priv->control_block =
661 (isl38xx_control_block *) priv->driver_mem_address;
662
663 /* set the Power Save Buffer pointer directly behind the CB */
664 priv->device_psm_buffer =
665 priv->device_host_address + CONTROL_BLOCK_SIZE;
666
667 /* make sure all buffer pointers are initialized */
668 for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
669 priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
670 priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
671 }
672
673 priv->index_mgmt_rx = 0;
674 memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
675 memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
676
677 /* allocate rx queue for management frames */
678 if (islpci_mgmt_rx_fill(priv->ndev) < 0)
679 goto out_free;
680
681 /* now get the data rx skb's */
682 memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
683 memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
684
685 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
686 struct sk_buff *skb;
687
688 /* allocate an sk_buff for received data frames storage
689 * each frame on receive size consists of 1 fragment
690 * include any required allignment operations */
691 if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
692 /* error allocating an sk_buff structure elements */
693 printk(KERN_ERR "Error allocating skb.\n");
694 skb = NULL;
695 goto out_free;
696 }
697 skb_reserve(skb, (4 - (long) skb->data) & 0x03);
698 /* add the new allocated sk_buff to the buffer array */
699 priv->data_low_rx[counter] = skb;
700
701 /* map the allocated skb data area to pci */
702 priv->pci_map_rx_address[counter] =
703 pci_map_single(priv->pdev, (void *) skb->data,
704 MAX_FRAGMENT_SIZE_RX + 2,
705 PCI_DMA_FROMDEVICE);
706 if (!priv->pci_map_rx_address[counter]) {
707 /* error mapping the buffer to device
708 accessable memory address */
709 printk(KERN_ERR "failed to map skb DMA'able\n");
710 goto out_free;
711 }
712 }
713
714 prism54_acl_init(&priv->acl);
715 prism54_wpa_bss_ie_init(priv);
716 if (mgt_init(priv))
717 goto out_free;
718
719 return 0;
720 out_free:
721 islpci_free_memory(priv);
722 return -1;
723 }
724
725 int
726 islpci_free_memory(islpci_private *priv)
727 {
728 int counter;
729
730 if (priv->device_base)
731 iounmap(priv->device_base);
732 priv->device_base = NULL;
733
734 /* free consistent DMA area... */
735 if (priv->driver_mem_address)
736 pci_free_consistent(priv->pdev, HOST_MEM_BLOCK,
737 priv->driver_mem_address,
738 priv->device_host_address);
739
740 /* clear some dangling pointers */
741 priv->driver_mem_address = NULL;
742 priv->device_host_address = 0;
743 priv->device_psm_buffer = 0;
744 priv->control_block = NULL;
745
746 /* clean up mgmt rx buffers */
747 for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
748 struct islpci_membuf *buf = &priv->mgmt_rx[counter];
749 if (buf->pci_addr)
750 pci_unmap_single(priv->pdev, buf->pci_addr,
751 buf->size, PCI_DMA_FROMDEVICE);
752 buf->pci_addr = 0;
753 kfree(buf->mem);
754 buf->size = 0;
755 buf->mem = NULL;
756 }
757
758 /* clean up data rx buffers */
759 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
760 if (priv->pci_map_rx_address[counter])
761 pci_unmap_single(priv->pdev,
762 priv->pci_map_rx_address[counter],
763 MAX_FRAGMENT_SIZE_RX + 2,
764 PCI_DMA_FROMDEVICE);
765 priv->pci_map_rx_address[counter] = 0;
766
767 if (priv->data_low_rx[counter])
768 dev_kfree_skb(priv->data_low_rx[counter]);
769 priv->data_low_rx[counter] = NULL;
770 }
771
772 /* Free the acces control list and the WPA list */
773 prism54_acl_clean(&priv->acl);
774 prism54_wpa_bss_ie_clean(priv);
775 mgt_clean(priv);
776
777 return 0;
778 }
779
780 #if 0
781 static void
782 islpci_set_multicast_list(struct net_device *dev)
783 {
784 /* put device into promisc mode and let network layer handle it */
785 }
786 #endif
787
788 static void islpci_ethtool_get_drvinfo(struct net_device *dev,
789 struct ethtool_drvinfo *info)
790 {
791 strcpy(info->driver, DRV_NAME);
792 strcpy(info->version, DRV_VERSION);
793 }
794
795 static const struct ethtool_ops islpci_ethtool_ops = {
796 .get_drvinfo = islpci_ethtool_get_drvinfo,
797 };
798
799 static const struct net_device_ops islpci_netdev_ops = {
800 .ndo_open = islpci_open,
801 .ndo_stop = islpci_close,
802 .ndo_do_ioctl = prism54_ioctl,
803 .ndo_start_xmit = islpci_eth_transmit,
804 .ndo_tx_timeout = islpci_eth_tx_timeout,
805 .ndo_set_mac_address = prism54_set_mac_address,
806 .ndo_change_mtu = eth_change_mtu,
807 .ndo_validate_addr = eth_validate_addr,
808 };
809
810 struct net_device *
811 islpci_setup(struct pci_dev *pdev)
812 {
813 islpci_private *priv;
814 struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
815
816 if (!ndev)
817 return ndev;
818
819 pci_set_drvdata(pdev, ndev);
820 #if defined(SET_NETDEV_DEV)
821 SET_NETDEV_DEV(ndev, &pdev->dev);
822 #endif
823
824 /* setup the structure members */
825 ndev->base_addr = pci_resource_start(pdev, 0);
826 ndev->irq = pdev->irq;
827
828 /* initialize the function pointers */
829 ndev->netdev_ops = &islpci_netdev_ops;
830 ndev->wireless_handlers = &prism54_handler_def;
831 ndev->ethtool_ops = &islpci_ethtool_ops;
832
833 /* ndev->set_multicast_list = &islpci_set_multicast_list; */
834 ndev->addr_len = ETH_ALEN;
835 /* Get a non-zero dummy MAC address for nameif. Jean II */
836 memcpy(ndev->dev_addr, dummy_mac, 6);
837
838 ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
839
840 /* allocate a private device structure to the network device */
841 priv = netdev_priv(ndev);
842 priv->ndev = ndev;
843 priv->pdev = pdev;
844 priv->monitor_type = ARPHRD_IEEE80211;
845 priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
846 priv->monitor_type : ARPHRD_ETHER;
847
848 /* Add pointers to enable iwspy support. */
849 priv->wireless_data.spy_data = &priv->spy_data;
850 ndev->wireless_data = &priv->wireless_data;
851
852 /* save the start and end address of the PCI memory area */
853 ndev->mem_start = (unsigned long) priv->device_base;
854 ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
855
856 #if VERBOSE > SHOW_ERROR_MESSAGES
857 DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
858 #endif
859
860 init_waitqueue_head(&priv->reset_done);
861
862 /* init the queue read locks, process wait counter */
863 mutex_init(&priv->mgmt_lock);
864 priv->mgmt_received = NULL;
865 init_waitqueue_head(&priv->mgmt_wqueue);
866 mutex_init(&priv->stats_lock);
867 spin_lock_init(&priv->slock);
868
869 /* init state machine with off#1 state */
870 priv->state = PRV_STATE_OFF;
871 priv->state_off = 1;
872
873 /* initialize workqueue's */
874 INIT_WORK(&priv->stats_work, prism54_update_stats);
875 priv->stats_timestamp = 0;
876
877 INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake);
878 priv->reset_task_pending = 0;
879
880 /* allocate various memory areas */
881 if (islpci_alloc_memory(priv))
882 goto do_free_netdev;
883
884 /* select the firmware file depending on the device id */
885 switch (pdev->device) {
886 case 0x3877:
887 strcpy(priv->firmware, ISL3877_IMAGE_FILE);
888 break;
889
890 case 0x3886:
891 strcpy(priv->firmware, ISL3886_IMAGE_FILE);
892 break;
893
894 default:
895 strcpy(priv->firmware, ISL3890_IMAGE_FILE);
896 break;
897 }
898
899 if (register_netdev(ndev)) {
900 DEBUG(SHOW_ERROR_MESSAGES,
901 "ERROR: register_netdev() failed \n");
902 goto do_islpci_free_memory;
903 }
904
905 return ndev;
906
907 do_islpci_free_memory:
908 islpci_free_memory(priv);
909 do_free_netdev:
910 pci_set_drvdata(pdev, NULL);
911 free_netdev(ndev);
912 priv = NULL;
913 return NULL;
914 }
915
916 islpci_state_t
917 islpci_set_state(islpci_private *priv, islpci_state_t new_state)
918 {
919 islpci_state_t old_state;
920
921 /* lock */
922 old_state = priv->state;
923
924 /* this means either a race condition or some serious error in
925 * the driver code */
926 switch (new_state) {
927 case PRV_STATE_OFF:
928 priv->state_off++;
929 default:
930 priv->state = new_state;
931 break;
932
933 case PRV_STATE_PREBOOT:
934 /* there are actually many off-states, enumerated by
935 * state_off */
936 if (old_state == PRV_STATE_OFF)
937 priv->state_off--;
938
939 /* only if hw_unavailable is zero now it means we either
940 * were in off#1 state, or came here from
941 * somewhere else */
942 if (!priv->state_off)
943 priv->state = new_state;
944 break;
945 };
946 #if 0
947 printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
948 priv->ndev->name, old_state, new_state, priv->state_off);
949 #endif
950
951 /* invariants */
952 BUG_ON(priv->state_off < 0);
953 BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
954 BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));
955
956 /* unlock */
957 return old_state;
958 }
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