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Merge remote-tracking branches 'regulator/topic/discharge', 'regulator/topic/fan53555...
[deliverable/linux.git] / drivers / net / wireless / realtek / rtlwifi / btcoexist / halbtc8192e2ant.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25 /**************************************************************
26 * Description:
27 *
28 * This file is for RTL8192E Co-exist mechanism
29 *
30 * History
31 * 2012/11/15 Cosa first check in.
32 *
33 **************************************************************/
34
35 /**************************************************************
36 * include files
37 **************************************************************/
38 #include "halbt_precomp.h"
39 /**************************************************************
40 * Global variables, these are static variables
41 **************************************************************/
42 static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
43 static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
44 static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
45 static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
46
47 static const char *const GLBtInfoSrc8192e2Ant[] = {
48 "BT Info[wifi fw]",
49 "BT Info[bt rsp]",
50 "BT Info[bt auto report]",
51 };
52
53 static u32 glcoex_ver_date_8192e_2ant = 20130902;
54 static u32 glcoex_ver_8192e_2ant = 0x34;
55
56 /**************************************************************
57 * local function proto type if needed
58 **************************************************************/
59 /**************************************************************
60 * local function start with halbtc8192e2ant_
61 **************************************************************/
62 static u8 halbtc8192e2ant_btrssi_state(u8 level_num, u8 rssi_thresh,
63 u8 rssi_thresh1)
64 {
65 int btrssi = 0;
66 u8 btrssi_state = coex_sta->pre_bt_rssi_state;
67
68 btrssi = coex_sta->bt_rssi;
69
70 if (level_num == 2) {
71 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
72 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
73 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
74 "BT Rssi pre state = LOW\n");
75 if (btrssi >= (rssi_thresh +
76 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
77 btrssi_state = BTC_RSSI_STATE_HIGH;
78 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
79 "BT Rssi state switch to High\n");
80 } else {
81 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
82 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
83 "BT Rssi state stay at Low\n");
84 }
85 } else {
86 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
87 "BT Rssi pre state = HIGH\n");
88 if (btrssi < rssi_thresh) {
89 btrssi_state = BTC_RSSI_STATE_LOW;
90 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
91 "BT Rssi state switch to Low\n");
92 } else {
93 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
94 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
95 "BT Rssi state stay at High\n");
96 }
97 }
98 } else if (level_num == 3) {
99 if (rssi_thresh > rssi_thresh1) {
100 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
101 "BT Rssi thresh error!!\n");
102 return coex_sta->pre_bt_rssi_state;
103 }
104
105 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
106 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
107 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
108 "BT Rssi pre state = LOW\n");
109 if (btrssi >= (rssi_thresh +
110 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
111 btrssi_state = BTC_RSSI_STATE_MEDIUM;
112 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
113 "BT Rssi state switch to Medium\n");
114 } else {
115 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
116 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
117 "BT Rssi state stay at Low\n");
118 }
119 } else if ((coex_sta->pre_bt_rssi_state ==
120 BTC_RSSI_STATE_MEDIUM) ||
121 (coex_sta->pre_bt_rssi_state ==
122 BTC_RSSI_STATE_STAY_MEDIUM)) {
123 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
124 "[BTCoex], BT Rssi pre state = MEDIUM\n");
125 if (btrssi >= (rssi_thresh1 +
126 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
127 btrssi_state = BTC_RSSI_STATE_HIGH;
128 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
129 "BT Rssi state switch to High\n");
130 } else if (btrssi < rssi_thresh) {
131 btrssi_state = BTC_RSSI_STATE_LOW;
132 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
133 "BT Rssi state switch to Low\n");
134 } else {
135 btrssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
136 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
137 "BT Rssi state stay at Medium\n");
138 }
139 } else {
140 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
141 "BT Rssi pre state = HIGH\n");
142 if (btrssi < rssi_thresh1) {
143 btrssi_state = BTC_RSSI_STATE_MEDIUM;
144 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
145 "BT Rssi state switch to Medium\n");
146 } else {
147 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
148 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
149 "BT Rssi state stay at High\n");
150 }
151 }
152 }
153
154 coex_sta->pre_bt_rssi_state = btrssi_state;
155
156 return btrssi_state;
157 }
158
159 static u8 halbtc8192e2ant_wifirssi_state(struct btc_coexist *btcoexist,
160 u8 index, u8 level_num, u8 rssi_thresh,
161 u8 rssi_thresh1)
162 {
163 int wifirssi = 0;
164 u8 wifirssi_state = coex_sta->pre_wifi_rssi_state[index];
165
166 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
167
168 if (level_num == 2) {
169 if ((coex_sta->pre_wifi_rssi_state[index] ==
170 BTC_RSSI_STATE_LOW) ||
171 (coex_sta->pre_wifi_rssi_state[index] ==
172 BTC_RSSI_STATE_STAY_LOW)) {
173 if (wifirssi >= (rssi_thresh +
174 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
175 wifirssi_state = BTC_RSSI_STATE_HIGH;
176 BTC_PRINT(BTC_MSG_ALGORITHM,
177 ALGO_WIFI_RSSI_STATE,
178 "wifi RSSI state switch to High\n");
179 } else {
180 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
181 BTC_PRINT(BTC_MSG_ALGORITHM,
182 ALGO_WIFI_RSSI_STATE,
183 "wifi RSSI state stay at Low\n");
184 }
185 } else {
186 if (wifirssi < rssi_thresh) {
187 wifirssi_state = BTC_RSSI_STATE_LOW;
188 BTC_PRINT(BTC_MSG_ALGORITHM,
189 ALGO_WIFI_RSSI_STATE,
190 "wifi RSSI state switch to Low\n");
191 } else {
192 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
193 BTC_PRINT(BTC_MSG_ALGORITHM,
194 ALGO_WIFI_RSSI_STATE,
195 "wifi RSSI state stay at High\n");
196 }
197 }
198 } else if (level_num == 3) {
199 if (rssi_thresh > rssi_thresh1) {
200 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE,
201 "wifi RSSI thresh error!!\n");
202 return coex_sta->pre_wifi_rssi_state[index];
203 }
204
205 if ((coex_sta->pre_wifi_rssi_state[index] ==
206 BTC_RSSI_STATE_LOW) ||
207 (coex_sta->pre_wifi_rssi_state[index] ==
208 BTC_RSSI_STATE_STAY_LOW)) {
209 if (wifirssi >= (rssi_thresh +
210 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
211 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
212 BTC_PRINT(BTC_MSG_ALGORITHM,
213 ALGO_WIFI_RSSI_STATE,
214 "wifi RSSI state switch to Medium\n");
215 } else {
216 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
217 BTC_PRINT(BTC_MSG_ALGORITHM,
218 ALGO_WIFI_RSSI_STATE,
219 "wifi RSSI state stay at Low\n");
220 }
221 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
222 BTC_RSSI_STATE_MEDIUM) ||
223 (coex_sta->pre_wifi_rssi_state[index] ==
224 BTC_RSSI_STATE_STAY_MEDIUM)) {
225 if (wifirssi >= (rssi_thresh1 +
226 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
227 wifirssi_state = BTC_RSSI_STATE_HIGH;
228 BTC_PRINT(BTC_MSG_ALGORITHM,
229 ALGO_WIFI_RSSI_STATE,
230 "wifi RSSI state switch to High\n");
231 } else if (wifirssi < rssi_thresh) {
232 wifirssi_state = BTC_RSSI_STATE_LOW;
233 BTC_PRINT(BTC_MSG_ALGORITHM,
234 ALGO_WIFI_RSSI_STATE,
235 "wifi RSSI state switch to Low\n");
236 } else {
237 wifirssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
238 BTC_PRINT(BTC_MSG_ALGORITHM,
239 ALGO_WIFI_RSSI_STATE,
240 "wifi RSSI state stay at Medium\n");
241 }
242 } else {
243 if (wifirssi < rssi_thresh1) {
244 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
245 BTC_PRINT(BTC_MSG_ALGORITHM,
246 ALGO_WIFI_RSSI_STATE,
247 "wifi RSSI state switch to Medium\n");
248 } else {
249 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
250 BTC_PRINT(BTC_MSG_ALGORITHM,
251 ALGO_WIFI_RSSI_STATE,
252 "wifi RSSI state stay at High\n");
253 }
254 }
255 }
256
257 coex_sta->pre_wifi_rssi_state[index] = wifirssi_state;
258
259 return wifirssi_state;
260 }
261
262 static void btc8192e2ant_monitor_bt_enable_dis(struct btc_coexist *btcoexist)
263 {
264 static bool pre_bt_disabled;
265 static u32 bt_disable_cnt;
266 bool bt_active = true, bt_disabled = false;
267
268 /* This function check if bt is disabled */
269
270 if (coex_sta->high_priority_tx == 0 &&
271 coex_sta->high_priority_rx == 0 &&
272 coex_sta->low_priority_tx == 0 &&
273 coex_sta->low_priority_rx == 0)
274 bt_active = false;
275
276 if (coex_sta->high_priority_tx == 0xffff &&
277 coex_sta->high_priority_rx == 0xffff &&
278 coex_sta->low_priority_tx == 0xffff &&
279 coex_sta->low_priority_rx == 0xffff)
280 bt_active = false;
281
282 if (bt_active) {
283 bt_disable_cnt = 0;
284 bt_disabled = false;
285 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
286 &bt_disabled);
287 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
288 "[BTCoex], BT is enabled !!\n");
289 } else {
290 bt_disable_cnt++;
291 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
292 "[BTCoex], bt all counters = 0, %d times!!\n",
293 bt_disable_cnt);
294 if (bt_disable_cnt >= 2) {
295 bt_disabled = true;
296 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
297 &bt_disabled);
298 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
299 "[BTCoex], BT is disabled !!\n");
300 }
301 }
302 if (pre_bt_disabled != bt_disabled) {
303 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
304 "[BTCoex], BT is from %s to %s!!\n",
305 (pre_bt_disabled ? "disabled" : "enabled"),
306 (bt_disabled ? "disabled" : "enabled"));
307 pre_bt_disabled = bt_disabled;
308 }
309 }
310
311 static u32 halbtc8192e2ant_decidera_mask(struct btc_coexist *btcoexist,
312 u8 sstype, u32 ra_masktype)
313 {
314 u32 disra_mask = 0x0;
315
316 switch (ra_masktype) {
317 case 0: /* normal mode */
318 if (sstype == 2)
319 disra_mask = 0x0; /* enable 2ss */
320 else
321 disra_mask = 0xfff00000;/* disable 2ss */
322 break;
323 case 1: /* disable cck 1/2 */
324 if (sstype == 2)
325 disra_mask = 0x00000003;/* enable 2ss */
326 else
327 disra_mask = 0xfff00003;/* disable 2ss */
328 break;
329 case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
330 if (sstype == 2)
331 disra_mask = 0x0001f1f7;/* enable 2ss */
332 else
333 disra_mask = 0xfff1f1f7;/* disable 2ss */
334 break;
335 default:
336 break;
337 }
338
339 return disra_mask;
340 }
341
342 static void halbtc8192e2ant_Updatera_mask(struct btc_coexist *btcoexist,
343 bool force_exec, u32 dis_ratemask)
344 {
345 coex_dm->curra_mask = dis_ratemask;
346
347 if (force_exec || (coex_dm->prera_mask != coex_dm->curra_mask))
348 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
349 &coex_dm->curra_mask);
350 coex_dm->prera_mask = coex_dm->curra_mask;
351 }
352
353 static void btc8192e2ant_autorate_fallback_retry(struct btc_coexist *btcoexist,
354 bool force_exec, u8 type)
355 {
356 bool wifi_under_bmode = false;
357
358 coex_dm->cur_arfrtype = type;
359
360 if (force_exec || (coex_dm->pre_arfrtype != coex_dm->cur_arfrtype)) {
361 switch (coex_dm->cur_arfrtype) {
362 case 0: /* normal mode */
363 btcoexist->btc_write_4byte(btcoexist, 0x430,
364 coex_dm->backup_arfr_cnt1);
365 btcoexist->btc_write_4byte(btcoexist, 0x434,
366 coex_dm->backup_arfr_cnt2);
367 break;
368 case 1:
369 btcoexist->btc_get(btcoexist,
370 BTC_GET_BL_WIFI_UNDER_B_MODE,
371 &wifi_under_bmode);
372 if (wifi_under_bmode) {
373 btcoexist->btc_write_4byte(btcoexist, 0x430,
374 0x0);
375 btcoexist->btc_write_4byte(btcoexist, 0x434,
376 0x01010101);
377 } else {
378 btcoexist->btc_write_4byte(btcoexist, 0x430,
379 0x0);
380 btcoexist->btc_write_4byte(btcoexist, 0x434,
381 0x04030201);
382 }
383 break;
384 default:
385 break;
386 }
387 }
388
389 coex_dm->pre_arfrtype = coex_dm->cur_arfrtype;
390 }
391
392 static void halbtc8192e2ant_retrylimit(struct btc_coexist *btcoexist,
393 bool force_exec, u8 type)
394 {
395 coex_dm->cur_retrylimit_type = type;
396
397 if (force_exec || (coex_dm->pre_retrylimit_type !=
398 coex_dm->cur_retrylimit_type)) {
399 switch (coex_dm->cur_retrylimit_type) {
400 case 0: /* normal mode */
401 btcoexist->btc_write_2byte(btcoexist, 0x42a,
402 coex_dm->backup_retrylimit);
403 break;
404 case 1: /* retry limit = 8 */
405 btcoexist->btc_write_2byte(btcoexist, 0x42a,
406 0x0808);
407 break;
408 default:
409 break;
410 }
411 }
412
413 coex_dm->pre_retrylimit_type = coex_dm->cur_retrylimit_type;
414 }
415
416 static void halbtc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
417 bool force_exec, u8 type)
418 {
419 coex_dm->cur_ampdutime_type = type;
420
421 if (force_exec || (coex_dm->pre_ampdutime_type !=
422 coex_dm->cur_ampdutime_type)) {
423 switch (coex_dm->cur_ampdutime_type) {
424 case 0: /* normal mode */
425 btcoexist->btc_write_1byte(btcoexist, 0x456,
426 coex_dm->backup_ampdu_maxtime);
427 break;
428 case 1: /* AMPDU timw = 0x38 * 32us */
429 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
430 break;
431 default:
432 break;
433 }
434 }
435
436 coex_dm->pre_ampdutime_type = coex_dm->cur_ampdutime_type;
437 }
438
439 static void halbtc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
440 bool force_exec, u8 ra_masktype,
441 u8 arfr_type, u8 retrylimit_type,
442 u8 ampdutime_type)
443 {
444 u32 disra_mask = 0x0;
445
446 coex_dm->curra_masktype = ra_masktype;
447 disra_mask = halbtc8192e2ant_decidera_mask(btcoexist,
448 coex_dm->cur_sstype,
449 ra_masktype);
450 halbtc8192e2ant_Updatera_mask(btcoexist, force_exec, disra_mask);
451 btc8192e2ant_autorate_fallback_retry(btcoexist, force_exec, arfr_type);
452 halbtc8192e2ant_retrylimit(btcoexist, force_exec, retrylimit_type);
453 halbtc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdutime_type);
454 }
455
456 static void halbtc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
457 bool force_exec, bool rej_ap_agg_pkt,
458 bool bt_ctrl_agg_buf_size,
459 u8 agg_buf_size)
460 {
461 bool reject_rx_agg = rej_ap_agg_pkt;
462 bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
463 u8 rx_agg_size = agg_buf_size;
464
465 /*********************************************
466 * Rx Aggregation related setting
467 *********************************************/
468 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
469 &reject_rx_agg);
470 /* decide BT control aggregation buf size or not */
471 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
472 &bt_ctrl_rx_agg_size);
473 /* aggregation buf size, only work
474 * when BT control Rx aggregation size.
475 */
476 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
477 /* real update aggregation setting */
478 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
479 }
480
481 static void halbtc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
482 {
483 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
484 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
485
486 reg_hp_txrx = 0x770;
487 reg_lp_txrx = 0x774;
488
489 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
490 reg_hp_tx = u32tmp & MASKLWORD;
491 reg_hp_rx = (u32tmp & MASKHWORD)>>16;
492
493 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
494 reg_lp_tx = u32tmp & MASKLWORD;
495 reg_lp_rx = (u32tmp & MASKHWORD)>>16;
496
497 coex_sta->high_priority_tx = reg_hp_tx;
498 coex_sta->high_priority_rx = reg_hp_rx;
499 coex_sta->low_priority_tx = reg_lp_tx;
500 coex_sta->low_priority_rx = reg_lp_rx;
501
502 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
503 "[BTCoex] High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
504 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
505 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
506 "[BTCoex] Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
507 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
508
509 /* reset counter */
510 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
511 }
512
513 static void halbtc8192e2ant_querybt_info(struct btc_coexist *btcoexist)
514 {
515 u8 h2c_parameter[1] = {0};
516
517 coex_sta->c2h_bt_info_req_sent = true;
518
519 h2c_parameter[0] |= BIT0; /* trigger */
520
521 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
522 "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
523 h2c_parameter[0]);
524
525 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
526 }
527
528 static void halbtc8192e2ant_update_btlink_info(struct btc_coexist *btcoexist)
529 {
530 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
531 bool bt_hson = false;
532
533 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
534
535 bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
536 bt_link_info->sco_exist = coex_sta->sco_exist;
537 bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
538 bt_link_info->pan_exist = coex_sta->pan_exist;
539 bt_link_info->hid_exist = coex_sta->hid_exist;
540
541 /* work around for HS mode. */
542 if (bt_hson) {
543 bt_link_info->pan_exist = true;
544 bt_link_info->bt_link_exist = true;
545 }
546
547 /* check if Sco only */
548 if (bt_link_info->sco_exist &&
549 !bt_link_info->a2dp_exist &&
550 !bt_link_info->pan_exist &&
551 !bt_link_info->hid_exist)
552 bt_link_info->sco_only = true;
553 else
554 bt_link_info->sco_only = false;
555
556 /* check if A2dp only */
557 if (!bt_link_info->sco_exist &&
558 bt_link_info->a2dp_exist &&
559 !bt_link_info->pan_exist &&
560 !bt_link_info->hid_exist)
561 bt_link_info->a2dp_only = true;
562 else
563 bt_link_info->a2dp_only = false;
564
565 /* check if Pan only */
566 if (!bt_link_info->sco_exist &&
567 !bt_link_info->a2dp_exist &&
568 bt_link_info->pan_exist &&
569 !bt_link_info->hid_exist)
570 bt_link_info->pan_only = true;
571 else
572 bt_link_info->pan_only = false;
573
574 /* check if Hid only */
575 if (!bt_link_info->sco_exist &&
576 !bt_link_info->a2dp_exist &&
577 !bt_link_info->pan_exist &&
578 bt_link_info->hid_exist)
579 bt_link_info->hid_only = true;
580 else
581 bt_link_info->hid_only = false;
582 }
583
584 static u8 halbtc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
585 {
586 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
587 struct btc_stack_info *stack_info = &btcoexist->stack_info;
588 bool bt_hson = false;
589 u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
590 u8 numdiffprofile = 0;
591
592 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
593
594 if (!bt_link_info->bt_link_exist) {
595 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
596 "No BT link exists!!!\n");
597 return algorithm;
598 }
599
600 if (bt_link_info->sco_exist)
601 numdiffprofile++;
602 if (bt_link_info->hid_exist)
603 numdiffprofile++;
604 if (bt_link_info->pan_exist)
605 numdiffprofile++;
606 if (bt_link_info->a2dp_exist)
607 numdiffprofile++;
608
609 if (numdiffprofile == 1) {
610 if (bt_link_info->sco_exist) {
611 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
612 "SCO only\n");
613 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
614 } else {
615 if (bt_link_info->hid_exist) {
616 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
617 "HID only\n");
618 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
619 } else if (bt_link_info->a2dp_exist) {
620 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
621 "A2DP only\n");
622 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
623 } else if (bt_link_info->pan_exist) {
624 if (bt_hson) {
625 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
626 "PAN(HS) only\n");
627 algorithm =
628 BT_8192E_2ANT_COEX_ALGO_PANHS;
629 } else {
630 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
631 "PAN(EDR) only\n");
632 algorithm =
633 BT_8192E_2ANT_COEX_ALGO_PANEDR;
634 }
635 }
636 }
637 } else if (numdiffprofile == 2) {
638 if (bt_link_info->sco_exist) {
639 if (bt_link_info->hid_exist) {
640 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
641 "SCO + HID\n");
642 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
643 } else if (bt_link_info->a2dp_exist) {
644 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
645 "SCO + A2DP ==> SCO\n");
646 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
647 } else if (bt_link_info->pan_exist) {
648 if (bt_hson) {
649 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
650 "SCO + PAN(HS)\n");
651 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
652 } else {
653 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
654 "SCO + PAN(EDR)\n");
655 algorithm =
656 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
657 }
658 }
659 } else {
660 if (bt_link_info->hid_exist &&
661 bt_link_info->a2dp_exist) {
662 if (stack_info->num_of_hid >= 2) {
663 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
664 "HID*2 + A2DP\n");
665 algorithm =
666 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
667 } else {
668 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
669 "HID + A2DP\n");
670 algorithm =
671 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
672 }
673 } else if (bt_link_info->hid_exist &&
674 bt_link_info->pan_exist) {
675 if (bt_hson) {
676 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
677 "HID + PAN(HS)\n");
678 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
679 } else {
680 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
681 "HID + PAN(EDR)\n");
682 algorithm =
683 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
684 }
685 } else if (bt_link_info->pan_exist &&
686 bt_link_info->a2dp_exist) {
687 if (bt_hson) {
688 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
689 "A2DP + PAN(HS)\n");
690 algorithm =
691 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
692 } else {
693 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
694 "A2DP + PAN(EDR)\n");
695 algorithm =
696 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
697 }
698 }
699 }
700 } else if (numdiffprofile == 3) {
701 if (bt_link_info->sco_exist) {
702 if (bt_link_info->hid_exist &&
703 bt_link_info->a2dp_exist) {
704 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
705 "SCO + HID + A2DP ==> HID\n");
706 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
707 } else if (bt_link_info->hid_exist &&
708 bt_link_info->pan_exist) {
709 if (bt_hson) {
710 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
711 "SCO + HID + PAN(HS)\n");
712 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
713 } else {
714 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
715 "SCO + HID + PAN(EDR)\n");
716 algorithm =
717 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
718 }
719 } else if (bt_link_info->pan_exist &&
720 bt_link_info->a2dp_exist) {
721 if (bt_hson) {
722 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
723 "SCO + A2DP + PAN(HS)\n");
724 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
725 } else {
726 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
727 "SCO + A2DP + PAN(EDR)\n");
728 algorithm =
729 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
730 }
731 }
732 } else {
733 if (bt_link_info->hid_exist &&
734 bt_link_info->pan_exist &&
735 bt_link_info->a2dp_exist) {
736 if (bt_hson) {
737 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
738 "HID + A2DP + PAN(HS)\n");
739 algorithm =
740 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
741 } else {
742 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
743 "HID + A2DP + PAN(EDR)\n");
744 algorithm =
745 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
746 }
747 }
748 }
749 } else if (numdiffprofile >= 3) {
750 if (bt_link_info->sco_exist) {
751 if (bt_link_info->hid_exist &&
752 bt_link_info->pan_exist &&
753 bt_link_info->a2dp_exist) {
754 if (bt_hson) {
755 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
756 "ErrorSCO+HID+A2DP+PAN(HS)\n");
757
758 } else {
759 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
760 "SCO+HID+A2DP+PAN(EDR)\n");
761 algorithm =
762 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
763 }
764 }
765 }
766 }
767
768 return algorithm;
769 }
770
771 static void halbtc8192e2ant_setfw_dac_swinglevel(struct btc_coexist *btcoexist,
772 u8 dac_swinglvl)
773 {
774 u8 h2c_parameter[1] = {0};
775
776 /* There are several type of dacswing
777 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
778 */
779 h2c_parameter[0] = dac_swinglvl;
780
781 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
782 "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swinglvl);
783 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
784 "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]);
785
786 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
787 }
788
789 static void halbtc8192e2ant_set_fwdec_btpwr(struct btc_coexist *btcoexist,
790 u8 dec_btpwr_lvl)
791 {
792 u8 h2c_parameter[1] = {0};
793
794 h2c_parameter[0] = dec_btpwr_lvl;
795
796 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
797 "[BTCoex] decrease Bt Power level = %d, FW write 0x62 = 0x%x\n",
798 dec_btpwr_lvl, h2c_parameter[0]);
799
800 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
801 }
802
803 static void halbtc8192e2ant_dec_btpwr(struct btc_coexist *btcoexist,
804 bool force_exec, u8 dec_btpwr_lvl)
805 {
806 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
807 "[BTCoex], %s Dec BT power level = %d\n",
808 (force_exec ? "force to" : ""), dec_btpwr_lvl);
809 coex_dm->cur_dec_bt_pwr = dec_btpwr_lvl;
810
811 if (!force_exec) {
812 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
813 "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
814 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
815 }
816 halbtc8192e2ant_set_fwdec_btpwr(btcoexist, coex_dm->cur_dec_bt_pwr);
817
818 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
819 }
820
821 static void halbtc8192e2ant_set_bt_autoreport(struct btc_coexist *btcoexist,
822 bool enable_autoreport)
823 {
824 u8 h2c_parameter[1] = {0};
825
826 h2c_parameter[0] = 0;
827
828 if (enable_autoreport)
829 h2c_parameter[0] |= BIT0;
830
831 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
832 "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n",
833 (enable_autoreport ? "Enabled!!" : "Disabled!!"),
834 h2c_parameter[0]);
835
836 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
837 }
838
839 static void halbtc8192e2ant_bt_autoreport(struct btc_coexist *btcoexist,
840 bool force_exec,
841 bool enable_autoreport)
842 {
843 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
844 "[BTCoex], %s BT Auto report = %s\n",
845 (force_exec ? "force to" : ""),
846 ((enable_autoreport) ? "Enabled" : "Disabled"));
847 coex_dm->cur_bt_auto_report = enable_autoreport;
848
849 if (!force_exec) {
850 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
851 "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n",
852 coex_dm->pre_bt_auto_report,
853 coex_dm->cur_bt_auto_report);
854
855 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
856 return;
857 }
858 halbtc8192e2ant_set_bt_autoreport(btcoexist,
859 coex_dm->cur_bt_auto_report);
860
861 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
862 }
863
864 static void halbtc8192e2ant_fw_dac_swinglvl(struct btc_coexist *btcoexist,
865 bool force_exec, u8 fw_dac_swinglvl)
866 {
867 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
868 "[BTCoex], %s set FW Dac Swing level = %d\n",
869 (force_exec ? "force to" : ""), fw_dac_swinglvl);
870 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swinglvl;
871
872 if (!force_exec) {
873 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
874 "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n",
875 coex_dm->pre_fw_dac_swing_lvl,
876 coex_dm->cur_fw_dac_swing_lvl);
877
878 if (coex_dm->pre_fw_dac_swing_lvl ==
879 coex_dm->cur_fw_dac_swing_lvl)
880 return;
881 }
882
883 halbtc8192e2ant_setfw_dac_swinglevel(btcoexist,
884 coex_dm->cur_fw_dac_swing_lvl);
885
886 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
887 }
888
889 static void btc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
890 bool rx_rf_shrink_on)
891 {
892 if (rx_rf_shrink_on) {
893 /* Shrink RF Rx LPF corner */
894 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
895 "[BTCoex], Shrink RF Rx LPF corner!!\n");
896 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
897 0xfffff, 0xffffc);
898 } else {
899 /* Resume RF Rx LPF corner
900 * After initialized, we can use coex_dm->btRf0x1eBackup
901 */
902 if (btcoexist->initilized) {
903 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
904 "[BTCoex], Resume RF Rx LPF corner!!\n");
905 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
906 0xfffff,
907 coex_dm->bt_rf0x1e_backup);
908 }
909 }
910 }
911
912 static void halbtc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
913 bool force_exec, bool rx_rf_shrink_on)
914 {
915 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
916 "[BTCoex], %s turn Rx RF Shrink = %s\n",
917 (force_exec ? "force to" : ""),
918 ((rx_rf_shrink_on) ? "ON" : "OFF"));
919 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
920
921 if (!force_exec) {
922 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
923 "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n",
924 coex_dm->pre_rf_rx_lpf_shrink,
925 coex_dm->cur_rf_rx_lpf_shrink);
926
927 if (coex_dm->pre_rf_rx_lpf_shrink ==
928 coex_dm->cur_rf_rx_lpf_shrink)
929 return;
930 }
931 btc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
932 coex_dm->cur_rf_rx_lpf_shrink);
933
934 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
935 }
936
937 static void halbtc8192e2ant_set_dac_swingreg(struct btc_coexist *btcoexist,
938 u32 level)
939 {
940 u8 val = (u8)level;
941
942 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
943 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
944 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
945 }
946
947 static void btc8192e2ant_setsw_full_swing(struct btc_coexist *btcoexist,
948 bool sw_dac_swingon,
949 u32 sw_dac_swinglvl)
950 {
951 if (sw_dac_swingon)
952 halbtc8192e2ant_set_dac_swingreg(btcoexist, sw_dac_swinglvl);
953 else
954 halbtc8192e2ant_set_dac_swingreg(btcoexist, 0x18);
955 }
956
957 static void halbtc8192e2ant_DacSwing(struct btc_coexist *btcoexist,
958 bool force_exec, bool dac_swingon,
959 u32 dac_swinglvl)
960 {
961 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
962 "[BTCoex], %s turn DacSwing=%s, dac_swinglvl = 0x%x\n",
963 (force_exec ? "force to" : ""),
964 ((dac_swingon) ? "ON" : "OFF"), dac_swinglvl);
965 coex_dm->cur_dac_swing_on = dac_swingon;
966 coex_dm->cur_dac_swing_lvl = dac_swinglvl;
967
968 if (!force_exec) {
969 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
970 "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl = 0x%x, ",
971 coex_dm->pre_dac_swing_on,
972 coex_dm->pre_dac_swing_lvl);
973 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
974 "bCurDacSwingOn=%d, curDacSwingLvl = 0x%x\n",
975 coex_dm->cur_dac_swing_on,
976 coex_dm->cur_dac_swing_lvl);
977
978 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
979 (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl))
980 return;
981 }
982 mdelay(30);
983 btc8192e2ant_setsw_full_swing(btcoexist, dac_swingon, dac_swinglvl);
984
985 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
986 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
987 }
988
989 static void halbtc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
990 bool agc_table_en)
991 {
992 /* BB AGC Gain Table */
993 if (agc_table_en) {
994 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
995 "[BTCoex], BB Agc Table On!\n");
996 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
997 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
998 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
999 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
1000 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
1001 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
1002 } else {
1003 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1004 "[BTCoex], BB Agc Table Off!\n");
1005 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
1006 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
1007 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
1008 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
1009 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
1010 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
1011 }
1012 }
1013
1014 static void halbtc8192e2ant_AgcTable(struct btc_coexist *btcoexist,
1015 bool force_exec, bool agc_table_en)
1016 {
1017 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1018 "[BTCoex], %s %s Agc Table\n",
1019 (force_exec ? "force to" : ""),
1020 ((agc_table_en) ? "Enable" : "Disable"));
1021 coex_dm->cur_agc_table_en = agc_table_en;
1022
1023 if (!force_exec) {
1024 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1025 "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
1026 coex_dm->pre_agc_table_en, coex_dm->cur_agc_table_en);
1027
1028 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1029 return;
1030 }
1031 halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1032
1033 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1034 }
1035
1036 static void halbtc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
1037 u32 val0x6c0, u32 val0x6c4,
1038 u32 val0x6c8, u8 val0x6cc)
1039 {
1040 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1041 "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0);
1042 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1043
1044 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1045 "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4);
1046 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1047
1048 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1049 "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8);
1050 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1051
1052 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1053 "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc);
1054 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1055 }
1056
1057 static void halbtc8192e2ant_coex_table(struct btc_coexist *btcoexist,
1058 bool force_exec,
1059 u32 val0x6c0, u32 val0x6c4,
1060 u32 val0x6c8, u8 val0x6cc)
1061 {
1062 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1063 "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, ",
1064 (force_exec ? "force to" : ""), val0x6c0);
1065 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1066 "0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n",
1067 val0x6c4, val0x6c8, val0x6cc);
1068 coex_dm->cur_val0x6c0 = val0x6c0;
1069 coex_dm->cur_val0x6c4 = val0x6c4;
1070 coex_dm->cur_val0x6c8 = val0x6c8;
1071 coex_dm->cur_val0x6cc = val0x6cc;
1072
1073 if (!force_exec) {
1074 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1075 "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, ",
1076 coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4);
1077 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1078 "preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x !!\n",
1079 coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc);
1080 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1081 "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x,\n",
1082 coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4);
1083 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1084 "curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n",
1085 coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
1086
1087 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1088 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1089 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1090 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1091 return;
1092 }
1093 halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
1094 val0x6c8, val0x6cc);
1095
1096 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1097 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1098 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1099 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1100 }
1101
1102 static void btc8192e2ant_coex_tbl_w_type(struct btc_coexist *btcoexist,
1103 bool force_exec, u8 type)
1104 {
1105 switch (type) {
1106 case 0:
1107 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1108 0x5a5a5a5a, 0xffffff, 0x3);
1109 break;
1110 case 1:
1111 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1112 0x5a5a5a5a, 0xffffff, 0x3);
1113 break;
1114 case 2:
1115 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1116 0x5ffb5ffb, 0xffffff, 0x3);
1117 break;
1118 case 3:
1119 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1120 0x5fdb5fdb, 0xffffff, 0x3);
1121 break;
1122 case 4:
1123 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1124 0x5ffb5ffb, 0xffffff, 0x3);
1125 break;
1126 default:
1127 break;
1128 }
1129 }
1130
1131 static void halbtc8192e2ant_set_fw_ignore_wlanact(struct btc_coexist *btcoexist,
1132 bool enable)
1133 {
1134 u8 h2c_parameter[1] = {0};
1135
1136 if (enable)
1137 h2c_parameter[0] |= BIT0; /* function enable */
1138
1139 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1140 "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
1141 h2c_parameter[0]);
1142
1143 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1144 }
1145
1146 static void halbtc8192e2ant_IgnoreWlanAct(struct btc_coexist *btcoexist,
1147 bool force_exec, bool enable)
1148 {
1149 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1150 "[BTCoex], %s turn Ignore WlanAct %s\n",
1151 (force_exec ? "force to" : ""), (enable ? "ON" : "OFF"));
1152 coex_dm->cur_ignore_wlan_act = enable;
1153
1154 if (!force_exec) {
1155 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1156 "[BTCoex], bPreIgnoreWlanAct = %d ",
1157 coex_dm->pre_ignore_wlan_act);
1158 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1159 "bCurIgnoreWlanAct = %d!!\n",
1160 coex_dm->cur_ignore_wlan_act);
1161
1162 if (coex_dm->pre_ignore_wlan_act ==
1163 coex_dm->cur_ignore_wlan_act)
1164 return;
1165 }
1166 halbtc8192e2ant_set_fw_ignore_wlanact(btcoexist, enable);
1167
1168 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1169 }
1170
1171 static void halbtc8192e2ant_SetFwPstdma(struct btc_coexist *btcoexist, u8 byte1,
1172 u8 byte2, u8 byte3, u8 byte4, u8 byte5)
1173 {
1174 u8 h2c_parameter[5] = {0};
1175
1176 h2c_parameter[0] = byte1;
1177 h2c_parameter[1] = byte2;
1178 h2c_parameter[2] = byte3;
1179 h2c_parameter[3] = byte4;
1180 h2c_parameter[4] = byte5;
1181
1182 coex_dm->ps_tdma_para[0] = byte1;
1183 coex_dm->ps_tdma_para[1] = byte2;
1184 coex_dm->ps_tdma_para[2] = byte3;
1185 coex_dm->ps_tdma_para[3] = byte4;
1186 coex_dm->ps_tdma_para[4] = byte5;
1187
1188 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1189 "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n",
1190 h2c_parameter[0],
1191 h2c_parameter[1] << 24 | h2c_parameter[2] << 16 |
1192 h2c_parameter[3] << 8 | h2c_parameter[4]);
1193
1194 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1195 }
1196
1197 static void btc8192e2ant_sw_mec1(struct btc_coexist *btcoexist,
1198 bool shrink_rx_lpf, bool low_penalty_ra,
1199 bool limited_dig, bool btlan_constrain)
1200 {
1201 halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1202 }
1203
1204 static void btc8192e2ant_sw_mec2(struct btc_coexist *btcoexist,
1205 bool agc_table_shift, bool adc_backoff,
1206 bool sw_dac_swing, u32 dac_swinglvl)
1207 {
1208 halbtc8192e2ant_AgcTable(btcoexist, NORMAL_EXEC, agc_table_shift);
1209 halbtc8192e2ant_DacSwing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1210 dac_swinglvl);
1211 }
1212
1213 static void halbtc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
1214 bool force_exec, bool turn_on, u8 type)
1215 {
1216 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1217 "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1218 (force_exec ? "force to" : ""),
1219 (turn_on ? "ON" : "OFF"), type);
1220 coex_dm->cur_ps_tdma_on = turn_on;
1221 coex_dm->cur_ps_tdma = type;
1222
1223 if (!force_exec) {
1224 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1225 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1226 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
1227 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1228 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1229 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
1230
1231 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1232 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1233 return;
1234 }
1235 if (turn_on) {
1236 switch (type) {
1237 case 1:
1238 default:
1239 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1240 0x1a, 0xe1, 0x90);
1241 break;
1242 case 2:
1243 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1244 0x12, 0xe1, 0x90);
1245 break;
1246 case 3:
1247 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1248 0x3, 0xf1, 0x90);
1249 break;
1250 case 4:
1251 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1252 0x3, 0xf1, 0x90);
1253 break;
1254 case 5:
1255 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1256 0x1a, 0x60, 0x90);
1257 break;
1258 case 6:
1259 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1260 0x12, 0x60, 0x90);
1261 break;
1262 case 7:
1263 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1264 0x3, 0x70, 0x90);
1265 break;
1266 case 8:
1267 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xa3, 0x10,
1268 0x3, 0x70, 0x90);
1269 break;
1270 case 9:
1271 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1272 0x1a, 0xe1, 0x10);
1273 break;
1274 case 10:
1275 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1276 0x12, 0xe1, 0x10);
1277 break;
1278 case 11:
1279 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1280 0x3, 0xf1, 0x10);
1281 break;
1282 case 12:
1283 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1284 0x3, 0xf1, 0x10);
1285 break;
1286 case 13:
1287 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1288 0x1a, 0xe0, 0x10);
1289 break;
1290 case 14:
1291 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1292 0x12, 0xe0, 0x10);
1293 break;
1294 case 15:
1295 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1296 0x3, 0xf0, 0x10);
1297 break;
1298 case 16:
1299 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1300 0x3, 0xf0, 0x10);
1301 break;
1302 case 17:
1303 halbtc8192e2ant_SetFwPstdma(btcoexist, 0x61, 0x20,
1304 0x03, 0x10, 0x10);
1305 break;
1306 case 18:
1307 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x5,
1308 0x5, 0xe1, 0x90);
1309 break;
1310 case 19:
1311 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1312 0x25, 0xe1, 0x90);
1313 break;
1314 case 20:
1315 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1316 0x25, 0x60, 0x90);
1317 break;
1318 case 21:
1319 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x15,
1320 0x03, 0x70, 0x90);
1321 break;
1322 case 71:
1323 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1324 0x1a, 0xe1, 0x90);
1325 break;
1326 }
1327 } else {
1328 /* disable PS tdma */
1329 switch (type) {
1330 default:
1331 case 0:
1332 halbtc8192e2ant_SetFwPstdma(btcoexist, 0x8, 0x0, 0x0,
1333 0x0, 0x0);
1334 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1335 break;
1336 case 1:
1337 halbtc8192e2ant_SetFwPstdma(btcoexist, 0x0, 0x0, 0x0,
1338 0x8, 0x0);
1339 mdelay(5);
1340 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1341 break;
1342 }
1343 }
1344
1345 /* update pre state */
1346 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1347 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1348 }
1349
1350 static void halbtc8192e2ant_set_switch_sstype(struct btc_coexist *btcoexist,
1351 u8 sstype)
1352 {
1353 u8 mimops = BTC_MIMO_PS_DYNAMIC;
1354 u32 disra_mask = 0x0;
1355
1356 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1357 "[BTCoex], REAL set SS Type = %d\n", sstype);
1358
1359 disra_mask = halbtc8192e2ant_decidera_mask(btcoexist, sstype,
1360 coex_dm->curra_masktype);
1361 halbtc8192e2ant_Updatera_mask(btcoexist, FORCE_EXEC, disra_mask);
1362
1363 if (sstype == 1) {
1364 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1365 /* switch ofdm path */
1366 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1367 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1368 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1369 /* switch cck patch */
1370 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1);
1371 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81);
1372 mimops = BTC_MIMO_PS_STATIC;
1373 } else if (sstype == 2) {
1374 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1375 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1376 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1377 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1378 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0);
1379 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41);
1380 mimops = BTC_MIMO_PS_DYNAMIC;
1381 }
1382 /* set rx 1ss or 2ss */
1383 btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops);
1384 }
1385
1386 static void halbtc8192e2ant_switch_sstype(struct btc_coexist *btcoexist,
1387 bool force_exec, u8 new_sstype)
1388 {
1389 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1390 "[BTCoex], %s Switch SS Type = %d\n",
1391 (force_exec ? "force to" : ""), new_sstype);
1392 coex_dm->cur_sstype = new_sstype;
1393
1394 if (!force_exec) {
1395 if (coex_dm->pre_sstype == coex_dm->cur_sstype)
1396 return;
1397 }
1398 halbtc8192e2ant_set_switch_sstype(btcoexist, coex_dm->cur_sstype);
1399
1400 coex_dm->pre_sstype = coex_dm->cur_sstype;
1401 }
1402
1403 static void halbtc8192e2ant_coex_alloff(struct btc_coexist *btcoexist)
1404 {
1405 /* fw all off */
1406 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1407 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1408 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1409
1410 /* sw all off */
1411 btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
1412 btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
1413
1414 /* hw all off */
1415 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 0);
1416 }
1417
1418 static void halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
1419 {
1420 /* force to reset coex mechanism */
1421
1422 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1423 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, FORCE_EXEC, 6);
1424 halbtc8192e2ant_dec_btpwr(btcoexist, FORCE_EXEC, 0);
1425
1426 btc8192e2ant_coex_tbl_w_type(btcoexist, FORCE_EXEC, 0);
1427 halbtc8192e2ant_switch_sstype(btcoexist, FORCE_EXEC, 2);
1428
1429 btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
1430 btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
1431 }
1432
1433 static void halbtc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
1434 {
1435 bool low_pwr_disable = true;
1436
1437 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1438 &low_pwr_disable);
1439
1440 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
1441
1442 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
1443 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1444 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1445 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1446
1447 btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
1448 btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
1449 }
1450
1451 static bool halbtc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
1452 {
1453 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1454 bool common = false, wifi_connected = false, wifi_busy = false;
1455 bool bt_hson = false, low_pwr_disable = false;
1456
1457 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
1458 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1459 &wifi_connected);
1460 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1461
1462 if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1463 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1464 else
1465 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1466
1467 if (!wifi_connected) {
1468 low_pwr_disable = false;
1469 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1470 &low_pwr_disable);
1471
1472 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1473 "[BTCoex], Wifi non-connected idle!!\n");
1474
1475 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1476 coex_dm->bt_status) ||
1477 (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1478 coex_dm->bt_status)) {
1479 halbtc8192e2ant_switch_sstype(btcoexist,
1480 NORMAL_EXEC, 2);
1481 btc8192e2ant_coex_tbl_w_type(btcoexist,
1482 NORMAL_EXEC, 1);
1483 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1484 false, 0);
1485 } else {
1486 halbtc8192e2ant_switch_sstype(btcoexist,
1487 NORMAL_EXEC, 1);
1488 btc8192e2ant_coex_tbl_w_type(btcoexist,
1489 NORMAL_EXEC, 0);
1490 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1491 false, 1);
1492 }
1493
1494 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1495 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1496
1497 btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
1498 btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
1499
1500 common = true;
1501 } else {
1502 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1503 coex_dm->bt_status) {
1504 low_pwr_disable = false;
1505 btcoexist->btc_set(btcoexist,
1506 BTC_SET_ACT_DISABLE_LOW_POWER,
1507 &low_pwr_disable);
1508
1509 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1510 "Wifi connected + BT non connected-idle!!\n");
1511
1512 halbtc8192e2ant_switch_sstype(btcoexist,
1513 NORMAL_EXEC, 2);
1514 btc8192e2ant_coex_tbl_w_type(btcoexist,
1515 NORMAL_EXEC, 1);
1516 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1517 false, 0);
1518 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1519 NORMAL_EXEC, 6);
1520 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1521
1522 btc8192e2ant_sw_mec1(btcoexist, false, false,
1523 false, false);
1524 btc8192e2ant_sw_mec2(btcoexist, false, false,
1525 false, 0x18);
1526
1527 common = true;
1528 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1529 coex_dm->bt_status) {
1530 low_pwr_disable = true;
1531 btcoexist->btc_set(btcoexist,
1532 BTC_SET_ACT_DISABLE_LOW_POWER,
1533 &low_pwr_disable);
1534
1535 if (bt_hson)
1536 return false;
1537 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1538 "Wifi connected + BT connected-idle!!\n");
1539
1540 halbtc8192e2ant_switch_sstype(btcoexist,
1541 NORMAL_EXEC, 2);
1542 btc8192e2ant_coex_tbl_w_type(btcoexist,
1543 NORMAL_EXEC, 1);
1544 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1545 false, 0);
1546 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1547 NORMAL_EXEC, 6);
1548 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1549
1550 btc8192e2ant_sw_mec1(btcoexist, true, false,
1551 false, false);
1552 btc8192e2ant_sw_mec2(btcoexist, false, false,
1553 false, 0x18);
1554
1555 common = true;
1556 } else {
1557 low_pwr_disable = true;
1558 btcoexist->btc_set(btcoexist,
1559 BTC_SET_ACT_DISABLE_LOW_POWER,
1560 &low_pwr_disable);
1561
1562 if (wifi_busy) {
1563 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1564 "Wifi Connected-Busy + BT Busy!!\n");
1565 common = false;
1566 } else {
1567 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1568 "Wifi Connected-Idle + BT Busy!!\n");
1569
1570 halbtc8192e2ant_switch_sstype(btcoexist,
1571 NORMAL_EXEC, 1);
1572 btc8192e2ant_coex_tbl_w_type(btcoexist,
1573 NORMAL_EXEC, 2);
1574 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1575 true, 21);
1576 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1577 NORMAL_EXEC, 6);
1578 halbtc8192e2ant_dec_btpwr(btcoexist,
1579 NORMAL_EXEC, 0);
1580 btc8192e2ant_sw_mec1(btcoexist, false,
1581 false, false, false);
1582 btc8192e2ant_sw_mec2(btcoexist, false,
1583 false, false, 0x18);
1584 common = true;
1585 }
1586 }
1587 }
1588 return common;
1589 }
1590
1591 static void btc8192e_int1(struct btc_coexist *btcoexist, bool tx_pause,
1592 int result)
1593 {
1594 if (tx_pause) {
1595 BTC_PRINT(BTC_MSG_ALGORITHM,
1596 ALGO_TRACE_FW_DETAIL,
1597 "[BTCoex], TxPause = 1\n");
1598
1599 if (coex_dm->cur_ps_tdma == 71) {
1600 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1601 true, 5);
1602 coex_dm->tdma_adj_type = 5;
1603 } else if (coex_dm->cur_ps_tdma == 1) {
1604 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1605 true, 5);
1606 coex_dm->tdma_adj_type = 5;
1607 } else if (coex_dm->cur_ps_tdma == 2) {
1608 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1609 true, 6);
1610 coex_dm->tdma_adj_type = 6;
1611 } else if (coex_dm->cur_ps_tdma == 3) {
1612 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1613 true, 7);
1614 coex_dm->tdma_adj_type = 7;
1615 } else if (coex_dm->cur_ps_tdma == 4) {
1616 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1617 true, 8);
1618 coex_dm->tdma_adj_type = 8;
1619 }
1620 if (coex_dm->cur_ps_tdma == 9) {
1621 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1622 true, 13);
1623 coex_dm->tdma_adj_type = 13;
1624 } else if (coex_dm->cur_ps_tdma == 10) {
1625 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1626 true, 14);
1627 coex_dm->tdma_adj_type = 14;
1628 } else if (coex_dm->cur_ps_tdma == 11) {
1629 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1630 true, 15);
1631 coex_dm->tdma_adj_type = 15;
1632 } else if (coex_dm->cur_ps_tdma == 12) {
1633 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1634 true, 16);
1635 coex_dm->tdma_adj_type = 16;
1636 }
1637
1638 if (result == -1) {
1639 if (coex_dm->cur_ps_tdma == 5) {
1640 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1641 true, 6);
1642 coex_dm->tdma_adj_type = 6;
1643 } else if (coex_dm->cur_ps_tdma == 6) {
1644 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1645 true, 7);
1646 coex_dm->tdma_adj_type = 7;
1647 } else if (coex_dm->cur_ps_tdma == 7) {
1648 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1649 true, 8);
1650 coex_dm->tdma_adj_type = 8;
1651 } else if (coex_dm->cur_ps_tdma == 13) {
1652 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1653 true, 14);
1654 coex_dm->tdma_adj_type = 14;
1655 } else if (coex_dm->cur_ps_tdma == 14) {
1656 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1657 true, 15);
1658 coex_dm->tdma_adj_type = 15;
1659 } else if (coex_dm->cur_ps_tdma == 15) {
1660 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1661 true, 16);
1662 coex_dm->tdma_adj_type = 16;
1663 }
1664 } else if (result == 1) {
1665 if (coex_dm->cur_ps_tdma == 8) {
1666 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1667 true, 7);
1668 coex_dm->tdma_adj_type = 7;
1669 } else if (coex_dm->cur_ps_tdma == 7) {
1670 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1671 true, 6);
1672 coex_dm->tdma_adj_type = 6;
1673 } else if (coex_dm->cur_ps_tdma == 6) {
1674 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1675 true, 5);
1676 coex_dm->tdma_adj_type = 5;
1677 } else if (coex_dm->cur_ps_tdma == 16) {
1678 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1679 true, 15);
1680 coex_dm->tdma_adj_type = 15;
1681 } else if (coex_dm->cur_ps_tdma == 15) {
1682 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1683 true, 14);
1684 coex_dm->tdma_adj_type = 14;
1685 } else if (coex_dm->cur_ps_tdma == 14) {
1686 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1687 true, 13);
1688 coex_dm->tdma_adj_type = 13;
1689 }
1690 }
1691 } else {
1692 BTC_PRINT(BTC_MSG_ALGORITHM,
1693 ALGO_TRACE_FW_DETAIL,
1694 "[BTCoex], TxPause = 0\n");
1695 if (coex_dm->cur_ps_tdma == 5) {
1696 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1697 true, 71);
1698 coex_dm->tdma_adj_type = 71;
1699 } else if (coex_dm->cur_ps_tdma == 6) {
1700 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1701 true, 2);
1702 coex_dm->tdma_adj_type = 2;
1703 } else if (coex_dm->cur_ps_tdma == 7) {
1704 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1705 true, 3);
1706 coex_dm->tdma_adj_type = 3;
1707 } else if (coex_dm->cur_ps_tdma == 8) {
1708 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1709 true, 4);
1710 coex_dm->tdma_adj_type = 4;
1711 }
1712 if (coex_dm->cur_ps_tdma == 13) {
1713 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1714 true, 9);
1715 coex_dm->tdma_adj_type = 9;
1716 } else if (coex_dm->cur_ps_tdma == 14) {
1717 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1718 true, 10);
1719 coex_dm->tdma_adj_type = 10;
1720 } else if (coex_dm->cur_ps_tdma == 15) {
1721 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1722 true, 11);
1723 coex_dm->tdma_adj_type = 11;
1724 } else if (coex_dm->cur_ps_tdma == 16) {
1725 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1726 true, 12);
1727 coex_dm->tdma_adj_type = 12;
1728 }
1729
1730 if (result == -1) {
1731 if (coex_dm->cur_ps_tdma == 71) {
1732 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1733 true, 1);
1734 coex_dm->tdma_adj_type = 1;
1735 } else if (coex_dm->cur_ps_tdma == 1) {
1736 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1737 true, 2);
1738 coex_dm->tdma_adj_type = 2;
1739 } else if (coex_dm->cur_ps_tdma == 2) {
1740 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1741 true, 3);
1742 coex_dm->tdma_adj_type = 3;
1743 } else if (coex_dm->cur_ps_tdma == 3) {
1744 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1745 true, 4);
1746 coex_dm->tdma_adj_type = 4;
1747 } else if (coex_dm->cur_ps_tdma == 9) {
1748 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1749 true, 10);
1750 coex_dm->tdma_adj_type = 10;
1751 } else if (coex_dm->cur_ps_tdma == 10) {
1752 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1753 true, 11);
1754 coex_dm->tdma_adj_type = 11;
1755 } else if (coex_dm->cur_ps_tdma == 11) {
1756 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1757 true, 12);
1758 coex_dm->tdma_adj_type = 12;
1759 }
1760 } else if (result == 1) {
1761 if (coex_dm->cur_ps_tdma == 4) {
1762 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1763 true, 3);
1764 coex_dm->tdma_adj_type = 3;
1765 } else if (coex_dm->cur_ps_tdma == 3) {
1766 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1767 true, 2);
1768 coex_dm->tdma_adj_type = 2;
1769 } else if (coex_dm->cur_ps_tdma == 2) {
1770 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1771 true, 1);
1772 coex_dm->tdma_adj_type = 1;
1773 } else if (coex_dm->cur_ps_tdma == 1) {
1774 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1775 true, 71);
1776 coex_dm->tdma_adj_type = 71;
1777 } else if (coex_dm->cur_ps_tdma == 12) {
1778 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1779 true, 11);
1780 coex_dm->tdma_adj_type = 11;
1781 } else if (coex_dm->cur_ps_tdma == 11) {
1782 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1783 true, 10);
1784 coex_dm->tdma_adj_type = 10;
1785 } else if (coex_dm->cur_ps_tdma == 10) {
1786 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1787 true, 9);
1788 coex_dm->tdma_adj_type = 9;
1789 }
1790 }
1791 }
1792 }
1793
1794 static void btc8192e_int2(struct btc_coexist *btcoexist, bool tx_pause,
1795 int result)
1796 {
1797 if (tx_pause) {
1798 BTC_PRINT(BTC_MSG_ALGORITHM,
1799 ALGO_TRACE_FW_DETAIL,
1800 "[BTCoex], TxPause = 1\n");
1801 if (coex_dm->cur_ps_tdma == 1) {
1802 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1803 true, 6);
1804 coex_dm->tdma_adj_type = 6;
1805 } else if (coex_dm->cur_ps_tdma == 2) {
1806 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1807 true, 6);
1808 coex_dm->tdma_adj_type = 6;
1809 } else if (coex_dm->cur_ps_tdma == 3) {
1810 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1811 true, 7);
1812 coex_dm->tdma_adj_type = 7;
1813 } else if (coex_dm->cur_ps_tdma == 4) {
1814 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1815 true, 8);
1816 coex_dm->tdma_adj_type = 8;
1817 }
1818 if (coex_dm->cur_ps_tdma == 9) {
1819 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1820 true, 14);
1821 coex_dm->tdma_adj_type = 14;
1822 } else if (coex_dm->cur_ps_tdma == 10) {
1823 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1824 true, 14);
1825 coex_dm->tdma_adj_type = 14;
1826 } else if (coex_dm->cur_ps_tdma == 11) {
1827 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1828 true, 15);
1829 coex_dm->tdma_adj_type = 15;
1830 } else if (coex_dm->cur_ps_tdma == 12) {
1831 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1832 true, 16);
1833 coex_dm->tdma_adj_type = 16;
1834 }
1835 if (result == -1) {
1836 if (coex_dm->cur_ps_tdma == 5) {
1837 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1838 true, 6);
1839 coex_dm->tdma_adj_type = 6;
1840 } else if (coex_dm->cur_ps_tdma == 6) {
1841 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1842 true, 7);
1843 coex_dm->tdma_adj_type = 7;
1844 } else if (coex_dm->cur_ps_tdma == 7) {
1845 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1846 true, 8);
1847 coex_dm->tdma_adj_type = 8;
1848 } else if (coex_dm->cur_ps_tdma == 13) {
1849 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1850 true, 14);
1851 coex_dm->tdma_adj_type = 14;
1852 } else if (coex_dm->cur_ps_tdma == 14) {
1853 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1854 true, 15);
1855 coex_dm->tdma_adj_type = 15;
1856 } else if (coex_dm->cur_ps_tdma == 15) {
1857 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1858 true, 16);
1859 coex_dm->tdma_adj_type = 16;
1860 }
1861 } else if (result == 1) {
1862 if (coex_dm->cur_ps_tdma == 8) {
1863 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1864 true, 7);
1865 coex_dm->tdma_adj_type = 7;
1866 } else if (coex_dm->cur_ps_tdma == 7) {
1867 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1868 true, 6);
1869 coex_dm->tdma_adj_type = 6;
1870 } else if (coex_dm->cur_ps_tdma == 6) {
1871 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1872 true, 6);
1873 coex_dm->tdma_adj_type = 6;
1874 } else if (coex_dm->cur_ps_tdma == 16) {
1875 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1876 true, 15);
1877 coex_dm->tdma_adj_type = 15;
1878 } else if (coex_dm->cur_ps_tdma == 15) {
1879 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1880 true, 14);
1881 coex_dm->tdma_adj_type = 14;
1882 } else if (coex_dm->cur_ps_tdma == 14) {
1883 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1884 true, 14);
1885 coex_dm->tdma_adj_type = 14;
1886 }
1887 }
1888 } else {
1889 BTC_PRINT(BTC_MSG_ALGORITHM,
1890 ALGO_TRACE_FW_DETAIL,
1891 "[BTCoex], TxPause = 0\n");
1892 if (coex_dm->cur_ps_tdma == 5) {
1893 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1894 true, 2);
1895 coex_dm->tdma_adj_type = 2;
1896 } else if (coex_dm->cur_ps_tdma == 6) {
1897 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1898 true, 2);
1899 coex_dm->tdma_adj_type = 2;
1900 } else if (coex_dm->cur_ps_tdma == 7) {
1901 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1902 true, 3);
1903 coex_dm->tdma_adj_type = 3;
1904 } else if (coex_dm->cur_ps_tdma == 8) {
1905 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1906 true, 4);
1907 coex_dm->tdma_adj_type = 4;
1908 }
1909 if (coex_dm->cur_ps_tdma == 13) {
1910 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1911 true, 10);
1912 coex_dm->tdma_adj_type = 10;
1913 } else if (coex_dm->cur_ps_tdma == 14) {
1914 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1915 true, 10);
1916 coex_dm->tdma_adj_type = 10;
1917 } else if (coex_dm->cur_ps_tdma == 15) {
1918 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1919 true, 11);
1920 coex_dm->tdma_adj_type = 11;
1921 } else if (coex_dm->cur_ps_tdma == 16) {
1922 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1923 true, 12);
1924 coex_dm->tdma_adj_type = 12;
1925 }
1926 if (result == -1) {
1927 if (coex_dm->cur_ps_tdma == 1) {
1928 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1929 true, 2);
1930 coex_dm->tdma_adj_type = 2;
1931 } else if (coex_dm->cur_ps_tdma == 2) {
1932 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1933 true, 3);
1934 coex_dm->tdma_adj_type = 3;
1935 } else if (coex_dm->cur_ps_tdma == 3) {
1936 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1937 true, 4);
1938 coex_dm->tdma_adj_type = 4;
1939 } else if (coex_dm->cur_ps_tdma == 9) {
1940 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1941 true, 10);
1942 coex_dm->tdma_adj_type = 10;
1943 } else if (coex_dm->cur_ps_tdma == 10) {
1944 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1945 true, 11);
1946 coex_dm->tdma_adj_type = 11;
1947 } else if (coex_dm->cur_ps_tdma == 11) {
1948 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1949 true, 12);
1950 coex_dm->tdma_adj_type = 12;
1951 }
1952 } else if (result == 1) {
1953 if (coex_dm->cur_ps_tdma == 4) {
1954 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1955 true, 3);
1956 coex_dm->tdma_adj_type = 3;
1957 } else if (coex_dm->cur_ps_tdma == 3) {
1958 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1959 true, 2);
1960 coex_dm->tdma_adj_type = 2;
1961 } else if (coex_dm->cur_ps_tdma == 2) {
1962 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1963 true, 2);
1964 coex_dm->tdma_adj_type = 2;
1965 } else if (coex_dm->cur_ps_tdma == 12) {
1966 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1967 true, 11);
1968 coex_dm->tdma_adj_type = 11;
1969 } else if (coex_dm->cur_ps_tdma == 11) {
1970 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1971 true, 10);
1972 coex_dm->tdma_adj_type = 10;
1973 } else if (coex_dm->cur_ps_tdma == 10) {
1974 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1975 true, 10);
1976 coex_dm->tdma_adj_type = 10;
1977 }
1978 }
1979 }
1980 }
1981
1982 static void btc8192e_int3(struct btc_coexist *btcoexist, bool tx_pause,
1983 int result)
1984 {
1985 if (tx_pause) {
1986 BTC_PRINT(BTC_MSG_ALGORITHM,
1987 ALGO_TRACE_FW_DETAIL,
1988 "[BTCoex], TxPause = 1\n");
1989 if (coex_dm->cur_ps_tdma == 1) {
1990 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1991 true, 7);
1992 coex_dm->tdma_adj_type = 7;
1993 } else if (coex_dm->cur_ps_tdma == 2) {
1994 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1995 true, 7);
1996 coex_dm->tdma_adj_type = 7;
1997 } else if (coex_dm->cur_ps_tdma == 3) {
1998 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1999 true, 7);
2000 coex_dm->tdma_adj_type = 7;
2001 } else if (coex_dm->cur_ps_tdma == 4) {
2002 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2003 true, 8);
2004 coex_dm->tdma_adj_type = 8;
2005 }
2006 if (coex_dm->cur_ps_tdma == 9) {
2007 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2008 true, 15);
2009 coex_dm->tdma_adj_type = 15;
2010 } else if (coex_dm->cur_ps_tdma == 10) {
2011 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2012 true, 15);
2013 coex_dm->tdma_adj_type = 15;
2014 } else if (coex_dm->cur_ps_tdma == 11) {
2015 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2016 true, 15);
2017 coex_dm->tdma_adj_type = 15;
2018 } else if (coex_dm->cur_ps_tdma == 12) {
2019 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2020 true, 16);
2021 coex_dm->tdma_adj_type = 16;
2022 }
2023 if (result == -1) {
2024 if (coex_dm->cur_ps_tdma == 5) {
2025 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2026 true, 7);
2027 coex_dm->tdma_adj_type = 7;
2028 } else if (coex_dm->cur_ps_tdma == 6) {
2029 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2030 true, 7);
2031 coex_dm->tdma_adj_type = 7;
2032 } else if (coex_dm->cur_ps_tdma == 7) {
2033 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2034 true, 8);
2035 coex_dm->tdma_adj_type = 8;
2036 } else if (coex_dm->cur_ps_tdma == 13) {
2037 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2038 true, 15);
2039 coex_dm->tdma_adj_type = 15;
2040 } else if (coex_dm->cur_ps_tdma == 14) {
2041 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2042 true, 15);
2043 coex_dm->tdma_adj_type = 15;
2044 } else if (coex_dm->cur_ps_tdma == 15) {
2045 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2046 true, 16);
2047 coex_dm->tdma_adj_type = 16;
2048 }
2049 } else if (result == 1) {
2050 if (coex_dm->cur_ps_tdma == 8) {
2051 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2052 true, 7);
2053 coex_dm->tdma_adj_type = 7;
2054 } else if (coex_dm->cur_ps_tdma == 7) {
2055 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2056 true, 7);
2057 coex_dm->tdma_adj_type = 7;
2058 } else if (coex_dm->cur_ps_tdma == 6) {
2059 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2060 true, 7);
2061 coex_dm->tdma_adj_type = 7;
2062 } else if (coex_dm->cur_ps_tdma == 16) {
2063 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2064 true, 15);
2065 coex_dm->tdma_adj_type = 15;
2066 } else if (coex_dm->cur_ps_tdma == 15) {
2067 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2068 true, 15);
2069 coex_dm->tdma_adj_type = 15;
2070 } else if (coex_dm->cur_ps_tdma == 14) {
2071 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2072 true, 15);
2073 coex_dm->tdma_adj_type = 15;
2074 }
2075 }
2076 } else {
2077 BTC_PRINT(BTC_MSG_ALGORITHM,
2078 ALGO_TRACE_FW_DETAIL,
2079 "[BTCoex], TxPause = 0\n");
2080 if (coex_dm->cur_ps_tdma == 5) {
2081 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2082 true, 3);
2083 coex_dm->tdma_adj_type = 3;
2084 } else if (coex_dm->cur_ps_tdma == 6) {
2085 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2086 true, 3);
2087 coex_dm->tdma_adj_type = 3;
2088 } else if (coex_dm->cur_ps_tdma == 7) {
2089 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2090 true, 3);
2091 coex_dm->tdma_adj_type = 3;
2092 } else if (coex_dm->cur_ps_tdma == 8) {
2093 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2094 true, 4);
2095 coex_dm->tdma_adj_type = 4;
2096 }
2097 if (coex_dm->cur_ps_tdma == 13) {
2098 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2099 true, 11);
2100 coex_dm->tdma_adj_type = 11;
2101 } else if (coex_dm->cur_ps_tdma == 14) {
2102 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2103 true, 11);
2104 coex_dm->tdma_adj_type = 11;
2105 } else if (coex_dm->cur_ps_tdma == 15) {
2106 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2107 true, 11);
2108 coex_dm->tdma_adj_type = 11;
2109 } else if (coex_dm->cur_ps_tdma == 16) {
2110 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2111 true, 12);
2112 coex_dm->tdma_adj_type = 12;
2113 }
2114 if (result == -1) {
2115 if (coex_dm->cur_ps_tdma == 1) {
2116 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2117 true, 3);
2118 coex_dm->tdma_adj_type = 3;
2119 } else if (coex_dm->cur_ps_tdma == 2) {
2120 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2121 true, 3);
2122 coex_dm->tdma_adj_type = 3;
2123 } else if (coex_dm->cur_ps_tdma == 3) {
2124 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2125 true, 4);
2126 coex_dm->tdma_adj_type = 4;
2127 } else if (coex_dm->cur_ps_tdma == 9) {
2128 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2129 true, 11);
2130 coex_dm->tdma_adj_type = 11;
2131 } else if (coex_dm->cur_ps_tdma == 10) {
2132 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2133 true, 11);
2134 coex_dm->tdma_adj_type = 11;
2135 } else if (coex_dm->cur_ps_tdma == 11) {
2136 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2137 true, 12);
2138 coex_dm->tdma_adj_type = 12;
2139 }
2140 } else if (result == 1) {
2141 if (coex_dm->cur_ps_tdma == 4) {
2142 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2143 true, 3);
2144 coex_dm->tdma_adj_type = 3;
2145 } else if (coex_dm->cur_ps_tdma == 3) {
2146 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2147 true, 3);
2148 coex_dm->tdma_adj_type = 3;
2149 } else if (coex_dm->cur_ps_tdma == 2) {
2150 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2151 true, 3);
2152 coex_dm->tdma_adj_type = 3;
2153 } else if (coex_dm->cur_ps_tdma == 12) {
2154 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2155 true, 11);
2156 coex_dm->tdma_adj_type = 11;
2157 } else if (coex_dm->cur_ps_tdma == 11) {
2158 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2159 true, 11);
2160 coex_dm->tdma_adj_type = 11;
2161 } else if (coex_dm->cur_ps_tdma == 10) {
2162 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2163 true, 11);
2164 coex_dm->tdma_adj_type = 11;
2165 }
2166 }
2167 }
2168 }
2169
2170 static void halbtc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
2171 bool sco_hid, bool tx_pause,
2172 u8 max_interval)
2173 {
2174 static int up, dn, m, n, wait_cnt;
2175 /* 0: no change, +1: increase WiFi duration,
2176 * -1: decrease WiFi duration
2177 */
2178 int result;
2179 u8 retry_cnt = 0;
2180
2181 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
2182 "[BTCoex], TdmaDurationAdjust()\n");
2183
2184 if (!coex_dm->auto_tdma_adjust) {
2185 coex_dm->auto_tdma_adjust = true;
2186 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2187 "[BTCoex], first run TdmaDurationAdjust()!!\n");
2188 if (sco_hid) {
2189 if (tx_pause) {
2190 if (max_interval == 1) {
2191 halbtc8192e2ant_ps_tdma(btcoexist,
2192 NORMAL_EXEC,
2193 true, 13);
2194 coex_dm->tdma_adj_type = 13;
2195 } else if (max_interval == 2) {
2196 halbtc8192e2ant_ps_tdma(btcoexist,
2197 NORMAL_EXEC,
2198 true, 14);
2199 coex_dm->tdma_adj_type = 14;
2200 } else if (max_interval == 3) {
2201 halbtc8192e2ant_ps_tdma(btcoexist,
2202 NORMAL_EXEC,
2203 true, 15);
2204 coex_dm->tdma_adj_type = 15;
2205 } else {
2206 halbtc8192e2ant_ps_tdma(btcoexist,
2207 NORMAL_EXEC,
2208 true, 15);
2209 coex_dm->tdma_adj_type = 15;
2210 }
2211 } else {
2212 if (max_interval == 1) {
2213 halbtc8192e2ant_ps_tdma(btcoexist,
2214 NORMAL_EXEC,
2215 true, 9);
2216 coex_dm->tdma_adj_type = 9;
2217 } else if (max_interval == 2) {
2218 halbtc8192e2ant_ps_tdma(btcoexist,
2219 NORMAL_EXEC,
2220 true, 10);
2221 coex_dm->tdma_adj_type = 10;
2222 } else if (max_interval == 3) {
2223 halbtc8192e2ant_ps_tdma(btcoexist,
2224 NORMAL_EXEC,
2225 true, 11);
2226 coex_dm->tdma_adj_type = 11;
2227 } else {
2228 halbtc8192e2ant_ps_tdma(btcoexist,
2229 NORMAL_EXEC,
2230 true, 11);
2231 coex_dm->tdma_adj_type = 11;
2232 }
2233 }
2234 } else {
2235 if (tx_pause) {
2236 if (max_interval == 1) {
2237 halbtc8192e2ant_ps_tdma(btcoexist,
2238 NORMAL_EXEC,
2239 true, 5);
2240 coex_dm->tdma_adj_type = 5;
2241 } else if (max_interval == 2) {
2242 halbtc8192e2ant_ps_tdma(btcoexist,
2243 NORMAL_EXEC,
2244 true, 6);
2245 coex_dm->tdma_adj_type = 6;
2246 } else if (max_interval == 3) {
2247 halbtc8192e2ant_ps_tdma(btcoexist,
2248 NORMAL_EXEC,
2249 true, 7);
2250 coex_dm->tdma_adj_type = 7;
2251 } else {
2252 halbtc8192e2ant_ps_tdma(btcoexist,
2253 NORMAL_EXEC,
2254 true, 7);
2255 coex_dm->tdma_adj_type = 7;
2256 }
2257 } else {
2258 if (max_interval == 1) {
2259 halbtc8192e2ant_ps_tdma(btcoexist,
2260 NORMAL_EXEC,
2261 true, 1);
2262 coex_dm->tdma_adj_type = 1;
2263 } else if (max_interval == 2) {
2264 halbtc8192e2ant_ps_tdma(btcoexist,
2265 NORMAL_EXEC,
2266 true, 2);
2267 coex_dm->tdma_adj_type = 2;
2268 } else if (max_interval == 3) {
2269 halbtc8192e2ant_ps_tdma(btcoexist,
2270 NORMAL_EXEC,
2271 true, 3);
2272 coex_dm->tdma_adj_type = 3;
2273 } else {
2274 halbtc8192e2ant_ps_tdma(btcoexist,
2275 NORMAL_EXEC,
2276 true, 3);
2277 coex_dm->tdma_adj_type = 3;
2278 }
2279 }
2280 }
2281
2282 up = 0;
2283 dn = 0;
2284 m = 1;
2285 n = 3;
2286 result = 0;
2287 wait_cnt = 0;
2288 } else {
2289 /* accquire the BT TRx retry count from BT_Info byte2 */
2290 retry_cnt = coex_sta->bt_retry_cnt;
2291 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2292 "[BTCoex], retry_cnt = %d\n", retry_cnt);
2293 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2294 "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n",
2295 up, dn, m, n, wait_cnt);
2296 result = 0;
2297 wait_cnt++;
2298 /* no retry in the last 2-second duration */
2299 if (retry_cnt == 0) {
2300 up++;
2301 dn--;
2302
2303 if (dn <= 0)
2304 dn = 0;
2305
2306 if (up >= n) {
2307 wait_cnt = 0;
2308 n = 3;
2309 up = 0;
2310 dn = 0;
2311 result = 1;
2312 BTC_PRINT(BTC_MSG_ALGORITHM,
2313 ALGO_TRACE_FW_DETAIL,
2314 "[BTCoex]Increase wifi duration!!\n");
2315 }
2316 } else if (retry_cnt <= 3) {
2317 up--;
2318 dn++;
2319
2320 if (up <= 0)
2321 up = 0;
2322
2323 if (dn == 2) {
2324 if (wait_cnt <= 2)
2325 m++;
2326 else
2327 m = 1;
2328
2329 if (m >= 20)
2330 m = 20;
2331
2332 n = 3 * m;
2333 up = 0;
2334 dn = 0;
2335 wait_cnt = 0;
2336 result = -1;
2337 BTC_PRINT(BTC_MSG_ALGORITHM,
2338 ALGO_TRACE_FW_DETAIL,
2339 "Reduce wifi duration for retry<3\n");
2340 }
2341 } else {
2342 if (wait_cnt == 1)
2343 m++;
2344 else
2345 m = 1;
2346
2347 if (m >= 20)
2348 m = 20;
2349
2350 n = 3*m;
2351 up = 0;
2352 dn = 0;
2353 wait_cnt = 0;
2354 result = -1;
2355 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2356 "Decrease wifi duration for retryCounter>3!!\n");
2357 }
2358
2359 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2360 "[BTCoex], max Interval = %d\n", max_interval);
2361 if (max_interval == 1)
2362 btc8192e_int1(btcoexist, tx_pause, result);
2363 else if (max_interval == 2)
2364 btc8192e_int2(btcoexist, tx_pause, result);
2365 else if (max_interval == 3)
2366 btc8192e_int3(btcoexist, tx_pause, result);
2367 }
2368
2369 /* if current PsTdma not match with
2370 * the recorded one (when scan, dhcp...),
2371 * then we have to adjust it back to the previous record one.
2372 */
2373 if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) {
2374 bool scan = false, link = false, roam = false;
2375
2376 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2377 "[BTCoex], PsTdma type dismatch!!!, ");
2378 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2379 "curPsTdma=%d, recordPsTdma=%d\n",
2380 coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type);
2381
2382 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2383 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2384 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2385
2386 if (!scan && !link && !roam)
2387 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2388 true,
2389 coex_dm->tdma_adj_type);
2390 else
2391 BTC_PRINT(BTC_MSG_ALGORITHM,
2392 ALGO_TRACE_FW_DETAIL,
2393 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2394 }
2395 }
2396
2397 /* SCO only or SCO+PAN(HS) */
2398 static void halbtc8192e2ant_action_sco(struct btc_coexist *btcoexist)
2399 {
2400 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2401 u32 wifi_bw;
2402
2403 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2404
2405 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2406 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2407
2408 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2409
2410 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 4);
2411
2412 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2413
2414 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2415 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2416 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2417 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2418 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2419 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2420 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2421 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2422 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2423 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2424 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2425 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2426 }
2427
2428 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2429
2430 /* sw mechanism */
2431 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2432 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2433 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2434 btc8192e2ant_sw_mec1(btcoexist, true, true,
2435 false, false);
2436 btc8192e2ant_sw_mec2(btcoexist, true, false,
2437 false, 0x6);
2438 } else {
2439 btc8192e2ant_sw_mec1(btcoexist, true, true,
2440 false, false);
2441 btc8192e2ant_sw_mec2(btcoexist, false, false,
2442 false, 0x6);
2443 }
2444 } else {
2445 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2446 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2447 btc8192e2ant_sw_mec1(btcoexist, false, true,
2448 false, false);
2449 btc8192e2ant_sw_mec2(btcoexist, true, false,
2450 false, 0x6);
2451 } else {
2452 btc8192e2ant_sw_mec1(btcoexist, false, true,
2453 false, false);
2454 btc8192e2ant_sw_mec2(btcoexist, false, false,
2455 false, 0x6);
2456 }
2457 }
2458 }
2459
2460 static void halbtc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
2461 {
2462 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2463 u32 wifi_bw;
2464
2465 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2466
2467 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2468 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2469
2470 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2471
2472 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 4);
2473
2474 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2475
2476 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2477 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2478 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2479 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2480 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2481 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2482 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2483 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2484 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2485 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2486 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2487 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2488 }
2489
2490 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2491
2492 /* sw mechanism */
2493 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2494 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2495 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2496 btc8192e2ant_sw_mec1(btcoexist, true, true,
2497 false, false);
2498 btc8192e2ant_sw_mec2(btcoexist, true, false,
2499 false, 0x6);
2500 } else {
2501 btc8192e2ant_sw_mec1(btcoexist, true, true,
2502 false, false);
2503 btc8192e2ant_sw_mec2(btcoexist, false, false,
2504 false, 0x6);
2505 }
2506 } else {
2507 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2508 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2509 btc8192e2ant_sw_mec1(btcoexist, false, true,
2510 false, false);
2511 btc8192e2ant_sw_mec2(btcoexist, true, false,
2512 false, 0x6);
2513 } else {
2514 btc8192e2ant_sw_mec1(btcoexist, false, true,
2515 false, false);
2516 btc8192e2ant_sw_mec2(btcoexist, false, false,
2517 false, 0x6);
2518 }
2519 }
2520 }
2521
2522 static void halbtc8192e2ant_action_hid(struct btc_coexist *btcoexist)
2523 {
2524 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2525 u32 wifi_bw;
2526
2527 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2528 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2529
2530 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2531 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2532
2533 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2534
2535 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2536
2537 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
2538
2539 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2540 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2541 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2542 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2543 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2544 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2545 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2546 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2547 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2548 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2549 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2550 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2551 }
2552
2553 /* sw mechanism */
2554 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2555 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2556 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2557 btc8192e2ant_sw_mec1(btcoexist, true, true,
2558 false, false);
2559 btc8192e2ant_sw_mec2(btcoexist, true, false,
2560 false, 0x18);
2561 } else {
2562 btc8192e2ant_sw_mec1(btcoexist, true, true,
2563 false, false);
2564 btc8192e2ant_sw_mec2(btcoexist, false, false,
2565 false, 0x18);
2566 }
2567 } else {
2568 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2569 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2570 btc8192e2ant_sw_mec1(btcoexist, false, true,
2571 false, false);
2572 btc8192e2ant_sw_mec2(btcoexist, true, false,
2573 false, 0x18);
2574 } else {
2575 btc8192e2ant_sw_mec1(btcoexist, false, true,
2576 false, false);
2577 btc8192e2ant_sw_mec2(btcoexist, false, false,
2578 false, 0x18);
2579 }
2580 }
2581 }
2582
2583 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2584 static void halbtc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
2585 {
2586 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2587 u32 wifi_bw;
2588 bool long_dist = false;
2589
2590 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2591 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2592
2593 if ((btrssi_state == BTC_RSSI_STATE_LOW ||
2594 btrssi_state == BTC_RSSI_STATE_STAY_LOW) &&
2595 (wifirssi_state == BTC_RSSI_STATE_LOW ||
2596 wifirssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2597 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2598 "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
2599 long_dist = true;
2600 }
2601 if (long_dist) {
2602 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 2);
2603 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
2604 0x4);
2605 } else {
2606 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2607 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
2608 0x8);
2609 }
2610
2611 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2612
2613 if (long_dist)
2614 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 0);
2615 else
2616 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2617
2618 if (long_dist) {
2619 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
2620 coex_dm->auto_tdma_adjust = false;
2621 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2622 } else {
2623 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2624 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2625 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2626 true, 1);
2627 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2628 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2629 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2630 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2631 false, 1);
2632 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2633 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2634 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2635 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2636 false, 1);
2637 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2638 }
2639 }
2640
2641 /* sw mechanism */
2642 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2643 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2644 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2645 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2646 btc8192e2ant_sw_mec1(btcoexist, true, false,
2647 false, false);
2648 btc8192e2ant_sw_mec2(btcoexist, true, false,
2649 false, 0x18);
2650 } else {
2651 btc8192e2ant_sw_mec1(btcoexist, true, false,
2652 false, false);
2653 btc8192e2ant_sw_mec2(btcoexist, false, false,
2654 false, 0x18);
2655 }
2656 } else {
2657 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2658 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2659 btc8192e2ant_sw_mec1(btcoexist, false, false,
2660 false, false);
2661 btc8192e2ant_sw_mec2(btcoexist, true, false,
2662 false, 0x18);
2663 } else {
2664 btc8192e2ant_sw_mec1(btcoexist, false, false,
2665 false, false);
2666 btc8192e2ant_sw_mec2(btcoexist, false, false,
2667 false, 0x18);
2668 }
2669 }
2670 }
2671
2672 static void halbtc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
2673 {
2674 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2675 u32 wifi_bw;
2676
2677 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2678 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2679
2680 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2681 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2682
2683 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2684 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2685
2686 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2687 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2688 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
2689 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2690 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2691 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2692 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2693 false, 2);
2694 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2695 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2696 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2697 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2698 false, 2);
2699 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2700 }
2701
2702 /* sw mechanism */
2703 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2704 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2705 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2706 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2707 btc8192e2ant_sw_mec1(btcoexist, true, false,
2708 false, false);
2709 btc8192e2ant_sw_mec2(btcoexist, true, false,
2710 true, 0x6);
2711 } else {
2712 btc8192e2ant_sw_mec1(btcoexist, true, false,
2713 false, false);
2714 btc8192e2ant_sw_mec2(btcoexist, false, false,
2715 true, 0x6);
2716 }
2717 } else {
2718 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2719 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2720 btc8192e2ant_sw_mec1(btcoexist, false, false,
2721 false, false);
2722 btc8192e2ant_sw_mec2(btcoexist, true, false,
2723 true, 0x6);
2724 } else {
2725 btc8192e2ant_sw_mec1(btcoexist, false, false,
2726 false, false);
2727 btc8192e2ant_sw_mec2(btcoexist, false, false,
2728 true, 0x6);
2729 }
2730 }
2731 }
2732
2733 static void halbtc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
2734 {
2735 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2736 u32 wifi_bw;
2737
2738 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2739 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2740
2741 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2742 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2743
2744 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2745
2746 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2747
2748 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2749 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2750 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2751 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2752 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2753 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2754 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2755 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2756 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2757 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2758 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2759 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2760 }
2761
2762 /* sw mechanism */
2763 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2764 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2765 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2766 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2767 btc8192e2ant_sw_mec1(btcoexist, true, false,
2768 false, false);
2769 btc8192e2ant_sw_mec2(btcoexist, true, false,
2770 false, 0x18);
2771 } else {
2772 btc8192e2ant_sw_mec1(btcoexist, true, false,
2773 false, false);
2774 btc8192e2ant_sw_mec2(btcoexist, false, false,
2775 false, 0x18);
2776 }
2777 } else {
2778 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2779 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2780 btc8192e2ant_sw_mec1(btcoexist, false, false,
2781 false, false);
2782 btc8192e2ant_sw_mec2(btcoexist, true, false,
2783 false, 0x18);
2784 } else {
2785 btc8192e2ant_sw_mec1(btcoexist, false, false,
2786 false, false);
2787 btc8192e2ant_sw_mec2(btcoexist, false, false,
2788 false, 0x18);
2789 }
2790 }
2791 }
2792
2793 /* PAN(HS) only */
2794 static void halbtc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
2795 {
2796 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2797 u32 wifi_bw;
2798
2799 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2800 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2801
2802 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2803 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2804
2805 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2806
2807 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2808
2809 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2810 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2811 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2812 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2813 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2814 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2815 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2816 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2817 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2818 }
2819 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2820
2821 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2822 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2823 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2824 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2825 btc8192e2ant_sw_mec1(btcoexist, true, false,
2826 false, false);
2827 btc8192e2ant_sw_mec2(btcoexist, true, false,
2828 false, 0x18);
2829 } else {
2830 btc8192e2ant_sw_mec1(btcoexist, true, false,
2831 false, false);
2832 btc8192e2ant_sw_mec2(btcoexist, false, false,
2833 false, 0x18);
2834 }
2835 } else {
2836 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2837 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2838 btc8192e2ant_sw_mec1(btcoexist, false, false,
2839 false, false);
2840 btc8192e2ant_sw_mec2(btcoexist, true, false,
2841 false, 0x18);
2842 } else {
2843 btc8192e2ant_sw_mec1(btcoexist, false, false,
2844 false, false);
2845 btc8192e2ant_sw_mec2(btcoexist, false, false,
2846 false, 0x18);
2847 }
2848 }
2849 }
2850
2851 /* PAN(EDR)+A2DP */
2852 static void halbtc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
2853 {
2854 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2855 u32 wifi_bw;
2856
2857 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2858 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2859
2860 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2861 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2862
2863 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2864
2865 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2866
2867 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2868
2869 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2870 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2871 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2872 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
2873 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2874 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2875 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2876 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2877 false, 3);
2878 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2879 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2880 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2881 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2882 false, 3);
2883 }
2884
2885 /* sw mechanism */
2886 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2887 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2888 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2889 btc8192e2ant_sw_mec1(btcoexist, true, false,
2890 false, false);
2891 btc8192e2ant_sw_mec2(btcoexist, true, false,
2892 false, 0x18);
2893 } else {
2894 btc8192e2ant_sw_mec1(btcoexist, true, false,
2895 false, false);
2896 btc8192e2ant_sw_mec2(btcoexist, false, false,
2897 false, 0x18);
2898 }
2899 } else {
2900 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2901 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2902 btc8192e2ant_sw_mec1(btcoexist, false, false,
2903 false, false);
2904 btc8192e2ant_sw_mec2(btcoexist, true, false,
2905 false, 0x18);
2906 } else {
2907 btc8192e2ant_sw_mec1(btcoexist, false, false,
2908 false, false);
2909 btc8192e2ant_sw_mec2(btcoexist, false, false,
2910 false, 0x18);
2911 }
2912 }
2913 }
2914
2915 static void halbtc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
2916 {
2917 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2918 u32 wifi_bw;
2919
2920 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2921 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2922
2923 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2924
2925 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2926 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2927
2928 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2929
2930 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
2931
2932 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2933 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2934 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2935 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2936 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2937 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2938 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2939 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2940 true, 10);
2941 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2942 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2943 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2944 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2945 true, 10);
2946 }
2947
2948 /* sw mechanism */
2949 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2950 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2951 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2952 btc8192e2ant_sw_mec1(btcoexist, true, true,
2953 false, false);
2954 btc8192e2ant_sw_mec2(btcoexist, true, false,
2955 false, 0x18);
2956 } else {
2957 btc8192e2ant_sw_mec1(btcoexist, true, true,
2958 false, false);
2959 btc8192e2ant_sw_mec2(btcoexist, false, false,
2960 false, 0x18);
2961 }
2962 } else {
2963 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2964 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2965 btc8192e2ant_sw_mec1(btcoexist, false, true,
2966 false, false);
2967 btc8192e2ant_sw_mec2(btcoexist, true, false,
2968 false, 0x18);
2969 } else {
2970 btc8192e2ant_sw_mec1(btcoexist, false, true,
2971 false, false);
2972 btc8192e2ant_sw_mec2(btcoexist, false, false,
2973 false, 0x18);
2974 }
2975 }
2976 }
2977
2978 /* HID+A2DP+PAN(EDR) */
2979 static void btc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
2980 {
2981 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2982 u32 wifi_bw;
2983
2984 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2985 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2986
2987 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2988 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2989
2990 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2991
2992 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2993
2994 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
2995
2996 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2997 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2998 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2999 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3000 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3001 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3002 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3003 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3004 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3005 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3006 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3007 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3008 }
3009
3010 /* sw mechanism */
3011 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3012 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3013 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3014 btc8192e2ant_sw_mec1(btcoexist, true, true,
3015 false, false);
3016 btc8192e2ant_sw_mec2(btcoexist, true, false,
3017 false, 0x18);
3018 } else {
3019 btc8192e2ant_sw_mec1(btcoexist, true, true,
3020 false, false);
3021 btc8192e2ant_sw_mec2(btcoexist, false, false,
3022 false, 0x18);
3023 }
3024 } else {
3025 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3026 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3027 btc8192e2ant_sw_mec1(btcoexist, false, true,
3028 false, false);
3029 btc8192e2ant_sw_mec2(btcoexist, true, false,
3030 false, 0x18);
3031 } else {
3032 btc8192e2ant_sw_mec1(btcoexist, false, true,
3033 false, false);
3034 btc8192e2ant_sw_mec2(btcoexist, false, false,
3035 false, 0x18);
3036 }
3037 }
3038 }
3039
3040 static void halbtc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
3041 {
3042 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3043 u32 wifi_bw;
3044
3045 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3046 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3047
3048 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3049 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3050
3051 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3052
3053 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
3054
3055 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3056 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3057 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3058 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3059 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3060 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3061 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3062 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3063 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3064 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3065 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3066 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3067 }
3068
3069 /* sw mechanism */
3070 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3071 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3072 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3073 btc8192e2ant_sw_mec1(btcoexist, true, true,
3074 false, false);
3075 btc8192e2ant_sw_mec2(btcoexist, true, false,
3076 false, 0x18);
3077 } else {
3078 btc8192e2ant_sw_mec1(btcoexist, true, true,
3079 false, false);
3080 btc8192e2ant_sw_mec2(btcoexist, false, false,
3081 false, 0x18);
3082 }
3083 } else {
3084 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3085 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3086 btc8192e2ant_sw_mec1(btcoexist, false, true,
3087 false, false);
3088 btc8192e2ant_sw_mec2(btcoexist, true, false,
3089 false, 0x18);
3090 } else {
3091 btc8192e2ant_sw_mec1(btcoexist, false, true,
3092 false, false);
3093 btc8192e2ant_sw_mec2(btcoexist, false, false,
3094 false, 0x18);
3095 }
3096 }
3097 }
3098
3099 static void halbtc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
3100 {
3101 u8 algorithm = 0;
3102
3103 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3104 "[BTCoex], RunCoexistMechanism()===>\n");
3105
3106 if (btcoexist->manual_control) {
3107 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3108 "[BTCoex], return for Manual CTRL <===\n");
3109 return;
3110 }
3111
3112 if (coex_sta->under_ips) {
3113 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3114 "[BTCoex], wifi is under IPS !!!\n");
3115 return;
3116 }
3117
3118 algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3119 if (coex_sta->c2h_bt_inquiry_page &&
3120 (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3121 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3122 "[BTCoex], BT is under inquiry/page scan !!\n");
3123 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3124 return;
3125 }
3126
3127 coex_dm->cur_algorithm = algorithm;
3128 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3129 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
3130
3131 if (halbtc8192e2ant_is_common_action(btcoexist)) {
3132 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3133 "[BTCoex], Action 2-Ant common.\n");
3134 coex_dm->auto_tdma_adjust = false;
3135 } else {
3136 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3137 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3138 "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n",
3139 coex_dm->pre_algorithm,
3140 coex_dm->cur_algorithm);
3141 coex_dm->auto_tdma_adjust = false;
3142 }
3143 switch (coex_dm->cur_algorithm) {
3144 case BT_8192E_2ANT_COEX_ALGO_SCO:
3145 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3146 "Action 2-Ant, algorithm = SCO.\n");
3147 halbtc8192e2ant_action_sco(btcoexist);
3148 break;
3149 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3150 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3151 "Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3152 halbtc8192e2ant_action_sco_pan(btcoexist);
3153 break;
3154 case BT_8192E_2ANT_COEX_ALGO_HID:
3155 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3156 "Action 2-Ant, algorithm = HID.\n");
3157 halbtc8192e2ant_action_hid(btcoexist);
3158 break;
3159 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3160 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3161 "Action 2-Ant, algorithm = A2DP.\n");
3162 halbtc8192e2ant_action_a2dp(btcoexist);
3163 break;
3164 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3165 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3166 "Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3167 halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3168 break;
3169 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3170 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3171 "Action 2-Ant, algorithm = PAN(EDR).\n");
3172 halbtc8192e2ant_action_pan_edr(btcoexist);
3173 break;
3174 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3175 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3176 "Action 2-Ant, algorithm = HS mode.\n");
3177 halbtc8192e2ant_action_pan_hs(btcoexist);
3178 break;
3179 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3180 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3181 "Action 2-Ant, algorithm = PAN+A2DP.\n");
3182 halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3183 break;
3184 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3185 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3186 "Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3187 halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3188 break;
3189 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3190 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3191 "Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3192 btc8192e2ant_action_hid_a2dp_pan_edr(btcoexist);
3193 break;
3194 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3195 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3196 "Action 2-Ant, algorithm = HID+A2DP.\n");
3197 halbtc8192e2ant_action_hid_a2dp(btcoexist);
3198 break;
3199 default:
3200 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3201 "Action 2-Ant, algorithm = unknown!!\n");
3202 /* halbtc8192e2ant_coex_alloff(btcoexist); */
3203 break;
3204 }
3205 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3206 }
3207 }
3208
3209 static void halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist,
3210 bool backup)
3211 {
3212 u16 u16tmp = 0;
3213 u8 u8tmp = 0;
3214
3215 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3216 "[BTCoex], 2Ant Init HW Config!!\n");
3217
3218 if (backup) {
3219 /* backup rf 0x1e value */
3220 coex_dm->bt_rf0x1e_backup =
3221 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A,
3222 0x1e, 0xfffff);
3223
3224 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3225 0x430);
3226 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3227 0x434);
3228 coex_dm->backup_retrylimit = btcoexist->btc_read_2byte(
3229 btcoexist,
3230 0x42a);
3231 coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte(
3232 btcoexist,
3233 0x456);
3234 }
3235
3236 /* antenna sw ctrl to bt */
3237 btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6);
3238 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
3239 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
3240 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
3241 if (btcoexist->chip_interface == BTC_INTF_USB)
3242 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
3243 else
3244 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
3245
3246 btc8192e2ant_coex_tbl_w_type(btcoexist, FORCE_EXEC, 0);
3247
3248 /* antenna switch control parameter */
3249 btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
3250
3251 /* coex parameters */
3252 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3253 /* 0x790[5:0] = 0x5 */
3254 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3255 u8tmp &= 0xc0;
3256 u8tmp |= 0x5;
3257 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3258
3259 /* enable counter statistics */
3260 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3261
3262 /* enable PTA */
3263 btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3264 /* enable mailbox interface */
3265 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3266 u16tmp |= BIT9;
3267 btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3268
3269 /* enable PTA I2C mailbox */
3270 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3271 u8tmp |= BIT4;
3272 btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3273
3274 /* enable bt clock when wifi is disabled. */
3275 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3276 u8tmp |= BIT0;
3277 btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3278 /* enable bt clock when suspend. */
3279 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3280 u8tmp |= BIT0;
3281 btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3282 }
3283
3284 /*************************************************************
3285 * work around function start with wa_halbtc8192e2ant_
3286 *************************************************************/
3287
3288 /************************************************************
3289 * extern function start with EXhalbtc8192e2ant_
3290 ************************************************************/
3291
3292 void ex_halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
3293 {
3294 halbtc8192e2ant_init_hwconfig(btcoexist, true);
3295 }
3296
3297 void ex_halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
3298 {
3299 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3300 "[BTCoex], Coex Mechanism Init!!\n");
3301 halbtc8192e2ant_init_coex_dm(btcoexist);
3302 }
3303
3304 void ex_halbtc8192e2ant_display_coex_info(struct btc_coexist *btcoexist)
3305 {
3306 struct btc_board_info *board_info = &btcoexist->board_info;
3307 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3308 struct rtl_priv *rtlpriv = btcoexist->adapter;
3309 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3310 u16 u16tmp[4];
3311 u32 u32tmp[4];
3312 bool roam = false, scan = false, link = false, wifi_under_5g = false;
3313 bool bt_hson = false, wifi_busy = false;
3314 int wifirssi = 0, bt_hs_rssi = 0;
3315 u32 wifi_bw, wifi_traffic_dir;
3316 u8 wifi_dot11_chnl, wifi_hs_chnl;
3317 u32 fw_ver = 0, bt_patch_ver = 0;
3318
3319 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3320 "\r\n ============[BT Coexist info]============");
3321
3322 if (btcoexist->manual_control) {
3323 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3324 "\r\n ===========[Under Manual Control]===========");
3325 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3326 "\r\n ==========================================");
3327 }
3328
3329 if (!board_info->bt_exist) {
3330 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n BT not exists !!!");
3331 return;
3332 }
3333
3334 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3335 "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:",
3336 board_info->pg_ant_num, board_info->btdm_ant_num);
3337
3338 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s / %d",
3339 "BT stack/ hci ext ver",
3340 ((stack_info->profile_notified) ? "Yes" : "No"),
3341 stack_info->hci_version);
3342
3343 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3344 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3345 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3346 "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3347 "CoexVer/ FwVer/ PatchVer",
3348 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3349 fw_ver, bt_patch_ver, bt_patch_ver);
3350
3351 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
3352 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
3353 &wifi_dot11_chnl);
3354 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
3355 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d(%d)",
3356 "Dot11 channel / HsMode(HsChnl)",
3357 wifi_dot11_chnl, bt_hson, wifi_hs_chnl);
3358
3359 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %3ph ",
3360 "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info);
3361
3362 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
3363 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
3364 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
3365 "Wifi rssi/ HS rssi", wifirssi, bt_hs_rssi);
3366
3367 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3368 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3369 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
3370 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d ",
3371 "Wifi link/ roam/ scan", link, roam, scan);
3372
3373 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3374 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3375 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
3376 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
3377 &wifi_traffic_dir);
3378 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s / %s/ %s ",
3379 "Wifi status", (wifi_under_5g ? "5G" : "2.4G"),
3380 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
3381 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
3382 ((!wifi_busy) ? "idle" :
3383 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
3384 "uplink" : "downlink")));
3385
3386 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = [%s/ %d/ %d] ",
3387 "BT [status/ rssi/ retryCnt]",
3388 ((btcoexist->bt_info.bt_disabled) ? ("disabled") :
3389 ((coex_sta->c2h_bt_inquiry_page) ?
3390 ("inquiry/page scan") :
3391 ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3392 coex_dm->bt_status) ? "non-connected idle" :
3393 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
3394 coex_dm->bt_status) ? "connected-idle" : "busy")))),
3395 coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3396
3397 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d / %d / %d",
3398 "SCO/HID/PAN/A2DP", stack_info->sco_exist,
3399 stack_info->hid_exist, stack_info->pan_exist,
3400 stack_info->a2dp_exist);
3401 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3402
3403 bt_info_ext = coex_sta->bt_info_ext;
3404 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s",
3405 "BT Info A2DP rate",
3406 (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate");
3407
3408 for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3409 if (coex_sta->bt_info_c2h_cnt[i]) {
3410 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3411 "\r\n %-35s = %7ph(%d)",
3412 GLBtInfoSrc8192e2Ant[i],
3413 coex_sta->bt_info_c2h[i],
3414 coex_sta->bt_info_c2h_cnt[i]);
3415 }
3416 }
3417
3418 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s/%s",
3419 "PS state, IPS/LPS",
3420 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
3421 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
3422 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3423
3424 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x ", "SS Type",
3425 coex_dm->cur_sstype);
3426
3427 /* Sw mechanism */
3428 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
3429 "============[Sw mechanism]============");
3430 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d ",
3431 "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink,
3432 coex_dm->cur_low_penalty_ra, coex_dm->limited_dig);
3433 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3434 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3435 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3436 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3437
3438 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x ", "Rate Mask",
3439 btcoexist->bt_info.ra_mask);
3440
3441 /* Fw mechanism */
3442 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
3443 "============[Fw mechanism]============");
3444
3445 ps_tdma_case = coex_dm->cur_ps_tdma;
3446 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3447 "\r\n %-35s = %5ph case-%d (auto:%d)",
3448 "PS TDMA", coex_dm->ps_tdma_para,
3449 ps_tdma_case, coex_dm->auto_tdma_adjust);
3450
3451 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d ",
3452 "DecBtPwr/ IgnWlanAct",
3453 coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act);
3454
3455 /* Hw setting */
3456 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
3457 "============[Hw setting]============");
3458
3459 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x",
3460 "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup);
3461
3462 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3463 "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1,
3464 coex_dm->backup_arfr_cnt2, coex_dm->backup_retrylimit,
3465 coex_dm->backup_ampdu_maxtime);
3466
3467 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3468 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3469 u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3470 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3471 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3472 "0x430/0x434/0x42a/0x456",
3473 u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3474
3475 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3476 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3477 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3478 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3479 "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]);
3480
3481 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3482 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", "0x778",
3483 u8tmp[0]);
3484
3485 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3486 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3487 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
3488 "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]);
3489
3490 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3491 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3492 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
3493 "0x40/ 0x4f", u8tmp[0], u8tmp[1]);
3494
3495 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3496 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3497 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
3498 "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]);
3499
3500 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3501 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", "0xc50(dig)",
3502 u32tmp[0]);
3503
3504 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3505 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3506 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3507 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3508 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3509 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3510 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3511 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3512
3513 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
3514 "0x770(hp rx[31:16]/tx[15:0])",
3515 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3516 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
3517 "0x774(lp rx[31:16]/tx[15:0])",
3518 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3519 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
3520 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3521 #endif
3522 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3523 }
3524
3525 void ex_halbtc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
3526 {
3527 if (BTC_IPS_ENTER == type) {
3528 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3529 "[BTCoex], IPS ENTER notify\n");
3530 coex_sta->under_ips = true;
3531 halbtc8192e2ant_coex_alloff(btcoexist);
3532 } else if (BTC_IPS_LEAVE == type) {
3533 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3534 "[BTCoex], IPS LEAVE notify\n");
3535 coex_sta->under_ips = false;
3536 }
3537 }
3538
3539 void ex_halbtc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
3540 {
3541 if (BTC_LPS_ENABLE == type) {
3542 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3543 "[BTCoex], LPS ENABLE notify\n");
3544 coex_sta->under_lps = true;
3545 } else if (BTC_LPS_DISABLE == type) {
3546 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3547 "[BTCoex], LPS DISABLE notify\n");
3548 coex_sta->under_lps = false;
3549 }
3550 }
3551
3552 void ex_halbtc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
3553 {
3554 if (BTC_SCAN_START == type)
3555 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3556 "[BTCoex], SCAN START notify\n");
3557 else if (BTC_SCAN_FINISH == type)
3558 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3559 "[BTCoex], SCAN FINISH notify\n");
3560 }
3561
3562 void ex_halbtc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
3563 {
3564 if (BTC_ASSOCIATE_START == type)
3565 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3566 "[BTCoex], CONNECT START notify\n");
3567 else if (BTC_ASSOCIATE_FINISH == type)
3568 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3569 "[BTCoex], CONNECT FINISH notify\n");
3570 }
3571
3572 void ex_halbtc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
3573 u8 type)
3574 {
3575 u8 h2c_parameter[3] = {0};
3576 u32 wifi_bw;
3577 u8 wifi_center_chnl;
3578
3579 if (btcoexist->manual_control ||
3580 btcoexist->stop_coex_dm ||
3581 btcoexist->bt_info.bt_disabled)
3582 return;
3583
3584 if (BTC_MEDIA_CONNECT == type)
3585 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3586 "[BTCoex], MEDIA connect notify\n");
3587 else
3588 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3589 "[BTCoex], MEDIA disconnect notify\n");
3590
3591 /* only 2.4G we need to inform bt the chnl mask */
3592 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3593 &wifi_center_chnl);
3594 if ((BTC_MEDIA_CONNECT == type) &&
3595 (wifi_center_chnl <= 14)) {
3596 h2c_parameter[0] = 0x1;
3597 h2c_parameter[1] = wifi_center_chnl;
3598 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3599 if (BTC_WIFI_BW_HT40 == wifi_bw)
3600 h2c_parameter[2] = 0x30;
3601 else
3602 h2c_parameter[2] = 0x20;
3603 }
3604
3605 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3606 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3607 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3608
3609 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
3610 "[BTCoex], FW write 0x66 = 0x%x\n",
3611 h2c_parameter[0] << 16 | h2c_parameter[1] << 8 |
3612 h2c_parameter[2]);
3613
3614 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3615 }
3616
3617 void ex_halbtc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
3618 u8 type)
3619 {
3620 if (type == BTC_PACKET_DHCP)
3621 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3622 "[BTCoex], DHCP Packet notify\n");
3623 }
3624
3625 void ex_halbtc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
3626 u8 *tmp_buf, u8 length)
3627 {
3628 u8 bt_info = 0;
3629 u8 i, rsp_source = 0;
3630 bool bt_busy = false, limited_dig = false;
3631 bool wifi_connected = false;
3632
3633 coex_sta->c2h_bt_info_req_sent = false;
3634
3635 rsp_source = tmp_buf[0] & 0xf;
3636 if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX)
3637 rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
3638 coex_sta->bt_info_c2h_cnt[rsp_source]++;
3639
3640 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3641 "[BTCoex], Bt info[%d], length=%d, hex data = [",
3642 rsp_source, length);
3643 for (i = 0; i < length; i++) {
3644 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
3645 if (i == 1)
3646 bt_info = tmp_buf[i];
3647 if (i == length-1)
3648 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3649 "0x%02x]\n", tmp_buf[i]);
3650 else
3651 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3652 "0x%02x, ", tmp_buf[i]);
3653 }
3654
3655 if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
3656 coex_sta->bt_retry_cnt = /* [3:0] */
3657 coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
3658
3659 coex_sta->bt_rssi =
3660 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
3661
3662 coex_sta->bt_info_ext =
3663 coex_sta->bt_info_c2h[rsp_source][4];
3664
3665 /* Here we need to resend some wifi info to BT
3666 * because bt is reset and loss of the info.
3667 */
3668 if ((coex_sta->bt_info_ext & BIT1)) {
3669 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3670 "bit1, send wifi BW&Chnl to BT!!\n");
3671 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3672 &wifi_connected);
3673 if (wifi_connected)
3674 ex_halbtc8192e2ant_media_status_notify(
3675 btcoexist,
3676 BTC_MEDIA_CONNECT);
3677 else
3678 ex_halbtc8192e2ant_media_status_notify(
3679 btcoexist,
3680 BTC_MEDIA_DISCONNECT);
3681 }
3682
3683 if ((coex_sta->bt_info_ext & BIT3)) {
3684 if (!btcoexist->manual_control &&
3685 !btcoexist->stop_coex_dm) {
3686 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3687 "bit3, BT NOT ignore Wlan active!\n");
3688 halbtc8192e2ant_IgnoreWlanAct(btcoexist,
3689 FORCE_EXEC,
3690 false);
3691 }
3692 } else {
3693 /* BT already NOT ignore Wlan active,
3694 * do nothing here.
3695 */
3696 }
3697
3698 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
3699 if ((coex_sta->bt_info_ext & BIT4)) {
3700 /* BT auto report already enabled, do nothing */
3701 } else {
3702 halbtc8192e2ant_bt_autoreport(btcoexist, FORCE_EXEC,
3703 true);
3704 }
3705 #endif
3706 }
3707
3708 /* check BIT2 first ==> check if bt is under inquiry or page scan */
3709 if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
3710 coex_sta->c2h_bt_inquiry_page = true;
3711 else
3712 coex_sta->c2h_bt_inquiry_page = false;
3713
3714 /* set link exist status */
3715 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
3716 coex_sta->bt_link_exist = false;
3717 coex_sta->pan_exist = false;
3718 coex_sta->a2dp_exist = false;
3719 coex_sta->hid_exist = false;
3720 coex_sta->sco_exist = false;
3721 } else {/* connection exists */
3722 coex_sta->bt_link_exist = true;
3723 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
3724 coex_sta->pan_exist = true;
3725 else
3726 coex_sta->pan_exist = false;
3727 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
3728 coex_sta->a2dp_exist = true;
3729 else
3730 coex_sta->a2dp_exist = false;
3731 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
3732 coex_sta->hid_exist = true;
3733 else
3734 coex_sta->hid_exist = false;
3735 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
3736 coex_sta->sco_exist = true;
3737 else
3738 coex_sta->sco_exist = false;
3739 }
3740
3741 halbtc8192e2ant_update_btlink_info(btcoexist);
3742
3743 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
3744 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
3745 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3746 "[BTCoex], BT Non-Connected idle!!!\n");
3747 } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) {
3748 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
3749 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3750 "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n");
3751 } else if ((bt_info&BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
3752 (bt_info&BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
3753 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
3754 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3755 "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n");
3756 } else if (bt_info&BT_INFO_8192E_2ANT_B_ACL_BUSY) {
3757 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
3758 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3759 "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n");
3760 } else {
3761 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
3762 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3763 "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n");
3764 }
3765
3766 if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
3767 (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
3768 (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
3769 bt_busy = true;
3770 limited_dig = true;
3771 } else {
3772 bt_busy = false;
3773 limited_dig = false;
3774 }
3775
3776 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
3777
3778 coex_dm->limited_dig = limited_dig;
3779 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
3780
3781 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
3782 }
3783
3784 void ex_halbtc8192e2ant_stack_operation_notify(struct btc_coexist *btcoexist,
3785 u8 type)
3786 {
3787 }
3788
3789 void ex_halbtc8192e2ant_halt_notify(struct btc_coexist *btcoexist)
3790 {
3791 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, "[BTCoex], Halt notify\n");
3792
3793 halbtc8192e2ant_IgnoreWlanAct(btcoexist, FORCE_EXEC, true);
3794 ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
3795 }
3796
3797 void ex_halbtc8192e2ant_periodical(struct btc_coexist *btcoexist)
3798 {
3799 static u8 dis_ver_info_cnt;
3800 u32 fw_ver = 0, bt_patch_ver = 0;
3801 struct btc_board_info *board_info = &btcoexist->board_info;
3802 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3803
3804 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3805 "=======================Periodical=======================\n");
3806 if (dis_ver_info_cnt <= 5) {
3807 dis_ver_info_cnt += 1;
3808 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3809 "************************************************\n");
3810 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3811 "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
3812 board_info->pg_ant_num, board_info->btdm_ant_num,
3813 board_info->btdm_ant_pos);
3814 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3815 "BT stack/ hci ext ver = %s / %d\n",
3816 ((stack_info->profile_notified) ? "Yes" : "No"),
3817 stack_info->hci_version);
3818 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
3819 &bt_patch_ver);
3820 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3821 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3822 "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
3823 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3824 fw_ver, bt_patch_ver, bt_patch_ver);
3825 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3826 "************************************************\n");
3827 }
3828
3829 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
3830 halbtc8192e2ant_querybt_info(btcoexist);
3831 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3832 btc8192e2ant_monitor_bt_enable_dis(btcoexist);
3833 #else
3834 if (halbtc8192e2ant_iswifi_status_changed(btcoexist) ||
3835 coex_dm->auto_tdma_adjust)
3836 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
3837 #endif
3838 }
Linux kernel - Deliverables
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