drivers/net/wireless/realtek/rtlwifi/core.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25
  26 #ifndef __RTL_CORE_H__
  27 #define __RTL_CORE_H__
  28
  29 #define RTL_SUPPORTED_FILTERS           \
  30         (FIF_ALLMULTI | FIF_CONTROL | \
  31         FIF_OTHER_BSS | \
  32         FIF_FCSFAIL | \
  33         FIF_BCN_PRBRESP_PROMISC)
  34
  35 #define DM_DIG_THRESH_HIGH              40
  36 #define DM_DIG_THRESH_LOW               35
  37 #define DM_FALSEALARM_THRESH_LOW        400
  38 #define DM_FALSEALARM_THRESH_HIGH       1000
  39
  40 #define DM_DIG_MAX                      0x3e
  41 #define DM_DIG_MIN                      0x1e
  42 #define DM_DIG_MAX_AP                   0x32
  43 #define DM_DIG_BACKOFF_MAX              12
  44 #define DM_DIG_BACKOFF_MIN              -4
  45 #define DM_DIG_BACKOFF_DEFAULT          10
  46
  47 enum cck_packet_detection_threshold {
  48         CCK_PD_STAGE_LOWRSSI = 0,
  49         CCK_PD_STAGE_HIGHRSSI = 1,
  50         CCK_FA_STAGE_LOW = 2,
  51         CCK_FA_STAGE_HIGH = 3,
  52         CCK_PD_STAGE_MAX = 4,
  53 };
  54
  55 enum dm_dig_ext_port_alg_e {
  56         DIG_EXT_PORT_STAGE_0 = 0,
  57         DIG_EXT_PORT_STAGE_1 = 1,
  58         DIG_EXT_PORT_STAGE_2 = 2,
  59         DIG_EXT_PORT_STAGE_3 = 3,
  60         DIG_EXT_PORT_STAGE_MAX = 4,
  61 };
  62
  63 enum dm_dig_connect_e {
  64         DIG_STA_DISCONNECT,
  65         DIG_STA_CONNECT,
  66         DIG_STA_BEFORE_CONNECT,
  67         DIG_MULTISTA_DISCONNECT,
  68         DIG_MULTISTA_CONNECT,
  69         DIG_AP_DISCONNECT,
  70         DIG_AP_CONNECT,
  71         DIG_AP_ADD_STATION,
  72         DIG_CONNECT_MAX
  73 };
  74
  75 extern const struct ieee80211_ops rtl_ops;
  76 void rtl_fw_cb(const struct firmware *firmware, void *context);
  77 void rtl_wowlan_fw_cb(const struct firmware *firmware, void *context);
  78 void rtl_addr_delay(u32 addr);
  79 void rtl_rfreg_delay(struct ieee80211_hw *hw, enum radio_path rfpath, u32 addr,
  80                      u32 mask, u32 data);
  81 void rtl_bb_delay(struct ieee80211_hw *hw, u32 addr, u32 data);
  82 bool rtl_cmd_send_packet(struct ieee80211_hw *hw, struct sk_buff *skb);
  83 bool rtl_btc_status_false(void);
  84 void rtl_dm_diginit(struct ieee80211_hw *hw, u32 cur_igval);
  85
  86 #endif