drivers/net/wireless/realtek/rtlwifi/rtl8192ce/dm.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #ifndef __RTL92C_DM_H__
  31 #define __RTL92C_DM_H__
  32
  33 #define HAL_DM_DIG_DISABLE                      BIT(0)
  34 #define HAL_DM_HIPWR_DISABLE                    BIT(1)
  35
  36 #define OFDM_TABLE_LENGTH                       37
  37 #define CCK_TABLE_LENGTH                        33
  38
  39 #define OFDM_TABLE_SIZE                         37
  40 #define CCK_TABLE_SIZE                          33
  41
  42 #define BW_AUTO_SWITCH_HIGH_LOW                 25
  43 #define BW_AUTO_SWITCH_LOW_HIGH                 30
  44
  45 #define DM_DIG_FA_UPPER                         0x32
  46 #define DM_DIG_FA_LOWER                         0x20
  47 #define DM_DIG_FA_TH0                           0x20
  48 #define DM_DIG_FA_TH1                           0x100
  49 #define DM_DIG_FA_TH2                           0x200
  50
  51 #define RXPATHSELECTION_SS_TH_lOW               30
  52 #define RXPATHSELECTION_DIFF_TH                 18
  53
  54 #define DM_RATR_STA_INIT                        0
  55 #define DM_RATR_STA_HIGH                        1
  56 #define DM_RATR_STA_MIDDLE                      2
  57 #define DM_RATR_STA_LOW                         3
  58
  59 #define CTS2SELF_THVAL                          30
  60 #define REGC38_TH                               20
  61
  62 #define WAIOTTHVal                              25
  63
  64 #define TXHIGHPWRLEVEL_NORMAL                   0
  65 #define TXHIGHPWRLEVEL_LEVEL1                   1
  66 #define TXHIGHPWRLEVEL_LEVEL2                   2
  67 #define TXHIGHPWRLEVEL_BT1                      3
  68 #define TXHIGHPWRLEVEL_BT2                      4
  69
  70 #define DM_TYPE_BYFW                            0
  71 #define DM_TYPE_BYDRIVER                        1
  72
  73 #define TX_POWER_NEAR_FIELD_THRESH_LVL2         74
  74 #define TX_POWER_NEAR_FIELD_THRESH_LVL1         67
  75
  76 void rtl92c_dm_init(struct ieee80211_hw *hw);
  77 void rtl92c_dm_watchdog(struct ieee80211_hw *hw);
  78 void rtl92c_dm_write_dig(struct ieee80211_hw *hw);
  79 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw);
  80 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw);
  81 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
  82 void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
  83 void rtl92c_dm_bt_coexist(struct ieee80211_hw *hw);
  84 void rtl92ce_dm_dynamic_txpower(struct ieee80211_hw *hw);
  85
  86 #endif