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rt2x00: Hardcode TX ack timeout and consume time
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
1 /*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27 #include <linux/delay.h>
28 #include <linux/etherdevice.h>
29 #include <linux/init.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/usb.h>
33
34 #include "rt2x00.h"
35 #include "rt2x00usb.h"
36 #include "rt2500usb.h"
37
38 /*
39 * Allow hardware encryption to be disabled.
40 */
41 static int modparam_nohwcrypt = 0;
42 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
43 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
44
45 /*
46 * Register access.
47 * All access to the CSR registers will go through the methods
48 * rt2500usb_register_read and rt2500usb_register_write.
49 * BBP and RF register require indirect register access,
50 * and use the CSR registers BBPCSR and RFCSR to achieve this.
51 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed,
56 * and we will print an error.
57 * If the csr_mutex is already held then the _lock variants must
58 * be used instead.
59 */
60 static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
61 const unsigned int offset,
62 u16 *value)
63 {
64 __le16 reg;
65 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
66 USB_VENDOR_REQUEST_IN, offset,
67 &reg, sizeof(reg), REGISTER_TIMEOUT);
68 *value = le16_to_cpu(reg);
69 }
70
71 static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
72 const unsigned int offset,
73 u16 *value)
74 {
75 __le16 reg;
76 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
77 USB_VENDOR_REQUEST_IN, offset,
78 &reg, sizeof(reg), REGISTER_TIMEOUT);
79 *value = le16_to_cpu(reg);
80 }
81
82 static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
83 const unsigned int offset,
84 void *value, const u16 length)
85 {
86 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
87 USB_VENDOR_REQUEST_IN, offset,
88 value, length,
89 REGISTER_TIMEOUT16(length));
90 }
91
92 static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
93 const unsigned int offset,
94 u16 value)
95 {
96 __le16 reg = cpu_to_le16(value);
97 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
98 USB_VENDOR_REQUEST_OUT, offset,
99 &reg, sizeof(reg), REGISTER_TIMEOUT);
100 }
101
102 static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
103 const unsigned int offset,
104 u16 value)
105 {
106 __le16 reg = cpu_to_le16(value);
107 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
108 USB_VENDOR_REQUEST_OUT, offset,
109 &reg, sizeof(reg), REGISTER_TIMEOUT);
110 }
111
112 static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
113 const unsigned int offset,
114 void *value, const u16 length)
115 {
116 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
117 USB_VENDOR_REQUEST_OUT, offset,
118 value, length,
119 REGISTER_TIMEOUT16(length));
120 }
121
122 static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
123 const unsigned int offset,
124 struct rt2x00_field16 field,
125 u16 *reg)
126 {
127 unsigned int i;
128
129 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
130 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
131 if (!rt2x00_get_field16(*reg, field))
132 return 1;
133 udelay(REGISTER_BUSY_DELAY);
134 }
135
136 ERROR(rt2x00dev, "Indirect register access failed: "
137 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
138 *reg = ~0;
139
140 return 0;
141 }
142
143 #define WAIT_FOR_BBP(__dev, __reg) \
144 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
145 #define WAIT_FOR_RF(__dev, __reg) \
146 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
147
148 static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
149 const unsigned int word, const u8 value)
150 {
151 u16 reg;
152
153 mutex_lock(&rt2x00dev->csr_mutex);
154
155 /*
156 * Wait until the BBP becomes available, afterwards we
157 * can safely write the new data into the register.
158 */
159 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
160 reg = 0;
161 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
162 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
163 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
164
165 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
166 }
167
168 mutex_unlock(&rt2x00dev->csr_mutex);
169 }
170
171 static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
172 const unsigned int word, u8 *value)
173 {
174 u16 reg;
175
176 mutex_lock(&rt2x00dev->csr_mutex);
177
178 /*
179 * Wait until the BBP becomes available, afterwards we
180 * can safely write the read request into the register.
181 * After the data has been written, we wait until hardware
182 * returns the correct value, if at any time the register
183 * doesn't become available in time, reg will be 0xffffffff
184 * which means we return 0xff to the caller.
185 */
186 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
187 reg = 0;
188 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
189 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
190
191 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
192
193 if (WAIT_FOR_BBP(rt2x00dev, &reg))
194 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
195 }
196
197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
198
199 mutex_unlock(&rt2x00dev->csr_mutex);
200 }
201
202 static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
203 const unsigned int word, const u32 value)
204 {
205 u16 reg;
206
207 mutex_lock(&rt2x00dev->csr_mutex);
208
209 /*
210 * Wait until the RF becomes available, afterwards we
211 * can safely write the new data into the register.
212 */
213 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
214 reg = 0;
215 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
216 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
217
218 reg = 0;
219 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
220 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
221 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
223
224 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
225 rt2x00_rf_write(rt2x00dev, word, value);
226 }
227
228 mutex_unlock(&rt2x00dev->csr_mutex);
229 }
230
231 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
232 static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
233 const unsigned int offset,
234 u32 *value)
235 {
236 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
237 }
238
239 static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
240 const unsigned int offset,
241 u32 value)
242 {
243 rt2500usb_register_write(rt2x00dev, offset, value);
244 }
245
246 static const struct rt2x00debug rt2500usb_rt2x00debug = {
247 .owner = THIS_MODULE,
248 .csr = {
249 .read = _rt2500usb_register_read,
250 .write = _rt2500usb_register_write,
251 .flags = RT2X00DEBUGFS_OFFSET,
252 .word_base = CSR_REG_BASE,
253 .word_size = sizeof(u16),
254 .word_count = CSR_REG_SIZE / sizeof(u16),
255 },
256 .eeprom = {
257 .read = rt2x00_eeprom_read,
258 .write = rt2x00_eeprom_write,
259 .word_base = EEPROM_BASE,
260 .word_size = sizeof(u16),
261 .word_count = EEPROM_SIZE / sizeof(u16),
262 },
263 .bbp = {
264 .read = rt2500usb_bbp_read,
265 .write = rt2500usb_bbp_write,
266 .word_base = BBP_BASE,
267 .word_size = sizeof(u8),
268 .word_count = BBP_SIZE / sizeof(u8),
269 },
270 .rf = {
271 .read = rt2x00_rf_read,
272 .write = rt2500usb_rf_write,
273 .word_base = RF_BASE,
274 .word_size = sizeof(u32),
275 .word_count = RF_SIZE / sizeof(u32),
276 },
277 };
278 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
279
280 static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
281 {
282 u16 reg;
283
284 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
285 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
286 }
287
288 #ifdef CONFIG_RT2X00_LIB_LEDS
289 static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
290 enum led_brightness brightness)
291 {
292 struct rt2x00_led *led =
293 container_of(led_cdev, struct rt2x00_led, led_dev);
294 unsigned int enabled = brightness != LED_OFF;
295 u16 reg;
296
297 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
298
299 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
300 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
301 else if (led->type == LED_TYPE_ACTIVITY)
302 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
303
304 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
305 }
306
307 static int rt2500usb_blink_set(struct led_classdev *led_cdev,
308 unsigned long *delay_on,
309 unsigned long *delay_off)
310 {
311 struct rt2x00_led *led =
312 container_of(led_cdev, struct rt2x00_led, led_dev);
313 u16 reg;
314
315 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
316 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
317 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
318 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
319
320 return 0;
321 }
322
323 static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
324 struct rt2x00_led *led,
325 enum led_type type)
326 {
327 led->rt2x00dev = rt2x00dev;
328 led->type = type;
329 led->led_dev.brightness_set = rt2500usb_brightness_set;
330 led->led_dev.blink_set = rt2500usb_blink_set;
331 led->flags = LED_INITIALIZED;
332 }
333 #endif /* CONFIG_RT2X00_LIB_LEDS */
334
335 /*
336 * Configuration handlers.
337 */
338
339 /*
340 * rt2500usb does not differentiate between shared and pairwise
341 * keys, so we should use the same function for both key types.
342 */
343 static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
344 struct rt2x00lib_crypto *crypto,
345 struct ieee80211_key_conf *key)
346 {
347 int timeout;
348 u32 mask;
349 u16 reg;
350
351 if (crypto->cmd == SET_KEY) {
352 /*
353 * Pairwise key will always be entry 0, but this
354 * could collide with a shared key on the same
355 * position...
356 */
357 mask = TXRX_CSR0_KEY_ID.bit_mask;
358
359 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
360 reg &= mask;
361
362 if (reg && reg == mask)
363 return -ENOSPC;
364
365 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
366
367 key->hw_key_idx += reg ? ffz(reg) : 0;
368
369 /*
370 * The encryption key doesn't fit within the CSR cache,
371 * this means we should allocate it seperately and use
372 * rt2x00usb_vendor_request() to send the key to the hardware.
373 */
374 reg = KEY_ENTRY(key->hw_key_idx);
375 timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
376 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
377 USB_VENDOR_REQUEST_OUT, reg,
378 crypto->key,
379 sizeof(crypto->key),
380 timeout);
381
382 /*
383 * The driver does not support the IV/EIV generation
384 * in hardware. However it demands the data to be provided
385 * both seperately as well as inside the frame.
386 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
387 * to ensure rt2x00lib will not strip the data from the
388 * frame after the copy, now we must tell mac80211
389 * to generate the IV/EIV data.
390 */
391 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
392 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
393 }
394
395 /*
396 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
397 * a particular key is valid.
398 */
399 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
400 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
401 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
402
403 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
404 if (crypto->cmd == SET_KEY)
405 mask |= 1 << key->hw_key_idx;
406 else if (crypto->cmd == DISABLE_KEY)
407 mask &= ~(1 << key->hw_key_idx);
408 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
409 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
410
411 return 0;
412 }
413
414 static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
415 const unsigned int filter_flags)
416 {
417 u16 reg;
418
419 /*
420 * Start configuration steps.
421 * Note that the version error will always be dropped
422 * and broadcast frames will always be accepted since
423 * there is no filter for it at this time.
424 */
425 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
426 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
427 !(filter_flags & FIF_FCSFAIL));
428 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
429 !(filter_flags & FIF_PLCPFAIL));
430 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
431 !(filter_flags & FIF_CONTROL));
432 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
433 !(filter_flags & FIF_PROMISC_IN_BSS));
434 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
435 !(filter_flags & FIF_PROMISC_IN_BSS) &&
436 !rt2x00dev->intf_ap_count);
437 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
438 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
439 !(filter_flags & FIF_ALLMULTI));
440 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
441 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
442 }
443
444 static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
445 struct rt2x00_intf *intf,
446 struct rt2x00intf_conf *conf,
447 const unsigned int flags)
448 {
449 unsigned int bcn_preload;
450 u16 reg;
451
452 if (flags & CONFIG_UPDATE_TYPE) {
453 /*
454 * Enable beacon config
455 */
456 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
457 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
458 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
459 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
460 2 * (conf->type != NL80211_IFTYPE_STATION));
461 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
462
463 /*
464 * Enable synchronisation.
465 */
466 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
467 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
468 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
469
470 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
471 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
472 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
473 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
474 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
475 }
476
477 if (flags & CONFIG_UPDATE_MAC)
478 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
479 (3 * sizeof(__le16)));
480
481 if (flags & CONFIG_UPDATE_BSSID)
482 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
483 (3 * sizeof(__le16)));
484 }
485
486 static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
487 struct rt2x00lib_erp *erp)
488 {
489 u16 reg;
490
491 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
492 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
493 !!erp->short_preamble);
494 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
495
496 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
497
498 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
499 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, erp->beacon_int * 4);
500 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
501
502 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
503 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
504 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
505 }
506
507 static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
508 struct antenna_setup *ant)
509 {
510 u8 r2;
511 u8 r14;
512 u16 csr5;
513 u16 csr6;
514
515 /*
516 * We should never come here because rt2x00lib is supposed
517 * to catch this and send us the correct antenna explicitely.
518 */
519 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
520 ant->tx == ANTENNA_SW_DIVERSITY);
521
522 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
523 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
524 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
525 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
526
527 /*
528 * Configure the TX antenna.
529 */
530 switch (ant->tx) {
531 case ANTENNA_HW_DIVERSITY:
532 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
533 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
534 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
535 break;
536 case ANTENNA_A:
537 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
538 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
539 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
540 break;
541 case ANTENNA_B:
542 default:
543 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
544 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
545 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
546 break;
547 }
548
549 /*
550 * Configure the RX antenna.
551 */
552 switch (ant->rx) {
553 case ANTENNA_HW_DIVERSITY:
554 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
555 break;
556 case ANTENNA_A:
557 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
558 break;
559 case ANTENNA_B:
560 default:
561 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
562 break;
563 }
564
565 /*
566 * RT2525E and RT5222 need to flip TX I/Q
567 */
568 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
569 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
570 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
571 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
572 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
573
574 /*
575 * RT2525E does not need RX I/Q Flip.
576 */
577 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
578 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
579 } else {
580 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
581 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
582 }
583
584 rt2500usb_bbp_write(rt2x00dev, 2, r2);
585 rt2500usb_bbp_write(rt2x00dev, 14, r14);
586 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
587 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
588 }
589
590 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
591 struct rf_channel *rf, const int txpower)
592 {
593 /*
594 * Set TXpower.
595 */
596 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
597
598 /*
599 * For RT2525E we should first set the channel to half band higher.
600 */
601 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
602 static const u32 vals[] = {
603 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
604 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
605 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
606 0x00000902, 0x00000906
607 };
608
609 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
610 if (rf->rf4)
611 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
612 }
613
614 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
615 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
616 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
617 if (rf->rf4)
618 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
619 }
620
621 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
622 const int txpower)
623 {
624 u32 rf3;
625
626 rt2x00_rf_read(rt2x00dev, 3, &rf3);
627 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
628 rt2500usb_rf_write(rt2x00dev, 3, rf3);
629 }
630
631 static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
632 struct rt2x00lib_conf *libconf)
633 {
634 enum dev_state state =
635 (libconf->conf->flags & IEEE80211_CONF_PS) ?
636 STATE_SLEEP : STATE_AWAKE;
637 u16 reg;
638
639 if (state == STATE_SLEEP) {
640 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
641 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
642 rt2x00dev->beacon_int - 20);
643 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
644 libconf->conf->listen_interval - 1);
645
646 /* We must first disable autowake before it can be enabled */
647 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
648 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
649
650 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
651 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
652 }
653
654 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
655 }
656
657 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
658 struct rt2x00lib_conf *libconf,
659 const unsigned int flags)
660 {
661 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
662 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
663 libconf->conf->power_level);
664 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
665 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
666 rt2500usb_config_txpower(rt2x00dev,
667 libconf->conf->power_level);
668 if (flags & IEEE80211_CONF_CHANGE_PS)
669 rt2500usb_config_ps(rt2x00dev, libconf);
670 }
671
672 /*
673 * Link tuning
674 */
675 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
676 struct link_qual *qual)
677 {
678 u16 reg;
679
680 /*
681 * Update FCS error count from register.
682 */
683 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
684 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
685
686 /*
687 * Update False CCA count from register.
688 */
689 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
690 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
691 }
692
693 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
694 struct link_qual *qual)
695 {
696 u16 eeprom;
697 u16 value;
698
699 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
700 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
701 rt2500usb_bbp_write(rt2x00dev, 24, value);
702
703 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
704 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
705 rt2500usb_bbp_write(rt2x00dev, 25, value);
706
707 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
708 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
709 rt2500usb_bbp_write(rt2x00dev, 61, value);
710
711 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
712 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
713 rt2500usb_bbp_write(rt2x00dev, 17, value);
714
715 qual->vgc_level = value;
716 }
717
718 /*
719 * NOTE: This function is directly ported from legacy driver, but
720 * despite it being declared it was never called. Although link tuning
721 * sounds like a good idea, and usually works well for the other drivers,
722 * it does _not_ work with rt2500usb. Enabling this function will result
723 * in TX capabilities only until association kicks in. Immediately
724 * after the successful association all TX frames will be kept in the
725 * hardware queue and never transmitted.
726 */
727 #if 0
728 static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
729 {
730 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
731 u16 bbp_thresh;
732 u16 vgc_bound;
733 u16 sens;
734 u16 r24;
735 u16 r25;
736 u16 r61;
737 u16 r17_sens;
738 u8 r17;
739 u8 up_bound;
740 u8 low_bound;
741
742 /*
743 * Read current r17 value, as well as the sensitivity values
744 * for the r17 register.
745 */
746 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
747 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
748
749 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
750 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
751 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
752
753 /*
754 * If we are not associated, we should go straight to the
755 * dynamic CCA tuning.
756 */
757 if (!rt2x00dev->intf_associated)
758 goto dynamic_cca_tune;
759
760 /*
761 * Determine the BBP tuning threshold and correctly
762 * set BBP 24, 25 and 61.
763 */
764 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
765 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
766
767 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
768 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
769 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
770
771 if ((rssi + bbp_thresh) > 0) {
772 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
773 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
774 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
775 } else {
776 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
777 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
778 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
779 }
780
781 rt2500usb_bbp_write(rt2x00dev, 24, r24);
782 rt2500usb_bbp_write(rt2x00dev, 25, r25);
783 rt2500usb_bbp_write(rt2x00dev, 61, r61);
784
785 /*
786 * A too low RSSI will cause too much false CCA which will
787 * then corrupt the R17 tuning. To remidy this the tuning should
788 * be stopped (While making sure the R17 value will not exceed limits)
789 */
790 if (rssi >= -40) {
791 if (r17 != 0x60)
792 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
793 return;
794 }
795
796 /*
797 * Special big-R17 for short distance
798 */
799 if (rssi >= -58) {
800 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
801 if (r17 != sens)
802 rt2500usb_bbp_write(rt2x00dev, 17, sens);
803 return;
804 }
805
806 /*
807 * Special mid-R17 for middle distance
808 */
809 if (rssi >= -74) {
810 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
811 if (r17 != sens)
812 rt2500usb_bbp_write(rt2x00dev, 17, sens);
813 return;
814 }
815
816 /*
817 * Leave short or middle distance condition, restore r17
818 * to the dynamic tuning range.
819 */
820 low_bound = 0x32;
821 if (rssi < -77)
822 up_bound -= (-77 - rssi);
823
824 if (up_bound < low_bound)
825 up_bound = low_bound;
826
827 if (r17 > up_bound) {
828 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
829 rt2x00dev->link.vgc_level = up_bound;
830 return;
831 }
832
833 dynamic_cca_tune:
834
835 /*
836 * R17 is inside the dynamic tuning range,
837 * start tuning the link based on the false cca counter.
838 */
839 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
840 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
841 rt2x00dev->link.vgc_level = r17;
842 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
843 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
844 rt2x00dev->link.vgc_level = r17;
845 }
846 }
847 #else
848 #define rt2500usb_link_tuner NULL
849 #endif
850
851 /*
852 * Initialization functions.
853 */
854 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
855 {
856 u16 reg;
857
858 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
859 USB_MODE_TEST, REGISTER_TIMEOUT);
860 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
861 0x00f0, REGISTER_TIMEOUT);
862
863 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
864 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
865 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
866
867 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
868 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
869
870 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
871 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
872 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
873 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
874 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
875
876 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
877 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
878 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
879 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
880 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
881
882 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
883 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
884 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
885 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
886 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
887 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
888
889 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
890 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
891 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
892 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
893 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
894 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
895
896 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
897 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
898 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
899 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
900 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
901 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
902
903 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
904 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
905 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
906 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
907 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
908 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
909
910 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
911 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
912 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
913 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
914 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
915 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
916
917 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
918 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
919
920 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
921 return -EBUSY;
922
923 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
924 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
925 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
926 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
927 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
928
929 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
930 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
931 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
932 } else {
933 reg = 0;
934 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
935 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
936 }
937 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
938
939 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
940 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
941 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
942 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
943
944 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
945 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
946 rt2x00dev->rx->data_size);
947 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
948
949 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
950 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
951 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
952 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
953
954 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
955 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
956 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
957
958 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
959 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
960 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
961
962 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
963 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
964 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
965
966 return 0;
967 }
968
969 static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
970 {
971 unsigned int i;
972 u8 value;
973
974 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
975 rt2500usb_bbp_read(rt2x00dev, 0, &value);
976 if ((value != 0xff) && (value != 0x00))
977 return 0;
978 udelay(REGISTER_BUSY_DELAY);
979 }
980
981 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
982 return -EACCES;
983 }
984
985 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
986 {
987 unsigned int i;
988 u16 eeprom;
989 u8 value;
990 u8 reg_id;
991
992 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
993 return -EACCES;
994
995 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
996 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
997 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
998 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
999 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
1000 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
1001 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
1002 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
1003 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
1004 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
1005 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
1006 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
1007 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
1008 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
1009 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
1010 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
1011 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
1012 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
1013 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
1014 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
1015 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
1016 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
1017 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
1018 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
1019 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
1020 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
1021 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
1022 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
1023 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
1024 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
1025 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
1026
1027 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1028 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1029
1030 if (eeprom != 0xffff && eeprom != 0x0000) {
1031 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1032 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1033 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
1034 }
1035 }
1036
1037 return 0;
1038 }
1039
1040 /*
1041 * Device state switch handlers.
1042 */
1043 static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1044 enum dev_state state)
1045 {
1046 u16 reg;
1047
1048 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1049 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
1050 (state == STATE_RADIO_RX_OFF) ||
1051 (state == STATE_RADIO_RX_OFF_LINK));
1052 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1053 }
1054
1055 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1056 {
1057 /*
1058 * Initialize all registers.
1059 */
1060 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
1061 rt2500usb_init_bbp(rt2x00dev)))
1062 return -EIO;
1063
1064 return 0;
1065 }
1066
1067 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1068 {
1069 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
1070 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
1071
1072 /*
1073 * Disable synchronisation.
1074 */
1075 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1076
1077 rt2x00usb_disable_radio(rt2x00dev);
1078 }
1079
1080 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1081 enum dev_state state)
1082 {
1083 u16 reg;
1084 u16 reg2;
1085 unsigned int i;
1086 char put_to_sleep;
1087 char bbp_state;
1088 char rf_state;
1089
1090 put_to_sleep = (state != STATE_AWAKE);
1091
1092 reg = 0;
1093 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1094 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1095 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1096 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1097 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1098 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1099
1100 /*
1101 * Device is not guaranteed to be in the requested state yet.
1102 * We must wait until the register indicates that the
1103 * device has entered the correct state.
1104 */
1105 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1106 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1107 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1108 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1109 if (bbp_state == state && rf_state == state)
1110 return 0;
1111 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1112 msleep(30);
1113 }
1114
1115 return -EBUSY;
1116 }
1117
1118 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1119 enum dev_state state)
1120 {
1121 int retval = 0;
1122
1123 switch (state) {
1124 case STATE_RADIO_ON:
1125 retval = rt2500usb_enable_radio(rt2x00dev);
1126 break;
1127 case STATE_RADIO_OFF:
1128 rt2500usb_disable_radio(rt2x00dev);
1129 break;
1130 case STATE_RADIO_RX_ON:
1131 case STATE_RADIO_RX_ON_LINK:
1132 case STATE_RADIO_RX_OFF:
1133 case STATE_RADIO_RX_OFF_LINK:
1134 rt2500usb_toggle_rx(rt2x00dev, state);
1135 break;
1136 case STATE_RADIO_IRQ_ON:
1137 case STATE_RADIO_IRQ_OFF:
1138 /* No support, but no error either */
1139 break;
1140 case STATE_DEEP_SLEEP:
1141 case STATE_SLEEP:
1142 case STATE_STANDBY:
1143 case STATE_AWAKE:
1144 retval = rt2500usb_set_state(rt2x00dev, state);
1145 break;
1146 default:
1147 retval = -ENOTSUPP;
1148 break;
1149 }
1150
1151 if (unlikely(retval))
1152 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1153 state, retval);
1154
1155 return retval;
1156 }
1157
1158 /*
1159 * TX descriptor initialization
1160 */
1161 static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1162 struct sk_buff *skb,
1163 struct txentry_desc *txdesc)
1164 {
1165 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1166 __le32 *txd = skbdesc->desc;
1167 u32 word;
1168
1169 /*
1170 * Start writing the descriptor words.
1171 */
1172 rt2x00_desc_read(txd, 1, &word);
1173 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1174 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1175 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1176 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1177 rt2x00_desc_write(txd, 1, word);
1178
1179 rt2x00_desc_read(txd, 2, &word);
1180 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1181 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1182 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1183 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1184 rt2x00_desc_write(txd, 2, word);
1185
1186 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1187 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1188 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1189 }
1190
1191 rt2x00_desc_read(txd, 0, &word);
1192 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1193 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1194 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1195 rt2x00_set_field32(&word, TXD_W0_ACK,
1196 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1197 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1198 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1199 rt2x00_set_field32(&word, TXD_W0_OFDM,
1200 (txdesc->rate_mode == RATE_MODE_OFDM));
1201 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1202 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1203 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1204 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
1205 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1206 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1207 rt2x00_desc_write(txd, 0, word);
1208 }
1209
1210 /*
1211 * TX data initialization
1212 */
1213 static void rt2500usb_beacondone(struct urb *urb);
1214
1215 static void rt2500usb_write_beacon(struct queue_entry *entry)
1216 {
1217 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1218 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1219 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1220 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1221 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1222 int length;
1223 u16 reg;
1224
1225 /*
1226 * Add the descriptor in front of the skb.
1227 */
1228 skb_push(entry->skb, entry->queue->desc_size);
1229 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1230 skbdesc->desc = entry->skb->data;
1231
1232 /*
1233 * Disable beaconing while we are reloading the beacon data,
1234 * otherwise we might be sending out invalid data.
1235 */
1236 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1237 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1238 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1239
1240 /*
1241 * USB devices cannot blindly pass the skb->len as the
1242 * length of the data to usb_fill_bulk_urb. Pass the skb
1243 * to the driver to determine what the length should be.
1244 */
1245 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1246
1247 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1248 entry->skb->data, length, rt2500usb_beacondone,
1249 entry);
1250
1251 /*
1252 * Second we need to create the guardian byte.
1253 * We only need a single byte, so lets recycle
1254 * the 'flags' field we are not using for beacons.
1255 */
1256 bcn_priv->guardian_data = 0;
1257 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1258 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1259 entry);
1260
1261 /*
1262 * Send out the guardian byte.
1263 */
1264 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1265 }
1266
1267 static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1268 {
1269 int length;
1270
1271 /*
1272 * The length _must_ be a multiple of 2,
1273 * but it must _not_ be a multiple of the USB packet size.
1274 */
1275 length = roundup(entry->skb->len, 2);
1276 length += (2 * !(length % entry->queue->usb_maxpacket));
1277
1278 return length;
1279 }
1280
1281 static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1282 const enum data_queue_qid queue)
1283 {
1284 u16 reg, reg0;
1285
1286 if (queue != QID_BEACON) {
1287 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
1288 return;
1289 }
1290
1291 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1292 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1293 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1294 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
1295 reg0 = reg;
1296 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1297 /*
1298 * Beacon generation will fail initially.
1299 * To prevent this we need to change the TXRX_CSR19
1300 * register several times (reg0 is the same as reg
1301 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1302 * and 1 in reg).
1303 */
1304 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1305 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1306 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1307 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1308 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1309 }
1310 }
1311
1312 /*
1313 * RX control handlers
1314 */
1315 static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1316 struct rxdone_entry_desc *rxdesc)
1317 {
1318 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1319 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1320 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1321 __le32 *rxd =
1322 (__le32 *)(entry->skb->data +
1323 (entry_priv->urb->actual_length -
1324 entry->queue->desc_size));
1325 u32 word0;
1326 u32 word1;
1327
1328 /*
1329 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1330 * frame data in rt2x00usb.
1331 */
1332 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1333 rxd = (__le32 *)skbdesc->desc;
1334
1335 /*
1336 * It is now safe to read the descriptor on all architectures.
1337 */
1338 rt2x00_desc_read(rxd, 0, &word0);
1339 rt2x00_desc_read(rxd, 1, &word1);
1340
1341 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1342 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1343 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1344 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1345
1346 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
1347 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1348 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1349 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1350 }
1351
1352 if (rxdesc->cipher != CIPHER_NONE) {
1353 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1354 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
1355 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1356
1357 /* ICV is located at the end of frame */
1358
1359 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1360 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1361 rxdesc->flags |= RX_FLAG_DECRYPTED;
1362 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1363 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1364 }
1365
1366 /*
1367 * Obtain the status about this packet.
1368 * When frame was received with an OFDM bitrate,
1369 * the signal is the PLCP value. If it was received with
1370 * a CCK bitrate the signal is the rate in 100kbit/s.
1371 */
1372 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1373 rxdesc->rssi =
1374 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1375 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1376
1377 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1378 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1379 else
1380 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1381 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1382 rxdesc->dev_flags |= RXDONE_MY_BSS;
1383
1384 /*
1385 * Adjust the skb memory window to the frame boundaries.
1386 */
1387 skb_trim(entry->skb, rxdesc->size);
1388 }
1389
1390 /*
1391 * Interrupt functions.
1392 */
1393 static void rt2500usb_beacondone(struct urb *urb)
1394 {
1395 struct queue_entry *entry = (struct queue_entry *)urb->context;
1396 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1397
1398 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1399 return;
1400
1401 /*
1402 * Check if this was the guardian beacon,
1403 * if that was the case we need to send the real beacon now.
1404 * Otherwise we should free the sk_buffer, the device
1405 * should be doing the rest of the work now.
1406 */
1407 if (bcn_priv->guardian_urb == urb) {
1408 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1409 } else if (bcn_priv->urb == urb) {
1410 dev_kfree_skb(entry->skb);
1411 entry->skb = NULL;
1412 }
1413 }
1414
1415 /*
1416 * Device probe functions.
1417 */
1418 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1419 {
1420 u16 word;
1421 u8 *mac;
1422 u8 bbp;
1423
1424 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1425
1426 /*
1427 * Start validation of the data that has been read.
1428 */
1429 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1430 if (!is_valid_ether_addr(mac)) {
1431 random_ether_addr(mac);
1432 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
1433 }
1434
1435 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1436 if (word == 0xffff) {
1437 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1438 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1439 ANTENNA_SW_DIVERSITY);
1440 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1441 ANTENNA_SW_DIVERSITY);
1442 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1443 LED_MODE_DEFAULT);
1444 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1445 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1446 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1447 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1448 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1449 }
1450
1451 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1452 if (word == 0xffff) {
1453 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1454 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1455 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1456 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1457 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1458 }
1459
1460 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1461 if (word == 0xffff) {
1462 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1463 DEFAULT_RSSI_OFFSET);
1464 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1465 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1466 }
1467
1468 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1469 if (word == 0xffff) {
1470 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1471 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1472 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1473 }
1474
1475 /*
1476 * Switch lower vgc bound to current BBP R17 value,
1477 * lower the value a bit for better quality.
1478 */
1479 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1480 bbp -= 6;
1481
1482 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1483 if (word == 0xffff) {
1484 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1485 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1486 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1487 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1488 } else {
1489 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1490 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1491 }
1492
1493 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1494 if (word == 0xffff) {
1495 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1496 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1497 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1498 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1499 }
1500
1501 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1502 if (word == 0xffff) {
1503 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1504 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1505 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1506 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1507 }
1508
1509 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1510 if (word == 0xffff) {
1511 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1512 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1513 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1514 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1515 }
1516
1517 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1518 if (word == 0xffff) {
1519 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1520 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1521 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1522 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1523 }
1524
1525 return 0;
1526 }
1527
1528 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1529 {
1530 u16 reg;
1531 u16 value;
1532 u16 eeprom;
1533
1534 /*
1535 * Read EEPROM word for configuration.
1536 */
1537 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1538
1539 /*
1540 * Identify RF chipset.
1541 */
1542 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1543 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1544 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1545
1546 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0) ||
1547 rt2x00_check_rev(&rt2x00dev->chip, 0x0000000f, 0)) {
1548
1549 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1550 return -ENODEV;
1551 }
1552
1553 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1554 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1555 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1556 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1557 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1558 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1559 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1560 return -ENODEV;
1561 }
1562
1563 /*
1564 * Identify default antenna configuration.
1565 */
1566 rt2x00dev->default_ant.tx =
1567 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1568 rt2x00dev->default_ant.rx =
1569 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1570
1571 /*
1572 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1573 * I am not 100% sure about this, but the legacy drivers do not
1574 * indicate antenna swapping in software is required when
1575 * diversity is enabled.
1576 */
1577 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1578 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1579 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1580 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1581
1582 /*
1583 * Store led mode, for correct led behaviour.
1584 */
1585 #ifdef CONFIG_RT2X00_LIB_LEDS
1586 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1587
1588 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1589 if (value == LED_MODE_TXRX_ACTIVITY ||
1590 value == LED_MODE_DEFAULT ||
1591 value == LED_MODE_ASUS)
1592 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1593 LED_TYPE_ACTIVITY);
1594 #endif /* CONFIG_RT2X00_LIB_LEDS */
1595
1596 /*
1597 * Detect if this device has an hardware controlled radio.
1598 */
1599 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1600 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
1601
1602 /*
1603 * Check if the BBP tuning should be disabled.
1604 */
1605 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1606 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1607 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1608
1609 /*
1610 * Read the RSSI <-> dBm offset information.
1611 */
1612 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1613 rt2x00dev->rssi_offset =
1614 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1615
1616 return 0;
1617 }
1618
1619 /*
1620 * RF value list for RF2522
1621 * Supports: 2.4 GHz
1622 */
1623 static const struct rf_channel rf_vals_bg_2522[] = {
1624 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1625 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1626 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1627 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1628 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1629 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1630 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1631 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1632 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1633 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1634 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1635 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1636 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1637 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1638 };
1639
1640 /*
1641 * RF value list for RF2523
1642 * Supports: 2.4 GHz
1643 */
1644 static const struct rf_channel rf_vals_bg_2523[] = {
1645 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1646 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1647 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1648 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1649 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1650 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1651 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1652 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1653 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1654 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1655 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1656 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1657 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1658 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1659 };
1660
1661 /*
1662 * RF value list for RF2524
1663 * Supports: 2.4 GHz
1664 */
1665 static const struct rf_channel rf_vals_bg_2524[] = {
1666 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1667 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1668 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1669 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1670 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1671 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1672 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1673 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1674 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1675 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1676 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1677 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1678 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1679 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1680 };
1681
1682 /*
1683 * RF value list for RF2525
1684 * Supports: 2.4 GHz
1685 */
1686 static const struct rf_channel rf_vals_bg_2525[] = {
1687 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1688 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1689 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1690 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1691 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1692 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1693 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1694 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1695 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1696 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1697 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1698 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1699 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1700 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1701 };
1702
1703 /*
1704 * RF value list for RF2525e
1705 * Supports: 2.4 GHz
1706 */
1707 static const struct rf_channel rf_vals_bg_2525e[] = {
1708 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1709 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1710 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1711 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1712 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1713 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1714 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1715 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1716 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1717 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1718 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1719 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1720 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1721 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1722 };
1723
1724 /*
1725 * RF value list for RF5222
1726 * Supports: 2.4 GHz & 5.2 GHz
1727 */
1728 static const struct rf_channel rf_vals_5222[] = {
1729 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1730 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1731 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1732 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1733 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1734 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1735 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1736 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1737 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1738 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1739 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1740 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1741 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1742 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1743
1744 /* 802.11 UNI / HyperLan 2 */
1745 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1746 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1747 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1748 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1749 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1750 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1751 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1752 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1753
1754 /* 802.11 HyperLan 2 */
1755 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1756 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1757 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1758 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1759 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1760 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1761 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1762 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1763 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1764 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1765
1766 /* 802.11 UNII */
1767 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1768 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1769 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1770 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1771 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1772 };
1773
1774 static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1775 {
1776 struct hw_mode_spec *spec = &rt2x00dev->spec;
1777 struct channel_info *info;
1778 char *tx_power;
1779 unsigned int i;
1780
1781 /*
1782 * Initialize all hw fields.
1783 */
1784 rt2x00dev->hw->flags =
1785 IEEE80211_HW_RX_INCLUDES_FCS |
1786 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1787 IEEE80211_HW_SIGNAL_DBM |
1788 IEEE80211_HW_SUPPORTS_PS |
1789 IEEE80211_HW_PS_NULLFUNC_STACK;
1790
1791 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1792
1793 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1794 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1795 rt2x00_eeprom_addr(rt2x00dev,
1796 EEPROM_MAC_ADDR_0));
1797
1798 /*
1799 * Initialize hw_mode information.
1800 */
1801 spec->supported_bands = SUPPORT_BAND_2GHZ;
1802 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1803
1804 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1805 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1806 spec->channels = rf_vals_bg_2522;
1807 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1808 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1809 spec->channels = rf_vals_bg_2523;
1810 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1811 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1812 spec->channels = rf_vals_bg_2524;
1813 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1814 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1815 spec->channels = rf_vals_bg_2525;
1816 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1817 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1818 spec->channels = rf_vals_bg_2525e;
1819 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1820 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1821 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1822 spec->channels = rf_vals_5222;
1823 }
1824
1825 /*
1826 * Create channel information array
1827 */
1828 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1829 if (!info)
1830 return -ENOMEM;
1831
1832 spec->channels_info = info;
1833
1834 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1835 for (i = 0; i < 14; i++)
1836 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1837
1838 if (spec->num_channels > 14) {
1839 for (i = 14; i < spec->num_channels; i++)
1840 info[i].tx_power1 = DEFAULT_TXPOWER;
1841 }
1842
1843 return 0;
1844 }
1845
1846 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1847 {
1848 int retval;
1849
1850 /*
1851 * Allocate eeprom data.
1852 */
1853 retval = rt2500usb_validate_eeprom(rt2x00dev);
1854 if (retval)
1855 return retval;
1856
1857 retval = rt2500usb_init_eeprom(rt2x00dev);
1858 if (retval)
1859 return retval;
1860
1861 /*
1862 * Initialize hw specifications.
1863 */
1864 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1865 if (retval)
1866 return retval;
1867
1868 /*
1869 * This device requires the atim queue
1870 */
1871 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1872 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
1873 if (!modparam_nohwcrypt) {
1874 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
1875 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
1876 }
1877 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1878
1879 /*
1880 * Set the rssi offset.
1881 */
1882 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1883
1884 return 0;
1885 }
1886
1887 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1888 .tx = rt2x00mac_tx,
1889 .start = rt2x00mac_start,
1890 .stop = rt2x00mac_stop,
1891 .add_interface = rt2x00mac_add_interface,
1892 .remove_interface = rt2x00mac_remove_interface,
1893 .config = rt2x00mac_config,
1894 .configure_filter = rt2x00mac_configure_filter,
1895 .set_tim = rt2x00mac_set_tim,
1896 .set_key = rt2x00mac_set_key,
1897 .get_stats = rt2x00mac_get_stats,
1898 .bss_info_changed = rt2x00mac_bss_info_changed,
1899 .conf_tx = rt2x00mac_conf_tx,
1900 .get_tx_stats = rt2x00mac_get_tx_stats,
1901 .rfkill_poll = rt2x00mac_rfkill_poll,
1902 };
1903
1904 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1905 .probe_hw = rt2500usb_probe_hw,
1906 .initialize = rt2x00usb_initialize,
1907 .uninitialize = rt2x00usb_uninitialize,
1908 .clear_entry = rt2x00usb_clear_entry,
1909 .set_device_state = rt2500usb_set_device_state,
1910 .rfkill_poll = rt2500usb_rfkill_poll,
1911 .link_stats = rt2500usb_link_stats,
1912 .reset_tuner = rt2500usb_reset_tuner,
1913 .link_tuner = rt2500usb_link_tuner,
1914 .write_tx_desc = rt2500usb_write_tx_desc,
1915 .write_tx_data = rt2x00usb_write_tx_data,
1916 .write_beacon = rt2500usb_write_beacon,
1917 .get_tx_data_len = rt2500usb_get_tx_data_len,
1918 .kick_tx_queue = rt2500usb_kick_tx_queue,
1919 .kill_tx_queue = rt2x00usb_kill_tx_queue,
1920 .fill_rxdone = rt2500usb_fill_rxdone,
1921 .config_shared_key = rt2500usb_config_key,
1922 .config_pairwise_key = rt2500usb_config_key,
1923 .config_filter = rt2500usb_config_filter,
1924 .config_intf = rt2500usb_config_intf,
1925 .config_erp = rt2500usb_config_erp,
1926 .config_ant = rt2500usb_config_ant,
1927 .config = rt2500usb_config,
1928 };
1929
1930 static const struct data_queue_desc rt2500usb_queue_rx = {
1931 .entry_num = RX_ENTRIES,
1932 .data_size = DATA_FRAME_SIZE,
1933 .desc_size = RXD_DESC_SIZE,
1934 .priv_size = sizeof(struct queue_entry_priv_usb),
1935 };
1936
1937 static const struct data_queue_desc rt2500usb_queue_tx = {
1938 .entry_num = TX_ENTRIES,
1939 .data_size = DATA_FRAME_SIZE,
1940 .desc_size = TXD_DESC_SIZE,
1941 .priv_size = sizeof(struct queue_entry_priv_usb),
1942 };
1943
1944 static const struct data_queue_desc rt2500usb_queue_bcn = {
1945 .entry_num = BEACON_ENTRIES,
1946 .data_size = MGMT_FRAME_SIZE,
1947 .desc_size = TXD_DESC_SIZE,
1948 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1949 };
1950
1951 static const struct data_queue_desc rt2500usb_queue_atim = {
1952 .entry_num = ATIM_ENTRIES,
1953 .data_size = DATA_FRAME_SIZE,
1954 .desc_size = TXD_DESC_SIZE,
1955 .priv_size = sizeof(struct queue_entry_priv_usb),
1956 };
1957
1958 static const struct rt2x00_ops rt2500usb_ops = {
1959 .name = KBUILD_MODNAME,
1960 .max_sta_intf = 1,
1961 .max_ap_intf = 1,
1962 .eeprom_size = EEPROM_SIZE,
1963 .rf_size = RF_SIZE,
1964 .tx_queues = NUM_TX_QUEUES,
1965 .rx = &rt2500usb_queue_rx,
1966 .tx = &rt2500usb_queue_tx,
1967 .bcn = &rt2500usb_queue_bcn,
1968 .atim = &rt2500usb_queue_atim,
1969 .lib = &rt2500usb_rt2x00_ops,
1970 .hw = &rt2500usb_mac80211_ops,
1971 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1972 .debugfs = &rt2500usb_rt2x00debug,
1973 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1974 };
1975
1976 /*
1977 * rt2500usb module information.
1978 */
1979 static struct usb_device_id rt2500usb_device_table[] = {
1980 /* ASUS */
1981 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1982 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1983 /* Belkin */
1984 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1985 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1986 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1987 /* Cisco Systems */
1988 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1989 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1990 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1991 /* CNet */
1992 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
1993 /* Conceptronic */
1994 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1995 /* D-LINK */
1996 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1997 /* Gigabyte */
1998 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1999 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
2000 /* Hercules */
2001 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
2002 /* Melco */
2003 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
2004 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
2005 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
2006 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
2007 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
2008 /* MSI */
2009 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
2010 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
2011 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
2012 /* Ralink */
2013 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
2014 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
2015 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
2016 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
2017 /* Sagem */
2018 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
2019 /* Siemens */
2020 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
2021 /* SMC */
2022 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
2023 /* Spairon */
2024 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
2025 /* SURECOM */
2026 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
2027 /* Trust */
2028 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
2029 /* VTech */
2030 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
2031 /* Zinwell */
2032 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
2033 { 0, }
2034 };
2035
2036 MODULE_AUTHOR(DRV_PROJECT);
2037 MODULE_VERSION(DRV_VERSION);
2038 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
2039 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
2040 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
2041 MODULE_LICENSE("GPL");
2042
2043 static struct usb_driver rt2500usb_driver = {
2044 .name = KBUILD_MODNAME,
2045 .id_table = rt2500usb_device_table,
2046 .probe = rt2x00usb_probe,
2047 .disconnect = rt2x00usb_disconnect,
2048 .suspend = rt2x00usb_suspend,
2049 .resume = rt2x00usb_resume,
2050 };
2051
2052 static int __init rt2500usb_init(void)
2053 {
2054 return usb_register(&rt2500usb_driver);
2055 }
2056
2057 static void __exit rt2500usb_exit(void)
2058 {
2059 usb_deregister(&rt2500usb_driver);
2060 }
2061
2062 module_init(rt2500usb_init);
2063 module_exit(rt2500usb_exit);
Linux kernel - Deliverables
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