drivers/net/wireless/rt2x00/rt2800mmio.h

   1 /*      Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
   2  *      Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
   3  *      Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   4  *      Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
   5  *      Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
   6  *      Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
   7  *      Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
   8  *      Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
   9  *      <http://rt2x00.serialmonkey.com>
  10  *
  11  *      This program is free software; you can redistribute it and/or modify
  12  *      it under the terms of the GNU General Public License as published by
  13  *      the Free Software Foundation; either version 2 of the License, or
  14  *      (at your option) any later version.
  15  *
  16  *      This program is distributed in the hope that it will be useful,
  17  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19  *      GNU General Public License for more details.
  20  *
  21  *      You should have received a copy of the GNU General Public License
  22  *      along with this program; if not, write to the
  23  *      Free Software Foundation, Inc.,
  24  *      59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  25  */
  26
  27 /*      Module: rt2800mmio
  28  *      Abstract: forward declarations for the rt2800mmio module.
  29  */
  30
  31 #ifndef RT2800MMIO_H
  32 #define RT2800MMIO_H
  33
  34 /*
  35  * DMA descriptor defines.
  36  */
  37 #define TXD_DESC_SIZE                   (4 * sizeof(__le32))
  38 #define RXD_DESC_SIZE                   (4 * sizeof(__le32))
  39
  40 /*
  41  * TX descriptor format for TX, PRIO and Beacon Ring.
  42  */
  43
  44 /*
  45  * Word0
  46  */
  47 #define TXD_W0_SD_PTR0                  FIELD32(0xffffffff)
  48
  49 /*
  50  * Word1
  51  */
  52 #define TXD_W1_SD_LEN1                  FIELD32(0x00003fff)
  53 #define TXD_W1_LAST_SEC1                FIELD32(0x00004000)
  54 #define TXD_W1_BURST                    FIELD32(0x00008000)
  55 #define TXD_W1_SD_LEN0                  FIELD32(0x3fff0000)
  56 #define TXD_W1_LAST_SEC0                FIELD32(0x40000000)
  57 #define TXD_W1_DMA_DONE                 FIELD32(0x80000000)
  58
  59 /*
  60  * Word2
  61  */
  62 #define TXD_W2_SD_PTR1                  FIELD32(0xffffffff)
  63
  64 /*
  65  * Word3
  66  * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
  67  * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
  68  *       0:MGMT, 1:HCCA 2:EDCA
  69  */
  70 #define TXD_W3_WIV                      FIELD32(0x01000000)
  71 #define TXD_W3_QSEL                     FIELD32(0x06000000)
  72 #define TXD_W3_TCO                      FIELD32(0x20000000)
  73 #define TXD_W3_UCO                      FIELD32(0x40000000)
  74 #define TXD_W3_ICO                      FIELD32(0x80000000)
  75
  76 /*
  77  * RX descriptor format for RX Ring.
  78  */
  79
  80 /*
  81  * Word0
  82  */
  83 #define RXD_W0_SDP0                     FIELD32(0xffffffff)
  84
  85 /*
  86  * Word1
  87  */
  88 #define RXD_W1_SDL1                     FIELD32(0x00003fff)
  89 #define RXD_W1_SDL0                     FIELD32(0x3fff0000)
  90 #define RXD_W1_LS0                      FIELD32(0x40000000)
  91 #define RXD_W1_DMA_DONE                 FIELD32(0x80000000)
  92
  93 /*
  94  * Word2
  95  */
  96 #define RXD_W2_SDP1                     FIELD32(0xffffffff)
  97
  98 /*
  99  * Word3
 100  * AMSDU: RX with 802.3 header, not 802.11 header.
 101  * DECRYPTED: This frame is being decrypted.
 102  */
 103 #define RXD_W3_BA                       FIELD32(0x00000001)
 104 #define RXD_W3_DATA                     FIELD32(0x00000002)
 105 #define RXD_W3_NULLDATA                 FIELD32(0x00000004)
 106 #define RXD_W3_FRAG                     FIELD32(0x00000008)
 107 #define RXD_W3_UNICAST_TO_ME            FIELD32(0x00000010)
 108 #define RXD_W3_MULTICAST                FIELD32(0x00000020)
 109 #define RXD_W3_BROADCAST                FIELD32(0x00000040)
 110 #define RXD_W3_MY_BSS                   FIELD32(0x00000080)
 111 #define RXD_W3_CRC_ERROR                FIELD32(0x00000100)
 112 #define RXD_W3_CIPHER_ERROR             FIELD32(0x00000600)
 113 #define RXD_W3_AMSDU                    FIELD32(0x00000800)
 114 #define RXD_W3_HTC                      FIELD32(0x00001000)
 115 #define RXD_W3_RSSI                     FIELD32(0x00002000)
 116 #define RXD_W3_L2PAD                    FIELD32(0x00004000)
 117 #define RXD_W3_AMPDU                    FIELD32(0x00008000)
 118 #define RXD_W3_DECRYPTED                FIELD32(0x00010000)
 119 #define RXD_W3_PLCP_SIGNAL              FIELD32(0x00020000)
 120 #define RXD_W3_PLCP_RSSI                FIELD32(0x00040000)
 121
 122 /* TX descriptor initialization */
 123 __le32 *rt2800mmio_get_txwi(struct queue_entry *entry);
 124 void rt2800mmio_write_tx_desc(struct queue_entry *entry,
 125                               struct txentry_desc *txdesc);
 126
 127 /* RX control handlers */
 128 void rt2800mmio_fill_rxdone(struct queue_entry *entry,
 129                             struct rxdone_entry_desc *rxdesc);
 130
 131 /* Interrupt functions */
 132 void rt2800mmio_txstatus_tasklet(unsigned long data);
 133 void rt2800mmio_pretbtt_tasklet(unsigned long data);
 134 void rt2800mmio_tbtt_tasklet(unsigned long data);
 135 void rt2800mmio_rxdone_tasklet(unsigned long data);
 136 void rt2800mmio_autowake_tasklet(unsigned long data);
 137 irqreturn_t rt2800mmio_interrupt(int irq, void *dev_instance);
 138 void rt2800mmio_toggle_irq(struct rt2x00_dev *rt2x00dev,
 139                            enum dev_state state);
 140
 141 #endif /* RT2800MMIO_H */