drivers/net/wireless/rt2x00/rt2800pci.c

   1 /*
   2         Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
   3         Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
   4         Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5         Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
   6         Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
   7         Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
   8         Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
   9         Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
  10         <http://rt2x00.serialmonkey.com>
  11
  12         This program is free software; you can redistribute it and/or modify
  13         it under the terms of the GNU General Public License as published by
  14         the Free Software Foundation; either version 2 of the License, or
  15         (at your option) any later version.
  16
  17         This program is distributed in the hope that it will be useful,
  18         but WITHOUT ANY WARRANTY; without even the implied warranty of
  19         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20         GNU General Public License for more details.
  21
  22         You should have received a copy of the GNU General Public License
  23         along with this program; if not, write to the
  24         Free Software Foundation, Inc.,
  25         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26  */
  27
  28 /*
  29         Module: rt2800pci
  30         Abstract: rt2800pci device specific routines.
  31         Supported chipsets: RT2800E & RT2800ED.
  32  */
  33
  34 #include <linux/delay.h>
  35 #include <linux/etherdevice.h>
  36 #include <linux/init.h>
  37 #include <linux/kernel.h>
  38 #include <linux/module.h>
  39 #include <linux/pci.h>
  40 #include <linux/platform_device.h>
  41 #include <linux/eeprom_93cx6.h>
  42
  43 #include "rt2x00.h"
  44 #include "rt2x00pci.h"
  45 #include "rt2x00soc.h"
  46 #include "rt2800lib.h"
  47 #include "rt2800.h"
  48 #include "rt2800pci.h"
  49
  50 /*
  51  * Allow hardware encryption to be disabled.
  52  */
  53 static int modparam_nohwcrypt = 0;
  54 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  55 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  56
  57 static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
  58 {
  59         unsigned int i;
  60         u32 reg;
  61
  62         /*
  63          * SOC devices don't support MCU requests.
  64          */
  65         if (rt2x00_is_soc(rt2x00dev))
  66                 return;
  67
  68         for (i = 0; i < 200; i++) {
  69                 rt2800_register_read(rt2x00dev, H2M_MAILBOX_CID, &reg);
  70
  71                 if ((rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD0) == token) ||
  72                     (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD1) == token) ||
  73                     (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD2) == token) ||
  74                     (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD3) == token))
  75                         break;
  76
  77                 udelay(REGISTER_BUSY_DELAY);
  78         }
  79
  80         if (i == 200)
  81                 ERROR(rt2x00dev, "MCU request failed, no response from hardware\n");
  82
  83         rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
  84         rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
  85 }
  86
  87 #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
  88 static void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev)
  89 {
  90         u32 *base_addr = (u32 *) KSEG1ADDR(0x1F040000); /* XXX for RT3052 */
  91
  92         memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE);
  93 }
  94 #else
  95 static inline void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev)
  96 {
  97 }
  98 #endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT305X */
  99
 100 #ifdef CONFIG_PCI
 101 static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
 102 {
 103         struct rt2x00_dev *rt2x00dev = eeprom->data;
 104         u32 reg;
 105
 106         rt2800_register_read(rt2x00dev, E2PROM_CSR, &reg);
 107
 108         eeprom->reg_data_in = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_IN);
 109         eeprom->reg_data_out = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_OUT);
 110         eeprom->reg_data_clock =
 111             !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_CLOCK);
 112         eeprom->reg_chip_select =
 113             !!rt2x00_get_field32(reg, E2PROM_CSR_CHIP_SELECT);
 114 }
 115
 116 static void rt2800pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
 117 {
 118         struct rt2x00_dev *rt2x00dev = eeprom->data;
 119         u32 reg = 0;
 120
 121         rt2x00_set_field32(&reg, E2PROM_CSR_DATA_IN, !!eeprom->reg_data_in);
 122         rt2x00_set_field32(&reg, E2PROM_CSR_DATA_OUT, !!eeprom->reg_data_out);
 123         rt2x00_set_field32(&reg, E2PROM_CSR_DATA_CLOCK,
 124                            !!eeprom->reg_data_clock);
 125         rt2x00_set_field32(&reg, E2PROM_CSR_CHIP_SELECT,
 126                            !!eeprom->reg_chip_select);
 127
 128         rt2800_register_write(rt2x00dev, E2PROM_CSR, reg);
 129 }
 130
 131 static void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
 132 {
 133         struct eeprom_93cx6 eeprom;
 134         u32 reg;
 135
 136         rt2800_register_read(rt2x00dev, E2PROM_CSR, &reg);
 137
 138         eeprom.data = rt2x00dev;
 139         eeprom.register_read = rt2800pci_eepromregister_read;
 140         eeprom.register_write = rt2800pci_eepromregister_write;
 141         switch (rt2x00_get_field32(reg, E2PROM_CSR_TYPE))
 142         {
 143         case 0:
 144                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
 145                 break;
 146         case 1:
 147                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
 148                 break;
 149         default:
 150                 eeprom.width = PCI_EEPROM_WIDTH_93C86;
 151                 break;
 152         }
 153         eeprom.reg_data_in = 0;
 154         eeprom.reg_data_out = 0;
 155         eeprom.reg_data_clock = 0;
 156         eeprom.reg_chip_select = 0;
 157
 158         eeprom_93cx6_multiread(&eeprom, EEPROM_BASE, rt2x00dev->eeprom,
 159                                EEPROM_SIZE / sizeof(u16));
 160 }
 161
 162 static int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
 163 {
 164         return rt2800_efuse_detect(rt2x00dev);
 165 }
 166
 167 static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
 168 {
 169         rt2800_read_eeprom_efuse(rt2x00dev);
 170 }
 171 #else
 172 static inline void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
 173 {
 174 }
 175
 176 static inline int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
 177 {
 178         return 0;
 179 }
 180
 181 static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
 182 {
 183 }
 184 #endif /* CONFIG_PCI */
 185
 186 /*
 187  * Firmware functions
 188  */
 189 static char *rt2800pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 190 {
 191         return FIRMWARE_RT2860;
 192 }
 193
 194 static int rt2800pci_write_firmware(struct rt2x00_dev *rt2x00dev,
 195                                     const u8 *data, const size_t len)
 196 {
 197         u32 reg;
 198
 199         /*
 200          * enable Host program ram write selection
 201          */
 202         reg = 0;
 203         rt2x00_set_field32(&reg, PBF_SYS_CTRL_HOST_RAM_WRITE, 1);
 204         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, reg);
 205
 206         /*
 207          * Write firmware to device.
 208          */
 209         rt2800_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE,
 210                                    data, len);
 211
 212         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000);
 213         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001);
 214
 215         rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
 216         rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
 217
 218         return 0;
 219 }
 220
 221 /*
 222  * Initialization functions.
 223  */
 224 static bool rt2800pci_get_entry_state(struct queue_entry *entry)
 225 {
 226         struct queue_entry_priv_pci *entry_priv = entry->priv_data;
 227         u32 word;
 228
 229         if (entry->queue->qid == QID_RX) {
 230                 rt2x00_desc_read(entry_priv->desc, 1, &word);
 231
 232                 return (!rt2x00_get_field32(word, RXD_W1_DMA_DONE));
 233         } else {
 234                 rt2x00_desc_read(entry_priv->desc, 1, &word);
 235
 236                 return (!rt2x00_get_field32(word, TXD_W1_DMA_DONE));
 237         }
 238 }
 239
 240 static void rt2800pci_clear_entry(struct queue_entry *entry)
 241 {
 242         struct queue_entry_priv_pci *entry_priv = entry->priv_data;
 243         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
 244         struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
 245         u32 word;
 246
 247         if (entry->queue->qid == QID_RX) {
 248                 rt2x00_desc_read(entry_priv->desc, 0, &word);
 249                 rt2x00_set_field32(&word, RXD_W0_SDP0, skbdesc->skb_dma);
 250                 rt2x00_desc_write(entry_priv->desc, 0, word);
 251
 252                 rt2x00_desc_read(entry_priv->desc, 1, &word);
 253                 rt2x00_set_field32(&word, RXD_W1_DMA_DONE, 0);
 254                 rt2x00_desc_write(entry_priv->desc, 1, word);
 255
 256                 /*
 257                  * Set RX IDX in register to inform hardware that we have
 258                  * handled this entry and it is available for reuse again.
 259                  */
 260                 rt2800_register_write(rt2x00dev, RX_CRX_IDX,
 261                                       entry->entry_idx);
 262         } else {
 263                 rt2x00_desc_read(entry_priv->desc, 1, &word);
 264                 rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 1);
 265                 rt2x00_desc_write(entry_priv->desc, 1, word);
 266         }
 267 }
 268
 269 static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)
 270 {
 271         struct queue_entry_priv_pci *entry_priv;
 272         u32 reg;
 273
 274         /*
 275          * Initialize registers.
 276          */
 277         entry_priv = rt2x00dev->tx[0].entries[0].priv_data;
 278         rt2800_register_write(rt2x00dev, TX_BASE_PTR0, entry_priv->desc_dma);
 279         rt2800_register_write(rt2x00dev, TX_MAX_CNT0, rt2x00dev->tx[0].limit);
 280         rt2800_register_write(rt2x00dev, TX_CTX_IDX0, 0);
 281         rt2800_register_write(rt2x00dev, TX_DTX_IDX0, 0);
 282
 283         entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
 284         rt2800_register_write(rt2x00dev, TX_BASE_PTR1, entry_priv->desc_dma);
 285         rt2800_register_write(rt2x00dev, TX_MAX_CNT1, rt2x00dev->tx[1].limit);
 286         rt2800_register_write(rt2x00dev, TX_CTX_IDX1, 0);
 287         rt2800_register_write(rt2x00dev, TX_DTX_IDX1, 0);
 288
 289         entry_priv = rt2x00dev->tx[2].entries[0].priv_data;
 290         rt2800_register_write(rt2x00dev, TX_BASE_PTR2, entry_priv->desc_dma);
 291         rt2800_register_write(rt2x00dev, TX_MAX_CNT2, rt2x00dev->tx[2].limit);
 292         rt2800_register_write(rt2x00dev, TX_CTX_IDX2, 0);
 293         rt2800_register_write(rt2x00dev, TX_DTX_IDX2, 0);
 294
 295         entry_priv = rt2x00dev->tx[3].entries[0].priv_data;
 296         rt2800_register_write(rt2x00dev, TX_BASE_PTR3, entry_priv->desc_dma);
 297         rt2800_register_write(rt2x00dev, TX_MAX_CNT3, rt2x00dev->tx[3].limit);
 298         rt2800_register_write(rt2x00dev, TX_CTX_IDX3, 0);
 299         rt2800_register_write(rt2x00dev, TX_DTX_IDX3, 0);
 300
 301         entry_priv = rt2x00dev->rx->entries[0].priv_data;
 302         rt2800_register_write(rt2x00dev, RX_BASE_PTR, entry_priv->desc_dma);
 303         rt2800_register_write(rt2x00dev, RX_MAX_CNT, rt2x00dev->rx[0].limit);
 304         rt2800_register_write(rt2x00dev, RX_CRX_IDX, rt2x00dev->rx[0].limit - 1);
 305         rt2800_register_write(rt2x00dev, RX_DRX_IDX, 0);
 306
 307         /*
 308          * Enable global DMA configuration
 309          */
 310         rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
 311         rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
 312         rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
 313         rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
 314         rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
 315
 316         rt2800_register_write(rt2x00dev, DELAY_INT_CFG, 0);
 317
 318         return 0;
 319 }
 320
 321 /*
 322  * Device state switch handlers.
 323  */
 324 static void rt2800pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
 325                                 enum dev_state state)
 326 {
 327         u32 reg;
 328
 329         rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
 330         rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
 331                            (state == STATE_RADIO_RX_ON));
 332         rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
 333 }
 334
 335 static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
 336                                  enum dev_state state)
 337 {
 338         int mask = (state == STATE_RADIO_IRQ_ON) ||
 339                    (state == STATE_RADIO_IRQ_ON_ISR);
 340         u32 reg;
 341
 342         /*
 343          * When interrupts are being enabled, the interrupt registers
 344          * should clear the register to assure a clean state.
 345          */
 346         if (state == STATE_RADIO_IRQ_ON) {
 347                 rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
 348                 rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
 349         }
 350
 351         rt2800_register_read(rt2x00dev, INT_MASK_CSR, &reg);
 352         rt2x00_set_field32(&reg, INT_MASK_CSR_RXDELAYINT, 0);
 353         rt2x00_set_field32(&reg, INT_MASK_CSR_TXDELAYINT, 0);
 354         rt2x00_set_field32(&reg, INT_MASK_CSR_RX_DONE, mask);
 355         rt2x00_set_field32(&reg, INT_MASK_CSR_AC0_DMA_DONE, 0);
 356         rt2x00_set_field32(&reg, INT_MASK_CSR_AC1_DMA_DONE, 0);
 357         rt2x00_set_field32(&reg, INT_MASK_CSR_AC2_DMA_DONE, 0);
 358         rt2x00_set_field32(&reg, INT_MASK_CSR_AC3_DMA_DONE, 0);
 359         rt2x00_set_field32(&reg, INT_MASK_CSR_HCCA_DMA_DONE, 0);
 360         rt2x00_set_field32(&reg, INT_MASK_CSR_MGMT_DMA_DONE, 0);
 361         rt2x00_set_field32(&reg, INT_MASK_CSR_MCU_COMMAND, 0);
 362         rt2x00_set_field32(&reg, INT_MASK_CSR_RXTX_COHERENT, 0);
 363         rt2x00_set_field32(&reg, INT_MASK_CSR_TBTT, mask);
 364         rt2x00_set_field32(&reg, INT_MASK_CSR_PRE_TBTT, mask);
 365         rt2x00_set_field32(&reg, INT_MASK_CSR_TX_FIFO_STATUS, mask);
 366         rt2x00_set_field32(&reg, INT_MASK_CSR_AUTO_WAKEUP, mask);
 367         rt2x00_set_field32(&reg, INT_MASK_CSR_GPTIMER, 0);
 368         rt2x00_set_field32(&reg, INT_MASK_CSR_RX_COHERENT, 0);
 369         rt2x00_set_field32(&reg, INT_MASK_CSR_TX_COHERENT, 0);
 370         rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
 371 }
 372
 373 static int rt2800pci_init_registers(struct rt2x00_dev *rt2x00dev)
 374 {
 375         u32 reg;
 376
 377         /*
 378          * Reset DMA indexes
 379          */
 380         rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
 381         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
 382         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
 383         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
 384         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, 1);
 385         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
 386         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
 387         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
 388         rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
 389
 390         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
 391         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
 392
 393         rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
 394
 395         rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
 396         rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
 397         rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
 398         rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
 399
 400         rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
 401
 402         return 0;
 403 }
 404
 405 static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev)
 406 {
 407         if (unlikely(rt2800_wait_wpdma_ready(rt2x00dev) ||
 408                      rt2800pci_init_queues(rt2x00dev)))
 409                 return -EIO;
 410
 411         return rt2800_enable_radio(rt2x00dev);
 412 }
 413
 414 static void rt2800pci_disable_radio(struct rt2x00_dev *rt2x00dev)
 415 {
 416         u32 reg;
 417
 418         rt2800_disable_radio(rt2x00dev);
 419
 420         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001280);
 421
 422         rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
 423         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
 424         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
 425         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
 426         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, 1);
 427         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
 428         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
 429         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
 430         rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
 431
 432         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
 433         rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
 434 }
 435
 436 static int rt2800pci_set_state(struct rt2x00_dev *rt2x00dev,
 437                                enum dev_state state)
 438 {
 439         /*
 440          * Always put the device to sleep (even when we intend to wakeup!)
 441          * if the device is booting and wasn't asleep it will return
 442          * failure when attempting to wakeup.
 443          */
 444         rt2800_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0xff, 2);
 445
 446         if (state == STATE_AWAKE) {
 447                 rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKUP, 0, 0);
 448                 rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKUP);
 449         }
 450
 451         return 0;
 452 }
 453
 454 static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev,
 455                                       enum dev_state state)
 456 {
 457         int retval = 0;
 458
 459         switch (state) {
 460         case STATE_RADIO_ON:
 461                 /*
 462                  * Before the radio can be enabled, the device first has
 463                  * to be woken up. After that it needs a bit of time
 464                  * to be fully awake and then the radio can be enabled.
 465                  */
 466                 rt2800pci_set_state(rt2x00dev, STATE_AWAKE);
 467                 msleep(1);
 468                 retval = rt2800pci_enable_radio(rt2x00dev);
 469                 break;
 470         case STATE_RADIO_OFF:
 471                 /*
 472                  * After the radio has been disabled, the device should
 473                  * be put to sleep for powersaving.
 474                  */
 475                 rt2800pci_disable_radio(rt2x00dev);
 476                 rt2800pci_set_state(rt2x00dev, STATE_SLEEP);
 477                 break;
 478         case STATE_RADIO_RX_ON:
 479         case STATE_RADIO_RX_OFF:
 480                 rt2800pci_toggle_rx(rt2x00dev, state);
 481                 break;
 482         case STATE_RADIO_IRQ_ON:
 483         case STATE_RADIO_IRQ_ON_ISR:
 484         case STATE_RADIO_IRQ_OFF:
 485         case STATE_RADIO_IRQ_OFF_ISR:
 486                 rt2800pci_toggle_irq(rt2x00dev, state);
 487                 break;
 488         case STATE_DEEP_SLEEP:
 489         case STATE_SLEEP:
 490         case STATE_STANDBY:
 491         case STATE_AWAKE:
 492                 retval = rt2800pci_set_state(rt2x00dev, state);
 493                 break;
 494         default:
 495                 retval = -ENOTSUPP;
 496                 break;
 497         }
 498
 499         if (unlikely(retval))
 500                 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
 501                       state, retval);
 502
 503         return retval;
 504 }
 505
 506 /*
 507  * TX descriptor initialization
 508  */
 509 static __le32 *rt2800pci_get_txwi(struct queue_entry *entry)
 510 {
 511         return (__le32 *) entry->skb->data;
 512 }
 513
 514 static void rt2800pci_write_tx_desc(struct queue_entry *entry,
 515                                     struct txentry_desc *txdesc)
 516 {
 517         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
 518         struct queue_entry_priv_pci *entry_priv = entry->priv_data;
 519         __le32 *txd = entry_priv->desc;
 520         u32 word;
 521
 522         /*
 523          * The buffers pointed by SD_PTR0/SD_LEN0 and SD_PTR1/SD_LEN1
 524          * must contains a TXWI structure + 802.11 header + padding + 802.11
 525          * data. We choose to have SD_PTR0/SD_LEN0 only contains TXWI and
 526          * SD_PTR1/SD_LEN1 contains 802.11 header + padding + 802.11
 527          * data. It means that LAST_SEC0 is always 0.
 528          */
 529
 530         /*
 531          * Initialize TX descriptor
 532          */
 533         rt2x00_desc_read(txd, 0, &word);
 534         rt2x00_set_field32(&word, TXD_W0_SD_PTR0, skbdesc->skb_dma);
 535         rt2x00_desc_write(txd, 0, word);
 536
 537         rt2x00_desc_read(txd, 1, &word);
 538         rt2x00_set_field32(&word, TXD_W1_SD_LEN1, entry->skb->len);
 539         rt2x00_set_field32(&word, TXD_W1_LAST_SEC1,
 540                            !test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
 541         rt2x00_set_field32(&word, TXD_W1_BURST,
 542                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
 543         rt2x00_set_field32(&word, TXD_W1_SD_LEN0, TXWI_DESC_SIZE);
 544         rt2x00_set_field32(&word, TXD_W1_LAST_SEC0, 0);
 545         rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 0);
 546         rt2x00_desc_write(txd, 1, word);
 547
 548         rt2x00_desc_read(txd, 2, &word);
 549         rt2x00_set_field32(&word, TXD_W2_SD_PTR1,
 550                            skbdesc->skb_dma + TXWI_DESC_SIZE);
 551         rt2x00_desc_write(txd, 2, word);
 552
 553         rt2x00_desc_read(txd, 3, &word);
 554         rt2x00_set_field32(&word, TXD_W3_WIV,
 555                            !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags));
 556         rt2x00_set_field32(&word, TXD_W3_QSEL, 2);
 557         rt2x00_desc_write(txd, 3, word);
 558
 559         /*
 560          * Register descriptor details in skb frame descriptor.
 561          */
 562         skbdesc->desc = txd;
 563         skbdesc->desc_len = TXD_DESC_SIZE;
 564 }
 565
 566 /*
 567  * TX data initialization
 568  */
 569 static void rt2800pci_kick_tx_queue(struct data_queue *queue)
 570 {
 571         struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
 572         struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
 573         unsigned int qidx;
 574
 575         if (queue->qid == QID_MGMT)
 576                 qidx = 5;
 577         else
 578                 qidx = queue->qid;
 579
 580         rt2800_register_write(rt2x00dev, TX_CTX_IDX(qidx), entry->entry_idx);
 581 }
 582
 583 static void rt2800pci_kill_tx_queue(struct data_queue *queue)
 584 {
 585         struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
 586         u32 reg;
 587
 588         if (queue->qid == QID_BEACON) {
 589                 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, 0);
 590                 return;
 591         }
 592
 593         rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
 594         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, (queue->qid == QID_AC_BE));
 595         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, (queue->qid == QID_AC_BK));
 596         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, (queue->qid == QID_AC_VI));
 597         rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, (queue->qid == QID_AC_VO));
 598         rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
 599 }
 600
 601 /*
 602  * RX control handlers
 603  */
 604 static void rt2800pci_fill_rxdone(struct queue_entry *entry,
 605                                   struct rxdone_entry_desc *rxdesc)
 606 {
 607         struct queue_entry_priv_pci *entry_priv = entry->priv_data;
 608         __le32 *rxd = entry_priv->desc;
 609         u32 word;
 610
 611         rt2x00_desc_read(rxd, 3, &word);
 612
 613         if (rt2x00_get_field32(word, RXD_W3_CRC_ERROR))
 614                 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
 615
 616         /*
 617          * Unfortunately we don't know the cipher type used during
 618          * decryption. This prevents us from correct providing
 619          * correct statistics through debugfs.
 620          */
 621         rxdesc->cipher_status = rt2x00_get_field32(word, RXD_W3_CIPHER_ERROR);
 622
 623         if (rt2x00_get_field32(word, RXD_W3_DECRYPTED)) {
 624                 /*
 625                  * Hardware has stripped IV/EIV data from 802.11 frame during
 626                  * decryption. Unfortunately the descriptor doesn't contain
 627                  * any fields with the EIV/IV data either, so they can't
 628                  * be restored by rt2x00lib.
 629                  */
 630                 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
 631
 632                 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
 633                         rxdesc->flags |= RX_FLAG_DECRYPTED;
 634                 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
 635                         rxdesc->flags |= RX_FLAG_MMIC_ERROR;
 636         }
 637
 638         if (rt2x00_get_field32(word, RXD_W3_MY_BSS))
 639                 rxdesc->dev_flags |= RXDONE_MY_BSS;
 640
 641         if (rt2x00_get_field32(word, RXD_W3_L2PAD))
 642                 rxdesc->dev_flags |= RXDONE_L2PAD;
 643
 644         /*
 645          * Process the RXWI structure that is at the start of the buffer.
 646          */
 647         rt2800_process_rxwi(entry, rxdesc);
 648 }
 649
 650 /*
 651  * Interrupt functions.
 652  */
 653 static void rt2800pci_wakeup(struct rt2x00_dev *rt2x00dev)
 654 {
 655         struct ieee80211_conf conf = { .flags = 0 };
 656         struct rt2x00lib_conf libconf = { .conf = &conf };
 657
 658         rt2800_config(rt2x00dev, &libconf, IEEE80211_CONF_CHANGE_PS);
 659 }
 660
 661 static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev)
 662 {
 663         struct data_queue *queue;
 664         struct queue_entry *entry;
 665         u32 status;
 666         u8 qid;
 667
 668         while (!kfifo_is_empty(&rt2x00dev->txstatus_fifo)) {
 669                 /* Now remove the tx status from the FIFO */
 670                 if (kfifo_out(&rt2x00dev->txstatus_fifo, &status,
 671                               sizeof(status)) != sizeof(status)) {
 672                         WARN_ON(1);
 673                         break;
 674                 }
 675
 676                 qid = rt2x00_get_field32(status, TX_STA_FIFO_PID_QUEUE);
 677                 if (qid >= QID_RX) {
 678                         /*
 679                          * Unknown queue, this shouldn't happen. Just drop
 680                          * this tx status.
 681                          */
 682                         WARNING(rt2x00dev, "Got TX status report with "
 683                                            "unexpected pid %u, dropping", qid);
 684                         break;
 685                 }
 686
 687                 queue = rt2x00queue_get_queue(rt2x00dev, qid);
 688                 if (unlikely(queue == NULL)) {
 689                         /*
 690                          * The queue is NULL, this shouldn't happen. Stop
 691                          * processing here and drop the tx status
 692                          */
 693                         WARNING(rt2x00dev, "Got TX status for an unavailable "
 694                                            "queue %u, dropping", qid);
 695                         break;
 696                 }
 697
 698                 if (rt2x00queue_empty(queue)) {
 699                         /*
 700                          * The queue is empty. Stop processing here
 701                          * and drop the tx status.
 702                          */
 703                         WARNING(rt2x00dev, "Got TX status for an empty "
 704                                            "queue %u, dropping", qid);
 705                         break;
 706                 }
 707
 708                 entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
 709                 rt2800_txdone_entry(entry, status);
 710         }
 711 }
 712
 713 static void rt2800pci_txstatus_tasklet(unsigned long data)
 714 {
 715         rt2800pci_txdone((struct rt2x00_dev *)data);
 716 }
 717
 718 static irqreturn_t rt2800pci_interrupt_thread(int irq, void *dev_instance)
 719 {
 720         struct rt2x00_dev *rt2x00dev = dev_instance;
 721         u32 reg = rt2x00dev->irqvalue[0];
 722
 723         /*
 724          * 1 - Pre TBTT interrupt.
 725          */
 726         if (rt2x00_get_field32(reg, INT_SOURCE_CSR_PRE_TBTT))
 727                 rt2x00lib_pretbtt(rt2x00dev);
 728
 729         /*
 730          * 2 - Beacondone interrupt.
 731          */
 732         if (rt2x00_get_field32(reg, INT_SOURCE_CSR_TBTT))
 733                 rt2x00lib_beacondone(rt2x00dev);
 734
 735         /*
 736          * 3 - Rx ring done interrupt.
 737          */
 738         if (rt2x00_get_field32(reg, INT_SOURCE_CSR_RX_DONE))
 739                 rt2x00pci_rxdone(rt2x00dev);
 740
 741         /*
 742          * 4 - Auto wakeup interrupt.
 743          */
 744         if (rt2x00_get_field32(reg, INT_SOURCE_CSR_AUTO_WAKEUP))
 745                 rt2800pci_wakeup(rt2x00dev);
 746
 747         /* Enable interrupts again. */
 748         rt2x00dev->ops->lib->set_device_state(rt2x00dev,
 749                                               STATE_RADIO_IRQ_ON_ISR);
 750
 751         return IRQ_HANDLED;
 752 }
 753
 754 static void rt2800pci_txstatus_interrupt(struct rt2x00_dev *rt2x00dev)
 755 {
 756         u32 status;
 757         int i;
 758
 759         /*
 760          * The TX_FIFO_STATUS interrupt needs special care. We should
 761          * read TX_STA_FIFO but we should do it immediately as otherwise
 762          * the register can overflow and we would lose status reports.
 763          *
 764          * Hence, read the TX_STA_FIFO register and copy all tx status
 765          * reports into a kernel FIFO which is handled in the txstatus
 766          * tasklet. We use a tasklet to process the tx status reports
 767          * because we can schedule the tasklet multiple times (when the
 768          * interrupt fires again during tx status processing).
 769          *
 770          * Furthermore we don't disable the TX_FIFO_STATUS
 771          * interrupt here but leave it enabled so that the TX_STA_FIFO
 772          * can also be read while the interrupt thread gets executed.
 773          *
 774          * Since we have only one producer and one consumer we don't
 775          * need to lock the kfifo.
 776          */
 777         for (i = 0; i < rt2x00dev->ops->tx->entry_num; i++) {
 778                 rt2800_register_read(rt2x00dev, TX_STA_FIFO, &status);
 779
 780                 if (!rt2x00_get_field32(status, TX_STA_FIFO_VALID))
 781                         break;
 782
 783                 if (kfifo_is_full(&rt2x00dev->txstatus_fifo)) {
 784                         WARNING(rt2x00dev, "TX status FIFO overrun,"
 785                                 " drop tx status report.\n");
 786                         break;
 787                 }
 788
 789                 if (kfifo_in(&rt2x00dev->txstatus_fifo, &status,
 790                              sizeof(status)) != sizeof(status)) {
 791                         WARNING(rt2x00dev, "TX status FIFO overrun,"
 792                                 "drop tx status report.\n");
 793                         break;
 794                 }
 795         }
 796
 797         /* Schedule the tasklet for processing the tx status. */
 798         tasklet_schedule(&rt2x00dev->txstatus_tasklet);
 799 }
 800
 801 static irqreturn_t rt2800pci_interrupt(int irq, void *dev_instance)
 802 {
 803         struct rt2x00_dev *rt2x00dev = dev_instance;
 804         u32 reg;
 805         irqreturn_t ret = IRQ_HANDLED;
 806
 807         /* Read status and ACK all interrupts */
 808         rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
 809         rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
 810
 811         if (!reg)
 812                 return IRQ_NONE;
 813
 814         if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
 815                 return IRQ_HANDLED;
 816
 817         if (rt2x00_get_field32(reg, INT_SOURCE_CSR_TX_FIFO_STATUS))
 818                 rt2800pci_txstatus_interrupt(rt2x00dev);
 819
 820         if (rt2x00_get_field32(reg, INT_SOURCE_CSR_PRE_TBTT) ||
 821             rt2x00_get_field32(reg, INT_SOURCE_CSR_TBTT) ||
 822             rt2x00_get_field32(reg, INT_SOURCE_CSR_RX_DONE) ||
 823             rt2x00_get_field32(reg, INT_SOURCE_CSR_AUTO_WAKEUP)) {
 824                 /*
 825                  * All other interrupts are handled in the interrupt thread.
 826                  * Store irqvalue for use in the interrupt thread.
 827                  */
 828                 rt2x00dev->irqvalue[0] = reg;
 829
 830                 /*
 831                  * Disable interrupts, will be enabled again in the
 832                  * interrupt thread.
 833                 */
 834                 rt2x00dev->ops->lib->set_device_state(rt2x00dev,
 835                                                       STATE_RADIO_IRQ_OFF_ISR);
 836
 837                 /*
 838                  * Leave the TX_FIFO_STATUS interrupt enabled to not lose any
 839                  * tx status reports.
 840                  */
 841                 rt2800_register_read(rt2x00dev, INT_MASK_CSR, &reg);
 842                 rt2x00_set_field32(&reg, INT_MASK_CSR_TX_FIFO_STATUS, 1);
 843                 rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
 844
 845                 ret = IRQ_WAKE_THREAD;
 846         }
 847
 848         return ret;
 849 }
 850
 851 /*
 852  * Device probe functions.
 853  */
 854 static int rt2800pci_validate_eeprom(struct rt2x00_dev *rt2x00dev)
 855 {
 856         /*
 857          * Read EEPROM into buffer
 858          */
 859         if (rt2x00_is_soc(rt2x00dev))
 860                 rt2800pci_read_eeprom_soc(rt2x00dev);
 861         else if (rt2800pci_efuse_detect(rt2x00dev))
 862                 rt2800pci_read_eeprom_efuse(rt2x00dev);
 863         else
 864                 rt2800pci_read_eeprom_pci(rt2x00dev);
 865
 866         return rt2800_validate_eeprom(rt2x00dev);
 867 }
 868
 869 static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev)
 870 {
 871         int retval;
 872
 873         /*
 874          * Allocate eeprom data.
 875          */
 876         retval = rt2800pci_validate_eeprom(rt2x00dev);
 877         if (retval)
 878                 return retval;
 879
 880         retval = rt2800_init_eeprom(rt2x00dev);
 881         if (retval)
 882                 return retval;
 883
 884         /*
 885          * Initialize hw specifications.
 886          */
 887         retval = rt2800_probe_hw_mode(rt2x00dev);
 888         if (retval)
 889                 return retval;
 890
 891         /*
 892          * This device has multiple filters for control frames
 893          * and has a separate filter for PS Poll frames.
 894          */
 895         __set_bit(DRIVER_SUPPORT_CONTROL_FILTERS, &rt2x00dev->flags);
 896         __set_bit(DRIVER_SUPPORT_CONTROL_FILTER_PSPOLL, &rt2x00dev->flags);
 897
 898         /*
 899          * This device has a pre tbtt interrupt and thus fetches
 900          * a new beacon directly prior to transmission.
 901          */
 902         __set_bit(DRIVER_SUPPORT_PRE_TBTT_INTERRUPT, &rt2x00dev->flags);
 903
 904         /*
 905          * This device requires firmware.
 906          */
 907         if (!rt2x00_is_soc(rt2x00dev))
 908                 __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
 909         __set_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags);
 910         __set_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags);
 911         __set_bit(DRIVER_REQUIRE_TXSTATUS_FIFO, &rt2x00dev->flags);
 912         if (!modparam_nohwcrypt)
 913                 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
 914         __set_bit(DRIVER_SUPPORT_LINK_TUNING, &rt2x00dev->flags);
 915
 916         /*
 917          * Set the rssi offset.
 918          */
 919         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
 920
 921         return 0;
 922 }
 923
 924 static const struct ieee80211_ops rt2800pci_mac80211_ops = {
 925         .tx                     = rt2x00mac_tx,
 926         .start                  = rt2x00mac_start,
 927         .stop                   = rt2x00mac_stop,
 928         .add_interface          = rt2x00mac_add_interface,
 929         .remove_interface       = rt2x00mac_remove_interface,
 930         .config                 = rt2x00mac_config,
 931         .configure_filter       = rt2x00mac_configure_filter,
 932         .set_key                = rt2x00mac_set_key,
 933         .sw_scan_start          = rt2x00mac_sw_scan_start,
 934         .sw_scan_complete       = rt2x00mac_sw_scan_complete,
 935         .get_stats              = rt2x00mac_get_stats,
 936         .get_tkip_seq           = rt2800_get_tkip_seq,
 937         .set_rts_threshold      = rt2800_set_rts_threshold,
 938         .bss_info_changed       = rt2x00mac_bss_info_changed,
 939         .conf_tx                = rt2800_conf_tx,
 940         .get_tsf                = rt2800_get_tsf,
 941         .rfkill_poll            = rt2x00mac_rfkill_poll,
 942         .ampdu_action           = rt2800_ampdu_action,
 943         .flush                  = rt2x00mac_flush,
 944 };
 945
 946 static const struct rt2800_ops rt2800pci_rt2800_ops = {
 947         .register_read          = rt2x00pci_register_read,
 948         .register_read_lock     = rt2x00pci_register_read, /* same for PCI */
 949         .register_write         = rt2x00pci_register_write,
 950         .register_write_lock    = rt2x00pci_register_write, /* same for PCI */
 951         .register_multiread     = rt2x00pci_register_multiread,
 952         .register_multiwrite    = rt2x00pci_register_multiwrite,
 953         .regbusy_read           = rt2x00pci_regbusy_read,
 954         .drv_write_firmware     = rt2800pci_write_firmware,
 955         .drv_init_registers     = rt2800pci_init_registers,
 956         .drv_get_txwi           = rt2800pci_get_txwi,
 957 };
 958
 959 static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
 960         .irq_handler            = rt2800pci_interrupt,
 961         .irq_handler_thread     = rt2800pci_interrupt_thread,
 962         .txstatus_tasklet       = rt2800pci_txstatus_tasklet,
 963         .probe_hw               = rt2800pci_probe_hw,
 964         .get_firmware_name      = rt2800pci_get_firmware_name,
 965         .check_firmware         = rt2800_check_firmware,
 966         .load_firmware          = rt2800_load_firmware,
 967         .initialize             = rt2x00pci_initialize,
 968         .uninitialize           = rt2x00pci_uninitialize,
 969         .get_entry_state        = rt2800pci_get_entry_state,
 970         .clear_entry            = rt2800pci_clear_entry,
 971         .set_device_state       = rt2800pci_set_device_state,
 972         .rfkill_poll            = rt2800_rfkill_poll,
 973         .link_stats             = rt2800_link_stats,
 974         .reset_tuner            = rt2800_reset_tuner,
 975         .link_tuner             = rt2800_link_tuner,
 976         .write_tx_desc          = rt2800pci_write_tx_desc,
 977         .write_tx_data          = rt2800_write_tx_data,
 978         .write_beacon           = rt2800_write_beacon,
 979         .kick_tx_queue          = rt2800pci_kick_tx_queue,
 980         .kill_tx_queue          = rt2800pci_kill_tx_queue,
 981         .fill_rxdone            = rt2800pci_fill_rxdone,
 982         .config_shared_key      = rt2800_config_shared_key,
 983         .config_pairwise_key    = rt2800_config_pairwise_key,
 984         .config_filter          = rt2800_config_filter,
 985         .config_intf            = rt2800_config_intf,
 986         .config_erp             = rt2800_config_erp,
 987         .config_ant             = rt2800_config_ant,
 988         .config                 = rt2800_config,
 989 };
 990
 991 static const struct data_queue_desc rt2800pci_queue_rx = {
 992         .entry_num              = 128,
 993         .data_size              = AGGREGATION_SIZE,
 994         .desc_size              = RXD_DESC_SIZE,
 995         .priv_size              = sizeof(struct queue_entry_priv_pci),
 996 };
 997
 998 static const struct data_queue_desc rt2800pci_queue_tx = {
 999         .entry_num              = 64,
1000         .data_size              = AGGREGATION_SIZE,
1001         .desc_size              = TXD_DESC_SIZE,
1002         .priv_size              = sizeof(struct queue_entry_priv_pci),
1003 };
1004
1005 static const struct data_queue_desc rt2800pci_queue_bcn = {
1006         .entry_num              = 8,
1007         .data_size              = 0, /* No DMA required for beacons */
1008         .desc_size              = TXWI_DESC_SIZE,
1009         .priv_size              = sizeof(struct queue_entry_priv_pci),
1010 };
1011
1012 static const struct rt2x00_ops rt2800pci_ops = {
1013         .name                   = KBUILD_MODNAME,
1014         .max_sta_intf           = 1,
1015         .max_ap_intf            = 8,
1016         .eeprom_size            = EEPROM_SIZE,
1017         .rf_size                = RF_SIZE,
1018         .tx_queues              = NUM_TX_QUEUES,
1019         .extra_tx_headroom      = TXWI_DESC_SIZE,
1020         .rx                     = &rt2800pci_queue_rx,
1021         .tx                     = &rt2800pci_queue_tx,
1022         .bcn                    = &rt2800pci_queue_bcn,
1023         .lib                    = &rt2800pci_rt2x00_ops,
1024         .drv                    = &rt2800pci_rt2800_ops,
1025         .hw                     = &rt2800pci_mac80211_ops,
1026 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1027         .debugfs                = &rt2800_rt2x00debug,
1028 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1029 };
1030
1031 /*
1032  * RT2800pci module information.
1033  */
1034 #ifdef CONFIG_PCI
1035 static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
1036         { PCI_DEVICE(0x1814, 0x0601), PCI_DEVICE_DATA(&rt2800pci_ops) },
1037         { PCI_DEVICE(0x1814, 0x0681), PCI_DEVICE_DATA(&rt2800pci_ops) },
1038         { PCI_DEVICE(0x1814, 0x0701), PCI_DEVICE_DATA(&rt2800pci_ops) },
1039         { PCI_DEVICE(0x1814, 0x0781), PCI_DEVICE_DATA(&rt2800pci_ops) },
1040         { PCI_DEVICE(0x1814, 0x3090), PCI_DEVICE_DATA(&rt2800pci_ops) },
1041         { PCI_DEVICE(0x1814, 0x3091), PCI_DEVICE_DATA(&rt2800pci_ops) },
1042         { PCI_DEVICE(0x1814, 0x3092), PCI_DEVICE_DATA(&rt2800pci_ops) },
1043         { PCI_DEVICE(0x1432, 0x7708), PCI_DEVICE_DATA(&rt2800pci_ops) },
1044         { PCI_DEVICE(0x1432, 0x7727), PCI_DEVICE_DATA(&rt2800pci_ops) },
1045         { PCI_DEVICE(0x1432, 0x7728), PCI_DEVICE_DATA(&rt2800pci_ops) },
1046         { PCI_DEVICE(0x1432, 0x7738), PCI_DEVICE_DATA(&rt2800pci_ops) },
1047         { PCI_DEVICE(0x1432, 0x7748), PCI_DEVICE_DATA(&rt2800pci_ops) },
1048         { PCI_DEVICE(0x1432, 0x7758), PCI_DEVICE_DATA(&rt2800pci_ops) },
1049         { PCI_DEVICE(0x1432, 0x7768), PCI_DEVICE_DATA(&rt2800pci_ops) },
1050         { PCI_DEVICE(0x1462, 0x891a), PCI_DEVICE_DATA(&rt2800pci_ops) },
1051         { PCI_DEVICE(0x1a3b, 0x1059), PCI_DEVICE_DATA(&rt2800pci_ops) },
1052 #ifdef CONFIG_RT2800PCI_RT33XX
1053         { PCI_DEVICE(0x1814, 0x3390), PCI_DEVICE_DATA(&rt2800pci_ops) },
1054 #endif
1055 #ifdef CONFIG_RT2800PCI_RT35XX
1056         { PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) },
1057         { PCI_DEVICE(0x1814, 0x3062), PCI_DEVICE_DATA(&rt2800pci_ops) },
1058         { PCI_DEVICE(0x1814, 0x3562), PCI_DEVICE_DATA(&rt2800pci_ops) },
1059         { PCI_DEVICE(0x1814, 0x3592), PCI_DEVICE_DATA(&rt2800pci_ops) },
1060         { PCI_DEVICE(0x1814, 0x3593), PCI_DEVICE_DATA(&rt2800pci_ops) },
1061 #endif
1062         { 0, }
1063 };
1064 #endif /* CONFIG_PCI */
1065
1066 MODULE_AUTHOR(DRV_PROJECT);
1067 MODULE_VERSION(DRV_VERSION);
1068 MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver.");
1069 MODULE_SUPPORTED_DEVICE("Ralink RT2860 PCI & PCMCIA chipset based cards");
1070 #ifdef CONFIG_PCI
1071 MODULE_FIRMWARE(FIRMWARE_RT2860);
1072 MODULE_DEVICE_TABLE(pci, rt2800pci_device_table);
1073 #endif /* CONFIG_PCI */
1074 MODULE_LICENSE("GPL");
1075
1076 #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
1077 static int rt2800soc_probe(struct platform_device *pdev)
1078 {
1079         return rt2x00soc_probe(pdev, &rt2800pci_ops);
1080 }
1081
1082 static struct platform_driver rt2800soc_driver = {
1083         .driver         = {
1084                 .name           = "rt2800_wmac",
1085                 .owner          = THIS_MODULE,
1086                 .mod_name       = KBUILD_MODNAME,
1087         },
1088         .probe          = rt2800soc_probe,
1089         .remove         = __devexit_p(rt2x00soc_remove),
1090         .suspend        = rt2x00soc_suspend,
1091         .resume         = rt2x00soc_resume,
1092 };
1093 #endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT305X */
1094
1095 #ifdef CONFIG_PCI
1096 static struct pci_driver rt2800pci_driver = {
1097         .name           = KBUILD_MODNAME,
1098         .id_table       = rt2800pci_device_table,
1099         .probe          = rt2x00pci_probe,
1100         .remove         = __devexit_p(rt2x00pci_remove),
1101         .suspend        = rt2x00pci_suspend,
1102         .resume         = rt2x00pci_resume,
1103 };
1104 #endif /* CONFIG_PCI */
1105
1106 static int __init rt2800pci_init(void)
1107 {
1108         int ret = 0;
1109
1110 #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
1111         ret = platform_driver_register(&rt2800soc_driver);
1112         if (ret)
1113                 return ret;
1114 #endif
1115 #ifdef CONFIG_PCI
1116         ret = pci_register_driver(&rt2800pci_driver);
1117         if (ret) {
1118 #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
1119                 platform_driver_unregister(&rt2800soc_driver);
1120 #endif
1121                 return ret;
1122         }
1123 #endif
1124
1125         return ret;
1126 }
1127
1128 static void __exit rt2800pci_exit(void)
1129 {
1130 #ifdef CONFIG_PCI
1131         pci_unregister_driver(&rt2800pci_driver);
1132 #endif
1133 #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
1134         platform_driver_unregister(&rt2800soc_driver);
1135 #endif
1136 }
1137
1138 module_init(rt2800pci_init);
1139 module_exit(rt2800pci_exit);