rt2x00: rt2800pci: use separate firmware callbacks for SoC devices
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2800pci.c
1 /*
2 Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
4 Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
6 Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
7 Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
8 Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
9 Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
10 <http://rt2x00.serialmonkey.com>
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the
24 Free Software Foundation, Inc.,
25 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 */
27
28 /*
29 Module: rt2800pci
30 Abstract: rt2800pci device specific routines.
31 Supported chipsets: RT2800E & RT2800ED.
32 */
33
34 #include <linux/delay.h>
35 #include <linux/etherdevice.h>
36 #include <linux/init.h>
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/pci.h>
40 #include <linux/platform_device.h>
41 #include <linux/eeprom_93cx6.h>
42
43 #include "rt2x00.h"
44 #include "rt2x00mmio.h"
45 #include "rt2x00pci.h"
46 #include "rt2x00soc.h"
47 #include "rt2800lib.h"
48 #include "rt2800mmio.h"
49 #include "rt2800.h"
50 #include "rt2800pci.h"
51
52 /*
53 * Allow hardware encryption to be disabled.
54 */
55 static bool modparam_nohwcrypt = false;
56 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
57 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
58
59 static bool rt2800pci_hwcrypt_disabled(struct rt2x00_dev *rt2x00dev)
60 {
61 return modparam_nohwcrypt;
62 }
63
64 static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
65 {
66 unsigned int i;
67 u32 reg;
68
69 /*
70 * SOC devices don't support MCU requests.
71 */
72 if (rt2x00_is_soc(rt2x00dev))
73 return;
74
75 for (i = 0; i < 200; i++) {
76 rt2x00mmio_register_read(rt2x00dev, H2M_MAILBOX_CID, &reg);
77
78 if ((rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD0) == token) ||
79 (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD1) == token) ||
80 (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD2) == token) ||
81 (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD3) == token))
82 break;
83
84 udelay(REGISTER_BUSY_DELAY);
85 }
86
87 if (i == 200)
88 rt2x00_err(rt2x00dev, "MCU request failed, no response from hardware\n");
89
90 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
91 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
92 }
93
94 #ifdef CONFIG_PCI
95 static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
96 {
97 struct rt2x00_dev *rt2x00dev = eeprom->data;
98 u32 reg;
99
100 rt2x00mmio_register_read(rt2x00dev, E2PROM_CSR, &reg);
101
102 eeprom->reg_data_in = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_IN);
103 eeprom->reg_data_out = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_OUT);
104 eeprom->reg_data_clock =
105 !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_CLOCK);
106 eeprom->reg_chip_select =
107 !!rt2x00_get_field32(reg, E2PROM_CSR_CHIP_SELECT);
108 }
109
110 static void rt2800pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
111 {
112 struct rt2x00_dev *rt2x00dev = eeprom->data;
113 u32 reg = 0;
114
115 rt2x00_set_field32(&reg, E2PROM_CSR_DATA_IN, !!eeprom->reg_data_in);
116 rt2x00_set_field32(&reg, E2PROM_CSR_DATA_OUT, !!eeprom->reg_data_out);
117 rt2x00_set_field32(&reg, E2PROM_CSR_DATA_CLOCK,
118 !!eeprom->reg_data_clock);
119 rt2x00_set_field32(&reg, E2PROM_CSR_CHIP_SELECT,
120 !!eeprom->reg_chip_select);
121
122 rt2x00mmio_register_write(rt2x00dev, E2PROM_CSR, reg);
123 }
124
125 static int rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
126 {
127 struct eeprom_93cx6 eeprom;
128 u32 reg;
129
130 rt2x00mmio_register_read(rt2x00dev, E2PROM_CSR, &reg);
131
132 eeprom.data = rt2x00dev;
133 eeprom.register_read = rt2800pci_eepromregister_read;
134 eeprom.register_write = rt2800pci_eepromregister_write;
135 switch (rt2x00_get_field32(reg, E2PROM_CSR_TYPE))
136 {
137 case 0:
138 eeprom.width = PCI_EEPROM_WIDTH_93C46;
139 break;
140 case 1:
141 eeprom.width = PCI_EEPROM_WIDTH_93C66;
142 break;
143 default:
144 eeprom.width = PCI_EEPROM_WIDTH_93C86;
145 break;
146 }
147 eeprom.reg_data_in = 0;
148 eeprom.reg_data_out = 0;
149 eeprom.reg_data_clock = 0;
150 eeprom.reg_chip_select = 0;
151
152 eeprom_93cx6_multiread(&eeprom, EEPROM_BASE, rt2x00dev->eeprom,
153 EEPROM_SIZE / sizeof(u16));
154
155 return 0;
156 }
157
158 static int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
159 {
160 return rt2800_efuse_detect(rt2x00dev);
161 }
162
163 static inline int rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
164 {
165 return rt2800_read_eeprom_efuse(rt2x00dev);
166 }
167
168 /*
169 * Firmware functions
170 */
171 static char *rt2800pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
172 {
173 /*
174 * Chip rt3290 use specific 4KB firmware named rt3290.bin.
175 */
176 if (rt2x00_rt(rt2x00dev, RT3290))
177 return FIRMWARE_RT3290;
178 else
179 return FIRMWARE_RT2860;
180 }
181
182 static int rt2800pci_write_firmware(struct rt2x00_dev *rt2x00dev,
183 const u8 *data, const size_t len)
184 {
185 u32 reg;
186
187 /*
188 * enable Host program ram write selection
189 */
190 reg = 0;
191 rt2x00_set_field32(&reg, PBF_SYS_CTRL_HOST_RAM_WRITE, 1);
192 rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, reg);
193
194 /*
195 * Write firmware to device.
196 */
197 rt2x00mmio_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE,
198 data, len);
199
200 rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000);
201 rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001);
202
203 rt2x00mmio_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
204 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
205
206 return 0;
207 }
208 #endif /* CONFIG_PCI */
209
210 /*
211 * Device state switch handlers.
212 */
213 static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev)
214 {
215 int retval;
216
217 /* Wait for DMA, ignore error until we initialize queues. */
218 rt2800_wait_wpdma_ready(rt2x00dev);
219
220 if (unlikely(rt2800mmio_init_queues(rt2x00dev)))
221 return -EIO;
222
223 retval = rt2800_enable_radio(rt2x00dev);
224 if (retval)
225 return retval;
226
227 /* After resume MCU_BOOT_SIGNAL will trash these. */
228 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
229 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
230
231 rt2800_mcu_request(rt2x00dev, MCU_SLEEP, TOKEN_RADIO_OFF, 0xff, 0x02);
232 rt2800pci_mcu_status(rt2x00dev, TOKEN_RADIO_OFF);
233
234 rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKEUP, 0, 0);
235 rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKEUP);
236
237 return retval;
238 }
239
240 static void rt2800pci_disable_radio(struct rt2x00_dev *rt2x00dev)
241 {
242 if (rt2x00_is_soc(rt2x00dev)) {
243 rt2800_disable_radio(rt2x00dev);
244 rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0);
245 rt2x00mmio_register_write(rt2x00dev, TX_PIN_CFG, 0);
246 }
247 }
248
249 static int rt2800pci_set_state(struct rt2x00_dev *rt2x00dev,
250 enum dev_state state)
251 {
252 if (state == STATE_AWAKE) {
253 rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKEUP,
254 0, 0x02);
255 rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKEUP);
256 } else if (state == STATE_SLEEP) {
257 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS,
258 0xffffffff);
259 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID,
260 0xffffffff);
261 rt2800_mcu_request(rt2x00dev, MCU_SLEEP, TOKEN_SLEEP,
262 0xff, 0x01);
263 }
264
265 return 0;
266 }
267
268 static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev,
269 enum dev_state state)
270 {
271 int retval = 0;
272
273 switch (state) {
274 case STATE_RADIO_ON:
275 retval = rt2800pci_enable_radio(rt2x00dev);
276 break;
277 case STATE_RADIO_OFF:
278 /*
279 * After the radio has been disabled, the device should
280 * be put to sleep for powersaving.
281 */
282 rt2800pci_disable_radio(rt2x00dev);
283 rt2800pci_set_state(rt2x00dev, STATE_SLEEP);
284 break;
285 case STATE_RADIO_IRQ_ON:
286 case STATE_RADIO_IRQ_OFF:
287 rt2800mmio_toggle_irq(rt2x00dev, state);
288 break;
289 case STATE_DEEP_SLEEP:
290 case STATE_SLEEP:
291 case STATE_STANDBY:
292 case STATE_AWAKE:
293 retval = rt2800pci_set_state(rt2x00dev, state);
294 break;
295 default:
296 retval = -ENOTSUPP;
297 break;
298 }
299
300 if (unlikely(retval))
301 rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
302 state, retval);
303
304 return retval;
305 }
306
307 #ifdef CONFIG_PCI
308 /*
309 * Device probe functions.
310 */
311 static int rt2800pci_read_eeprom(struct rt2x00_dev *rt2x00dev)
312 {
313 int retval;
314
315 if (rt2800pci_efuse_detect(rt2x00dev))
316 retval = rt2800pci_read_eeprom_efuse(rt2x00dev);
317 else
318 retval = rt2800pci_read_eeprom_pci(rt2x00dev);
319
320 return retval;
321 }
322
323 static const struct ieee80211_ops rt2800pci_mac80211_ops = {
324 .tx = rt2x00mac_tx,
325 .start = rt2x00mac_start,
326 .stop = rt2x00mac_stop,
327 .add_interface = rt2x00mac_add_interface,
328 .remove_interface = rt2x00mac_remove_interface,
329 .config = rt2x00mac_config,
330 .configure_filter = rt2x00mac_configure_filter,
331 .set_key = rt2x00mac_set_key,
332 .sw_scan_start = rt2x00mac_sw_scan_start,
333 .sw_scan_complete = rt2x00mac_sw_scan_complete,
334 .get_stats = rt2x00mac_get_stats,
335 .get_tkip_seq = rt2800_get_tkip_seq,
336 .set_rts_threshold = rt2800_set_rts_threshold,
337 .sta_add = rt2x00mac_sta_add,
338 .sta_remove = rt2x00mac_sta_remove,
339 .bss_info_changed = rt2x00mac_bss_info_changed,
340 .conf_tx = rt2800_conf_tx,
341 .get_tsf = rt2800_get_tsf,
342 .rfkill_poll = rt2x00mac_rfkill_poll,
343 .ampdu_action = rt2800_ampdu_action,
344 .flush = rt2x00mac_flush,
345 .get_survey = rt2800_get_survey,
346 .get_ringparam = rt2x00mac_get_ringparam,
347 .tx_frames_pending = rt2x00mac_tx_frames_pending,
348 };
349
350 static const struct rt2800_ops rt2800pci_rt2800_ops = {
351 .register_read = rt2x00mmio_register_read,
352 .register_read_lock = rt2x00mmio_register_read, /* same for PCI */
353 .register_write = rt2x00mmio_register_write,
354 .register_write_lock = rt2x00mmio_register_write, /* same for PCI */
355 .register_multiread = rt2x00mmio_register_multiread,
356 .register_multiwrite = rt2x00mmio_register_multiwrite,
357 .regbusy_read = rt2x00mmio_regbusy_read,
358 .read_eeprom = rt2800pci_read_eeprom,
359 .hwcrypt_disabled = rt2800pci_hwcrypt_disabled,
360 .drv_write_firmware = rt2800pci_write_firmware,
361 .drv_init_registers = rt2800mmio_init_registers,
362 .drv_get_txwi = rt2800mmio_get_txwi,
363 };
364
365 static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
366 .irq_handler = rt2800mmio_interrupt,
367 .txstatus_tasklet = rt2800mmio_txstatus_tasklet,
368 .pretbtt_tasklet = rt2800mmio_pretbtt_tasklet,
369 .tbtt_tasklet = rt2800mmio_tbtt_tasklet,
370 .rxdone_tasklet = rt2800mmio_rxdone_tasklet,
371 .autowake_tasklet = rt2800mmio_autowake_tasklet,
372 .probe_hw = rt2800_probe_hw,
373 .get_firmware_name = rt2800pci_get_firmware_name,
374 .check_firmware = rt2800_check_firmware,
375 .load_firmware = rt2800_load_firmware,
376 .initialize = rt2x00mmio_initialize,
377 .uninitialize = rt2x00mmio_uninitialize,
378 .get_entry_state = rt2800mmio_get_entry_state,
379 .clear_entry = rt2800mmio_clear_entry,
380 .set_device_state = rt2800pci_set_device_state,
381 .rfkill_poll = rt2800_rfkill_poll,
382 .link_stats = rt2800_link_stats,
383 .reset_tuner = rt2800_reset_tuner,
384 .link_tuner = rt2800_link_tuner,
385 .gain_calibration = rt2800_gain_calibration,
386 .vco_calibration = rt2800_vco_calibration,
387 .start_queue = rt2800mmio_start_queue,
388 .kick_queue = rt2800mmio_kick_queue,
389 .stop_queue = rt2800mmio_stop_queue,
390 .flush_queue = rt2x00mmio_flush_queue,
391 .write_tx_desc = rt2800mmio_write_tx_desc,
392 .write_tx_data = rt2800_write_tx_data,
393 .write_beacon = rt2800_write_beacon,
394 .clear_beacon = rt2800_clear_beacon,
395 .fill_rxdone = rt2800mmio_fill_rxdone,
396 .config_shared_key = rt2800_config_shared_key,
397 .config_pairwise_key = rt2800_config_pairwise_key,
398 .config_filter = rt2800_config_filter,
399 .config_intf = rt2800_config_intf,
400 .config_erp = rt2800_config_erp,
401 .config_ant = rt2800_config_ant,
402 .config = rt2800_config,
403 .sta_add = rt2800_sta_add,
404 .sta_remove = rt2800_sta_remove,
405 };
406
407 static const struct rt2x00_ops rt2800pci_ops = {
408 .name = KBUILD_MODNAME,
409 .drv_data_size = sizeof(struct rt2800_drv_data),
410 .max_ap_intf = 8,
411 .eeprom_size = EEPROM_SIZE,
412 .rf_size = RF_SIZE,
413 .tx_queues = NUM_TX_QUEUES,
414 .queue_init = rt2800mmio_queue_init,
415 .lib = &rt2800pci_rt2x00_ops,
416 .drv = &rt2800pci_rt2800_ops,
417 .hw = &rt2800pci_mac80211_ops,
418 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
419 .debugfs = &rt2800_rt2x00debug,
420 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
421 };
422
423 /*
424 * RT2800pci module information.
425 */
426 static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
427 { PCI_DEVICE(0x1814, 0x0601) },
428 { PCI_DEVICE(0x1814, 0x0681) },
429 { PCI_DEVICE(0x1814, 0x0701) },
430 { PCI_DEVICE(0x1814, 0x0781) },
431 { PCI_DEVICE(0x1814, 0x3090) },
432 { PCI_DEVICE(0x1814, 0x3091) },
433 { PCI_DEVICE(0x1814, 0x3092) },
434 { PCI_DEVICE(0x1432, 0x7708) },
435 { PCI_DEVICE(0x1432, 0x7727) },
436 { PCI_DEVICE(0x1432, 0x7728) },
437 { PCI_DEVICE(0x1432, 0x7738) },
438 { PCI_DEVICE(0x1432, 0x7748) },
439 { PCI_DEVICE(0x1432, 0x7758) },
440 { PCI_DEVICE(0x1432, 0x7768) },
441 { PCI_DEVICE(0x1462, 0x891a) },
442 { PCI_DEVICE(0x1a3b, 0x1059) },
443 #ifdef CONFIG_RT2800PCI_RT3290
444 { PCI_DEVICE(0x1814, 0x3290) },
445 #endif
446 #ifdef CONFIG_RT2800PCI_RT33XX
447 { PCI_DEVICE(0x1814, 0x3390) },
448 #endif
449 #ifdef CONFIG_RT2800PCI_RT35XX
450 { PCI_DEVICE(0x1432, 0x7711) },
451 { PCI_DEVICE(0x1432, 0x7722) },
452 { PCI_DEVICE(0x1814, 0x3060) },
453 { PCI_DEVICE(0x1814, 0x3062) },
454 { PCI_DEVICE(0x1814, 0x3562) },
455 { PCI_DEVICE(0x1814, 0x3592) },
456 { PCI_DEVICE(0x1814, 0x3593) },
457 { PCI_DEVICE(0x1814, 0x359f) },
458 #endif
459 #ifdef CONFIG_RT2800PCI_RT53XX
460 { PCI_DEVICE(0x1814, 0x5360) },
461 { PCI_DEVICE(0x1814, 0x5362) },
462 { PCI_DEVICE(0x1814, 0x5390) },
463 { PCI_DEVICE(0x1814, 0x5392) },
464 { PCI_DEVICE(0x1814, 0x539a) },
465 { PCI_DEVICE(0x1814, 0x539b) },
466 { PCI_DEVICE(0x1814, 0x539f) },
467 #endif
468 { 0, }
469 };
470 #endif /* CONFIG_PCI */
471
472 MODULE_AUTHOR(DRV_PROJECT);
473 MODULE_VERSION(DRV_VERSION);
474 MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver.");
475 MODULE_SUPPORTED_DEVICE("Ralink RT2860 PCI & PCMCIA chipset based cards");
476 #ifdef CONFIG_PCI
477 MODULE_FIRMWARE(FIRMWARE_RT2860);
478 MODULE_DEVICE_TABLE(pci, rt2800pci_device_table);
479 #endif /* CONFIG_PCI */
480 MODULE_LICENSE("GPL");
481
482 #if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X)
483 static int rt2800soc_read_eeprom(struct rt2x00_dev *rt2x00dev)
484 {
485 void __iomem *base_addr = ioremap(0x1F040000, EEPROM_SIZE);
486
487 if (!base_addr)
488 return -ENOMEM;
489
490 memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE);
491
492 iounmap(base_addr);
493 return 0;
494 }
495
496 /* Firmware functions */
497 static char *rt2800soc_get_firmware_name(struct rt2x00_dev *rt2x00dev)
498 {
499 WARN_ON_ONCE(1);
500 return NULL;
501 }
502
503 static int rt2800soc_load_firmware(struct rt2x00_dev *rt2x00dev,
504 const u8 *data, const size_t len)
505 {
506 WARN_ON_ONCE(1);
507 return 0;
508 }
509
510 static int rt2800soc_check_firmware(struct rt2x00_dev *rt2x00dev,
511 const u8 *data, const size_t len)
512 {
513 WARN_ON_ONCE(1);
514 return 0;
515 }
516
517 static int rt2800soc_write_firmware(struct rt2x00_dev *rt2x00dev,
518 const u8 *data, const size_t len)
519 {
520 WARN_ON_ONCE(1);
521 return 0;
522 }
523
524 static const struct ieee80211_ops rt2800soc_mac80211_ops = {
525 .tx = rt2x00mac_tx,
526 .start = rt2x00mac_start,
527 .stop = rt2x00mac_stop,
528 .add_interface = rt2x00mac_add_interface,
529 .remove_interface = rt2x00mac_remove_interface,
530 .config = rt2x00mac_config,
531 .configure_filter = rt2x00mac_configure_filter,
532 .set_key = rt2x00mac_set_key,
533 .sw_scan_start = rt2x00mac_sw_scan_start,
534 .sw_scan_complete = rt2x00mac_sw_scan_complete,
535 .get_stats = rt2x00mac_get_stats,
536 .get_tkip_seq = rt2800_get_tkip_seq,
537 .set_rts_threshold = rt2800_set_rts_threshold,
538 .sta_add = rt2x00mac_sta_add,
539 .sta_remove = rt2x00mac_sta_remove,
540 .bss_info_changed = rt2x00mac_bss_info_changed,
541 .conf_tx = rt2800_conf_tx,
542 .get_tsf = rt2800_get_tsf,
543 .rfkill_poll = rt2x00mac_rfkill_poll,
544 .ampdu_action = rt2800_ampdu_action,
545 .flush = rt2x00mac_flush,
546 .get_survey = rt2800_get_survey,
547 .get_ringparam = rt2x00mac_get_ringparam,
548 .tx_frames_pending = rt2x00mac_tx_frames_pending,
549 };
550
551 static const struct rt2800_ops rt2800soc_rt2800_ops = {
552 .register_read = rt2x00mmio_register_read,
553 .register_read_lock = rt2x00mmio_register_read, /* same for SoCs */
554 .register_write = rt2x00mmio_register_write,
555 .register_write_lock = rt2x00mmio_register_write, /* same for SoCs */
556 .register_multiread = rt2x00mmio_register_multiread,
557 .register_multiwrite = rt2x00mmio_register_multiwrite,
558 .regbusy_read = rt2x00mmio_regbusy_read,
559 .read_eeprom = rt2800soc_read_eeprom,
560 .hwcrypt_disabled = rt2800pci_hwcrypt_disabled,
561 .drv_write_firmware = rt2800soc_write_firmware,
562 .drv_init_registers = rt2800mmio_init_registers,
563 .drv_get_txwi = rt2800mmio_get_txwi,
564 };
565
566 static const struct rt2x00lib_ops rt2800soc_rt2x00_ops = {
567 .irq_handler = rt2800mmio_interrupt,
568 .txstatus_tasklet = rt2800mmio_txstatus_tasklet,
569 .pretbtt_tasklet = rt2800mmio_pretbtt_tasklet,
570 .tbtt_tasklet = rt2800mmio_tbtt_tasklet,
571 .rxdone_tasklet = rt2800mmio_rxdone_tasklet,
572 .autowake_tasklet = rt2800mmio_autowake_tasklet,
573 .probe_hw = rt2800_probe_hw,
574 .get_firmware_name = rt2800soc_get_firmware_name,
575 .check_firmware = rt2800soc_check_firmware,
576 .load_firmware = rt2800soc_load_firmware,
577 .initialize = rt2x00mmio_initialize,
578 .uninitialize = rt2x00mmio_uninitialize,
579 .get_entry_state = rt2800mmio_get_entry_state,
580 .clear_entry = rt2800mmio_clear_entry,
581 .set_device_state = rt2800pci_set_device_state,
582 .rfkill_poll = rt2800_rfkill_poll,
583 .link_stats = rt2800_link_stats,
584 .reset_tuner = rt2800_reset_tuner,
585 .link_tuner = rt2800_link_tuner,
586 .gain_calibration = rt2800_gain_calibration,
587 .vco_calibration = rt2800_vco_calibration,
588 .start_queue = rt2800mmio_start_queue,
589 .kick_queue = rt2800mmio_kick_queue,
590 .stop_queue = rt2800mmio_stop_queue,
591 .flush_queue = rt2x00mmio_flush_queue,
592 .write_tx_desc = rt2800mmio_write_tx_desc,
593 .write_tx_data = rt2800_write_tx_data,
594 .write_beacon = rt2800_write_beacon,
595 .clear_beacon = rt2800_clear_beacon,
596 .fill_rxdone = rt2800mmio_fill_rxdone,
597 .config_shared_key = rt2800_config_shared_key,
598 .config_pairwise_key = rt2800_config_pairwise_key,
599 .config_filter = rt2800_config_filter,
600 .config_intf = rt2800_config_intf,
601 .config_erp = rt2800_config_erp,
602 .config_ant = rt2800_config_ant,
603 .config = rt2800_config,
604 .sta_add = rt2800_sta_add,
605 .sta_remove = rt2800_sta_remove,
606 };
607
608 static const struct rt2x00_ops rt2800soc_ops = {
609 .name = KBUILD_MODNAME,
610 .drv_data_size = sizeof(struct rt2800_drv_data),
611 .max_ap_intf = 8,
612 .eeprom_size = EEPROM_SIZE,
613 .rf_size = RF_SIZE,
614 .tx_queues = NUM_TX_QUEUES,
615 .queue_init = rt2800mmio_queue_init,
616 .lib = &rt2800soc_rt2x00_ops,
617 .drv = &rt2800soc_rt2800_ops,
618 .hw = &rt2800soc_mac80211_ops,
619 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
620 .debugfs = &rt2800_rt2x00debug,
621 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
622 };
623
624 static int rt2800soc_probe(struct platform_device *pdev)
625 {
626 return rt2x00soc_probe(pdev, &rt2800soc_ops);
627 }
628
629 static struct platform_driver rt2800soc_driver = {
630 .driver = {
631 .name = "rt2800_wmac",
632 .owner = THIS_MODULE,
633 .mod_name = KBUILD_MODNAME,
634 },
635 .probe = rt2800soc_probe,
636 .remove = rt2x00soc_remove,
637 .suspend = rt2x00soc_suspend,
638 .resume = rt2x00soc_resume,
639 };
640 #endif /* CONFIG_SOC_RT288X || CONFIG_SOC_RT305X */
641
642 #ifdef CONFIG_PCI
643 static int rt2800pci_probe(struct pci_dev *pci_dev,
644 const struct pci_device_id *id)
645 {
646 return rt2x00pci_probe(pci_dev, &rt2800pci_ops);
647 }
648
649 static struct pci_driver rt2800pci_driver = {
650 .name = KBUILD_MODNAME,
651 .id_table = rt2800pci_device_table,
652 .probe = rt2800pci_probe,
653 .remove = rt2x00pci_remove,
654 .suspend = rt2x00pci_suspend,
655 .resume = rt2x00pci_resume,
656 };
657 #endif /* CONFIG_PCI */
658
659 static int __init rt2800pci_init(void)
660 {
661 int ret = 0;
662
663 #if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X)
664 ret = platform_driver_register(&rt2800soc_driver);
665 if (ret)
666 return ret;
667 #endif
668 #ifdef CONFIG_PCI
669 ret = pci_register_driver(&rt2800pci_driver);
670 if (ret) {
671 #if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X)
672 platform_driver_unregister(&rt2800soc_driver);
673 #endif
674 return ret;
675 }
676 #endif
677
678 return ret;
679 }
680
681 static void __exit rt2800pci_exit(void)
682 {
683 #ifdef CONFIG_PCI
684 pci_unregister_driver(&rt2800pci_driver);
685 #endif
686 #if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X)
687 platform_driver_unregister(&rt2800soc_driver);
688 #endif
689 }
690
691 module_init(rt2800pci_init);
692 module_exit(rt2800pci_exit);
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