Merge branch 'linus' into x86/cleanups
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00pci.c
1 /*
2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2x00pci
23 Abstract: rt2x00 generic pci device routines.
24 */
25
26 #include <linux/dma-mapping.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30
31 #include "rt2x00.h"
32 #include "rt2x00pci.h"
33
34 /*
35 * TX data handlers.
36 */
37 int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev,
38 struct data_queue *queue, struct sk_buff *skb,
39 struct ieee80211_tx_control *control)
40 {
41 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
42 struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data;
43 struct skb_frame_desc *skbdesc;
44 u32 word;
45
46 if (rt2x00queue_full(queue))
47 return -EINVAL;
48
49 rt2x00_desc_read(priv_tx->desc, 0, &word);
50
51 if (rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) ||
52 rt2x00_get_field32(word, TXD_ENTRY_VALID)) {
53 ERROR(rt2x00dev,
54 "Arrived at non-free entry in the non-full queue %d.\n"
55 "Please file bug report to %s.\n",
56 control->queue, DRV_PROJECT);
57 return -EINVAL;
58 }
59
60 /*
61 * Fill in skb descriptor
62 */
63 skbdesc = get_skb_frame_desc(skb);
64 skbdesc->data = skb->data;
65 skbdesc->data_len = skb->len;
66 skbdesc->desc = priv_tx->desc;
67 skbdesc->desc_len = queue->desc_size;
68 skbdesc->entry = entry;
69
70 memcpy(&priv_tx->control, control, sizeof(priv_tx->control));
71 memcpy(priv_tx->data, skb->data, skb->len);
72 rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
73
74 rt2x00queue_index_inc(queue, Q_INDEX);
75
76 return 0;
77 }
78 EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
79
80 /*
81 * TX/RX data handlers.
82 */
83 void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
84 {
85 struct data_queue *queue = rt2x00dev->rx;
86 struct queue_entry *entry;
87 struct queue_entry_priv_pci_rx *priv_rx;
88 struct ieee80211_hdr *hdr;
89 struct skb_frame_desc *skbdesc;
90 struct rxdone_entry_desc rxdesc;
91 int header_size;
92 int align;
93 u32 word;
94
95 while (1) {
96 entry = rt2x00queue_get_entry(queue, Q_INDEX);
97 priv_rx = entry->priv_data;
98 rt2x00_desc_read(priv_rx->desc, 0, &word);
99
100 if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC))
101 break;
102
103 memset(&rxdesc, 0, sizeof(rxdesc));
104 rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc);
105
106 hdr = (struct ieee80211_hdr *)priv_rx->data;
107 header_size =
108 ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control));
109
110 /*
111 * The data behind the ieee80211 header must be
112 * aligned on a 4 byte boundary.
113 */
114 align = header_size % 4;
115
116 /*
117 * Allocate the sk_buffer, initialize it and copy
118 * all data into it.
119 */
120 entry->skb = dev_alloc_skb(rxdesc.size + align);
121 if (!entry->skb)
122 return;
123
124 skb_reserve(entry->skb, align);
125 memcpy(skb_put(entry->skb, rxdesc.size),
126 priv_rx->data, rxdesc.size);
127
128 /*
129 * Fill in skb descriptor
130 */
131 skbdesc = get_skb_frame_desc(entry->skb);
132 memset(skbdesc, 0, sizeof(*skbdesc));
133 skbdesc->data = entry->skb->data;
134 skbdesc->data_len = entry->skb->len;
135 skbdesc->desc = priv_rx->desc;
136 skbdesc->desc_len = queue->desc_size;
137 skbdesc->entry = entry;
138
139 /*
140 * Send the frame to rt2x00lib for further processing.
141 */
142 rt2x00lib_rxdone(entry, &rxdesc);
143
144 if (test_bit(DEVICE_ENABLED_RADIO, &queue->rt2x00dev->flags)) {
145 rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1);
146 rt2x00_desc_write(priv_rx->desc, 0, word);
147 }
148
149 rt2x00queue_index_inc(queue, Q_INDEX);
150 }
151 }
152 EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
153
154 void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct queue_entry *entry,
155 struct txdone_entry_desc *txdesc)
156 {
157 struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data;
158 u32 word;
159
160 txdesc->control = &priv_tx->control;
161 rt2x00lib_txdone(entry, txdesc);
162
163 /*
164 * Make this entry available for reuse.
165 */
166 entry->flags = 0;
167
168 rt2x00_desc_read(priv_tx->desc, 0, &word);
169 rt2x00_set_field32(&word, TXD_ENTRY_OWNER_NIC, 0);
170 rt2x00_set_field32(&word, TXD_ENTRY_VALID, 0);
171 rt2x00_desc_write(priv_tx->desc, 0, word);
172
173 rt2x00queue_index_inc(entry->queue, Q_INDEX_DONE);
174
175 /*
176 * If the data queue was full before the txdone handler
177 * we must make sure the packet queue in the mac80211 stack
178 * is reenabled when the txdone handler has finished.
179 */
180 if (!rt2x00queue_full(entry->queue))
181 ieee80211_wake_queue(rt2x00dev->hw, priv_tx->control.queue);
182
183 }
184 EXPORT_SYMBOL_GPL(rt2x00pci_txdone);
185
186 /*
187 * Device initialization handlers.
188 */
189 #define desc_size(__queue) \
190 ({ \
191 ((__queue)->limit * (__queue)->desc_size);\
192 })
193
194 #define data_size(__queue) \
195 ({ \
196 ((__queue)->limit * (__queue)->data_size);\
197 })
198
199 #define dma_size(__queue) \
200 ({ \
201 data_size(__queue) + desc_size(__queue);\
202 })
203
204 #define desc_offset(__queue, __base, __i) \
205 ({ \
206 (__base) + data_size(__queue) + \
207 ((__i) * (__queue)->desc_size); \
208 })
209
210 #define data_offset(__queue, __base, __i) \
211 ({ \
212 (__base) + \
213 ((__i) * (__queue)->data_size); \
214 })
215
216 static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
217 struct data_queue *queue)
218 {
219 struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
220 struct queue_entry_priv_pci_rx *priv_rx;
221 struct queue_entry_priv_pci_tx *priv_tx;
222 void *addr;
223 dma_addr_t dma;
224 void *desc_addr;
225 dma_addr_t desc_dma;
226 void *data_addr;
227 dma_addr_t data_dma;
228 unsigned int i;
229
230 /*
231 * Allocate DMA memory for descriptor and buffer.
232 */
233 addr = pci_alloc_consistent(pci_dev, dma_size(queue), &dma);
234 if (!addr)
235 return -ENOMEM;
236
237 memset(addr, 0, dma_size(queue));
238
239 /*
240 * Initialize all queue entries to contain valid addresses.
241 */
242 for (i = 0; i < queue->limit; i++) {
243 desc_addr = desc_offset(queue, addr, i);
244 desc_dma = desc_offset(queue, dma, i);
245 data_addr = data_offset(queue, addr, i);
246 data_dma = data_offset(queue, dma, i);
247
248 if (queue->qid == QID_RX) {
249 priv_rx = queue->entries[i].priv_data;
250 priv_rx->desc = desc_addr;
251 priv_rx->desc_dma = desc_dma;
252 priv_rx->data = data_addr;
253 priv_rx->data_dma = data_dma;
254 } else {
255 priv_tx = queue->entries[i].priv_data;
256 priv_tx->desc = desc_addr;
257 priv_tx->desc_dma = desc_dma;
258 priv_tx->data = data_addr;
259 priv_tx->data_dma = data_dma;
260 }
261 }
262
263 return 0;
264 }
265
266 static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
267 struct data_queue *queue)
268 {
269 struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
270 struct queue_entry_priv_pci_rx *priv_rx;
271 struct queue_entry_priv_pci_tx *priv_tx;
272 void *data_addr;
273 dma_addr_t data_dma;
274
275 if (queue->qid == QID_RX) {
276 priv_rx = queue->entries[0].priv_data;
277 data_addr = priv_rx->data;
278 data_dma = priv_rx->data_dma;
279
280 priv_rx->data = NULL;
281 } else {
282 priv_tx = queue->entries[0].priv_data;
283 data_addr = priv_tx->data;
284 data_dma = priv_tx->data_dma;
285
286 priv_tx->data = NULL;
287 }
288
289 if (data_addr)
290 pci_free_consistent(pci_dev, dma_size(queue),
291 data_addr, data_dma);
292 }
293
294 int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
295 {
296 struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
297 struct data_queue *queue;
298 int status;
299
300 /*
301 * Allocate DMA
302 */
303 queue_for_each(rt2x00dev, queue) {
304 status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
305 if (status)
306 goto exit;
307 }
308
309 /*
310 * Register interrupt handler.
311 */
312 status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler,
313 IRQF_SHARED, pci_name(pci_dev), rt2x00dev);
314 if (status) {
315 ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
316 pci_dev->irq, status);
317 goto exit;
318 }
319
320 return 0;
321
322 exit:
323 queue_for_each(rt2x00dev, queue)
324 rt2x00pci_free_queue_dma(rt2x00dev, queue);
325
326 return status;
327 }
328 EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
329
330 void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
331 {
332 struct data_queue *queue;
333
334 /*
335 * Free irq line.
336 */
337 free_irq(rt2x00dev_pci(rt2x00dev)->irq, rt2x00dev);
338
339 /*
340 * Free DMA
341 */
342 queue_for_each(rt2x00dev, queue)
343 rt2x00pci_free_queue_dma(rt2x00dev, queue);
344 }
345 EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
346
347 /*
348 * PCI driver handlers.
349 */
350 static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
351 {
352 kfree(rt2x00dev->rf);
353 rt2x00dev->rf = NULL;
354
355 kfree(rt2x00dev->eeprom);
356 rt2x00dev->eeprom = NULL;
357
358 if (rt2x00dev->csr.base) {
359 iounmap(rt2x00dev->csr.base);
360 rt2x00dev->csr.base = NULL;
361 }
362 }
363
364 static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
365 {
366 struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
367
368 rt2x00dev->csr.base = ioremap(pci_resource_start(pci_dev, 0),
369 pci_resource_len(pci_dev, 0));
370 if (!rt2x00dev->csr.base)
371 goto exit;
372
373 rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
374 if (!rt2x00dev->eeprom)
375 goto exit;
376
377 rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
378 if (!rt2x00dev->rf)
379 goto exit;
380
381 return 0;
382
383 exit:
384 ERROR_PROBE("Failed to allocate registers.\n");
385
386 rt2x00pci_free_reg(rt2x00dev);
387
388 return -ENOMEM;
389 }
390
391 int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
392 {
393 struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
394 struct ieee80211_hw *hw;
395 struct rt2x00_dev *rt2x00dev;
396 int retval;
397
398 retval = pci_request_regions(pci_dev, pci_name(pci_dev));
399 if (retval) {
400 ERROR_PROBE("PCI request regions failed.\n");
401 return retval;
402 }
403
404 retval = pci_enable_device(pci_dev);
405 if (retval) {
406 ERROR_PROBE("Enable device failed.\n");
407 goto exit_release_regions;
408 }
409
410 pci_set_master(pci_dev);
411
412 if (pci_set_mwi(pci_dev))
413 ERROR_PROBE("MWI not available.\n");
414
415 if (pci_set_dma_mask(pci_dev, DMA_32BIT_MASK)) {
416 ERROR_PROBE("PCI DMA not supported.\n");
417 retval = -EIO;
418 goto exit_disable_device;
419 }
420
421 hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
422 if (!hw) {
423 ERROR_PROBE("Failed to allocate hardware.\n");
424 retval = -ENOMEM;
425 goto exit_disable_device;
426 }
427
428 pci_set_drvdata(pci_dev, hw);
429
430 rt2x00dev = hw->priv;
431 rt2x00dev->dev = pci_dev;
432 rt2x00dev->ops = ops;
433 rt2x00dev->hw = hw;
434
435 retval = rt2x00pci_alloc_reg(rt2x00dev);
436 if (retval)
437 goto exit_free_device;
438
439 retval = rt2x00lib_probe_dev(rt2x00dev);
440 if (retval)
441 goto exit_free_reg;
442
443 return 0;
444
445 exit_free_reg:
446 rt2x00pci_free_reg(rt2x00dev);
447
448 exit_free_device:
449 ieee80211_free_hw(hw);
450
451 exit_disable_device:
452 if (retval != -EBUSY)
453 pci_disable_device(pci_dev);
454
455 exit_release_regions:
456 pci_release_regions(pci_dev);
457
458 pci_set_drvdata(pci_dev, NULL);
459
460 return retval;
461 }
462 EXPORT_SYMBOL_GPL(rt2x00pci_probe);
463
464 void rt2x00pci_remove(struct pci_dev *pci_dev)
465 {
466 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
467 struct rt2x00_dev *rt2x00dev = hw->priv;
468
469 /*
470 * Free all allocated data.
471 */
472 rt2x00lib_remove_dev(rt2x00dev);
473 rt2x00pci_free_reg(rt2x00dev);
474 ieee80211_free_hw(hw);
475
476 /*
477 * Free the PCI device data.
478 */
479 pci_set_drvdata(pci_dev, NULL);
480 pci_disable_device(pci_dev);
481 pci_release_regions(pci_dev);
482 }
483 EXPORT_SYMBOL_GPL(rt2x00pci_remove);
484
485 #ifdef CONFIG_PM
486 int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
487 {
488 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
489 struct rt2x00_dev *rt2x00dev = hw->priv;
490 int retval;
491
492 retval = rt2x00lib_suspend(rt2x00dev, state);
493 if (retval)
494 return retval;
495
496 rt2x00pci_free_reg(rt2x00dev);
497
498 pci_save_state(pci_dev);
499 pci_disable_device(pci_dev);
500 return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
501 }
502 EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
503
504 int rt2x00pci_resume(struct pci_dev *pci_dev)
505 {
506 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
507 struct rt2x00_dev *rt2x00dev = hw->priv;
508 int retval;
509
510 if (pci_set_power_state(pci_dev, PCI_D0) ||
511 pci_enable_device(pci_dev) ||
512 pci_restore_state(pci_dev)) {
513 ERROR(rt2x00dev, "Failed to resume device.\n");
514 return -EIO;
515 }
516
517 retval = rt2x00pci_alloc_reg(rt2x00dev);
518 if (retval)
519 return retval;
520
521 retval = rt2x00lib_resume(rt2x00dev);
522 if (retval)
523 goto exit_free_reg;
524
525 return 0;
526
527 exit_free_reg:
528 rt2x00pci_free_reg(rt2x00dev);
529
530 return retval;
531 }
532 EXPORT_SYMBOL_GPL(rt2x00pci_resume);
533 #endif /* CONFIG_PM */
534
535 /*
536 * rt2x00pci module information.
537 */
538 MODULE_AUTHOR(DRV_PROJECT);
539 MODULE_VERSION(DRV_VERSION);
540 MODULE_DESCRIPTION("rt2x00 pci library");
541 MODULE_LICENSE("GPL");
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