drivers/net/wireless/rt2x00/rt2x00queue.h

   1 /*
   2         Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt2x00
  23         Abstract: rt2x00 queue datastructures and routines
  24  */
  25
  26 #ifndef RT2X00QUEUE_H
  27 #define RT2X00QUEUE_H
  28
  29 #include <linux/prefetch.h>
  30
  31 /**
  32  * DOC: Entrie frame size
  33  *
  34  * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
  35  * for USB devices this restriction does not apply, but the value of
  36  * 2432 makes sense since it is big enough to contain the maximum fragment
  37  * size according to the ieee802.11 specs.
  38  */
  39 #define DATA_FRAME_SIZE 2432
  40 #define MGMT_FRAME_SIZE 256
  41
  42 /**
  43  * DOC: Number of entries per queue
  44  *
  45  * Under normal load without fragmentation 12 entries are sufficient
  46  * without the queue being filled up to the maximum. When using fragmentation
  47  * and the queue threshold code we need to add some additional margins to
  48  * make sure the queue will never (or only under extreme load) fill up
  49  * completely.
  50  * Since we don't use preallocated DMA having a large number of queue entries
  51  * will have only minimal impact on the memory requirements for the queue.
  52  */
  53 #define RX_ENTRIES      24
  54 #define TX_ENTRIES      24
  55 #define BEACON_ENTRIES  1
  56 #define ATIM_ENTRIES    8
  57
  58 /**
  59  * enum data_queue_qid: Queue identification
  60  *
  61  * @QID_AC_BE: AC BE queue
  62  * @QID_AC_BK: AC BK queue
  63  * @QID_AC_VI: AC VI queue
  64  * @QID_AC_VO: AC VO queue
  65  * @QID_HCCA: HCCA queue
  66  * @QID_MGMT: MGMT queue (prio queue)
  67  * @QID_RX: RX queue
  68  * @QID_OTHER: None of the above (don't use, only present for completeness)
  69  * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
  70  * @QID_ATIM: Atim queue (value unspeficied, don't send it to device)
  71  */
  72 enum data_queue_qid {
  73         QID_AC_BE = 0,
  74         QID_AC_BK = 1,
  75         QID_AC_VI = 2,
  76         QID_AC_VO = 3,
  77         QID_HCCA = 4,
  78         QID_MGMT = 13,
  79         QID_RX = 14,
  80         QID_OTHER = 15,
  81         QID_BEACON,
  82         QID_ATIM,
  83 };
  84
  85 /**
  86  * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
  87  *
  88  * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
  89  * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
  90  * @FRAME_DESC_IV_STRIPPED: Frame contained a IV/EIV provided by
  91  *      mac80211 but was stripped for processing by the driver.
  92  */
  93 enum skb_frame_desc_flags {
  94         SKBDESC_DMA_MAPPED_RX = 1 << 0,
  95         SKBDESC_DMA_MAPPED_TX = 1 << 1,
  96         FRAME_DESC_IV_STRIPPED = 1 << 2,
  97 };
  98
  99 /**
 100  * struct skb_frame_desc: Descriptor information for the skb buffer
 101  *
 102  * This structure is placed over the driver_data array, this means that
 103  * this structure should not exceed the size of that array (40 bytes).
 104  *
 105  * @flags: Frame flags, see &enum skb_frame_desc_flags.
 106  * @desc_len: Length of the frame descriptor.
 107  * @tx_rate_idx: the index of the TX rate, used for TX status reporting
 108  * @tx_rate_flags: the TX rate flags, used for TX status reporting
 109  * @desc: Pointer to descriptor part of the frame.
 110  *      Note that this pointer could point to something outside
 111  *      of the scope of the skb->data pointer.
 112  * @iv: IV/EIV data used during encryption/decryption.
 113  * @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
 114  * @entry: The entry to which this sk buffer belongs.
 115  */
 116 struct skb_frame_desc {
 117         u8 flags;
 118
 119         u8 desc_len;
 120         u8 tx_rate_idx;
 121         u8 tx_rate_flags;
 122
 123         void *desc;
 124
 125         __le32 iv[2];
 126
 127         dma_addr_t skb_dma;
 128
 129         struct queue_entry *entry;
 130 };
 131
 132 /**
 133  * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
 134  * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
 135  */
 136 static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
 137 {
 138         BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
 139                      IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
 140         return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
 141 }
 142
 143 /**
 144  * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
 145  *
 146  * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
 147  * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
 148  * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
 149  * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
 150  * @RXDONE_CRYPTO_ICV: Driver provided ICV data.
 151  */
 152 enum rxdone_entry_desc_flags {
 153         RXDONE_SIGNAL_PLCP = 1 << 0,
 154         RXDONE_SIGNAL_BITRATE = 1 << 1,
 155         RXDONE_MY_BSS = 1 << 2,
 156         RXDONE_CRYPTO_IV = 1 << 3,
 157         RXDONE_CRYPTO_ICV = 1 << 4,
 158 };
 159
 160 /**
 161  * RXDONE_SIGNAL_MASK - Define to mask off all &rxdone_entry_desc_flags flags
 162  * except for the RXDONE_SIGNAL_* flags. This is useful to convert the dev_flags
 163  * from &rxdone_entry_desc to a signal value type.
 164  */
 165 #define RXDONE_SIGNAL_MASK \
 166        ( RXDONE_SIGNAL_PLCP | RXDONE_SIGNAL_BITRATE )
 167
 168 /**
 169  * struct rxdone_entry_desc: RX Entry descriptor
 170  *
 171  * Summary of information that has been read from the RX frame descriptor.
 172  *
 173  * @timestamp: RX Timestamp
 174  * @signal: Signal of the received frame.
 175  * @rssi: RSSI of the received frame.
 176  * @noise: Measured noise during frame reception.
 177  * @size: Data size of the received frame.
 178  * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
 179  * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
 180  * @cipher: Cipher type used during decryption.
 181  * @cipher_status: Decryption status.
 182  * @iv: IV/EIV data used during decryption.
 183  * @icv: ICV data used during decryption.
 184  */
 185 struct rxdone_entry_desc {
 186         u64 timestamp;
 187         int signal;
 188         int rssi;
 189         int noise;
 190         int size;
 191         int flags;
 192         int dev_flags;
 193         u8 cipher;
 194         u8 cipher_status;
 195
 196         __le32 iv[2];
 197         __le32 icv;
 198 };
 199
 200 /**
 201  * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
 202  *
 203  * @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
 204  * @TXDONE_SUCCESS: Frame was successfully send
 205  * @TXDONE_FAILURE: Frame was not successfully send
 206  * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
 207  *      frame transmission failed due to excessive retries.
 208  */
 209 enum txdone_entry_desc_flags {
 210         TXDONE_UNKNOWN,
 211         TXDONE_SUCCESS,
 212         TXDONE_FAILURE,
 213         TXDONE_EXCESSIVE_RETRY,
 214 };
 215
 216 /**
 217  * struct txdone_entry_desc: TX done entry descriptor
 218  *
 219  * Summary of information that has been read from the TX frame descriptor
 220  * after the device is done with transmission.
 221  *
 222  * @flags: TX done flags (See &enum txdone_entry_desc_flags).
 223  * @retry: Retry count.
 224  */
 225 struct txdone_entry_desc {
 226         unsigned long flags;
 227         int retry;
 228 };
 229
 230 /**
 231  * enum txentry_desc_flags: Status flags for TX entry descriptor
 232  *
 233  * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
 234  * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
 235  * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
 236  * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
 237  * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
 238  * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
 239  * @ENTRY_TXD_BURST: This frame belongs to the same burst event.
 240  * @ENTRY_TXD_ACK: An ACK is required for this frame.
 241  * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
 242  * @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
 243  * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
 244  * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
 245  * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
 246  */
 247 enum txentry_desc_flags {
 248         ENTRY_TXD_RTS_FRAME,
 249         ENTRY_TXD_CTS_FRAME,
 250         ENTRY_TXD_GENERATE_SEQ,
 251         ENTRY_TXD_FIRST_FRAGMENT,
 252         ENTRY_TXD_MORE_FRAG,
 253         ENTRY_TXD_REQ_TIMESTAMP,
 254         ENTRY_TXD_BURST,
 255         ENTRY_TXD_ACK,
 256         ENTRY_TXD_RETRY_MODE,
 257         ENTRY_TXD_ENCRYPT,
 258         ENTRY_TXD_ENCRYPT_PAIRWISE,
 259         ENTRY_TXD_ENCRYPT_IV,
 260         ENTRY_TXD_ENCRYPT_MMIC,
 261 };
 262
 263 /**
 264  * struct txentry_desc: TX Entry descriptor
 265  *
 266  * Summary of information for the frame descriptor before sending a TX frame.
 267  *
 268  * @flags: Descriptor flags (See &enum queue_entry_flags).
 269  * @queue: Queue identification (See &enum data_queue_qid).
 270  * @length_high: PLCP length high word.
 271  * @length_low: PLCP length low word.
 272  * @signal: PLCP signal.
 273  * @service: PLCP service.
 274  * @rate_mode: Rate mode (See @enum rate_modulation).
 275  * @retry_limit: Max number of retries.
 276  * @aifs: AIFS value.
 277  * @ifs: IFS value.
 278  * @cw_min: cwmin value.
 279  * @cw_max: cwmax value.
 280  * @cipher: Cipher type used for encryption.
 281  * @key_idx: Key index used for encryption.
 282  * @iv_offset: Position where IV should be inserted by hardware.
 283  */
 284 struct txentry_desc {
 285         unsigned long flags;
 286
 287         enum data_queue_qid queue;
 288
 289         u16 length_high;
 290         u16 length_low;
 291         u16 signal;
 292         u16 service;
 293
 294         u16 rate_mode;
 295
 296         short retry_limit;
 297         short aifs;
 298         short ifs;
 299         short cw_min;
 300         short cw_max;
 301
 302         enum cipher cipher;
 303         u16 key_idx;
 304         u16 iv_offset;
 305 };
 306
 307 /**
 308  * enum queue_entry_flags: Status flags for queue entry
 309  *
 310  * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
 311  *      As long as this bit is set, this entry may only be touched
 312  *      through the interface structure.
 313  * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
 314  *      transfer (either TX or RX depending on the queue). The entry should
 315  *      only be touched after the device has signaled it is done with it.
 316  * @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data
 317  *      encryption or decryption. The entry should only be touched after
 318  *      the device has signaled it is done with it.
 319  * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
 320  *      for the signal to start sending.
 321  */
 322 enum queue_entry_flags {
 323         ENTRY_BCN_ASSIGNED,
 324         ENTRY_OWNER_DEVICE_DATA,
 325         ENTRY_OWNER_DEVICE_CRYPTO,
 326         ENTRY_DATA_PENDING,
 327 };
 328
 329 /**
 330  * struct queue_entry: Entry inside the &struct data_queue
 331  *
 332  * @flags: Entry flags, see &enum queue_entry_flags.
 333  * @queue: The data queue (&struct data_queue) to which this entry belongs.
 334  * @skb: The buffer which is currently being transmitted (for TX queue),
 335  *      or used to directly recieve data in (for RX queue).
 336  * @entry_idx: The entry index number.
 337  * @priv_data: Private data belonging to this queue entry. The pointer
 338  *      points to data specific to a particular driver and queue type.
 339  */
 340 struct queue_entry {
 341         unsigned long flags;
 342
 343         struct data_queue *queue;
 344
 345         struct sk_buff *skb;
 346
 347         unsigned int entry_idx;
 348
 349         void *priv_data;
 350 };
 351
 352 /**
 353  * enum queue_index: Queue index type
 354  *
 355  * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
 356  *      owned by the hardware then the queue is considered to be full.
 357  * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
 358  *      the hardware and for which we need to run the txdone handler. If this
 359  *      entry is not owned by the hardware the queue is considered to be empty.
 360  * @Q_INDEX_CRYPTO: Index pointer to the next entry which encryption/decription
 361  *      will be completed by the hardware next.
 362  * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
 363  *      of the index array.
 364  */
 365 enum queue_index {
 366         Q_INDEX,
 367         Q_INDEX_DONE,
 368         Q_INDEX_CRYPTO,
 369         Q_INDEX_MAX,
 370 };
 371
 372 /**
 373  * struct data_queue: Data queue
 374  *
 375  * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
 376  * @entries: Base address of the &struct queue_entry which are
 377  *      part of this queue.
 378  * @qid: The queue identification, see &enum data_queue_qid.
 379  * @lock: Spinlock to protect index handling. Whenever @index, @index_done or
 380  *      @index_crypt needs to be changed this lock should be grabbed to prevent
 381  *      index corruption due to concurrency.
 382  * @count: Number of frames handled in the queue.
 383  * @limit: Maximum number of entries in the queue.
 384  * @threshold: Minimum number of free entries before queue is kicked by force.
 385  * @length: Number of frames in queue.
 386  * @index: Index pointers to entry positions in the queue,
 387  *      use &enum queue_index to get a specific index field.
 388  * @txop: maximum burst time.
 389  * @aifs: The aifs value for outgoing frames (field ignored in RX queue).
 390  * @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
 391  * @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
 392  * @data_size: Maximum data size for the frames in this queue.
 393  * @desc_size: Hardware descriptor size for the data in this queue.
 394  * @usb_endpoint: Device endpoint used for communication (USB only)
 395  * @usb_maxpacket: Max packet size for given endpoint (USB only)
 396  */
 397 struct data_queue {
 398         struct rt2x00_dev *rt2x00dev;
 399         struct queue_entry *entries;
 400
 401         enum data_queue_qid qid;
 402
 403         spinlock_t lock;
 404         unsigned int count;
 405         unsigned short limit;
 406         unsigned short threshold;
 407         unsigned short length;
 408         unsigned short index[Q_INDEX_MAX];
 409
 410         unsigned short txop;
 411         unsigned short aifs;
 412         unsigned short cw_min;
 413         unsigned short cw_max;
 414
 415         unsigned short data_size;
 416         unsigned short desc_size;
 417
 418         unsigned short usb_endpoint;
 419         unsigned short usb_maxpacket;
 420 };
 421
 422 /**
 423  * struct data_queue_desc: Data queue description
 424  *
 425  * The information in this structure is used by drivers
 426  * to inform rt2x00lib about the creation of the data queue.
 427  *
 428  * @entry_num: Maximum number of entries for a queue.
 429  * @data_size: Maximum data size for the frames in this queue.
 430  * @desc_size: Hardware descriptor size for the data in this queue.
 431  * @priv_size: Size of per-queue_entry private data.
 432  */
 433 struct data_queue_desc {
 434         unsigned short entry_num;
 435         unsigned short data_size;
 436         unsigned short desc_size;
 437         unsigned short priv_size;
 438 };
 439
 440 /**
 441  * queue_end - Return pointer to the last queue (HELPER MACRO).
 442  * @__dev: Pointer to &struct rt2x00_dev
 443  *
 444  * Using the base rx pointer and the maximum number of available queues,
 445  * this macro will return the address of 1 position beyond  the end of the
 446  * queues array.
 447  */
 448 #define queue_end(__dev) \
 449         &(__dev)->rx[(__dev)->data_queues]
 450
 451 /**
 452  * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
 453  * @__dev: Pointer to &struct rt2x00_dev
 454  *
 455  * Using the base tx pointer and the maximum number of available TX
 456  * queues, this macro will return the address of 1 position beyond
 457  * the end of the TX queue array.
 458  */
 459 #define tx_queue_end(__dev) \
 460         &(__dev)->tx[(__dev)->ops->tx_queues]
 461
 462 /**
 463  * queue_next - Return pointer to next queue in list (HELPER MACRO).
 464  * @__queue: Current queue for which we need the next queue
 465  *
 466  * Using the current queue address we take the address directly
 467  * after the queue to take the next queue. Note that this macro
 468  * should be used carefully since it does not protect against
 469  * moving past the end of the list. (See macros &queue_end and
 470  * &tx_queue_end for determining the end of the queue).
 471  */
 472 #define queue_next(__queue) \
 473         &(__queue)[1]
 474
 475 /**
 476  * queue_loop - Loop through the queues within a specific range (HELPER MACRO).
 477  * @__entry: Pointer where the current queue entry will be stored in.
 478  * @__start: Start queue pointer.
 479  * @__end: End queue pointer.
 480  *
 481  * This macro will loop through all queues between &__start and &__end.
 482  */
 483 #define queue_loop(__entry, __start, __end)                     \
 484         for ((__entry) = (__start);                             \
 485              prefetch(queue_next(__entry)), (__entry) != (__end);\
 486              (__entry) = queue_next(__entry))
 487
 488 /**
 489  * queue_for_each - Loop through all queues
 490  * @__dev: Pointer to &struct rt2x00_dev
 491  * @__entry: Pointer where the current queue entry will be stored in.
 492  *
 493  * This macro will loop through all available queues.
 494  */
 495 #define queue_for_each(__dev, __entry) \
 496         queue_loop(__entry, (__dev)->rx, queue_end(__dev))
 497
 498 /**
 499  * tx_queue_for_each - Loop through the TX queues
 500  * @__dev: Pointer to &struct rt2x00_dev
 501  * @__entry: Pointer where the current queue entry will be stored in.
 502  *
 503  * This macro will loop through all TX related queues excluding
 504  * the Beacon and Atim queues.
 505  */
 506 #define tx_queue_for_each(__dev, __entry) \
 507         queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
 508
 509 /**
 510  * txall_queue_for_each - Loop through all TX related queues
 511  * @__dev: Pointer to &struct rt2x00_dev
 512  * @__entry: Pointer where the current queue entry will be stored in.
 513  *
 514  * This macro will loop through all TX related queues including
 515  * the Beacon and Atim queues.
 516  */
 517 #define txall_queue_for_each(__dev, __entry) \
 518         queue_loop(__entry, (__dev)->tx, queue_end(__dev))
 519
 520 /**
 521  * rt2x00queue_empty - Check if the queue is empty.
 522  * @queue: Queue to check if empty.
 523  */
 524 static inline int rt2x00queue_empty(struct data_queue *queue)
 525 {
 526         return queue->length == 0;
 527 }
 528
 529 /**
 530  * rt2x00queue_full - Check if the queue is full.
 531  * @queue: Queue to check if full.
 532  */
 533 static inline int rt2x00queue_full(struct data_queue *queue)
 534 {
 535         return queue->length == queue->limit;
 536 }
 537
 538 /**
 539  * rt2x00queue_free - Check the number of available entries in queue.
 540  * @queue: Queue to check.
 541  */
 542 static inline int rt2x00queue_available(struct data_queue *queue)
 543 {
 544         return queue->limit - queue->length;
 545 }
 546
 547 /**
 548  * rt2x00queue_threshold - Check if the queue is below threshold
 549  * @queue: Queue to check.
 550  */
 551 static inline int rt2x00queue_threshold(struct data_queue *queue)
 552 {
 553         return rt2x00queue_available(queue) < queue->threshold;
 554 }
 555
 556 /**
 557  * _rt2x00_desc_read - Read a word from the hardware descriptor.
 558  * @desc: Base descriptor address
 559  * @word: Word index from where the descriptor should be read.
 560  * @value: Address where the descriptor value should be written into.
 561  */
 562 static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
 563 {
 564         *value = desc[word];
 565 }
 566
 567 /**
 568  * rt2x00_desc_read - Read a word from the hardware descriptor, this
 569  * function will take care of the byte ordering.
 570  * @desc: Base descriptor address
 571  * @word: Word index from where the descriptor should be read.
 572  * @value: Address where the descriptor value should be written into.
 573  */
 574 static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
 575 {
 576         __le32 tmp;
 577         _rt2x00_desc_read(desc, word, &tmp);
 578         *value = le32_to_cpu(tmp);
 579 }
 580
 581 /**
 582  * rt2x00_desc_write - write a word to the hardware descriptor, this
 583  * function will take care of the byte ordering.
 584  * @desc: Base descriptor address
 585  * @word: Word index from where the descriptor should be written.
 586  * @value: Value that should be written into the descriptor.
 587  */
 588 static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
 589 {
 590         desc[word] = value;
 591 }
 592
 593 /**
 594  * rt2x00_desc_write - write a word to the hardware descriptor.
 595  * @desc: Base descriptor address
 596  * @word: Word index from where the descriptor should be written.
 597  * @value: Value that should be written into the descriptor.
 598  */
 599 static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
 600 {
 601         _rt2x00_desc_write(desc, word, cpu_to_le32(value));
 602 }
 603
 604 #endif /* RT2X00QUEUE_H */