1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
36 #include <linux/export.h>
37 #include <linux/kmemleak.h>
38 #include <linux/module.h>
40 MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
41 MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
42 MODULE_AUTHOR("Larry Finger <Larry.FInger@lwfinger.net>");
43 MODULE_LICENSE("GPL");
44 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
46 static const u16 pcibridge_vendors
[PCI_BRIDGE_VENDOR_MAX
] = {
53 static const u8 ac_to_hwq
[] = {
60 static u8
_rtl_mac_to_hwqueue(struct ieee80211_hw
*hw
,
63 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
64 __le16 fc
= rtl_get_fc(skb
);
65 u8 queue_index
= skb_get_queue_mapping(skb
);
67 if (unlikely(ieee80211_is_beacon(fc
)))
69 if (ieee80211_is_mgmt(fc
) || ieee80211_is_ctl(fc
))
71 if (rtlhal
->hw_type
== HARDWARE_TYPE_RTL8192SE
)
72 if (ieee80211_is_nullfunc(fc
))
75 return ac_to_hwq
[queue_index
];
78 /* Update PCI dependent default settings*/
79 static void _rtl_pci_update_default_setting(struct ieee80211_hw
*hw
)
81 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
82 struct rtl_pci_priv
*pcipriv
= rtl_pcipriv(hw
);
83 struct rtl_ps_ctl
*ppsc
= rtl_psc(rtl_priv(hw
));
84 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
85 u8 pcibridge_vendor
= pcipriv
->ndis_adapter
.pcibridge_vendor
;
88 ppsc
->reg_rfps_level
= 0;
89 ppsc
->support_aspm
= false;
91 /*Update PCI ASPM setting */
92 ppsc
->const_amdpci_aspm
= rtlpci
->const_amdpci_aspm
;
93 switch (rtlpci
->const_pci_aspm
) {
99 /*ASPM dynamically enabled/disable. */
100 ppsc
->reg_rfps_level
|= RT_RF_LPS_LEVEL_ASPM
;
104 /*ASPM with Clock Req dynamically enabled/disable. */
105 ppsc
->reg_rfps_level
|= (RT_RF_LPS_LEVEL_ASPM
|
106 RT_RF_OFF_LEVL_CLK_REQ
);
111 * Always enable ASPM and Clock Req
112 * from initialization to halt.
114 ppsc
->reg_rfps_level
&= ~(RT_RF_LPS_LEVEL_ASPM
);
115 ppsc
->reg_rfps_level
|= (RT_RF_PS_LEVEL_ALWAYS_ASPM
|
116 RT_RF_OFF_LEVL_CLK_REQ
);
121 * Always enable ASPM without Clock Req
122 * from initialization to halt.
124 ppsc
->reg_rfps_level
&= ~(RT_RF_LPS_LEVEL_ASPM
|
125 RT_RF_OFF_LEVL_CLK_REQ
);
126 ppsc
->reg_rfps_level
|= RT_RF_PS_LEVEL_ALWAYS_ASPM
;
130 ppsc
->reg_rfps_level
|= RT_RF_OFF_LEVL_HALT_NIC
;
132 /*Update Radio OFF setting */
133 switch (rtlpci
->const_hwsw_rfoff_d3
) {
135 if (ppsc
->reg_rfps_level
& RT_RF_LPS_LEVEL_ASPM
)
136 ppsc
->reg_rfps_level
|= RT_RF_OFF_LEVL_ASPM
;
140 if (ppsc
->reg_rfps_level
& RT_RF_LPS_LEVEL_ASPM
)
141 ppsc
->reg_rfps_level
|= RT_RF_OFF_LEVL_ASPM
;
142 ppsc
->reg_rfps_level
|= RT_RF_OFF_LEVL_HALT_NIC
;
146 ppsc
->reg_rfps_level
|= RT_RF_OFF_LEVL_PCI_D3
;
150 /*Set HW definition to determine if it supports ASPM. */
151 switch (rtlpci
->const_support_pciaspm
) {
153 /*Not support ASPM. */
154 bool support_aspm
= false;
155 ppsc
->support_aspm
= support_aspm
;
160 bool support_aspm
= true;
161 bool support_backdoor
= true;
162 ppsc
->support_aspm
= support_aspm
;
164 /*if (priv->oem_id == RT_CID_TOSHIBA &&
165 !priv->ndis_adapter.amd_l1_patch)
166 support_backdoor = false; */
168 ppsc
->support_backdoor
= support_backdoor
;
173 /*ASPM value set by chipset. */
174 if (pcibridge_vendor
== PCI_BRIDGE_VENDOR_INTEL
) {
175 bool support_aspm
= true;
176 ppsc
->support_aspm
= support_aspm
;
180 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
,
181 "switch case not processed\n");
185 /* toshiba aspm issue, toshiba will set aspm selfly
186 * so we should not set aspm in driver */
187 pci_read_config_byte(rtlpci
->pdev
, 0x80, &init_aspm
);
188 if (rtlpriv
->rtlhal
.hw_type
== HARDWARE_TYPE_RTL8192SE
&&
190 ppsc
->support_aspm
= false;
193 static bool _rtl_pci_platform_switch_device_pci_aspm(
194 struct ieee80211_hw
*hw
,
197 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
198 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
200 if (rtlhal
->hw_type
!= HARDWARE_TYPE_RTL8192SE
)
203 pci_write_config_byte(rtlpci
->pdev
, 0x80, value
);
208 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
209 static void _rtl_pci_switch_clk_req(struct ieee80211_hw
*hw
, u8 value
)
211 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
212 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
214 pci_write_config_byte(rtlpci
->pdev
, 0x81, value
);
216 if (rtlhal
->hw_type
== HARDWARE_TYPE_RTL8192SE
)
220 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
221 static void rtl_pci_disable_aspm(struct ieee80211_hw
*hw
)
223 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
224 struct rtl_pci_priv
*pcipriv
= rtl_pcipriv(hw
);
225 struct rtl_ps_ctl
*ppsc
= rtl_psc(rtl_priv(hw
));
226 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
227 u8 pcibridge_vendor
= pcipriv
->ndis_adapter
.pcibridge_vendor
;
228 u8 num4bytes
= pcipriv
->ndis_adapter
.num4bytes
;
229 /*Retrieve original configuration settings. */
230 u8 linkctrl_reg
= pcipriv
->ndis_adapter
.linkctrl_reg
;
231 u16 pcibridge_linkctrlreg
= pcipriv
->ndis_adapter
.
232 pcibridge_linkctrlreg
;
236 if (!ppsc
->support_aspm
)
239 if (pcibridge_vendor
== PCI_BRIDGE_VENDOR_UNKNOWN
) {
240 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_TRACE
,
241 "PCI(Bridge) UNKNOWN\n");
246 if (ppsc
->reg_rfps_level
& RT_RF_OFF_LEVL_CLK_REQ
) {
247 RT_CLEAR_PS_LEVEL(ppsc
, RT_RF_OFF_LEVL_CLK_REQ
);
248 _rtl_pci_switch_clk_req(hw
, 0x0);
251 /*for promising device will in L0 state after an I/O. */
252 pci_read_config_byte(rtlpci
->pdev
, 0x80, &tmp_u1b
);
254 /*Set corresponding value. */
255 aspmlevel
|= BIT(0) | BIT(1);
256 linkctrl_reg
&= ~aspmlevel
;
257 pcibridge_linkctrlreg
&= ~(BIT(0) | BIT(1));
259 _rtl_pci_platform_switch_device_pci_aspm(hw
, linkctrl_reg
);
262 /*4 Disable Pci Bridge ASPM */
263 pci_write_config_byte(rtlpci
->pdev
, (num4bytes
<< 2),
264 pcibridge_linkctrlreg
);
270 *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
271 *power saving We should follow the sequence to enable
272 *RTL8192SE first then enable Pci Bridge ASPM
273 *or the system will show bluescreen.
275 static void rtl_pci_enable_aspm(struct ieee80211_hw
*hw
)
277 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
278 struct rtl_pci_priv
*pcipriv
= rtl_pcipriv(hw
);
279 struct rtl_ps_ctl
*ppsc
= rtl_psc(rtl_priv(hw
));
280 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
281 u8 pcibridge_vendor
= pcipriv
->ndis_adapter
.pcibridge_vendor
;
282 u8 num4bytes
= pcipriv
->ndis_adapter
.num4bytes
;
284 u8 u_pcibridge_aspmsetting
;
285 u8 u_device_aspmsetting
;
287 if (!ppsc
->support_aspm
)
290 if (pcibridge_vendor
== PCI_BRIDGE_VENDOR_UNKNOWN
) {
291 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_TRACE
,
292 "PCI(Bridge) UNKNOWN\n");
296 /*4 Enable Pci Bridge ASPM */
298 u_pcibridge_aspmsetting
=
299 pcipriv
->ndis_adapter
.pcibridge_linkctrlreg
|
300 rtlpci
->const_hostpci_aspm_setting
;
302 if (pcibridge_vendor
== PCI_BRIDGE_VENDOR_INTEL
)
303 u_pcibridge_aspmsetting
&= ~BIT(0);
305 pci_write_config_byte(rtlpci
->pdev
, (num4bytes
<< 2),
306 u_pcibridge_aspmsetting
);
308 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
,
309 "PlatformEnableASPM(): Write reg[%x] = %x\n",
310 (pcipriv
->ndis_adapter
.pcibridge_pciehdr_offset
+ 0x10),
311 u_pcibridge_aspmsetting
);
315 /*Get ASPM level (with/without Clock Req) */
316 aspmlevel
= rtlpci
->const_devicepci_aspm_setting
;
317 u_device_aspmsetting
= pcipriv
->ndis_adapter
.linkctrl_reg
;
319 /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
320 /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
322 u_device_aspmsetting
|= aspmlevel
;
324 _rtl_pci_platform_switch_device_pci_aspm(hw
, u_device_aspmsetting
);
326 if (ppsc
->reg_rfps_level
& RT_RF_OFF_LEVL_CLK_REQ
) {
327 _rtl_pci_switch_clk_req(hw
, (ppsc
->reg_rfps_level
&
328 RT_RF_OFF_LEVL_CLK_REQ
) ? 1 : 0);
329 RT_SET_PS_LEVEL(ppsc
, RT_RF_OFF_LEVL_CLK_REQ
);
334 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw
*hw
)
336 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
342 pci_write_config_byte(rtlpci
->pdev
, 0xe0, 0xa0);
344 pci_read_config_byte(rtlpci
->pdev
, 0xe0, &offset_e0
);
346 if (offset_e0
== 0xA0) {
347 pci_read_config_dword(rtlpci
->pdev
, 0xe4, &offset_e4
);
348 if (offset_e4
& BIT(23))
355 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw
*hw
,
356 struct rtl_priv
**buddy_priv
)
358 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
359 struct rtl_pci_priv
*pcipriv
= rtl_pcipriv(hw
);
360 bool find_buddy_priv
= false;
361 struct rtl_priv
*tpriv
= NULL
;
362 struct rtl_pci_priv
*tpcipriv
= NULL
;
364 if (!list_empty(&rtlpriv
->glb_var
->glb_priv_list
)) {
365 list_for_each_entry(tpriv
, &rtlpriv
->glb_var
->glb_priv_list
,
368 tpcipriv
= (struct rtl_pci_priv
*)tpriv
->priv
;
369 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
,
370 "pcipriv->ndis_adapter.funcnumber %x\n",
371 pcipriv
->ndis_adapter
.funcnumber
);
372 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
,
373 "tpcipriv->ndis_adapter.funcnumber %x\n",
374 tpcipriv
->ndis_adapter
.funcnumber
);
376 if ((pcipriv
->ndis_adapter
.busnumber
==
377 tpcipriv
->ndis_adapter
.busnumber
) &&
378 (pcipriv
->ndis_adapter
.devnumber
==
379 tpcipriv
->ndis_adapter
.devnumber
) &&
380 (pcipriv
->ndis_adapter
.funcnumber
!=
381 tpcipriv
->ndis_adapter
.funcnumber
)) {
382 find_buddy_priv
= true;
389 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
,
390 "find_buddy_priv %d\n", find_buddy_priv
);
395 return find_buddy_priv
;
398 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw
*hw
)
400 struct rtl_pci_priv
*pcipriv
= rtl_pcipriv(hw
);
401 struct rtl_pci
*rtlpci
= rtl_pcidev(pcipriv
);
402 u8 capabilityoffset
= pcipriv
->ndis_adapter
.pcibridge_pciehdr_offset
;
406 num4bbytes
= (capabilityoffset
+ 0x10) / 4;
408 /*Read Link Control Register */
409 pci_read_config_byte(rtlpci
->pdev
, (num4bbytes
<< 2), &linkctrl_reg
);
411 pcipriv
->ndis_adapter
.pcibridge_linkctrlreg
= linkctrl_reg
;
414 static void rtl_pci_parse_configuration(struct pci_dev
*pdev
,
415 struct ieee80211_hw
*hw
)
417 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
418 struct rtl_pci_priv
*pcipriv
= rtl_pcipriv(hw
);
423 /*Link Control Register */
424 pcie_capability_read_word(pdev
, PCI_EXP_LNKCTL
, &linkctrl_reg
);
425 pcipriv
->ndis_adapter
.linkctrl_reg
= (u8
)linkctrl_reg
;
427 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
, "Link Control Register =%x\n",
428 pcipriv
->ndis_adapter
.linkctrl_reg
);
430 pci_read_config_byte(pdev
, 0x98, &tmp
);
432 pci_write_config_byte(pdev
, 0x98, tmp
);
435 pci_write_config_byte(pdev
, 0x70f, tmp
);
438 static void rtl_pci_init_aspm(struct ieee80211_hw
*hw
)
440 struct rtl_ps_ctl
*ppsc
= rtl_psc(rtl_priv(hw
));
442 _rtl_pci_update_default_setting(hw
);
444 if (ppsc
->reg_rfps_level
& RT_RF_PS_LEVEL_ALWAYS_ASPM
) {
445 /*Always enable ASPM & Clock Req. */
446 rtl_pci_enable_aspm(hw
);
447 RT_SET_PS_LEVEL(ppsc
, RT_RF_PS_LEVEL_ALWAYS_ASPM
);
452 static void _rtl_pci_io_handler_init(struct device
*dev
,
453 struct ieee80211_hw
*hw
)
455 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
457 rtlpriv
->io
.dev
= dev
;
459 rtlpriv
->io
.write8_async
= pci_write8_async
;
460 rtlpriv
->io
.write16_async
= pci_write16_async
;
461 rtlpriv
->io
.write32_async
= pci_write32_async
;
463 rtlpriv
->io
.read8_sync
= pci_read8_sync
;
464 rtlpriv
->io
.read16_sync
= pci_read16_sync
;
465 rtlpriv
->io
.read32_sync
= pci_read32_sync
;
469 static bool _rtl_update_earlymode_info(struct ieee80211_hw
*hw
,
470 struct sk_buff
*skb
, struct rtl_tcb_desc
*tcb_desc
, u8 tid
)
472 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
473 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
474 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
475 struct sk_buff
*next_skb
;
476 u8 additionlen
= FCS_LEN
;
478 /* here open is 4, wep/tkip is 8, aes is 12*/
479 if (info
->control
.hw_key
)
480 additionlen
+= info
->control
.hw_key
->icv_len
;
482 /* The most skb num is 6 */
483 tcb_desc
->empkt_num
= 0;
484 spin_lock_bh(&rtlpriv
->locks
.waitq_lock
);
485 skb_queue_walk(&rtlpriv
->mac80211
.skb_waitq
[tid
], next_skb
) {
486 struct ieee80211_tx_info
*next_info
;
488 next_info
= IEEE80211_SKB_CB(next_skb
);
489 if (next_info
->flags
& IEEE80211_TX_CTL_AMPDU
) {
490 tcb_desc
->empkt_len
[tcb_desc
->empkt_num
] =
491 next_skb
->len
+ additionlen
;
492 tcb_desc
->empkt_num
++;
497 if (skb_queue_is_last(&rtlpriv
->mac80211
.skb_waitq
[tid
],
501 if (tcb_desc
->empkt_num
>= rtlhal
->max_earlymode_num
)
504 spin_unlock_bh(&rtlpriv
->locks
.waitq_lock
);
509 /* just for early mode now */
510 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw
*hw
)
512 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
513 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
514 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
515 struct sk_buff
*skb
= NULL
;
516 struct ieee80211_tx_info
*info
= NULL
;
517 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
520 if (!rtlpriv
->rtlhal
.earlymode_enable
)
523 if (rtlpriv
->dm
.supp_phymode_switch
&&
524 (rtlpriv
->easy_concurrent_ctl
.switch_in_process
||
525 (rtlpriv
->buddy_priv
&&
526 rtlpriv
->buddy_priv
->easy_concurrent_ctl
.switch_in_process
)))
528 /* we juse use em for BE/BK/VI/VO */
529 for (tid
= 7; tid
>= 0; tid
--) {
530 u8 hw_queue
= ac_to_hwq
[rtl_tid_to_ac(tid
)];
531 struct rtl8192_tx_ring
*ring
= &rtlpci
->tx_ring
[hw_queue
];
532 while (!mac
->act_scanning
&&
533 rtlpriv
->psc
.rfpwr_state
== ERFON
) {
534 struct rtl_tcb_desc tcb_desc
;
535 memset(&tcb_desc
, 0, sizeof(struct rtl_tcb_desc
));
537 spin_lock_bh(&rtlpriv
->locks
.waitq_lock
);
538 if (!skb_queue_empty(&mac
->skb_waitq
[tid
]) &&
539 (ring
->entries
- skb_queue_len(&ring
->queue
) >
540 rtlhal
->max_earlymode_num
)) {
541 skb
= skb_dequeue(&mac
->skb_waitq
[tid
]);
543 spin_unlock_bh(&rtlpriv
->locks
.waitq_lock
);
546 spin_unlock_bh(&rtlpriv
->locks
.waitq_lock
);
548 /* Some macaddr can't do early mode. like
549 * multicast/broadcast/no_qos data */
550 info
= IEEE80211_SKB_CB(skb
);
551 if (info
->flags
& IEEE80211_TX_CTL_AMPDU
)
552 _rtl_update_earlymode_info(hw
, skb
,
555 rtlpriv
->intf_ops
->adapter_tx(hw
, NULL
, skb
, &tcb_desc
);
561 static void _rtl_pci_tx_isr(struct ieee80211_hw
*hw
, int prio
)
563 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
564 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
566 struct rtl8192_tx_ring
*ring
= &rtlpci
->tx_ring
[prio
];
568 while (skb_queue_len(&ring
->queue
)) {
569 struct rtl_tx_desc
*entry
= &ring
->desc
[ring
->idx
];
571 struct ieee80211_tx_info
*info
;
575 u8 own
= (u8
) rtlpriv
->cfg
->ops
->get_desc((u8
*) entry
, true,
578 /*beacon packet will only use the first
579 *descriptor by defaut, and the own may not
580 *be cleared by the hardware
584 ring
->idx
= (ring
->idx
+ 1) % ring
->entries
;
586 skb
= __skb_dequeue(&ring
->queue
);
587 pci_unmap_single(rtlpci
->pdev
,
589 get_desc((u8
*) entry
, true,
590 HW_DESC_TXBUFF_ADDR
),
591 skb
->len
, PCI_DMA_TODEVICE
);
593 /* remove early mode header */
594 if (rtlpriv
->rtlhal
.earlymode_enable
)
595 skb_pull(skb
, EM_HDR_LEN
);
597 RT_TRACE(rtlpriv
, (COMP_INTR
| COMP_SEND
), DBG_TRACE
,
598 "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
600 skb_queue_len(&ring
->queue
),
601 *(u16
*) (skb
->data
+ 22));
603 if (prio
== TXCMD_QUEUE
) {
609 /* for sw LPS, just after NULL skb send out, we can
610 * sure AP knows we are sleeping, we should not let
613 fc
= rtl_get_fc(skb
);
614 if (ieee80211_is_nullfunc(fc
)) {
615 if (ieee80211_has_pm(fc
)) {
616 rtlpriv
->mac80211
.offchan_delay
= true;
617 rtlpriv
->psc
.state_inap
= true;
619 rtlpriv
->psc
.state_inap
= false;
622 if (ieee80211_is_action(fc
)) {
623 struct ieee80211_mgmt
*action_frame
=
624 (struct ieee80211_mgmt
*)skb
->data
;
625 if (action_frame
->u
.action
.u
.ht_smps
.action
==
626 WLAN_HT_ACTION_SMPS
) {
632 /* update tid tx pkt num */
633 tid
= rtl_get_tid(skb
);
635 rtlpriv
->link_info
.tidtx_inperiod
[tid
]++;
637 info
= IEEE80211_SKB_CB(skb
);
638 ieee80211_tx_info_clear_status(info
);
640 info
->flags
|= IEEE80211_TX_STAT_ACK
;
641 /*info->status.rates[0].count = 1; */
643 ieee80211_tx_status_irqsafe(hw
, skb
);
645 if ((ring
->entries
- skb_queue_len(&ring
->queue
))
648 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_LOUD
,
649 "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%d\n",
651 skb_queue_len(&ring
->queue
));
653 ieee80211_wake_queue(hw
,
654 skb_get_queue_mapping
661 if (((rtlpriv
->link_info
.num_rx_inperiod
+
662 rtlpriv
->link_info
.num_tx_inperiod
) > 8) ||
663 (rtlpriv
->link_info
.num_rx_inperiod
> 2)) {
664 rtlpriv
->enter_ps
= false;
665 schedule_work(&rtlpriv
->works
.lps_change_work
);
669 static void _rtl_receive_one(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
670 struct ieee80211_rx_status rx_status
)
672 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
673 struct ieee80211_hdr
*hdr
= rtl_get_hdr(skb
);
674 __le16 fc
= rtl_get_fc(skb
);
675 bool unicast
= false;
676 struct sk_buff
*uskb
= NULL
;
680 memcpy(IEEE80211_SKB_RXCB(skb
), &rx_status
, sizeof(rx_status
));
682 if (is_broadcast_ether_addr(hdr
->addr1
)) {
684 } else if (is_multicast_ether_addr(hdr
->addr1
)) {
688 rtlpriv
->stats
.rxbytesunicast
+= skb
->len
;
691 rtl_is_special_data(hw
, skb
, false);
693 if (ieee80211_is_data(fc
)) {
694 rtlpriv
->cfg
->ops
->led_control(hw
, LED_CTL_RX
);
697 rtlpriv
->link_info
.num_rx_inperiod
++;
700 /* static bcn for roaming */
701 rtl_beacon_statistic(hw
, skb
);
702 rtl_p2p_info(hw
, (void *)skb
->data
, skb
->len
);
705 rtl_swlps_beacon(hw
, (void *)skb
->data
, skb
->len
);
706 rtl_recognize_peer(hw
, (void *)skb
->data
, skb
->len
);
707 if ((rtlpriv
->mac80211
.opmode
== NL80211_IFTYPE_AP
) &&
708 (rtlpriv
->rtlhal
.current_bandtype
== BAND_ON_2_4G
) &&
709 (ieee80211_is_beacon(fc
) || ieee80211_is_probe_resp(fc
)))
712 if (unlikely(!rtl_action_proc(hw
, skb
, false)))
715 uskb
= dev_alloc_skb(skb
->len
+ 128);
717 return; /* exit if allocation failed */
718 memcpy(IEEE80211_SKB_RXCB(uskb
), &rx_status
, sizeof(rx_status
));
719 pdata
= (u8
*)skb_put(uskb
, skb
->len
);
720 memcpy(pdata
, skb
->data
, skb
->len
);
722 ieee80211_rx_irqsafe(hw
, uskb
);
725 static void _rtl_pci_rx_interrupt(struct ieee80211_hw
*hw
)
727 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
728 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
729 int rx_queue_idx
= RTL_PCI_RX_MPDU_QUEUE
;
731 struct ieee80211_rx_status rx_status
= { 0 };
732 unsigned int count
= rtlpci
->rxringcount
;
737 struct rtl_stats stats
= {
742 int index
= rtlpci
->rx_ring
[rx_queue_idx
].idx
;
747 struct rtl_rx_desc
*pdesc
= &rtlpci
->rx_ring
[rx_queue_idx
].desc
[
750 struct sk_buff
*skb
= rtlpci
->rx_ring
[rx_queue_idx
].rx_buf
[
752 struct sk_buff
*new_skb
= NULL
;
754 own
= (u8
) rtlpriv
->cfg
->ops
->get_desc((u8
*) pdesc
,
757 /*wait data to be filled by hardware */
761 rtlpriv
->cfg
->ops
->query_rx_desc(hw
, &stats
,
765 if (stats
.crc
|| stats
.hwerror
)
768 new_skb
= dev_alloc_skb(rtlpci
->rxbuffersize
);
769 if (unlikely(!new_skb
)) {
770 RT_TRACE(rtlpriv
, (COMP_INTR
| COMP_RECV
), DBG_DMESG
,
771 "can't alloc skb for rx\n");
774 kmemleak_not_leak(new_skb
);
776 pci_unmap_single(rtlpci
->pdev
,
777 *((dma_addr_t
*) skb
->cb
),
778 rtlpci
->rxbuffersize
,
781 skb_put(skb
, rtlpriv
->cfg
->ops
->get_desc((u8
*) pdesc
, false,
783 skb_reserve(skb
, stats
.rx_drvinfo_size
+ stats
.rx_bufshift
);
786 * NOTICE This can not be use for mac80211,
787 * this is done in mac80211 code,
788 * if you done here sec DHCP will fail
789 * skb_trim(skb, skb->len - 4);
792 _rtl_receive_one(hw
, skb
, rx_status
);
794 if (((rtlpriv
->link_info
.num_rx_inperiod
+
795 rtlpriv
->link_info
.num_tx_inperiod
) > 8) ||
796 (rtlpriv
->link_info
.num_rx_inperiod
> 2)) {
797 rtlpriv
->enter_ps
= false;
798 schedule_work(&rtlpriv
->works
.lps_change_work
);
801 dev_kfree_skb_any(skb
);
804 rtlpci
->rx_ring
[rx_queue_idx
].rx_buf
[index
] = skb
;
805 *((dma_addr_t
*) skb
->cb
) =
806 pci_map_single(rtlpci
->pdev
, skb_tail_pointer(skb
),
807 rtlpci
->rxbuffersize
,
811 bufferaddress
= (*((dma_addr_t
*)skb
->cb
));
812 if (pci_dma_mapping_error(rtlpci
->pdev
, bufferaddress
))
815 rtlpriv
->cfg
->ops
->set_desc((u8
*) pdesc
, false,
817 (u8
*)&bufferaddress
);
818 rtlpriv
->cfg
->ops
->set_desc((u8
*)pdesc
, false,
820 (u8
*)&rtlpci
->rxbuffersize
);
822 if (index
== rtlpci
->rxringcount
- 1)
823 rtlpriv
->cfg
->ops
->set_desc((u8
*)pdesc
, false,
827 rtlpriv
->cfg
->ops
->set_desc((u8
*)pdesc
, false, HW_DESC_RXOWN
,
830 index
= (index
+ 1) % rtlpci
->rxringcount
;
833 rtlpci
->rx_ring
[rx_queue_idx
].idx
= index
;
836 static irqreturn_t
_rtl_pci_interrupt(int irq
, void *dev_id
)
838 struct ieee80211_hw
*hw
= dev_id
;
839 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
840 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
844 irqreturn_t ret
= IRQ_HANDLED
;
846 spin_lock_irqsave(&rtlpriv
->locks
.irq_th_lock
, flags
);
848 /*read ISR: 4/8bytes */
849 rtlpriv
->cfg
->ops
->interrupt_recognized(hw
, &inta
, &intb
);
851 /*Shared IRQ or HW disappared */
852 if (!inta
|| inta
== 0xffff) {
857 /*<1> beacon related */
858 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_TBDOK
]) {
859 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
860 "beacon ok interrupt!\n");
863 if (unlikely(inta
& rtlpriv
->cfg
->maps
[RTL_IMR_TBDER
])) {
864 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
865 "beacon err interrupt!\n");
868 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_BDOK
]) {
869 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
, "beacon interrupt!\n");
872 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_BCNINT
]) {
873 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
874 "prepare beacon for interrupt!\n");
875 tasklet_schedule(&rtlpriv
->works
.irq_prepare_bcn_tasklet
);
879 if (unlikely(inta
& rtlpriv
->cfg
->maps
[RTL_IMR_TXFOVW
]))
880 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_WARNING
, "IMR_TXFOVW!\n");
882 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_MGNTDOK
]) {
883 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
884 "Manage ok interrupt!\n");
885 _rtl_pci_tx_isr(hw
, MGNT_QUEUE
);
888 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_HIGHDOK
]) {
889 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
890 "HIGH_QUEUE ok interrupt!\n");
891 _rtl_pci_tx_isr(hw
, HIGH_QUEUE
);
894 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_BKDOK
]) {
895 rtlpriv
->link_info
.num_tx_inperiod
++;
897 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
898 "BK Tx OK interrupt!\n");
899 _rtl_pci_tx_isr(hw
, BK_QUEUE
);
902 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_BEDOK
]) {
903 rtlpriv
->link_info
.num_tx_inperiod
++;
905 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
906 "BE TX OK interrupt!\n");
907 _rtl_pci_tx_isr(hw
, BE_QUEUE
);
910 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_VIDOK
]) {
911 rtlpriv
->link_info
.num_tx_inperiod
++;
913 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
914 "VI TX OK interrupt!\n");
915 _rtl_pci_tx_isr(hw
, VI_QUEUE
);
918 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_VODOK
]) {
919 rtlpriv
->link_info
.num_tx_inperiod
++;
921 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
922 "Vo TX OK interrupt!\n");
923 _rtl_pci_tx_isr(hw
, VO_QUEUE
);
926 if (rtlhal
->hw_type
== HARDWARE_TYPE_RTL8192SE
) {
927 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_COMDOK
]) {
928 rtlpriv
->link_info
.num_tx_inperiod
++;
930 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
931 "CMD TX OK interrupt!\n");
932 _rtl_pci_tx_isr(hw
, TXCMD_QUEUE
);
937 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_ROK
]) {
938 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
, "Rx ok interrupt!\n");
939 _rtl_pci_rx_interrupt(hw
);
942 if (unlikely(inta
& rtlpriv
->cfg
->maps
[RTL_IMR_RDU
])) {
943 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_WARNING
,
944 "rx descriptor unavailable!\n");
945 _rtl_pci_rx_interrupt(hw
);
948 if (unlikely(inta
& rtlpriv
->cfg
->maps
[RTL_IMR_RXFOVW
])) {
949 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_WARNING
, "rx overflow !\n");
950 _rtl_pci_rx_interrupt(hw
);
954 if (rtlhal
->hw_type
== HARDWARE_TYPE_RTL8723AE
) {
955 if (inta
& rtlpriv
->cfg
->maps
[RTL_IMR_C2HCMD
]) {
956 RT_TRACE(rtlpriv
, COMP_INTR
, DBG_TRACE
,
957 "firmware interrupt!\n");
958 queue_delayed_work(rtlpriv
->works
.rtl_wq
,
959 &rtlpriv
->works
.fwevt_wq
, 0);
963 if (rtlpriv
->rtlhal
.earlymode_enable
)
964 tasklet_schedule(&rtlpriv
->works
.irq_tasklet
);
967 spin_unlock_irqrestore(&rtlpriv
->locks
.irq_th_lock
, flags
);
971 static void _rtl_pci_irq_tasklet(struct ieee80211_hw
*hw
)
973 _rtl_pci_tx_chk_waitq(hw
);
976 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw
*hw
)
978 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
979 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
980 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
981 struct rtl8192_tx_ring
*ring
= NULL
;
982 struct ieee80211_hdr
*hdr
= NULL
;
983 struct ieee80211_tx_info
*info
= NULL
;
984 struct sk_buff
*pskb
= NULL
;
985 struct rtl_tx_desc
*pdesc
= NULL
;
986 struct rtl_tcb_desc tcb_desc
;
989 memset(&tcb_desc
, 0, sizeof(struct rtl_tcb_desc
));
990 ring
= &rtlpci
->tx_ring
[BEACON_QUEUE
];
991 pskb
= __skb_dequeue(&ring
->queue
);
993 struct rtl_tx_desc
*entry
= &ring
->desc
[ring
->idx
];
994 pci_unmap_single(rtlpci
->pdev
, rtlpriv
->cfg
->ops
->get_desc(
995 (u8
*) entry
, true, HW_DESC_TXBUFF_ADDR
),
996 pskb
->len
, PCI_DMA_TODEVICE
);
1000 /*NB: the beacon data buffer must be 32-bit aligned. */
1001 pskb
= ieee80211_beacon_get(hw
, mac
->vif
);
1004 hdr
= rtl_get_hdr(pskb
);
1005 info
= IEEE80211_SKB_CB(pskb
);
1006 pdesc
= &ring
->desc
[0];
1007 rtlpriv
->cfg
->ops
->fill_tx_desc(hw
, hdr
, (u8
*) pdesc
,
1008 info
, NULL
, pskb
, BEACON_QUEUE
, &tcb_desc
);
1010 __skb_queue_tail(&ring
->queue
, pskb
);
1012 rtlpriv
->cfg
->ops
->set_desc((u8
*) pdesc
, true, HW_DESC_OWN
,
1018 static void _rtl_pci_init_trx_var(struct ieee80211_hw
*hw
)
1020 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1023 for (i
= 0; i
< RTL_PCI_MAX_TX_QUEUE_COUNT
; i
++)
1024 rtlpci
->txringcount
[i
] = RT_TXDESC_NUM
;
1027 *we just alloc 2 desc for beacon queue,
1028 *because we just need first desc in hw beacon.
1030 rtlpci
->txringcount
[BEACON_QUEUE
] = 2;
1033 *BE queue need more descriptor for performance
1034 *consideration or, No more tx desc will happen,
1035 *and may cause mac80211 mem leakage.
1037 rtlpci
->txringcount
[BE_QUEUE
] = RT_TXDESC_NUM_BE_QUEUE
;
1039 rtlpci
->rxbuffersize
= 9100; /*2048/1024; */
1040 rtlpci
->rxringcount
= RTL_PCI_MAX_RX_COUNT
; /*64; */
1043 static void _rtl_pci_init_struct(struct ieee80211_hw
*hw
,
1044 struct pci_dev
*pdev
)
1046 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1047 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1048 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1049 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1051 rtlpci
->up_first_time
= true;
1052 rtlpci
->being_init_adapter
= false;
1055 rtlpci
->pdev
= pdev
;
1057 /*Tx/Rx related var */
1058 _rtl_pci_init_trx_var(hw
);
1060 /*IBSS*/ mac
->beacon_interval
= 100;
1063 mac
->min_space_cfg
= 0;
1064 mac
->max_mss_density
= 0;
1065 /*set sane AMPDU defaults */
1066 mac
->current_ampdu_density
= 7;
1067 mac
->current_ampdu_factor
= 3;
1070 rtlpci
->acm_method
= eAcmWay2_SW
;
1073 tasklet_init(&rtlpriv
->works
.irq_tasklet
,
1074 (void (*)(unsigned long))_rtl_pci_irq_tasklet
,
1076 tasklet_init(&rtlpriv
->works
.irq_prepare_bcn_tasklet
,
1077 (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet
,
1079 INIT_WORK(&rtlpriv
->works
.lps_change_work
,
1080 rtl_lps_change_work_callback
);
1083 static int _rtl_pci_init_tx_ring(struct ieee80211_hw
*hw
,
1084 unsigned int prio
, unsigned int entries
)
1086 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1087 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1088 struct rtl_tx_desc
*ring
;
1090 u32 nextdescaddress
;
1093 ring
= pci_alloc_consistent(rtlpci
->pdev
,
1094 sizeof(*ring
) * entries
, &dma
);
1096 if (!ring
|| (unsigned long)ring
& 0xFF) {
1097 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
,
1098 "Cannot allocate TX ring (prio = %d)\n", prio
);
1102 memset(ring
, 0, sizeof(*ring
) * entries
);
1103 rtlpci
->tx_ring
[prio
].desc
= ring
;
1104 rtlpci
->tx_ring
[prio
].dma
= dma
;
1105 rtlpci
->tx_ring
[prio
].idx
= 0;
1106 rtlpci
->tx_ring
[prio
].entries
= entries
;
1107 skb_queue_head_init(&rtlpci
->tx_ring
[prio
].queue
);
1109 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
, "queue:%d, ring_addr:%p\n",
1112 for (i
= 0; i
< entries
; i
++) {
1113 nextdescaddress
= (u32
) dma
+
1114 ((i
+ 1) % entries
) *
1117 rtlpriv
->cfg
->ops
->set_desc((u8
*)&(ring
[i
]),
1118 true, HW_DESC_TX_NEXTDESC_ADDR
,
1119 (u8
*)&nextdescaddress
);
1125 static int _rtl_pci_init_rx_ring(struct ieee80211_hw
*hw
)
1127 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1128 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1129 struct rtl_rx_desc
*entry
= NULL
;
1130 int i
, rx_queue_idx
;
1134 *rx_queue_idx 0:RX_MPDU_QUEUE
1135 *rx_queue_idx 1:RX_CMD_QUEUE
1137 for (rx_queue_idx
= 0; rx_queue_idx
< RTL_PCI_MAX_RX_QUEUE
;
1139 rtlpci
->rx_ring
[rx_queue_idx
].desc
=
1140 pci_alloc_consistent(rtlpci
->pdev
,
1141 sizeof(*rtlpci
->rx_ring
[rx_queue_idx
].
1142 desc
) * rtlpci
->rxringcount
,
1143 &rtlpci
->rx_ring
[rx_queue_idx
].dma
);
1145 if (!rtlpci
->rx_ring
[rx_queue_idx
].desc
||
1146 (unsigned long)rtlpci
->rx_ring
[rx_queue_idx
].desc
& 0xFF) {
1147 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
,
1148 "Cannot allocate RX ring\n");
1152 memset(rtlpci
->rx_ring
[rx_queue_idx
].desc
, 0,
1153 sizeof(*rtlpci
->rx_ring
[rx_queue_idx
].desc
) *
1154 rtlpci
->rxringcount
);
1156 rtlpci
->rx_ring
[rx_queue_idx
].idx
= 0;
1158 /* If amsdu_8k is disabled, set buffersize to 4096. This
1159 * change will reduce memory fragmentation.
1161 if (rtlpci
->rxbuffersize
> 4096 &&
1162 rtlpriv
->rtlhal
.disable_amsdu_8k
)
1163 rtlpci
->rxbuffersize
= 4096;
1165 for (i
= 0; i
< rtlpci
->rxringcount
; i
++) {
1166 struct sk_buff
*skb
=
1167 dev_alloc_skb(rtlpci
->rxbuffersize
);
1171 kmemleak_not_leak(skb
);
1172 entry
= &rtlpci
->rx_ring
[rx_queue_idx
].desc
[i
];
1174 /*skb->dev = dev; */
1176 rtlpci
->rx_ring
[rx_queue_idx
].rx_buf
[i
] = skb
;
1179 *just set skb->cb to mapping addr
1180 *for pci_unmap_single use
1182 *((dma_addr_t
*) skb
->cb
) =
1183 pci_map_single(rtlpci
->pdev
, skb_tail_pointer(skb
),
1184 rtlpci
->rxbuffersize
,
1185 PCI_DMA_FROMDEVICE
);
1187 bufferaddress
= (*((dma_addr_t
*)skb
->cb
));
1188 if (pci_dma_mapping_error(rtlpci
->pdev
, bufferaddress
)) {
1189 dev_kfree_skb_any(skb
);
1192 rtlpriv
->cfg
->ops
->set_desc((u8
*)entry
, false,
1193 HW_DESC_RXBUFF_ADDR
,
1194 (u8
*)&bufferaddress
);
1195 rtlpriv
->cfg
->ops
->set_desc((u8
*)entry
, false,
1199 rtlpriv
->cfg
->ops
->set_desc((u8
*) entry
, false,
1204 rtlpriv
->cfg
->ops
->set_desc((u8
*) entry
, false,
1205 HW_DESC_RXERO
, &tmp_one
);
1210 static void _rtl_pci_free_tx_ring(struct ieee80211_hw
*hw
,
1213 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1214 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1215 struct rtl8192_tx_ring
*ring
= &rtlpci
->tx_ring
[prio
];
1217 while (skb_queue_len(&ring
->queue
)) {
1218 struct rtl_tx_desc
*entry
= &ring
->desc
[ring
->idx
];
1219 struct sk_buff
*skb
= __skb_dequeue(&ring
->queue
);
1221 pci_unmap_single(rtlpci
->pdev
,
1223 ops
->get_desc((u8
*) entry
, true,
1224 HW_DESC_TXBUFF_ADDR
),
1225 skb
->len
, PCI_DMA_TODEVICE
);
1227 ring
->idx
= (ring
->idx
+ 1) % ring
->entries
;
1231 pci_free_consistent(rtlpci
->pdev
,
1232 sizeof(*ring
->desc
) * ring
->entries
,
1233 ring
->desc
, ring
->dma
);
1238 static void _rtl_pci_free_rx_ring(struct rtl_pci
*rtlpci
)
1240 int i
, rx_queue_idx
;
1242 /*rx_queue_idx 0:RX_MPDU_QUEUE */
1243 /*rx_queue_idx 1:RX_CMD_QUEUE */
1244 for (rx_queue_idx
= 0; rx_queue_idx
< RTL_PCI_MAX_RX_QUEUE
;
1246 for (i
= 0; i
< rtlpci
->rxringcount
; i
++) {
1247 struct sk_buff
*skb
=
1248 rtlpci
->rx_ring
[rx_queue_idx
].rx_buf
[i
];
1252 pci_unmap_single(rtlpci
->pdev
,
1253 *((dma_addr_t
*) skb
->cb
),
1254 rtlpci
->rxbuffersize
,
1255 PCI_DMA_FROMDEVICE
);
1259 if (rtlpci
->rx_ring
[rx_queue_idx
].desc
) {
1260 pci_free_consistent(rtlpci
->pdev
,
1261 sizeof(*rtlpci
->rx_ring
[rx_queue_idx
].
1262 desc
) * rtlpci
->rxringcount
,
1263 rtlpci
->rx_ring
[rx_queue_idx
].desc
,
1264 rtlpci
->rx_ring
[rx_queue_idx
].dma
);
1265 rtlpci
->rx_ring
[rx_queue_idx
].desc
= NULL
;
1270 static int _rtl_pci_init_trx_ring(struct ieee80211_hw
*hw
)
1272 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1276 ret
= _rtl_pci_init_rx_ring(hw
);
1280 for (i
= 0; i
< RTL_PCI_MAX_TX_QUEUE_COUNT
; i
++) {
1281 ret
= _rtl_pci_init_tx_ring(hw
, i
,
1282 rtlpci
->txringcount
[i
]);
1284 goto err_free_rings
;
1290 _rtl_pci_free_rx_ring(rtlpci
);
1292 for (i
= 0; i
< RTL_PCI_MAX_TX_QUEUE_COUNT
; i
++)
1293 if (rtlpci
->tx_ring
[i
].desc
)
1294 _rtl_pci_free_tx_ring(hw
, i
);
1299 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw
*hw
)
1301 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1305 _rtl_pci_free_rx_ring(rtlpci
);
1308 for (i
= 0; i
< RTL_PCI_MAX_TX_QUEUE_COUNT
; i
++)
1309 _rtl_pci_free_tx_ring(hw
, i
);
1314 int rtl_pci_reset_trx_ring(struct ieee80211_hw
*hw
)
1316 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1317 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1318 int i
, rx_queue_idx
;
1319 unsigned long flags
;
1322 /*rx_queue_idx 0:RX_MPDU_QUEUE */
1323 /*rx_queue_idx 1:RX_CMD_QUEUE */
1324 for (rx_queue_idx
= 0; rx_queue_idx
< RTL_PCI_MAX_RX_QUEUE
;
1327 *force the rx_ring[RX_MPDU_QUEUE/
1328 *RX_CMD_QUEUE].idx to the first one
1330 if (rtlpci
->rx_ring
[rx_queue_idx
].desc
) {
1331 struct rtl_rx_desc
*entry
= NULL
;
1333 for (i
= 0; i
< rtlpci
->rxringcount
; i
++) {
1334 entry
= &rtlpci
->rx_ring
[rx_queue_idx
].desc
[i
];
1335 rtlpriv
->cfg
->ops
->set_desc((u8
*) entry
,
1340 rtlpci
->rx_ring
[rx_queue_idx
].idx
= 0;
1345 *after reset, release previous pending packet,
1346 *and force the tx idx to the first one
1348 for (i
= 0; i
< RTL_PCI_MAX_TX_QUEUE_COUNT
; i
++) {
1349 if (rtlpci
->tx_ring
[i
].desc
) {
1350 struct rtl8192_tx_ring
*ring
= &rtlpci
->tx_ring
[i
];
1352 while (skb_queue_len(&ring
->queue
)) {
1353 struct rtl_tx_desc
*entry
;
1354 struct sk_buff
*skb
;
1356 spin_lock_irqsave(&rtlpriv
->locks
.irq_th_lock
,
1358 entry
= &ring
->desc
[ring
->idx
];
1359 skb
= __skb_dequeue(&ring
->queue
);
1360 pci_unmap_single(rtlpci
->pdev
,
1365 HW_DESC_TXBUFF_ADDR
),
1366 skb
->len
, PCI_DMA_TODEVICE
);
1367 ring
->idx
= (ring
->idx
+ 1) % ring
->entries
;
1368 spin_unlock_irqrestore(&rtlpriv
->locks
.irq_th_lock
,
1379 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw
*hw
,
1380 struct ieee80211_sta
*sta
,
1381 struct sk_buff
*skb
)
1383 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1384 struct rtl_sta_info
*sta_entry
= NULL
;
1385 u8 tid
= rtl_get_tid(skb
);
1386 __le16 fc
= rtl_get_fc(skb
);
1390 sta_entry
= (struct rtl_sta_info
*)sta
->drv_priv
;
1392 if (!rtlpriv
->rtlhal
.earlymode_enable
)
1394 if (ieee80211_is_nullfunc(fc
))
1396 if (ieee80211_is_qos_nullfunc(fc
))
1398 if (ieee80211_is_pspoll(fc
))
1400 if (sta_entry
->tids
[tid
].agg
.agg_state
!= RTL_AGG_OPERATIONAL
)
1402 if (_rtl_mac_to_hwqueue(hw
, skb
) > VO_QUEUE
)
1407 /* maybe every tid should be checked */
1408 if (!rtlpriv
->link_info
.higher_busytxtraffic
[tid
])
1411 spin_lock_bh(&rtlpriv
->locks
.waitq_lock
);
1412 skb_queue_tail(&rtlpriv
->mac80211
.skb_waitq
[tid
], skb
);
1413 spin_unlock_bh(&rtlpriv
->locks
.waitq_lock
);
1418 static int rtl_pci_tx(struct ieee80211_hw
*hw
,
1419 struct ieee80211_sta
*sta
,
1420 struct sk_buff
*skb
,
1421 struct rtl_tcb_desc
*ptcb_desc
)
1423 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1424 struct rtl_sta_info
*sta_entry
= NULL
;
1425 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
1426 struct rtl8192_tx_ring
*ring
;
1427 struct rtl_tx_desc
*pdesc
;
1429 u8 hw_queue
= _rtl_mac_to_hwqueue(hw
, skb
);
1430 unsigned long flags
;
1431 struct ieee80211_hdr
*hdr
= rtl_get_hdr(skb
);
1432 __le16 fc
= rtl_get_fc(skb
);
1433 u8
*pda_addr
= hdr
->addr1
;
1434 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1441 if (ieee80211_is_mgmt(fc
))
1442 rtl_tx_mgmt_proc(hw
, skb
);
1444 if (rtlpriv
->psc
.sw_ps_enabled
) {
1445 if (ieee80211_is_data(fc
) && !ieee80211_is_nullfunc(fc
) &&
1446 !ieee80211_has_pm(fc
))
1447 hdr
->frame_control
|= cpu_to_le16(IEEE80211_FCTL_PM
);
1450 rtl_action_proc(hw
, skb
, true);
1452 if (is_multicast_ether_addr(pda_addr
))
1453 rtlpriv
->stats
.txbytesmulticast
+= skb
->len
;
1454 else if (is_broadcast_ether_addr(pda_addr
))
1455 rtlpriv
->stats
.txbytesbroadcast
+= skb
->len
;
1457 rtlpriv
->stats
.txbytesunicast
+= skb
->len
;
1459 spin_lock_irqsave(&rtlpriv
->locks
.irq_th_lock
, flags
);
1460 ring
= &rtlpci
->tx_ring
[hw_queue
];
1461 if (hw_queue
!= BEACON_QUEUE
)
1462 idx
= (ring
->idx
+ skb_queue_len(&ring
->queue
)) %
1467 pdesc
= &ring
->desc
[idx
];
1468 own
= (u8
) rtlpriv
->cfg
->ops
->get_desc((u8
*) pdesc
,
1471 if ((own
== 1) && (hw_queue
!= BEACON_QUEUE
)) {
1472 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_WARNING
,
1473 "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%d\n",
1474 hw_queue
, ring
->idx
, idx
,
1475 skb_queue_len(&ring
->queue
));
1477 spin_unlock_irqrestore(&rtlpriv
->locks
.irq_th_lock
, flags
);
1481 if (ieee80211_is_data_qos(fc
)) {
1482 tid
= rtl_get_tid(skb
);
1484 sta_entry
= (struct rtl_sta_info
*)sta
->drv_priv
;
1485 seq_number
= (le16_to_cpu(hdr
->seq_ctrl
) &
1486 IEEE80211_SCTL_SEQ
) >> 4;
1489 if (!ieee80211_has_morefrags(hdr
->frame_control
))
1490 sta_entry
->tids
[tid
].seq_number
= seq_number
;
1494 if (ieee80211_is_data(fc
))
1495 rtlpriv
->cfg
->ops
->led_control(hw
, LED_CTL_TX
);
1497 rtlpriv
->cfg
->ops
->fill_tx_desc(hw
, hdr
, (u8
*)pdesc
,
1498 info
, sta
, skb
, hw_queue
, ptcb_desc
);
1500 __skb_queue_tail(&ring
->queue
, skb
);
1502 rtlpriv
->cfg
->ops
->set_desc((u8
*)pdesc
, true,
1503 HW_DESC_OWN
, &temp_one
);
1506 if ((ring
->entries
- skb_queue_len(&ring
->queue
)) < 2 &&
1507 hw_queue
!= BEACON_QUEUE
) {
1509 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_LOUD
,
1510 "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%d\n",
1511 hw_queue
, ring
->idx
, idx
,
1512 skb_queue_len(&ring
->queue
));
1514 ieee80211_stop_queue(hw
, skb_get_queue_mapping(skb
));
1517 spin_unlock_irqrestore(&rtlpriv
->locks
.irq_th_lock
, flags
);
1519 rtlpriv
->cfg
->ops
->tx_polling(hw
, hw_queue
);
1524 static void rtl_pci_flush(struct ieee80211_hw
*hw
, bool drop
)
1526 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1527 struct rtl_pci_priv
*pcipriv
= rtl_pcipriv(hw
);
1528 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1529 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1532 struct rtl8192_tx_ring
*ring
;
1537 for (queue_id
= RTL_PCI_MAX_TX_QUEUE_COUNT
- 1; queue_id
>= 0;) {
1539 ring
= &pcipriv
->dev
.tx_ring
[queue_id
];
1540 queue_len
= skb_queue_len(&ring
->queue
);
1541 if (queue_len
== 0 || queue_id
== BEACON_QUEUE
||
1542 queue_id
== TXCMD_QUEUE
) {
1550 /* we just wait 1s for all queues */
1551 if (rtlpriv
->psc
.rfpwr_state
== ERFOFF
||
1552 is_hal_stop(rtlhal
) || i
>= 200)
1557 static void rtl_pci_deinit(struct ieee80211_hw
*hw
)
1559 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1560 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1562 _rtl_pci_deinit_trx_ring(hw
);
1564 synchronize_irq(rtlpci
->pdev
->irq
);
1565 tasklet_kill(&rtlpriv
->works
.irq_tasklet
);
1566 cancel_work_sync(&rtlpriv
->works
.lps_change_work
);
1568 flush_workqueue(rtlpriv
->works
.rtl_wq
);
1569 destroy_workqueue(rtlpriv
->works
.rtl_wq
);
1573 static int rtl_pci_init(struct ieee80211_hw
*hw
, struct pci_dev
*pdev
)
1575 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1578 _rtl_pci_init_struct(hw
, pdev
);
1580 err
= _rtl_pci_init_trx_ring(hw
);
1582 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
,
1583 "tx ring initialization failed\n");
1590 static int rtl_pci_start(struct ieee80211_hw
*hw
)
1592 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1593 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1594 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1595 struct rtl_ps_ctl
*ppsc
= rtl_psc(rtl_priv(hw
));
1599 rtl_pci_reset_trx_ring(hw
);
1601 rtlpci
->driver_is_goingto_unload
= false;
1602 err
= rtlpriv
->cfg
->ops
->hw_init(hw
);
1604 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1605 "Failed to config hardware!\n");
1609 rtlpriv
->cfg
->ops
->enable_interrupt(hw
);
1610 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
, "enable_interrupt OK\n");
1612 rtl_init_rx_config(hw
);
1614 /*should be after adapter start and interrupt enable. */
1615 set_hal_start(rtlhal
);
1617 RT_CLEAR_PS_LEVEL(ppsc
, RT_RF_OFF_LEVL_HALT_NIC
);
1619 rtlpci
->up_first_time
= false;
1621 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
, "OK\n");
1625 static void rtl_pci_stop(struct ieee80211_hw
*hw
)
1627 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1628 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
1629 struct rtl_ps_ctl
*ppsc
= rtl_psc(rtl_priv(hw
));
1630 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1631 unsigned long flags
;
1632 u8 RFInProgressTimeOut
= 0;
1635 *should be before disable interrupt&adapter
1636 *and will do it immediately.
1638 set_hal_stop(rtlhal
);
1640 rtlpriv
->cfg
->ops
->disable_interrupt(hw
);
1641 cancel_work_sync(&rtlpriv
->works
.lps_change_work
);
1643 spin_lock_irqsave(&rtlpriv
->locks
.rf_ps_lock
, flags
);
1644 while (ppsc
->rfchange_inprogress
) {
1645 spin_unlock_irqrestore(&rtlpriv
->locks
.rf_ps_lock
, flags
);
1646 if (RFInProgressTimeOut
> 100) {
1647 spin_lock_irqsave(&rtlpriv
->locks
.rf_ps_lock
, flags
);
1651 RFInProgressTimeOut
++;
1652 spin_lock_irqsave(&rtlpriv
->locks
.rf_ps_lock
, flags
);
1654 ppsc
->rfchange_inprogress
= true;
1655 spin_unlock_irqrestore(&rtlpriv
->locks
.rf_ps_lock
, flags
);
1657 rtlpci
->driver_is_goingto_unload
= true;
1658 rtlpriv
->cfg
->ops
->hw_disable(hw
);
1659 /* some things are not needed if firmware not available */
1660 if (!rtlpriv
->max_fw_size
)
1662 rtlpriv
->cfg
->ops
->led_control(hw
, LED_CTL_POWER_OFF
);
1664 spin_lock_irqsave(&rtlpriv
->locks
.rf_ps_lock
, flags
);
1665 ppsc
->rfchange_inprogress
= false;
1666 spin_unlock_irqrestore(&rtlpriv
->locks
.rf_ps_lock
, flags
);
1668 rtl_pci_enable_aspm(hw
);
1671 static bool _rtl_pci_find_adapter(struct pci_dev
*pdev
,
1672 struct ieee80211_hw
*hw
)
1674 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1675 struct rtl_pci_priv
*pcipriv
= rtl_pcipriv(hw
);
1676 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1677 struct pci_dev
*bridge_pdev
= pdev
->bus
->self
;
1684 pcipriv
->ndis_adapter
.pcibridge_vendor
= PCI_BRIDGE_VENDOR_UNKNOWN
;
1685 venderid
= pdev
->vendor
;
1686 deviceid
= pdev
->device
;
1687 pci_read_config_byte(pdev
, 0x8, &revisionid
);
1688 pci_read_config_word(pdev
, 0x3C, &irqline
);
1690 /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1691 * r8192e_pci, and RTL8192SE, which uses this driver. If the
1692 * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1693 * the correct driver is r8192e_pci, thus this routine should
1696 if (deviceid
== RTL_PCI_8192SE_DID
&&
1697 revisionid
== RTL_PCI_REVISION_ID_8192PCIE
)
1700 if (deviceid
== RTL_PCI_8192_DID
||
1701 deviceid
== RTL_PCI_0044_DID
||
1702 deviceid
== RTL_PCI_0047_DID
||
1703 deviceid
== RTL_PCI_8192SE_DID
||
1704 deviceid
== RTL_PCI_8174_DID
||
1705 deviceid
== RTL_PCI_8173_DID
||
1706 deviceid
== RTL_PCI_8172_DID
||
1707 deviceid
== RTL_PCI_8171_DID
) {
1708 switch (revisionid
) {
1709 case RTL_PCI_REVISION_ID_8192PCIE
:
1710 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1711 "8192 PCI-E is found - vid/did=%x/%x\n",
1712 venderid
, deviceid
);
1713 rtlhal
->hw_type
= HARDWARE_TYPE_RTL8192E
;
1715 case RTL_PCI_REVISION_ID_8192SE
:
1716 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1717 "8192SE is found - vid/did=%x/%x\n",
1718 venderid
, deviceid
);
1719 rtlhal
->hw_type
= HARDWARE_TYPE_RTL8192SE
;
1722 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_WARNING
,
1723 "Err: Unknown device - vid/did=%x/%x\n",
1724 venderid
, deviceid
);
1725 rtlhal
->hw_type
= HARDWARE_TYPE_RTL8192SE
;
1729 } else if (deviceid
== RTL_PCI_8723AE_DID
) {
1730 rtlhal
->hw_type
= HARDWARE_TYPE_RTL8723AE
;
1731 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1732 "8723AE PCI-E is found - "
1733 "vid/did=%x/%x\n", venderid
, deviceid
);
1734 } else if (deviceid
== RTL_PCI_8192CET_DID
||
1735 deviceid
== RTL_PCI_8192CE_DID
||
1736 deviceid
== RTL_PCI_8191CE_DID
||
1737 deviceid
== RTL_PCI_8188CE_DID
) {
1738 rtlhal
->hw_type
= HARDWARE_TYPE_RTL8192CE
;
1739 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1740 "8192C PCI-E is found - vid/did=%x/%x\n",
1741 venderid
, deviceid
);
1742 } else if (deviceid
== RTL_PCI_8192DE_DID
||
1743 deviceid
== RTL_PCI_8192DE_DID2
) {
1744 rtlhal
->hw_type
= HARDWARE_TYPE_RTL8192DE
;
1745 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1746 "8192D PCI-E is found - vid/did=%x/%x\n",
1747 venderid
, deviceid
);
1748 } else if (deviceid
== RTL_PCI_8188EE_DID
) {
1749 rtlhal
->hw_type
= HARDWARE_TYPE_RTL8188EE
;
1750 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
,
1751 "Find adapter, Hardware type is 8188EE\n");
1753 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_WARNING
,
1754 "Err: Unknown device - vid/did=%x/%x\n",
1755 venderid
, deviceid
);
1757 rtlhal
->hw_type
= RTL_DEFAULT_HARDWARE_TYPE
;
1760 if (rtlhal
->hw_type
== HARDWARE_TYPE_RTL8192DE
) {
1761 if (revisionid
== 0 || revisionid
== 1) {
1762 if (revisionid
== 0) {
1763 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
,
1764 "Find 92DE MAC0\n");
1765 rtlhal
->interfaceindex
= 0;
1766 } else if (revisionid
== 1) {
1767 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
,
1768 "Find 92DE MAC1\n");
1769 rtlhal
->interfaceindex
= 1;
1772 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
,
1773 "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
1774 venderid
, deviceid
, revisionid
);
1775 rtlhal
->interfaceindex
= 0;
1779 pcipriv
->ndis_adapter
.busnumber
= pdev
->bus
->number
;
1780 pcipriv
->ndis_adapter
.devnumber
= PCI_SLOT(pdev
->devfn
);
1781 pcipriv
->ndis_adapter
.funcnumber
= PCI_FUNC(pdev
->devfn
);
1783 /* some ARM have no bridge_pdev and will crash here
1784 * so we should check if bridge_pdev is NULL
1787 /*find bridge info if available */
1788 pcipriv
->ndis_adapter
.pcibridge_vendorid
= bridge_pdev
->vendor
;
1789 for (tmp
= 0; tmp
< PCI_BRIDGE_VENDOR_MAX
; tmp
++) {
1790 if (bridge_pdev
->vendor
== pcibridge_vendors
[tmp
]) {
1791 pcipriv
->ndis_adapter
.pcibridge_vendor
= tmp
;
1792 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1793 "Pci Bridge Vendor is found index: %d\n",
1800 if (pcipriv
->ndis_adapter
.pcibridge_vendor
!=
1801 PCI_BRIDGE_VENDOR_UNKNOWN
) {
1802 pcipriv
->ndis_adapter
.pcibridge_busnum
=
1803 bridge_pdev
->bus
->number
;
1804 pcipriv
->ndis_adapter
.pcibridge_devnum
=
1805 PCI_SLOT(bridge_pdev
->devfn
);
1806 pcipriv
->ndis_adapter
.pcibridge_funcnum
=
1807 PCI_FUNC(bridge_pdev
->devfn
);
1808 pcipriv
->ndis_adapter
.pcibridge_pciehdr_offset
=
1809 pci_pcie_cap(bridge_pdev
);
1810 pcipriv
->ndis_adapter
.num4bytes
=
1811 (pcipriv
->ndis_adapter
.pcibridge_pciehdr_offset
+ 0x10) / 4;
1813 rtl_pci_get_linkcontrol_field(hw
);
1815 if (pcipriv
->ndis_adapter
.pcibridge_vendor
==
1816 PCI_BRIDGE_VENDOR_AMD
) {
1817 pcipriv
->ndis_adapter
.amd_l1_patch
=
1818 rtl_pci_get_amd_l1_patch(hw
);
1822 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1823 "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
1824 pcipriv
->ndis_adapter
.busnumber
,
1825 pcipriv
->ndis_adapter
.devnumber
,
1826 pcipriv
->ndis_adapter
.funcnumber
,
1827 pdev
->vendor
, pcipriv
->ndis_adapter
.linkctrl_reg
);
1829 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1830 "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1831 pcipriv
->ndis_adapter
.pcibridge_busnum
,
1832 pcipriv
->ndis_adapter
.pcibridge_devnum
,
1833 pcipriv
->ndis_adapter
.pcibridge_funcnum
,
1834 pcibridge_vendors
[pcipriv
->ndis_adapter
.pcibridge_vendor
],
1835 pcipriv
->ndis_adapter
.pcibridge_pciehdr_offset
,
1836 pcipriv
->ndis_adapter
.pcibridge_linkctrlreg
,
1837 pcipriv
->ndis_adapter
.amd_l1_patch
);
1839 rtl_pci_parse_configuration(pdev
, hw
);
1840 list_add_tail(&rtlpriv
->list
, &rtlpriv
->glb_var
->glb_priv_list
);
1845 int rtl_pci_probe(struct pci_dev
*pdev
,
1846 const struct pci_device_id
*id
)
1848 struct ieee80211_hw
*hw
= NULL
;
1850 struct rtl_priv
*rtlpriv
= NULL
;
1851 struct rtl_pci_priv
*pcipriv
= NULL
;
1852 struct rtl_pci
*rtlpci
;
1853 unsigned long pmem_start
, pmem_len
, pmem_flags
;
1856 err
= pci_enable_device(pdev
);
1858 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
1863 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(32))) {
1864 if (pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32))) {
1866 "Unable to obtain 32bit DMA for consistent allocations\n");
1872 pci_set_master(pdev
);
1874 hw
= ieee80211_alloc_hw(sizeof(struct rtl_pci_priv
) +
1875 sizeof(struct rtl_priv
), &rtl_ops
);
1878 "%s : ieee80211 alloc failed\n", pci_name(pdev
));
1883 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
1884 pci_set_drvdata(pdev
, hw
);
1888 pcipriv
= (void *)rtlpriv
->priv
;
1889 pcipriv
->dev
.pdev
= pdev
;
1890 init_completion(&rtlpriv
->firmware_loading_complete
);
1892 /* init cfg & intf_ops */
1893 rtlpriv
->rtlhal
.interface
= INTF_PCI
;
1894 rtlpriv
->cfg
= (struct rtl_hal_cfg
*)(id
->driver_data
);
1895 rtlpriv
->intf_ops
= &rtl_pci_ops
;
1896 rtlpriv
->glb_var
= &rtl_global_var
;
1899 *init dbgp flags before all
1900 *other functions, because we will
1901 *use it in other funtions like
1902 *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1903 *you can not use these macro
1906 rtl_dbgp_flag_init(hw
);
1909 err
= pci_request_regions(pdev
, KBUILD_MODNAME
);
1911 RT_ASSERT(false, "Can't obtain PCI resources\n");
1915 pmem_start
= pci_resource_start(pdev
, rtlpriv
->cfg
->bar_id
);
1916 pmem_len
= pci_resource_len(pdev
, rtlpriv
->cfg
->bar_id
);
1917 pmem_flags
= pci_resource_flags(pdev
, rtlpriv
->cfg
->bar_id
);
1919 /*shared mem start */
1920 rtlpriv
->io
.pci_mem_start
=
1921 (unsigned long)pci_iomap(pdev
,
1922 rtlpriv
->cfg
->bar_id
, pmem_len
);
1923 if (rtlpriv
->io
.pci_mem_start
== 0) {
1924 RT_ASSERT(false, "Can't map PCI mem\n");
1929 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1930 "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
1931 pmem_start
, pmem_len
, pmem_flags
,
1932 rtlpriv
->io
.pci_mem_start
);
1934 /* Disable Clk Request */
1935 pci_write_config_byte(pdev
, 0x81, 0);
1937 pci_write_config_byte(pdev
, 0x44, 0);
1938 pci_write_config_byte(pdev
, 0x04, 0x06);
1939 pci_write_config_byte(pdev
, 0x04, 0x07);
1942 if (!_rtl_pci_find_adapter(pdev
, hw
)) {
1947 /* Init IO handler */
1948 _rtl_pci_io_handler_init(&pdev
->dev
, hw
);
1950 /*like read eeprom and so on */
1951 rtlpriv
->cfg
->ops
->read_eeprom_info(hw
);
1954 rtl_pci_init_aspm(hw
);
1956 /* Init mac80211 sw */
1957 err
= rtl_init_core(hw
);
1959 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
,
1960 "Can't allocate sw for mac80211\n");
1965 err
= rtl_pci_init(hw
, pdev
);
1967 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
, "Failed to init PCI\n");
1971 if (rtlpriv
->cfg
->ops
->init_sw_vars(hw
)) {
1972 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
, "Can't init_sw_vars\n");
1977 rtlpriv
->cfg
->ops
->init_sw_leds(hw
);
1979 err
= sysfs_create_group(&pdev
->dev
.kobj
, &rtl_attribute_group
);
1981 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
,
1982 "failed to create sysfs device attributes\n");
1986 rtlpci
= rtl_pcidev(pcipriv
);
1987 err
= request_irq(rtlpci
->pdev
->irq
, &_rtl_pci_interrupt
,
1988 IRQF_SHARED
, KBUILD_MODNAME
, hw
);
1990 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
1991 "%s: failed to register IRQ handler\n",
1992 wiphy_name(hw
->wiphy
));
1995 rtlpci
->irq_alloc
= 1;
2000 rtl_deinit_core(hw
);
2002 if (rtlpriv
->io
.pci_mem_start
!= 0)
2003 pci_iounmap(pdev
, (void __iomem
*)rtlpriv
->io
.pci_mem_start
);
2006 pci_release_regions(pdev
);
2007 complete(&rtlpriv
->firmware_loading_complete
);
2011 ieee80211_free_hw(hw
);
2012 pci_set_drvdata(pdev
, NULL
);
2013 pci_disable_device(pdev
);
2018 EXPORT_SYMBOL(rtl_pci_probe
);
2020 void rtl_pci_disconnect(struct pci_dev
*pdev
)
2022 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
2023 struct rtl_pci_priv
*pcipriv
= rtl_pcipriv(hw
);
2024 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
2025 struct rtl_pci
*rtlpci
= rtl_pcidev(pcipriv
);
2026 struct rtl_mac
*rtlmac
= rtl_mac(rtlpriv
);
2028 /* just in case driver is removed before firmware callback */
2029 wait_for_completion(&rtlpriv
->firmware_loading_complete
);
2030 clear_bit(RTL_STATUS_INTERFACE_START
, &rtlpriv
->status
);
2032 sysfs_remove_group(&pdev
->dev
.kobj
, &rtl_attribute_group
);
2034 /*ieee80211_unregister_hw will call ops_stop */
2035 if (rtlmac
->mac80211_registered
== 1) {
2036 ieee80211_unregister_hw(hw
);
2037 rtlmac
->mac80211_registered
= 0;
2039 rtl_deinit_deferred_work(hw
);
2040 rtlpriv
->intf_ops
->adapter_stop(hw
);
2042 rtlpriv
->cfg
->ops
->disable_interrupt(hw
);
2045 rtl_deinit_rfkill(hw
);
2048 rtl_deinit_core(hw
);
2049 rtlpriv
->cfg
->ops
->deinit_sw_vars(hw
);
2051 if (rtlpci
->irq_alloc
) {
2052 synchronize_irq(rtlpci
->pdev
->irq
);
2053 free_irq(rtlpci
->pdev
->irq
, hw
);
2054 rtlpci
->irq_alloc
= 0;
2057 list_del(&rtlpriv
->list
);
2058 if (rtlpriv
->io
.pci_mem_start
!= 0) {
2059 pci_iounmap(pdev
, (void __iomem
*)rtlpriv
->io
.pci_mem_start
);
2060 pci_release_regions(pdev
);
2063 pci_disable_device(pdev
);
2065 rtl_pci_disable_aspm(hw
);
2067 pci_set_drvdata(pdev
, NULL
);
2069 ieee80211_free_hw(hw
);
2071 EXPORT_SYMBOL(rtl_pci_disconnect
);
2073 #ifdef CONFIG_PM_SLEEP
2074 /***************************************
2075 kernel pci power state define:
2076 PCI_D0 ((pci_power_t __force) 0)
2077 PCI_D1 ((pci_power_t __force) 1)
2078 PCI_D2 ((pci_power_t __force) 2)
2079 PCI_D3hot ((pci_power_t __force) 3)
2080 PCI_D3cold ((pci_power_t __force) 4)
2081 PCI_UNKNOWN ((pci_power_t __force) 5)
2083 This function is called when system
2084 goes into suspend state mac80211 will
2085 call rtl_mac_stop() from the mac80211
2086 suspend function first, So there is
2087 no need to call hw_disable here.
2088 ****************************************/
2089 int rtl_pci_suspend(struct device
*dev
)
2091 struct pci_dev
*pdev
= to_pci_dev(dev
);
2092 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
2093 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
2095 rtlpriv
->cfg
->ops
->hw_suspend(hw
);
2096 rtl_deinit_rfkill(hw
);
2100 EXPORT_SYMBOL(rtl_pci_suspend
);
2102 int rtl_pci_resume(struct device
*dev
)
2104 struct pci_dev
*pdev
= to_pci_dev(dev
);
2105 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
2106 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
2108 rtlpriv
->cfg
->ops
->hw_resume(hw
);
2109 rtl_init_rfkill(hw
);
2112 EXPORT_SYMBOL(rtl_pci_resume
);
2113 #endif /* CONFIG_PM_SLEEP */
2115 struct rtl_intf_ops rtl_pci_ops
= {
2116 .read_efuse_byte
= read_efuse_byte
,
2117 .adapter_start
= rtl_pci_start
,
2118 .adapter_stop
= rtl_pci_stop
,
2119 .check_buddy_priv
= rtl_pci_check_buddy_priv
,
2120 .adapter_tx
= rtl_pci_tx
,
2121 .flush
= rtl_pci_flush
,
2122 .reset_trx_ring
= rtl_pci_reset_trx_ring
,
2123 .waitq_insert
= rtl_pci_tx_chk_waitq_insert
,
2125 .disable_aspm
= rtl_pci_disable_aspm
,
2126 .enable_aspm
= rtl_pci_enable_aspm
,