1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
30 #include <linux/export.h>
31 #include "dm_common.h"
32 #include "phy_common.h"
36 #define BT_RSSI_STATE_NORMAL_POWER BIT_OFFSET_LEN_MASK_32(0, 1)
37 #define BT_RSSI_STATE_AMDPU_OFF BIT_OFFSET_LEN_MASK_32(1, 1)
38 #define BT_RSSI_STATE_SPECIAL_LOW BIT_OFFSET_LEN_MASK_32(2, 1)
39 #define BT_RSSI_STATE_BG_EDCA_LOW BIT_OFFSET_LEN_MASK_32(3, 1)
40 #define BT_RSSI_STATE_TXPOWER_LOW BIT_OFFSET_LEN_MASK_32(4, 1)
42 #define RTLPRIV (struct rtl_priv *)
43 #define GET_UNDECORATED_AVERAGE_RSSI(_priv) \
44 ((RTLPRIV(_priv))->mac80211.opmode == \
45 NL80211_IFTYPE_ADHOC) ? \
46 ((RTLPRIV(_priv))->dm.entry_min_undecoratedsmoothed_pwdb) : \
47 ((RTLPRIV(_priv))->dm.undecorated_smoothed_pwdb)
49 static const u32 ofdmswing_table
[OFDM_TABLE_SIZE
] = {
89 static const u8 cckswing_table_ch1ch13
[CCK_TABLE_SIZE
][8] = {
90 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
91 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
92 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
93 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
94 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
95 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
96 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
97 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
98 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
99 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
100 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
101 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
102 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
103 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
104 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
105 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
106 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
107 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
108 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
109 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
110 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
111 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
112 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},
113 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},
114 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},
115 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},
116 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},
117 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
118 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},
119 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},
120 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},
121 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},
122 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}
125 static const u8 cckswing_table_ch14
[CCK_TABLE_SIZE
][8] = {
126 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
127 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
128 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
129 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},
130 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
131 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},
132 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
133 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
134 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
135 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
136 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
137 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
138 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
139 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
140 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
141 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
142 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
143 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
144 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
145 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
146 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
147 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
148 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},
149 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
150 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},
151 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},
152 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
153 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},
154 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
155 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},
156 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
157 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},
158 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}
161 static void rtl92c_dm_diginit(struct ieee80211_hw
*hw
)
163 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
164 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
166 dm_digtable
->dig_enable_flag
= true;
167 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
168 dm_digtable
->cur_igvalue
= 0x20;
169 dm_digtable
->pre_igvalue
= 0x0;
170 dm_digtable
->cursta_connectstate
= DIG_STA_DISCONNECT
;
171 dm_digtable
->presta_connectstate
= DIG_STA_DISCONNECT
;
172 dm_digtable
->curmultista_connectstate
= DIG_MULTISTA_DISCONNECT
;
173 dm_digtable
->rssi_lowthresh
= DM_DIG_THRESH_LOW
;
174 dm_digtable
->rssi_highthresh
= DM_DIG_THRESH_HIGH
;
175 dm_digtable
->fa_lowthresh
= DM_FALSEALARM_THRESH_LOW
;
176 dm_digtable
->fa_highthresh
= DM_FALSEALARM_THRESH_HIGH
;
177 dm_digtable
->rx_gain_range_max
= DM_DIG_MAX
;
178 dm_digtable
->rx_gain_range_min
= DM_DIG_MIN
;
179 dm_digtable
->backoff_val
= DM_DIG_BACKOFF_DEFAULT
;
180 dm_digtable
->backoff_val_range_max
= DM_DIG_BACKOFF_MAX
;
181 dm_digtable
->backoff_val_range_min
= DM_DIG_BACKOFF_MIN
;
182 dm_digtable
->pre_cck_pd_state
= CCK_PD_STAGE_MAX
;
183 dm_digtable
->cur_cck_pd_state
= CCK_PD_STAGE_MAX
;
186 static u8
rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw
*hw
)
188 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
189 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
190 long rssi_val_min
= 0;
192 if ((dm_digtable
->curmultista_connectstate
== DIG_MULTISTA_CONNECT
) &&
193 (dm_digtable
->cursta_connectstate
== DIG_STA_CONNECT
)) {
194 if (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
!= 0)
196 (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
>
197 rtlpriv
->dm
.undecorated_smoothed_pwdb
) ?
198 rtlpriv
->dm
.undecorated_smoothed_pwdb
:
199 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
201 rssi_val_min
= rtlpriv
->dm
.undecorated_smoothed_pwdb
;
202 } else if (dm_digtable
->cursta_connectstate
== DIG_STA_CONNECT
||
203 dm_digtable
->cursta_connectstate
== DIG_STA_BEFORE_CONNECT
) {
204 rssi_val_min
= rtlpriv
->dm
.undecorated_smoothed_pwdb
;
205 } else if (dm_digtable
->curmultista_connectstate
==
206 DIG_MULTISTA_CONNECT
) {
207 rssi_val_min
= rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
210 return (u8
) rssi_val_min
;
213 static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw
*hw
)
216 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
217 struct false_alarm_statistics
*falsealm_cnt
= &(rtlpriv
->falsealm_cnt
);
219 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER1
, MASKDWORD
);
220 falsealm_cnt
->cnt_parity_fail
= ((ret_value
& 0xffff0000) >> 16);
222 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER2
, MASKDWORD
);
223 falsealm_cnt
->cnt_rate_illegal
= (ret_value
& 0xffff);
224 falsealm_cnt
->cnt_crc8_fail
= ((ret_value
& 0xffff0000) >> 16);
226 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER3
, MASKDWORD
);
227 falsealm_cnt
->cnt_mcs_fail
= (ret_value
& 0xffff);
228 falsealm_cnt
->cnt_ofdm_fail
= falsealm_cnt
->cnt_parity_fail
+
229 falsealm_cnt
->cnt_rate_illegal
+
230 falsealm_cnt
->cnt_crc8_fail
+ falsealm_cnt
->cnt_mcs_fail
;
232 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
, BIT(14), 1);
233 ret_value
= rtl_get_bbreg(hw
, RCCK0_FACOUNTERLOWER
, MASKBYTE0
);
234 falsealm_cnt
->cnt_cck_fail
= ret_value
;
236 ret_value
= rtl_get_bbreg(hw
, RCCK0_FACOUNTERUPPER
, MASKBYTE3
);
237 falsealm_cnt
->cnt_cck_fail
+= (ret_value
& 0xff) << 8;
238 falsealm_cnt
->cnt_all
= (falsealm_cnt
->cnt_parity_fail
+
239 falsealm_cnt
->cnt_rate_illegal
+
240 falsealm_cnt
->cnt_crc8_fail
+
241 falsealm_cnt
->cnt_mcs_fail
+
242 falsealm_cnt
->cnt_cck_fail
);
244 rtl_set_bbreg(hw
, ROFDM1_LSTF
, 0x08000000, 1);
245 rtl_set_bbreg(hw
, ROFDM1_LSTF
, 0x08000000, 0);
246 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
, 0x0000c000, 0);
247 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
, 0x0000c000, 2);
249 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
250 "cnt_parity_fail = %d, cnt_rate_illegal = %d, cnt_crc8_fail = %d, cnt_mcs_fail = %d\n",
251 falsealm_cnt
->cnt_parity_fail
,
252 falsealm_cnt
->cnt_rate_illegal
,
253 falsealm_cnt
->cnt_crc8_fail
, falsealm_cnt
->cnt_mcs_fail
);
255 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
256 "cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n",
257 falsealm_cnt
->cnt_ofdm_fail
,
258 falsealm_cnt
->cnt_cck_fail
, falsealm_cnt
->cnt_all
);
261 static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw
*hw
)
263 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
264 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
265 u8 value_igi
= dm_digtable
->cur_igvalue
;
267 if (rtlpriv
->falsealm_cnt
.cnt_all
< DM_DIG_FA_TH0
)
269 else if (rtlpriv
->falsealm_cnt
.cnt_all
< DM_DIG_FA_TH1
)
271 else if (rtlpriv
->falsealm_cnt
.cnt_all
< DM_DIG_FA_TH2
)
273 else if (rtlpriv
->falsealm_cnt
.cnt_all
>= DM_DIG_FA_TH2
)
275 if (value_igi
> DM_DIG_FA_UPPER
)
276 value_igi
= DM_DIG_FA_UPPER
;
277 else if (value_igi
< DM_DIG_FA_LOWER
)
278 value_igi
= DM_DIG_FA_LOWER
;
279 if (rtlpriv
->falsealm_cnt
.cnt_all
> 10000)
282 dm_digtable
->cur_igvalue
= value_igi
;
283 rtl92c_dm_write_dig(hw
);
286 static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw
*hw
)
288 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
289 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
291 if (rtlpriv
->falsealm_cnt
.cnt_all
> dm_digtable
->fa_highthresh
) {
292 if ((dm_digtable
->backoff_val
- 2) <
293 dm_digtable
->backoff_val_range_min
)
294 dm_digtable
->backoff_val
=
295 dm_digtable
->backoff_val_range_min
;
297 dm_digtable
->backoff_val
-= 2;
298 } else if (rtlpriv
->falsealm_cnt
.cnt_all
< dm_digtable
->fa_lowthresh
) {
299 if ((dm_digtable
->backoff_val
+ 2) >
300 dm_digtable
->backoff_val_range_max
)
301 dm_digtable
->backoff_val
=
302 dm_digtable
->backoff_val_range_max
;
304 dm_digtable
->backoff_val
+= 2;
307 if ((dm_digtable
->rssi_val_min
+ 10 - dm_digtable
->backoff_val
) >
308 dm_digtable
->rx_gain_range_max
)
309 dm_digtable
->cur_igvalue
= dm_digtable
->rx_gain_range_max
;
310 else if ((dm_digtable
->rssi_val_min
+ 10 -
311 dm_digtable
->backoff_val
) < dm_digtable
->rx_gain_range_min
)
312 dm_digtable
->cur_igvalue
= dm_digtable
->rx_gain_range_min
;
314 dm_digtable
->cur_igvalue
= dm_digtable
->rssi_val_min
+ 10 -
315 dm_digtable
->backoff_val
;
317 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
318 "rssi_val_min = %x backoff_val %x\n",
319 dm_digtable
->rssi_val_min
, dm_digtable
->backoff_val
);
321 rtl92c_dm_write_dig(hw
);
324 static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw
*hw
)
326 static u8 initialized
; /* initialized to false */
327 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
328 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
329 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
330 long rssi_strength
= rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
331 bool multi_sta
= false;
333 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
)
337 dm_digtable
->cursta_connectstate
!= DIG_STA_DISCONNECT
) {
339 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
341 } else if (initialized
== false) {
343 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_0
;
344 dm_digtable
->cur_igvalue
= 0x20;
345 rtl92c_dm_write_dig(hw
);
348 if (dm_digtable
->curmultista_connectstate
== DIG_MULTISTA_CONNECT
) {
349 if ((rssi_strength
< dm_digtable
->rssi_lowthresh
) &&
350 (dm_digtable
->dig_ext_port_stage
!= DIG_EXT_PORT_STAGE_1
)) {
352 if (dm_digtable
->dig_ext_port_stage
==
353 DIG_EXT_PORT_STAGE_2
) {
354 dm_digtable
->cur_igvalue
= 0x20;
355 rtl92c_dm_write_dig(hw
);
358 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_1
;
359 } else if (rssi_strength
> dm_digtable
->rssi_highthresh
) {
360 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_2
;
361 rtl92c_dm_ctrl_initgain_by_fa(hw
);
363 } else if (dm_digtable
->dig_ext_port_stage
!= DIG_EXT_PORT_STAGE_0
) {
364 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_0
;
365 dm_digtable
->cur_igvalue
= 0x20;
366 rtl92c_dm_write_dig(hw
);
369 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
370 "curmultista_connectstate = %x dig_ext_port_stage %x\n",
371 dm_digtable
->curmultista_connectstate
,
372 dm_digtable
->dig_ext_port_stage
);
375 static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw
*hw
)
377 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
378 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
380 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
,
381 "presta_connectstate = %x, cursta_connectstate = %x\n",
382 dm_digtable
->presta_connectstate
,
383 dm_digtable
->cursta_connectstate
);
385 if (dm_digtable
->presta_connectstate
== dm_digtable
->cursta_connectstate
386 || dm_digtable
->cursta_connectstate
== DIG_STA_BEFORE_CONNECT
387 || dm_digtable
->cursta_connectstate
== DIG_STA_CONNECT
) {
389 if (dm_digtable
->cursta_connectstate
!= DIG_STA_DISCONNECT
) {
390 dm_digtable
->rssi_val_min
=
391 rtl92c_dm_initial_gain_min_pwdb(hw
);
392 rtl92c_dm_ctrl_initgain_by_rssi(hw
);
395 dm_digtable
->rssi_val_min
= 0;
396 dm_digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
397 dm_digtable
->backoff_val
= DM_DIG_BACKOFF_DEFAULT
;
398 dm_digtable
->cur_igvalue
= 0x20;
399 dm_digtable
->pre_igvalue
= 0;
400 rtl92c_dm_write_dig(hw
);
404 static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw
*hw
)
406 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
407 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
408 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
410 if (dm_digtable
->cursta_connectstate
== DIG_STA_CONNECT
) {
411 dm_digtable
->rssi_val_min
= rtl92c_dm_initial_gain_min_pwdb(hw
);
413 if (dm_digtable
->pre_cck_pd_state
== CCK_PD_STAGE_LowRssi
) {
414 if (dm_digtable
->rssi_val_min
<= 25)
415 dm_digtable
->cur_cck_pd_state
=
416 CCK_PD_STAGE_LowRssi
;
418 dm_digtable
->cur_cck_pd_state
=
419 CCK_PD_STAGE_HighRssi
;
421 if (dm_digtable
->rssi_val_min
<= 20)
422 dm_digtable
->cur_cck_pd_state
=
423 CCK_PD_STAGE_LowRssi
;
425 dm_digtable
->cur_cck_pd_state
=
426 CCK_PD_STAGE_HighRssi
;
429 dm_digtable
->cur_cck_pd_state
= CCK_PD_STAGE_MAX
;
432 if (dm_digtable
->pre_cck_pd_state
!= dm_digtable
->cur_cck_pd_state
) {
433 if (dm_digtable
->cur_cck_pd_state
== CCK_PD_STAGE_LowRssi
) {
434 if (rtlpriv
->falsealm_cnt
.cnt_cck_fail
> 800)
435 dm_digtable
->cur_cck_fa_state
=
438 dm_digtable
->cur_cck_fa_state
= CCK_FA_STAGE_Low
;
440 if (dm_digtable
->pre_cck_fa_state
!=
441 dm_digtable
->cur_cck_fa_state
) {
442 if (dm_digtable
->cur_cck_fa_state
==
444 rtl_set_bbreg(hw
, RCCK0_CCA
, MASKBYTE2
,
447 rtl_set_bbreg(hw
, RCCK0_CCA
, MASKBYTE2
,
450 dm_digtable
->pre_cck_fa_state
=
451 dm_digtable
->cur_cck_fa_state
;
454 rtl_set_bbreg(hw
, RCCK0_SYSTEM
, MASKBYTE1
, 0x40);
456 if (IS_92C_SERIAL(rtlhal
->version
))
457 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
,
460 rtl_set_bbreg(hw
, RCCK0_CCA
, MASKBYTE2
, 0xcd);
461 rtl_set_bbreg(hw
, RCCK0_SYSTEM
, MASKBYTE1
, 0x47);
463 if (IS_92C_SERIAL(rtlhal
->version
))
464 rtl_set_bbreg(hw
, RCCK0_FALSEALARMREPORT
,
467 dm_digtable
->pre_cck_pd_state
= dm_digtable
->cur_cck_pd_state
;
470 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
, "CCKPDStage=%x\n",
471 dm_digtable
->cur_cck_pd_state
);
473 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_TRACE
, "is92C=%x\n",
474 IS_92C_SERIAL(rtlhal
->version
));
477 static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw
*hw
)
479 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
480 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
481 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
483 if (mac
->act_scanning
)
486 if (mac
->link_state
>= MAC80211_LINKED
)
487 dm_digtable
->cursta_connectstate
= DIG_STA_CONNECT
;
489 dm_digtable
->cursta_connectstate
= DIG_STA_DISCONNECT
;
491 rtl92c_dm_initial_gain_sta(hw
);
492 rtl92c_dm_initial_gain_multi_sta(hw
);
493 rtl92c_dm_cck_packet_detection_thresh(hw
);
495 dm_digtable
->presta_connectstate
= dm_digtable
->cursta_connectstate
;
499 static void rtl92c_dm_dig(struct ieee80211_hw
*hw
)
501 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
502 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
504 if (rtlpriv
->dm
.dm_initialgain_enable
== false)
506 if (dm_digtable
->dig_enable_flag
== false)
509 rtl92c_dm_ctrl_initgain_by_twoport(hw
);
513 static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw
*hw
)
515 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
517 rtlpriv
->dm
.dynamic_txpower_enable
= false;
519 rtlpriv
->dm
.last_dtp_lvl
= TXHIGHPWRLEVEL_NORMAL
;
520 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
523 void rtl92c_dm_write_dig(struct ieee80211_hw
*hw
)
525 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
526 struct dig_t
*dm_digtable
= &rtlpriv
->dm_digtable
;
528 RT_TRACE(rtlpriv
, COMP_DIG
, DBG_LOUD
,
529 "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n",
530 dm_digtable
->cur_igvalue
, dm_digtable
->pre_igvalue
,
531 dm_digtable
->backoff_val
);
533 dm_digtable
->cur_igvalue
+= 2;
534 if (dm_digtable
->cur_igvalue
> 0x3f)
535 dm_digtable
->cur_igvalue
= 0x3f;
537 if (dm_digtable
->pre_igvalue
!= dm_digtable
->cur_igvalue
) {
538 rtl_set_bbreg(hw
, ROFDM0_XAAGCCORE1
, 0x7f,
539 dm_digtable
->cur_igvalue
);
540 rtl_set_bbreg(hw
, ROFDM0_XBAGCCORE1
, 0x7f,
541 dm_digtable
->cur_igvalue
);
543 dm_digtable
->pre_igvalue
= dm_digtable
->cur_igvalue
;
546 EXPORT_SYMBOL(rtl92c_dm_write_dig
);
548 static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw
*hw
)
550 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
551 long tmpentry_max_pwdb
= 0, tmpentry_min_pwdb
= 0xff;
553 u8 h2c_parameter
[3] = { 0 };
557 if (tmpentry_max_pwdb
!= 0) {
558 rtlpriv
->dm
.entry_max_undecoratedsmoothed_pwdb
=
561 rtlpriv
->dm
.entry_max_undecoratedsmoothed_pwdb
= 0;
564 if (tmpentry_min_pwdb
!= 0xff) {
565 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
=
568 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
= 0;
571 h2c_parameter
[2] = (u8
) (rtlpriv
->dm
.undecorated_smoothed_pwdb
& 0xFF);
572 h2c_parameter
[0] = 0;
574 rtl92c_fill_h2c_cmd(hw
, H2C_RSSI_REPORT
, 3, h2c_parameter
);
577 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw
*hw
)
579 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
580 rtlpriv
->dm
.current_turbo_edca
= false;
581 rtlpriv
->dm
.is_any_nonbepkts
= false;
582 rtlpriv
->dm
.is_cur_rdlstate
= false;
584 EXPORT_SYMBOL(rtl92c_dm_init_edca_turbo
);
586 static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw
*hw
)
588 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
589 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
590 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
592 static u64 last_txok_cnt
;
593 static u64 last_rxok_cnt
;
594 static u32 last_bt_edca_ul
;
595 static u32 last_bt_edca_dl
;
596 u64 cur_txok_cnt
= 0;
597 u64 cur_rxok_cnt
= 0;
598 u32 edca_be_ul
= 0x5ea42b;
599 u32 edca_be_dl
= 0x5ea42b;
600 bool bt_change_edca
= false;
602 if ((last_bt_edca_ul
!= rtlpcipriv
->bt_coexist
.bt_edca_ul
) ||
603 (last_bt_edca_dl
!= rtlpcipriv
->bt_coexist
.bt_edca_dl
)) {
604 rtlpriv
->dm
.current_turbo_edca
= false;
605 last_bt_edca_ul
= rtlpcipriv
->bt_coexist
.bt_edca_ul
;
606 last_bt_edca_dl
= rtlpcipriv
->bt_coexist
.bt_edca_dl
;
609 if (rtlpcipriv
->bt_coexist
.bt_edca_ul
!= 0) {
610 edca_be_ul
= rtlpcipriv
->bt_coexist
.bt_edca_ul
;
611 bt_change_edca
= true;
614 if (rtlpcipriv
->bt_coexist
.bt_edca_dl
!= 0) {
615 edca_be_ul
= rtlpcipriv
->bt_coexist
.bt_edca_dl
;
616 bt_change_edca
= true;
619 if (mac
->link_state
!= MAC80211_LINKED
) {
620 rtlpriv
->dm
.current_turbo_edca
= false;
624 if ((!mac
->ht_enable
) && (!rtlpcipriv
->bt_coexist
.bt_coexistence
)) {
625 if (!(edca_be_ul
& 0xffff0000))
626 edca_be_ul
|= 0x005e0000;
628 if (!(edca_be_dl
& 0xffff0000))
629 edca_be_dl
|= 0x005e0000;
632 if ((bt_change_edca
) || ((!rtlpriv
->dm
.is_any_nonbepkts
) &&
633 (!rtlpriv
->dm
.disable_framebursting
))) {
635 cur_txok_cnt
= rtlpriv
->stats
.txbytesunicast
- last_txok_cnt
;
636 cur_rxok_cnt
= rtlpriv
->stats
.rxbytesunicast
- last_rxok_cnt
;
638 if (cur_rxok_cnt
> 4 * cur_txok_cnt
) {
639 if (!rtlpriv
->dm
.is_cur_rdlstate
||
640 !rtlpriv
->dm
.current_turbo_edca
) {
641 rtl_write_dword(rtlpriv
,
644 rtlpriv
->dm
.is_cur_rdlstate
= true;
647 if (rtlpriv
->dm
.is_cur_rdlstate
||
648 !rtlpriv
->dm
.current_turbo_edca
) {
649 rtl_write_dword(rtlpriv
,
652 rtlpriv
->dm
.is_cur_rdlstate
= false;
655 rtlpriv
->dm
.current_turbo_edca
= true;
657 if (rtlpriv
->dm
.current_turbo_edca
) {
659 rtlpriv
->cfg
->ops
->set_hw_reg(hw
, HW_VAR_AC_PARAM
,
661 rtlpriv
->dm
.current_turbo_edca
= false;
665 rtlpriv
->dm
.is_any_nonbepkts
= false;
666 last_txok_cnt
= rtlpriv
->stats
.txbytesunicast
;
667 last_rxok_cnt
= rtlpriv
->stats
.rxbytesunicast
;
670 static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw
673 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
674 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
675 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
676 struct rtl_efuse
*rtlefuse
= rtl_efuse(rtl_priv(hw
));
677 u8 thermalvalue
, delta
, delta_lck
, delta_iqk
;
678 long ele_a
, ele_d
, temp_cck
, val_x
, value32
;
679 long val_y
, ele_c
= 0;
680 u8 ofdm_index
[2], cck_index
= 0, ofdm_index_old
[2], cck_index_old
= 0;
682 bool is2t
= IS_92C_SERIAL(rtlhal
->version
);
683 s8 txpwr_level
[2] = {0, 0};
684 u8 ofdm_min_index
= 6, rf
;
686 rtlpriv
->dm
.txpower_trackinginit
= true;
687 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
688 "rtl92c_dm_txpower_tracking_callback_thermalmeter\n");
690 thermalvalue
= (u8
) rtl_get_rfreg(hw
, RF90_PATH_A
, RF_T_METER
, 0x1f);
692 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
693 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
694 thermalvalue
, rtlpriv
->dm
.thermalvalue
,
695 rtlefuse
->eeprom_thermalmeter
);
697 rtl92c_phy_ap_calibrate(hw
, (thermalvalue
-
698 rtlefuse
->eeprom_thermalmeter
));
705 ele_d
= rtl_get_bbreg(hw
, ROFDM0_XATXIQIMBALANCE
,
706 MASKDWORD
) & MASKOFDM_D
;
708 for (i
= 0; i
< OFDM_TABLE_LENGTH
; i
++) {
709 if (ele_d
== (ofdmswing_table
[i
] & MASKOFDM_D
)) {
710 ofdm_index_old
[0] = (u8
) i
;
712 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
713 "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
714 ROFDM0_XATXIQIMBALANCE
,
715 ele_d
, ofdm_index_old
[0]);
721 ele_d
= rtl_get_bbreg(hw
, ROFDM0_XBTXIQIMBALANCE
,
722 MASKDWORD
) & MASKOFDM_D
;
724 for (i
= 0; i
< OFDM_TABLE_LENGTH
; i
++) {
725 if (ele_d
== (ofdmswing_table
[i
] &
728 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
,
730 "Initial pathB ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
731 ROFDM0_XBTXIQIMBALANCE
, ele_d
,
739 rtl_get_bbreg(hw
, RCCK0_TXFILTER2
, MASKDWORD
) & MASKCCK
;
741 for (i
= 0; i
< CCK_TABLE_LENGTH
; i
++) {
742 if (rtlpriv
->dm
.cck_inch14
) {
743 if (memcmp((void *)&temp_cck
,
744 (void *)&cckswing_table_ch14
[i
][2],
746 cck_index_old
= (u8
) i
;
748 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
,
750 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
751 RCCK0_TXFILTER2
, temp_cck
,
753 rtlpriv
->dm
.cck_inch14
);
757 if (memcmp((void *)&temp_cck
,
759 &cckswing_table_ch1ch13
[i
][2],
761 cck_index_old
= (u8
) i
;
763 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
,
765 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch14 %d\n",
766 RCCK0_TXFILTER2
, temp_cck
,
768 rtlpriv
->dm
.cck_inch14
);
774 if (!rtlpriv
->dm
.thermalvalue
) {
775 rtlpriv
->dm
.thermalvalue
=
776 rtlefuse
->eeprom_thermalmeter
;
777 rtlpriv
->dm
.thermalvalue_lck
= thermalvalue
;
778 rtlpriv
->dm
.thermalvalue_iqk
= thermalvalue
;
779 for (i
= 0; i
< rf
; i
++)
780 rtlpriv
->dm
.ofdm_index
[i
] = ofdm_index_old
[i
];
781 rtlpriv
->dm
.cck_index
= cck_index_old
;
784 delta
= (thermalvalue
> rtlpriv
->dm
.thermalvalue
) ?
785 (thermalvalue
- rtlpriv
->dm
.thermalvalue
) :
786 (rtlpriv
->dm
.thermalvalue
- thermalvalue
);
788 delta_lck
= (thermalvalue
> rtlpriv
->dm
.thermalvalue_lck
) ?
789 (thermalvalue
- rtlpriv
->dm
.thermalvalue_lck
) :
790 (rtlpriv
->dm
.thermalvalue_lck
- thermalvalue
);
792 delta_iqk
= (thermalvalue
> rtlpriv
->dm
.thermalvalue_iqk
) ?
793 (thermalvalue
- rtlpriv
->dm
.thermalvalue_iqk
) :
794 (rtlpriv
->dm
.thermalvalue_iqk
- thermalvalue
);
796 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
797 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
798 thermalvalue
, rtlpriv
->dm
.thermalvalue
,
799 rtlefuse
->eeprom_thermalmeter
, delta
, delta_lck
,
803 rtlpriv
->dm
.thermalvalue_lck
= thermalvalue
;
804 rtl92c_phy_lc_calibrate(hw
);
807 if (delta
> 0 && rtlpriv
->dm
.txpower_track_control
) {
808 if (thermalvalue
> rtlpriv
->dm
.thermalvalue
) {
809 for (i
= 0; i
< rf
; i
++)
810 rtlpriv
->dm
.ofdm_index
[i
] -= delta
;
811 rtlpriv
->dm
.cck_index
-= delta
;
813 for (i
= 0; i
< rf
; i
++)
814 rtlpriv
->dm
.ofdm_index
[i
] += delta
;
815 rtlpriv
->dm
.cck_index
+= delta
;
819 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
820 "temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, cck_index=0x%x\n",
821 rtlpriv
->dm
.ofdm_index
[0],
822 rtlpriv
->dm
.ofdm_index
[1],
823 rtlpriv
->dm
.cck_index
);
825 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
826 "temp OFDM_A_index=0x%x, cck_index=0x%x\n",
827 rtlpriv
->dm
.ofdm_index
[0],
828 rtlpriv
->dm
.cck_index
);
831 if (thermalvalue
> rtlefuse
->eeprom_thermalmeter
) {
832 for (i
= 0; i
< rf
; i
++)
834 rtlpriv
->dm
.ofdm_index
[i
]
836 cck_index
= rtlpriv
->dm
.cck_index
+ 1;
838 for (i
= 0; i
< rf
; i
++)
840 rtlpriv
->dm
.ofdm_index
[i
];
841 cck_index
= rtlpriv
->dm
.cck_index
;
844 for (i
= 0; i
< rf
; i
++) {
845 if (txpwr_level
[i
] >= 0 &&
846 txpwr_level
[i
] <= 26) {
848 rtlefuse
->eeprom_thermalmeter
) {
854 } else if (delta
> 5 && thermalvalue
<
856 eeprom_thermalmeter
) {
859 } else if (txpwr_level
[i
] >= 27 &&
862 rtlefuse
->eeprom_thermalmeter
) {
868 } else if (txpwr_level
[i
] >= 32 &&
869 txpwr_level
[i
] <= 38 &&
871 rtlefuse
->eeprom_thermalmeter
877 if (txpwr_level
[i
] >= 0 && txpwr_level
[i
] <= 26) {
879 rtlefuse
->eeprom_thermalmeter
) {
885 } else if (delta
> 5 && thermalvalue
<
886 rtlefuse
->eeprom_thermalmeter
) {
889 } else if (txpwr_level
[i
] >= 27 &&
890 txpwr_level
[i
] <= 32 &&
892 rtlefuse
->eeprom_thermalmeter
) {
898 } else if (txpwr_level
[i
] >= 32 &&
899 txpwr_level
[i
] <= 38 &&
900 thermalvalue
> rtlefuse
->eeprom_thermalmeter
905 for (i
= 0; i
< rf
; i
++) {
906 if (ofdm_index
[i
] > OFDM_TABLE_SIZE
- 1)
907 ofdm_index
[i
] = OFDM_TABLE_SIZE
- 1;
909 else if (ofdm_index
[i
] < ofdm_min_index
)
910 ofdm_index
[i
] = ofdm_min_index
;
913 if (cck_index
> CCK_TABLE_SIZE
- 1)
914 cck_index
= CCK_TABLE_SIZE
- 1;
915 else if (cck_index
< 0)
919 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
920 "new OFDM_A_index=0x%x, OFDM_B_index=0x%x, cck_index=0x%x\n",
921 ofdm_index
[0], ofdm_index
[1],
924 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
925 "new OFDM_A_index=0x%x, cck_index=0x%x\n",
926 ofdm_index
[0], cck_index
);
930 if (rtlpriv
->dm
.txpower_track_control
&& delta
!= 0) {
932 (ofdmswing_table
[ofdm_index
[0]] & 0xFFC00000) >> 22;
933 val_x
= rtlphy
->reg_e94
;
934 val_y
= rtlphy
->reg_e9c
;
937 if ((val_x
& 0x00000200) != 0)
938 val_x
= val_x
| 0xFFFFFC00;
939 ele_a
= ((val_x
* ele_d
) >> 8) & 0x000003FF;
941 if ((val_y
& 0x00000200) != 0)
942 val_y
= val_y
| 0xFFFFFC00;
943 ele_c
= ((val_y
* ele_d
) >> 8) & 0x000003FF;
945 value32
= (ele_d
<< 22) |
946 ((ele_c
& 0x3F) << 16) | ele_a
;
948 rtl_set_bbreg(hw
, ROFDM0_XATXIQIMBALANCE
,
951 value32
= (ele_c
& 0x000003C0) >> 6;
952 rtl_set_bbreg(hw
, ROFDM0_XCTXAFE
, MASKH4BITS
,
955 value32
= ((val_x
* ele_d
) >> 7) & 0x01;
956 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
959 value32
= ((val_y
* ele_d
) >> 7) & 0x01;
960 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
963 rtl_set_bbreg(hw
, ROFDM0_XATXIQIMBALANCE
,
965 ofdmswing_table
[ofdm_index
[0]]);
967 rtl_set_bbreg(hw
, ROFDM0_XCTXAFE
, MASKH4BITS
,
969 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
970 BIT(31) | BIT(29), 0x00);
973 if (!rtlpriv
->dm
.cck_inch14
) {
974 rtl_write_byte(rtlpriv
, 0xa22,
975 cckswing_table_ch1ch13
[cck_index
]
977 rtl_write_byte(rtlpriv
, 0xa23,
978 cckswing_table_ch1ch13
[cck_index
]
980 rtl_write_byte(rtlpriv
, 0xa24,
981 cckswing_table_ch1ch13
[cck_index
]
983 rtl_write_byte(rtlpriv
, 0xa25,
984 cckswing_table_ch1ch13
[cck_index
]
986 rtl_write_byte(rtlpriv
, 0xa26,
987 cckswing_table_ch1ch13
[cck_index
]
989 rtl_write_byte(rtlpriv
, 0xa27,
990 cckswing_table_ch1ch13
[cck_index
]
992 rtl_write_byte(rtlpriv
, 0xa28,
993 cckswing_table_ch1ch13
[cck_index
]
995 rtl_write_byte(rtlpriv
, 0xa29,
996 cckswing_table_ch1ch13
[cck_index
]
999 rtl_write_byte(rtlpriv
, 0xa22,
1000 cckswing_table_ch14
[cck_index
]
1002 rtl_write_byte(rtlpriv
, 0xa23,
1003 cckswing_table_ch14
[cck_index
]
1005 rtl_write_byte(rtlpriv
, 0xa24,
1006 cckswing_table_ch14
[cck_index
]
1008 rtl_write_byte(rtlpriv
, 0xa25,
1009 cckswing_table_ch14
[cck_index
]
1011 rtl_write_byte(rtlpriv
, 0xa26,
1012 cckswing_table_ch14
[cck_index
]
1014 rtl_write_byte(rtlpriv
, 0xa27,
1015 cckswing_table_ch14
[cck_index
]
1017 rtl_write_byte(rtlpriv
, 0xa28,
1018 cckswing_table_ch14
[cck_index
]
1020 rtl_write_byte(rtlpriv
, 0xa29,
1021 cckswing_table_ch14
[cck_index
]
1026 ele_d
= (ofdmswing_table
[ofdm_index
[1]] &
1029 val_x
= rtlphy
->reg_eb4
;
1030 val_y
= rtlphy
->reg_ebc
;
1033 if ((val_x
& 0x00000200) != 0)
1034 val_x
= val_x
| 0xFFFFFC00;
1035 ele_a
= ((val_x
* ele_d
) >> 8) &
1038 if ((val_y
& 0x00000200) != 0)
1039 val_y
= val_y
| 0xFFFFFC00;
1040 ele_c
= ((val_y
* ele_d
) >> 8) &
1043 value32
= (ele_d
<< 22) |
1044 ((ele_c
& 0x3F) << 16) | ele_a
;
1046 ROFDM0_XBTXIQIMBALANCE
,
1047 MASKDWORD
, value32
);
1049 value32
= (ele_c
& 0x000003C0) >> 6;
1050 rtl_set_bbreg(hw
, ROFDM0_XDTXAFE
,
1051 MASKH4BITS
, value32
);
1053 value32
= ((val_x
* ele_d
) >> 7) & 0x01;
1054 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1057 value32
= ((val_y
* ele_d
) >> 7) & 0x01;
1058 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1062 ROFDM0_XBTXIQIMBALANCE
,
1064 ofdmswing_table
[ofdm_index
1066 rtl_set_bbreg(hw
, ROFDM0_XDTXAFE
,
1068 rtl_set_bbreg(hw
, ROFDM0_ECCATHRESHOLD
,
1069 BIT(27) | BIT(25), 0x00);
1075 if (delta_iqk
> 3) {
1076 rtlpriv
->dm
.thermalvalue_iqk
= thermalvalue
;
1077 rtl92c_phy_iq_calibrate(hw
, false);
1080 if (rtlpriv
->dm
.txpower_track_control
)
1081 rtlpriv
->dm
.thermalvalue
= thermalvalue
;
1084 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
, "<===\n");
1088 static void rtl92c_dm_initialize_txpower_tracking_thermalmeter(
1089 struct ieee80211_hw
*hw
)
1091 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1093 rtlpriv
->dm
.txpower_tracking
= true;
1094 rtlpriv
->dm
.txpower_trackinginit
= false;
1096 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
1097 "pMgntInfo->txpower_tracking = %d\n",
1098 rtlpriv
->dm
.txpower_tracking
);
1101 static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw
*hw
)
1103 rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw
);
1106 static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw
*hw
)
1108 rtl92c_dm_txpower_tracking_callback_thermalmeter(hw
);
1111 static void rtl92c_dm_check_txpower_tracking_thermal_meter(
1112 struct ieee80211_hw
*hw
)
1114 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1115 static u8 tm_trigger
;
1117 if (!rtlpriv
->dm
.txpower_tracking
)
1121 rtl_set_rfreg(hw
, RF90_PATH_A
, RF_T_METER
, RFREG_OFFSET_MASK
,
1123 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
1124 "Trigger 92S Thermal Meter!!\n");
1128 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
1129 "Schedule TxPowerTracking direct call!!\n");
1130 rtl92c_dm_txpower_tracking_directcall(hw
);
1135 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw
*hw
)
1137 rtl92c_dm_check_txpower_tracking_thermal_meter(hw
);
1139 EXPORT_SYMBOL(rtl92c_dm_check_txpower_tracking
);
1141 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw
*hw
)
1143 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1144 struct rate_adaptive
*p_ra
= &(rtlpriv
->ra
);
1146 p_ra
->ratr_state
= DM_RATR_STA_INIT
;
1147 p_ra
->pre_ratr_state
= DM_RATR_STA_INIT
;
1149 if (rtlpriv
->dm
.dm_type
== DM_TYPE_BYDRIVER
)
1150 rtlpriv
->dm
.useramask
= true;
1152 rtlpriv
->dm
.useramask
= false;
1155 EXPORT_SYMBOL(rtl92c_dm_init_rate_adaptive_mask
);
1157 static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw
*hw
)
1159 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1160 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1161 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1162 struct rate_adaptive
*p_ra
= &(rtlpriv
->ra
);
1163 u32 low_rssithresh_for_ra
, high_rssithresh_for_ra
;
1164 struct ieee80211_sta
*sta
= NULL
;
1166 if (is_hal_stop(rtlhal
)) {
1167 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
,
1168 "<---- driver is going to unload\n");
1172 if (!rtlpriv
->dm
.useramask
) {
1173 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
,
1174 "<---- driver does not control rate adaptive mask\n");
1178 if (mac
->link_state
== MAC80211_LINKED
&&
1179 mac
->opmode
== NL80211_IFTYPE_STATION
) {
1180 switch (p_ra
->pre_ratr_state
) {
1181 case DM_RATR_STA_HIGH
:
1182 high_rssithresh_for_ra
= 50;
1183 low_rssithresh_for_ra
= 20;
1185 case DM_RATR_STA_MIDDLE
:
1186 high_rssithresh_for_ra
= 55;
1187 low_rssithresh_for_ra
= 20;
1189 case DM_RATR_STA_LOW
:
1190 high_rssithresh_for_ra
= 50;
1191 low_rssithresh_for_ra
= 25;
1194 high_rssithresh_for_ra
= 50;
1195 low_rssithresh_for_ra
= 20;
1199 if (rtlpriv
->dm
.undecorated_smoothed_pwdb
>
1200 (long)high_rssithresh_for_ra
)
1201 p_ra
->ratr_state
= DM_RATR_STA_HIGH
;
1202 else if (rtlpriv
->dm
.undecorated_smoothed_pwdb
>
1203 (long)low_rssithresh_for_ra
)
1204 p_ra
->ratr_state
= DM_RATR_STA_MIDDLE
;
1206 p_ra
->ratr_state
= DM_RATR_STA_LOW
;
1208 if (p_ra
->pre_ratr_state
!= p_ra
->ratr_state
) {
1209 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
, "RSSI = %ld\n",
1210 rtlpriv
->dm
.undecorated_smoothed_pwdb
);
1211 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
,
1212 "RSSI_LEVEL = %d\n", p_ra
->ratr_state
);
1213 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
,
1214 "PreState = %d, CurState = %d\n",
1215 p_ra
->pre_ratr_state
, p_ra
->ratr_state
);
1218 sta
= ieee80211_find_sta(mac
->vif
, mac
->bssid
);
1219 rtlpriv
->cfg
->ops
->update_rate_tbl(hw
, sta
,
1222 p_ra
->pre_ratr_state
= p_ra
->ratr_state
;
1228 static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw
*hw
)
1230 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1231 struct ps_t
*dm_pstable
= &rtlpriv
->dm_pstable
;
1233 dm_pstable
->pre_ccastate
= CCA_MAX
;
1234 dm_pstable
->cur_ccasate
= CCA_MAX
;
1235 dm_pstable
->pre_rfstate
= RF_MAX
;
1236 dm_pstable
->cur_rfstate
= RF_MAX
;
1237 dm_pstable
->rssi_val_min
= 0;
1240 void rtl92c_dm_rf_saving(struct ieee80211_hw
*hw
, u8 bforce_in_normal
)
1242 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1243 struct ps_t
*dm_pstable
= &rtlpriv
->dm_pstable
;
1244 static u8 initialize
;
1245 static u32 reg_874
, reg_c70
, reg_85c
, reg_a74
;
1247 if (initialize
== 0) {
1248 reg_874
= (rtl_get_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1249 MASKDWORD
) & 0x1CC000) >> 14;
1251 reg_c70
= (rtl_get_bbreg(hw
, ROFDM0_AGCPARAMETER1
,
1252 MASKDWORD
) & BIT(3)) >> 3;
1254 reg_85c
= (rtl_get_bbreg(hw
, RFPGA0_XCD_SWITCHCONTROL
,
1255 MASKDWORD
) & 0xFF000000) >> 24;
1257 reg_a74
= (rtl_get_bbreg(hw
, 0xa74, MASKDWORD
) & 0xF000) >> 12;
1262 if (!bforce_in_normal
) {
1263 if (dm_pstable
->rssi_val_min
!= 0) {
1264 if (dm_pstable
->pre_rfstate
== RF_NORMAL
) {
1265 if (dm_pstable
->rssi_val_min
>= 30)
1266 dm_pstable
->cur_rfstate
= RF_SAVE
;
1268 dm_pstable
->cur_rfstate
= RF_NORMAL
;
1270 if (dm_pstable
->rssi_val_min
<= 25)
1271 dm_pstable
->cur_rfstate
= RF_NORMAL
;
1273 dm_pstable
->cur_rfstate
= RF_SAVE
;
1276 dm_pstable
->cur_rfstate
= RF_MAX
;
1279 dm_pstable
->cur_rfstate
= RF_NORMAL
;
1282 if (dm_pstable
->pre_rfstate
!= dm_pstable
->cur_rfstate
) {
1283 if (dm_pstable
->cur_rfstate
== RF_SAVE
) {
1284 rtl_set_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1286 rtl_set_bbreg(hw
, ROFDM0_AGCPARAMETER1
, BIT(3), 0);
1287 rtl_set_bbreg(hw
, RFPGA0_XCD_SWITCHCONTROL
,
1289 rtl_set_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1291 rtl_set_bbreg(hw
, 0xa74, 0xF000, 0x3);
1292 rtl_set_bbreg(hw
, 0x818, BIT(28), 0x0);
1293 rtl_set_bbreg(hw
, 0x818, BIT(28), 0x1);
1295 rtl_set_bbreg(hw
, RFPGA0_XCD_RFINTERFACESW
,
1297 rtl_set_bbreg(hw
, ROFDM0_AGCPARAMETER1
, BIT(3),
1299 rtl_set_bbreg(hw
, RFPGA0_XCD_SWITCHCONTROL
, 0xFF000000,
1301 rtl_set_bbreg(hw
, 0xa74, 0xF000, reg_a74
);
1302 rtl_set_bbreg(hw
, 0x818, BIT(28), 0x0);
1305 dm_pstable
->pre_rfstate
= dm_pstable
->cur_rfstate
;
1308 EXPORT_SYMBOL(rtl92c_dm_rf_saving
);
1310 static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw
*hw
)
1312 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1313 struct ps_t
*dm_pstable
= &rtlpriv
->dm_pstable
;
1314 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1315 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
1317 if (((mac
->link_state
== MAC80211_NOLINK
)) &&
1318 (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
== 0)) {
1319 dm_pstable
->rssi_val_min
= 0;
1320 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
, "Not connected to any\n");
1323 if (mac
->link_state
== MAC80211_LINKED
) {
1324 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
1325 dm_pstable
->rssi_val_min
=
1326 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1327 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
,
1328 "AP Client PWDB = 0x%lx\n",
1329 dm_pstable
->rssi_val_min
);
1331 dm_pstable
->rssi_val_min
=
1332 rtlpriv
->dm
.undecorated_smoothed_pwdb
;
1333 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
,
1334 "STA Default Port PWDB = 0x%lx\n",
1335 dm_pstable
->rssi_val_min
);
1338 dm_pstable
->rssi_val_min
=
1339 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1341 RT_TRACE(rtlpriv
, DBG_LOUD
, DBG_LOUD
,
1342 "AP Ext Port PWDB = 0x%lx\n",
1343 dm_pstable
->rssi_val_min
);
1346 if (IS_92C_SERIAL(rtlhal
->version
))
1347 ;/* rtl92c_dm_1r_cca(hw); */
1349 rtl92c_dm_rf_saving(hw
, false);
1352 void rtl92c_dm_init(struct ieee80211_hw
*hw
)
1354 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1356 rtlpriv
->dm
.dm_type
= DM_TYPE_BYDRIVER
;
1357 rtl92c_dm_diginit(hw
);
1358 rtl92c_dm_init_dynamic_txpower(hw
);
1359 rtl92c_dm_init_edca_turbo(hw
);
1360 rtl92c_dm_init_rate_adaptive_mask(hw
);
1361 rtl92c_dm_initialize_txpower_tracking(hw
);
1362 rtl92c_dm_init_dynamic_bb_powersaving(hw
);
1364 EXPORT_SYMBOL(rtl92c_dm_init
);
1366 void rtl92c_dm_dynamic_txpower(struct ieee80211_hw
*hw
)
1368 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1369 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
1370 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1371 long undecorated_smoothed_pwdb
;
1373 if (!rtlpriv
->dm
.dynamic_txpower_enable
)
1376 if (rtlpriv
->dm
.dm_flag
& HAL_DM_HIPWR_DISABLE
) {
1377 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1381 if ((mac
->link_state
< MAC80211_LINKED
) &&
1382 (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
== 0)) {
1383 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_TRACE
,
1384 "Not connected to any\n");
1386 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1388 rtlpriv
->dm
.last_dtp_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1392 if (mac
->link_state
>= MAC80211_LINKED
) {
1393 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
1394 undecorated_smoothed_pwdb
=
1395 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1396 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1397 "AP Client PWDB = 0x%lx\n",
1398 undecorated_smoothed_pwdb
);
1400 undecorated_smoothed_pwdb
=
1401 rtlpriv
->dm
.undecorated_smoothed_pwdb
;
1402 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1403 "STA Default Port PWDB = 0x%lx\n",
1404 undecorated_smoothed_pwdb
);
1407 undecorated_smoothed_pwdb
=
1408 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1410 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1411 "AP Ext Port PWDB = 0x%lx\n",
1412 undecorated_smoothed_pwdb
);
1415 if (undecorated_smoothed_pwdb
>= TX_POWER_NEAR_FIELD_THRESH_LVL2
) {
1416 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_LEVEL1
;
1417 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1418 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
1419 } else if ((undecorated_smoothed_pwdb
<
1420 (TX_POWER_NEAR_FIELD_THRESH_LVL2
- 3)) &&
1421 (undecorated_smoothed_pwdb
>=
1422 TX_POWER_NEAR_FIELD_THRESH_LVL1
)) {
1424 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_LEVEL1
;
1425 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1426 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
1427 } else if (undecorated_smoothed_pwdb
<
1428 (TX_POWER_NEAR_FIELD_THRESH_LVL1
- 5)) {
1429 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TXHIGHPWRLEVEL_NORMAL
;
1430 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1431 "TXHIGHPWRLEVEL_NORMAL\n");
1434 if ((rtlpriv
->dm
.dynamic_txhighpower_lvl
!= rtlpriv
->dm
.last_dtp_lvl
)) {
1435 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
1436 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
1437 rtlphy
->current_channel
);
1438 rtl92c_phy_set_txpower_level(hw
, rtlphy
->current_channel
);
1441 rtlpriv
->dm
.last_dtp_lvl
= rtlpriv
->dm
.dynamic_txhighpower_lvl
;
1444 void rtl92c_dm_watchdog(struct ieee80211_hw
*hw
)
1446 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1447 struct rtl_ps_ctl
*ppsc
= rtl_psc(rtl_priv(hw
));
1448 bool fw_current_inpsmode
= false;
1449 bool fw_ps_awake
= true;
1451 rtlpriv
->cfg
->ops
->get_hw_reg(hw
, HW_VAR_FW_PSMODE_STATUS
,
1452 (u8
*) (&fw_current_inpsmode
));
1453 rtlpriv
->cfg
->ops
->get_hw_reg(hw
, HW_VAR_FWLPS_RF_ON
,
1454 (u8
*) (&fw_ps_awake
));
1456 if ((ppsc
->rfpwr_state
== ERFON
) && ((!fw_current_inpsmode
) &&
1458 && (!ppsc
->rfchange_inprogress
)) {
1459 rtl92c_dm_pwdb_monitor(hw
);
1461 rtl92c_dm_false_alarm_counter_statistics(hw
);
1462 rtl92c_dm_dynamic_bb_powersaving(hw
);
1463 rtl92c_dm_dynamic_txpower(hw
);
1464 rtl92c_dm_check_txpower_tracking(hw
);
1465 rtl92c_dm_refresh_rate_adaptive_mask(hw
);
1466 rtl92c_dm_bt_coexist(hw
);
1467 rtl92c_dm_check_edca_turbo(hw
);
1470 EXPORT_SYMBOL(rtl92c_dm_watchdog
);
1472 u8
rtl92c_bt_rssi_state_change(struct ieee80211_hw
*hw
)
1474 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1475 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1476 long undecorated_smoothed_pwdb
;
1477 u8 curr_bt_rssi_state
= 0x00;
1479 if (rtlpriv
->mac80211
.link_state
== MAC80211_LINKED
) {
1480 undecorated_smoothed_pwdb
=
1481 GET_UNDECORATED_AVERAGE_RSSI(rtlpriv
);
1483 if (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
== 0)
1484 undecorated_smoothed_pwdb
= 100;
1486 undecorated_smoothed_pwdb
=
1487 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
1490 /* Check RSSI to determine HighPower/NormalPower state for
1491 * BT coexistence. */
1492 if (undecorated_smoothed_pwdb
>= 67)
1493 curr_bt_rssi_state
&= (~BT_RSSI_STATE_NORMAL_POWER
);
1494 else if (undecorated_smoothed_pwdb
< 62)
1495 curr_bt_rssi_state
|= BT_RSSI_STATE_NORMAL_POWER
;
1497 /* Check RSSI to determine AMPDU setting for BT coexistence. */
1498 if (undecorated_smoothed_pwdb
>= 40)
1499 curr_bt_rssi_state
&= (~BT_RSSI_STATE_AMDPU_OFF
);
1500 else if (undecorated_smoothed_pwdb
<= 32)
1501 curr_bt_rssi_state
|= BT_RSSI_STATE_AMDPU_OFF
;
1503 /* Marked RSSI state. It will be used to determine BT coexistence
1505 if (undecorated_smoothed_pwdb
< 35)
1506 curr_bt_rssi_state
|= BT_RSSI_STATE_SPECIAL_LOW
;
1508 curr_bt_rssi_state
&= (~BT_RSSI_STATE_SPECIAL_LOW
);
1510 /* Set Tx Power according to BT status. */
1511 if (undecorated_smoothed_pwdb
>= 30)
1512 curr_bt_rssi_state
|= BT_RSSI_STATE_TXPOWER_LOW
;
1513 else if (undecorated_smoothed_pwdb
< 25)
1514 curr_bt_rssi_state
&= (~BT_RSSI_STATE_TXPOWER_LOW
);
1516 /* Check BT state related to BT_Idle in B/G mode. */
1517 if (undecorated_smoothed_pwdb
< 15)
1518 curr_bt_rssi_state
|= BT_RSSI_STATE_BG_EDCA_LOW
;
1520 curr_bt_rssi_state
&= (~BT_RSSI_STATE_BG_EDCA_LOW
);
1522 if (curr_bt_rssi_state
!= rtlpcipriv
->bt_coexist
.bt_rssi_state
) {
1523 rtlpcipriv
->bt_coexist
.bt_rssi_state
= curr_bt_rssi_state
;
1529 EXPORT_SYMBOL(rtl92c_bt_rssi_state_change
);
1531 static bool rtl92c_bt_state_change(struct ieee80211_hw
*hw
)
1533 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1534 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1536 u32 polling
, ratio_tx
, ratio_pri
;
1539 u8 cur_service_type
;
1541 if (rtlpriv
->mac80211
.link_state
< MAC80211_LINKED
)
1544 bt_state
= rtl_read_byte(rtlpriv
, 0x4fd);
1545 bt_tx
= rtl_read_dword(rtlpriv
, 0x488);
1546 bt_tx
= bt_tx
& 0x00ffffff;
1547 bt_pri
= rtl_read_dword(rtlpriv
, 0x48c);
1548 bt_pri
= bt_pri
& 0x00ffffff;
1549 polling
= rtl_read_dword(rtlpriv
, 0x490);
1551 if (bt_tx
== 0xffffffff && bt_pri
== 0xffffffff &&
1552 polling
== 0xffffffff && bt_state
== 0xff)
1555 bt_state
&= BIT_OFFSET_LEN_MASK_32(0, 1);
1556 if (bt_state
!= rtlpcipriv
->bt_coexist
.bt_cur_state
) {
1557 rtlpcipriv
->bt_coexist
.bt_cur_state
= bt_state
;
1559 if (rtlpcipriv
->bt_coexist
.reg_bt_sco
== 3) {
1560 rtlpcipriv
->bt_coexist
.bt_service
= BT_IDLE
;
1562 bt_state
= bt_state
|
1563 ((rtlpcipriv
->bt_coexist
.bt_ant_isolation
== 1) ?
1564 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1565 BIT_OFFSET_LEN_MASK_32(2, 1);
1566 rtl_write_byte(rtlpriv
, 0x4fd, bt_state
);
1571 ratio_tx
= bt_tx
* 1000 / polling
;
1572 ratio_pri
= bt_pri
* 1000 / polling
;
1573 rtlpcipriv
->bt_coexist
.ratio_tx
= ratio_tx
;
1574 rtlpcipriv
->bt_coexist
.ratio_pri
= ratio_pri
;
1576 if (bt_state
&& rtlpcipriv
->bt_coexist
.reg_bt_sco
== 3) {
1578 if ((ratio_tx
< 30) && (ratio_pri
< 30))
1579 cur_service_type
= BT_IDLE
;
1580 else if ((ratio_pri
> 110) && (ratio_pri
< 250))
1581 cur_service_type
= BT_SCO
;
1582 else if ((ratio_tx
>= 200) && (ratio_pri
>= 200))
1583 cur_service_type
= BT_BUSY
;
1584 else if ((ratio_tx
>= 350) && (ratio_tx
< 500))
1585 cur_service_type
= BT_OTHERBUSY
;
1586 else if (ratio_tx
>= 500)
1587 cur_service_type
= BT_PAN
;
1589 cur_service_type
= BT_OTHER_ACTION
;
1591 if (cur_service_type
!= rtlpcipriv
->bt_coexist
.bt_service
) {
1592 rtlpcipriv
->bt_coexist
.bt_service
= cur_service_type
;
1593 bt_state
= bt_state
|
1594 ((rtlpcipriv
->bt_coexist
.bt_ant_isolation
== 1) ?
1595 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
1596 ((rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) ?
1597 0 : BIT_OFFSET_LEN_MASK_32(2, 1));
1599 /* Add interrupt migration when bt is not ini
1600 * idle state (no traffic). */
1601 if (rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) {
1602 rtl_write_word(rtlpriv
, 0x504, 0x0ccc);
1603 rtl_write_byte(rtlpriv
, 0x506, 0x54);
1604 rtl_write_byte(rtlpriv
, 0x507, 0x54);
1606 rtl_write_byte(rtlpriv
, 0x506, 0x00);
1607 rtl_write_byte(rtlpriv
, 0x507, 0x00);
1610 rtl_write_byte(rtlpriv
, 0x4fd, bt_state
);
1619 static bool rtl92c_bt_wifi_connect_change(struct ieee80211_hw
*hw
)
1621 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1622 static bool media_connect
;
1624 if (rtlpriv
->mac80211
.link_state
< MAC80211_LINKED
) {
1625 media_connect
= false;
1627 if (!media_connect
) {
1628 media_connect
= true;
1631 media_connect
= true;
1637 static void rtl92c_bt_set_normal(struct ieee80211_hw
*hw
)
1639 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1640 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1643 if (rtlpcipriv
->bt_coexist
.bt_service
== BT_OTHERBUSY
) {
1644 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5ea72b;
1645 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5ea72b;
1646 } else if (rtlpcipriv
->bt_coexist
.bt_service
== BT_BUSY
) {
1647 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5eb82f;
1648 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5eb82f;
1649 } else if (rtlpcipriv
->bt_coexist
.bt_service
== BT_SCO
) {
1650 if (rtlpcipriv
->bt_coexist
.ratio_tx
> 160) {
1651 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5ea72f;
1652 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5ea72f;
1654 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5ea32b;
1655 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5ea42b;
1658 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0;
1659 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0;
1662 if ((rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) &&
1663 (rtlpriv
->mac80211
.mode
== WIRELESS_MODE_G
||
1664 (rtlpriv
->mac80211
.mode
== (WIRELESS_MODE_G
| WIRELESS_MODE_B
))) &&
1665 (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1666 BT_RSSI_STATE_BG_EDCA_LOW
)) {
1667 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0x5eb82b;
1668 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0x5eb82b;
1672 static void rtl92c_bt_ant_isolation(struct ieee80211_hw
*hw
)
1674 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1675 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1678 /* Only enable HW BT coexist when BT in "Busy" state. */
1679 if (rtlpriv
->mac80211
.vendor
== PEER_CISCO
&&
1680 rtlpcipriv
->bt_coexist
.bt_service
== BT_OTHER_ACTION
) {
1681 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0xa0);
1683 if ((rtlpcipriv
->bt_coexist
.bt_service
== BT_BUSY
) &&
1684 (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1685 BT_RSSI_STATE_NORMAL_POWER
)) {
1686 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0xa0);
1687 } else if ((rtlpcipriv
->bt_coexist
.bt_service
==
1688 BT_OTHER_ACTION
) && (rtlpriv
->mac80211
.mode
<
1689 WIRELESS_MODE_N_24G
) &&
1690 (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1691 BT_RSSI_STATE_SPECIAL_LOW
)) {
1692 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0xa0);
1693 } else if (rtlpcipriv
->bt_coexist
.bt_service
== BT_PAN
) {
1694 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0x00);
1696 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0x00);
1700 if (rtlpcipriv
->bt_coexist
.bt_service
== BT_PAN
)
1701 rtl_write_dword(rtlpriv
, REG_GPIO_PIN_CTRL
, 0x10100);
1703 rtl_write_dword(rtlpriv
, REG_GPIO_PIN_CTRL
, 0x0);
1705 if (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1706 BT_RSSI_STATE_NORMAL_POWER
) {
1707 rtl92c_bt_set_normal(hw
);
1709 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0;
1710 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0;
1713 if (rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) {
1714 rtlpriv
->cfg
->ops
->set_rfreg(hw
,
1719 rtlpriv
->cfg
->ops
->set_rfreg(hw
,
1720 RF90_PATH_A
, 0x1e, 0xf0,
1721 rtlpcipriv
->bt_coexist
.bt_rfreg_origin_1e
);
1724 if (!rtlpriv
->dm
.dynamic_txpower_enable
) {
1725 if (rtlpcipriv
->bt_coexist
.bt_service
!= BT_IDLE
) {
1726 if (rtlpcipriv
->bt_coexist
.bt_rssi_state
&
1727 BT_RSSI_STATE_TXPOWER_LOW
) {
1728 rtlpriv
->dm
.dynamic_txhighpower_lvl
=
1731 rtlpriv
->dm
.dynamic_txhighpower_lvl
=
1735 rtlpriv
->dm
.dynamic_txhighpower_lvl
=
1736 TXHIGHPWRLEVEL_NORMAL
;
1738 rtl92c_phy_set_txpower_level(hw
,
1739 rtlpriv
->phy
.current_channel
);
1743 static void rtl92c_check_bt_change(struct ieee80211_hw
*hw
)
1745 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1746 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1748 if (rtlpcipriv
->bt_coexist
.bt_cur_state
) {
1749 if (rtlpcipriv
->bt_coexist
.bt_ant_isolation
)
1750 rtl92c_bt_ant_isolation(hw
);
1752 rtl_write_byte(rtlpriv
, REG_GPIO_MUXCFG
, 0x00);
1753 rtlpriv
->cfg
->ops
->set_rfreg(hw
, RF90_PATH_A
, 0x1e, 0xf0,
1754 rtlpcipriv
->bt_coexist
.bt_rfreg_origin_1e
);
1756 rtlpcipriv
->bt_coexist
.bt_edca_ul
= 0;
1757 rtlpcipriv
->bt_coexist
.bt_edca_dl
= 0;
1761 void rtl92c_dm_bt_coexist(struct ieee80211_hw
*hw
)
1763 struct rtl_pci_priv
*rtlpcipriv
= rtl_pcipriv(hw
);
1765 bool wifi_connect_change
;
1766 bool bt_state_change
;
1767 bool rssi_state_change
;
1769 if ((rtlpcipriv
->bt_coexist
.bt_coexistence
) &&
1770 (rtlpcipriv
->bt_coexist
.bt_coexist_type
== BT_CSR_BC4
)) {
1772 wifi_connect_change
= rtl92c_bt_wifi_connect_change(hw
);
1773 bt_state_change
= rtl92c_bt_state_change(hw
);
1774 rssi_state_change
= rtl92c_bt_rssi_state_change(hw
);
1776 if (wifi_connect_change
|| bt_state_change
|| rssi_state_change
)
1777 rtl92c_check_bt_change(hw
);
1780 EXPORT_SYMBOL(rtl92c_dm_bt_coexist
);