1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
38 static const u32 edca_setting_dl
[PEER_MAX
] = {
39 0xa44f, /* 0 UNKNOWN */
40 0x5ea44f, /* 1 REALTEK_90 */
41 0x5ea44f, /* 2 REALTEK_92SE */
49 static const u32 edca_setting_dl_gmode
[PEER_MAX
] = {
50 0x4322, /* 0 UNKNOWN */
51 0xa44f, /* 1 REALTEK_90 */
52 0x5ea44f, /* 2 REALTEK_92SE */
57 0x5ea44f, /* 7 MARV */
60 static const u32 edca_setting_ul
[PEER_MAX
] = {
61 0x5e4322, /* 0 UNKNOWN */
62 0xa44f, /* 1 REALTEK_90 */
63 0x5ea44f, /* 2 REALTEK_92SE */
64 0x5ea322, /* 3 BROAD */
67 0x3ea44f, /* 6 CISCO */
68 0x5ea44f, /* 7 MARV */
71 static void _rtl92s_dm_check_edca_turbo(struct ieee80211_hw
*hw
)
73 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
74 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
76 static u64 last_txok_cnt
;
77 static u64 last_rxok_cnt
;
81 u32 edca_be_ul
= edca_setting_ul
[mac
->vendor
];
82 u32 edca_be_dl
= edca_setting_dl
[mac
->vendor
];
83 u32 edca_gmode
= edca_setting_dl_gmode
[mac
->vendor
];
85 if (mac
->link_state
!= MAC80211_LINKED
) {
86 rtlpriv
->dm
.current_turbo_edca
= false;
87 goto dm_checkedcaturbo_exit
;
90 if ((!rtlpriv
->dm
.is_any_nonbepkts
) &&
91 (!rtlpriv
->dm
.disable_framebursting
)) {
92 cur_txok_cnt
= rtlpriv
->stats
.txbytesunicast
- last_txok_cnt
;
93 cur_rxok_cnt
= rtlpriv
->stats
.rxbytesunicast
- last_rxok_cnt
;
95 if (rtlpriv
->phy
.rf_type
== RF_1T2R
) {
96 if (cur_txok_cnt
> 4 * cur_rxok_cnt
) {
97 /* Uplink TP is present. */
98 if (rtlpriv
->dm
.is_cur_rdlstate
||
99 !rtlpriv
->dm
.current_turbo_edca
) {
100 rtl_write_dword(rtlpriv
, EDCAPARA_BE
,
102 rtlpriv
->dm
.is_cur_rdlstate
= false;
104 } else {/* Balance TP is present. */
105 if (!rtlpriv
->dm
.is_cur_rdlstate
||
106 !rtlpriv
->dm
.current_turbo_edca
) {
107 if (mac
->mode
== WIRELESS_MODE_G
||
108 mac
->mode
== WIRELESS_MODE_B
)
109 rtl_write_dword(rtlpriv
,
113 rtl_write_dword(rtlpriv
,
116 rtlpriv
->dm
.is_cur_rdlstate
= true;
119 rtlpriv
->dm
.current_turbo_edca
= true;
121 if (cur_rxok_cnt
> 4 * cur_txok_cnt
) {
122 if (!rtlpriv
->dm
.is_cur_rdlstate
||
123 !rtlpriv
->dm
.current_turbo_edca
) {
124 if (mac
->mode
== WIRELESS_MODE_G
||
125 mac
->mode
== WIRELESS_MODE_B
)
126 rtl_write_dword(rtlpriv
,
130 rtl_write_dword(rtlpriv
,
133 rtlpriv
->dm
.is_cur_rdlstate
= true;
136 if (rtlpriv
->dm
.is_cur_rdlstate
||
137 !rtlpriv
->dm
.current_turbo_edca
) {
138 rtl_write_dword(rtlpriv
, EDCAPARA_BE
,
140 rtlpriv
->dm
.is_cur_rdlstate
= false;
143 rtlpriv
->dm
.current_turbo_edca
= true;
146 if (rtlpriv
->dm
.current_turbo_edca
) {
148 rtlpriv
->cfg
->ops
->set_hw_reg(hw
, HW_VAR_AC_PARAM
,
150 rtlpriv
->dm
.current_turbo_edca
= false;
154 dm_checkedcaturbo_exit
:
155 rtlpriv
->dm
.is_any_nonbepkts
= false;
156 last_txok_cnt
= rtlpriv
->stats
.txbytesunicast
;
157 last_rxok_cnt
= rtlpriv
->stats
.rxbytesunicast
;
160 static void _rtl92s_dm_txpowertracking_callback_thermalmeter(
161 struct ieee80211_hw
*hw
)
163 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
164 struct rtl_efuse
*rtlefuse
= rtl_efuse(rtl_priv(hw
));
167 rtlpriv
->dm
.txpower_trackinginit
= true;
169 thermalvalue
= (u8
)rtl_get_rfreg(hw
, RF90_PATH_A
, RF_T_METER
, 0x1f);
171 RT_TRACE(rtlpriv
, COMP_POWER_TRACKING
, DBG_LOUD
,
172 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermal meter 0x%x\n",
174 rtlpriv
->dm
.thermalvalue
, rtlefuse
->eeprom_thermalmeter
);
177 rtlpriv
->dm
.thermalvalue
= thermalvalue
;
178 rtl92s_phy_set_fw_cmd(hw
, FW_CMD_TXPWR_TRACK_THERMAL
);
181 rtlpriv
->dm
.txpowercount
= 0;
184 static void _rtl92s_dm_check_txpowertracking_thermalmeter(
185 struct ieee80211_hw
*hw
)
187 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
188 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
189 static u8 tm_trigger
;
190 u8 tx_power_checkcnt
= 5;
193 if (rtlphy
->rf_type
== RF_2T2R
)
196 if (!rtlpriv
->dm
.txpower_tracking
)
199 if (rtlpriv
->dm
.txpowercount
<= tx_power_checkcnt
) {
200 rtlpriv
->dm
.txpowercount
++;
205 rtl_set_rfreg(hw
, RF90_PATH_A
, RF_T_METER
,
206 RFREG_OFFSET_MASK
, 0x60);
209 _rtl92s_dm_txpowertracking_callback_thermalmeter(hw
);
214 static void _rtl92s_dm_refresh_rateadaptive_mask(struct ieee80211_hw
*hw
)
216 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
217 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
218 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
219 struct rate_adaptive
*ra
= &(rtlpriv
->ra
);
221 u32 low_rssi_thresh
= 0;
222 u32 middle_rssi_thresh
= 0;
223 u32 high_rssi_thresh
= 0;
224 struct ieee80211_sta
*sta
= NULL
;
226 if (is_hal_stop(rtlhal
))
229 if (!rtlpriv
->dm
.useramask
)
232 if (!rtlpriv
->dm
.inform_fw_driverctrldm
) {
233 rtl92s_phy_set_fw_cmd(hw
, FW_CMD_CTRL_DM_BY_DRIVER
);
234 rtlpriv
->dm
.inform_fw_driverctrldm
= true;
238 if (mac
->opmode
== NL80211_IFTYPE_STATION
)
239 sta
= get_sta(hw
, mac
->vif
, mac
->bssid
);
240 if ((mac
->link_state
== MAC80211_LINKED
) &&
241 (mac
->opmode
== NL80211_IFTYPE_STATION
)) {
242 switch (ra
->pre_ratr_state
) {
243 case DM_RATR_STA_HIGH
:
244 high_rssi_thresh
= 40;
245 middle_rssi_thresh
= 30;
246 low_rssi_thresh
= 20;
248 case DM_RATR_STA_MIDDLE
:
249 high_rssi_thresh
= 44;
250 middle_rssi_thresh
= 30;
251 low_rssi_thresh
= 20;
253 case DM_RATR_STA_LOW
:
254 high_rssi_thresh
= 44;
255 middle_rssi_thresh
= 34;
256 low_rssi_thresh
= 20;
258 case DM_RATR_STA_ULTRALOW
:
259 high_rssi_thresh
= 44;
260 middle_rssi_thresh
= 34;
261 low_rssi_thresh
= 24;
264 high_rssi_thresh
= 44;
265 middle_rssi_thresh
= 34;
266 low_rssi_thresh
= 24;
270 if (rtlpriv
->dm
.undecorated_smoothed_pwdb
>
271 (long)high_rssi_thresh
) {
272 ra
->ratr_state
= DM_RATR_STA_HIGH
;
273 } else if (rtlpriv
->dm
.undecorated_smoothed_pwdb
>
274 (long)middle_rssi_thresh
) {
275 ra
->ratr_state
= DM_RATR_STA_LOW
;
276 } else if (rtlpriv
->dm
.undecorated_smoothed_pwdb
>
277 (long)low_rssi_thresh
) {
278 ra
->ratr_state
= DM_RATR_STA_LOW
;
280 ra
->ratr_state
= DM_RATR_STA_ULTRALOW
;
283 if (ra
->pre_ratr_state
!= ra
->ratr_state
) {
284 RT_TRACE(rtlpriv
, COMP_RATE
, DBG_LOUD
,
285 "RSSI = %ld RSSI_LEVEL = %d PreState = %d, CurState = %d\n",
286 rtlpriv
->dm
.undecorated_smoothed_pwdb
,
288 ra
->pre_ratr_state
, ra
->ratr_state
);
290 rtlpriv
->cfg
->ops
->update_rate_tbl(hw
, sta
,
292 ra
->pre_ratr_state
= ra
->ratr_state
;
298 static void _rtl92s_dm_switch_baseband_mrc(struct ieee80211_hw
*hw
)
300 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
301 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
302 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
303 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
305 bool enable_mrc
= true;
306 long tmpentry_maxpwdb
= 0;
310 if (is_hal_stop(rtlhal
))
313 if ((rtlphy
->rf_type
== RF_1T1R
) || (rtlphy
->rf_type
== RF_2T2R
))
316 rtlpriv
->cfg
->ops
->get_hw_reg(hw
, HW_VAR_MRC
, (u8
*)(¤t_mrc
));
318 if (mac
->link_state
>= MAC80211_LINKED
) {
319 if (rtlpriv
->dm
.undecorated_smoothed_pwdb
> tmpentry_maxpwdb
) {
320 rssi_a
= rtlpriv
->stats
.rx_rssi_percentage
[RF90_PATH_A
];
321 rssi_b
= rtlpriv
->stats
.rx_rssi_percentage
[RF90_PATH_B
];
325 /* MRC settings would NOT affect TP on Wireless B mode. */
326 if (mac
->mode
!= WIRELESS_MODE_B
) {
327 if ((rssi_a
== 0) && (rssi_b
== 0)) {
329 } else if (rssi_b
> 30) {
332 } else if (rssi_b
< 5) {
333 /* Turn off B-path */
335 /* Take care of RSSI differentiation. */
336 } else if (rssi_a
> 15 && (rssi_a
>= rssi_b
)) {
337 if ((rssi_a
- rssi_b
) > 15)
338 /* Turn off B-path */
340 else if ((rssi_a
- rssi_b
) < 10)
344 enable_mrc
= current_mrc
;
351 /* Update MRC settings if needed. */
352 if (enable_mrc
!= current_mrc
)
353 rtlpriv
->cfg
->ops
->set_hw_reg(hw
, HW_VAR_MRC
,
358 void rtl92s_dm_init_edca_turbo(struct ieee80211_hw
*hw
)
360 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
362 rtlpriv
->dm
.current_turbo_edca
= false;
363 rtlpriv
->dm
.is_any_nonbepkts
= false;
364 rtlpriv
->dm
.is_cur_rdlstate
= false;
367 static void _rtl92s_dm_init_rate_adaptive_mask(struct ieee80211_hw
*hw
)
369 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
370 struct rate_adaptive
*ra
= &(rtlpriv
->ra
);
372 ra
->ratr_state
= DM_RATR_STA_MAX
;
373 ra
->pre_ratr_state
= DM_RATR_STA_MAX
;
375 if (rtlpriv
->dm
.dm_type
== DM_TYPE_BYDRIVER
)
376 rtlpriv
->dm
.useramask
= true;
378 rtlpriv
->dm
.useramask
= false;
380 rtlpriv
->dm
.useramask
= false;
381 rtlpriv
->dm
.inform_fw_driverctrldm
= false;
384 static void _rtl92s_dm_init_txpowertracking_thermalmeter(
385 struct ieee80211_hw
*hw
)
387 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
389 rtlpriv
->dm
.txpower_tracking
= true;
390 rtlpriv
->dm
.txpowercount
= 0;
391 rtlpriv
->dm
.txpower_trackinginit
= false;
394 static void _rtl92s_dm_false_alarm_counter_statistics(struct ieee80211_hw
*hw
)
396 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
397 struct false_alarm_statistics
*falsealm_cnt
= &(rtlpriv
->falsealm_cnt
);
400 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER1
, MASKDWORD
);
401 falsealm_cnt
->cnt_parity_fail
= ((ret_value
& 0xffff0000) >> 16);
403 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER2
, MASKDWORD
);
404 falsealm_cnt
->cnt_rate_illegal
= (ret_value
& 0xffff);
405 falsealm_cnt
->cnt_crc8_fail
= ((ret_value
& 0xffff0000) >> 16);
406 ret_value
= rtl_get_bbreg(hw
, ROFDM_PHYCOUNTER3
, MASKDWORD
);
407 falsealm_cnt
->cnt_mcs_fail
= (ret_value
& 0xffff);
409 falsealm_cnt
->cnt_ofdm_fail
= falsealm_cnt
->cnt_parity_fail
+
410 falsealm_cnt
->cnt_rate_illegal
+ falsealm_cnt
->cnt_crc8_fail
+
411 falsealm_cnt
->cnt_mcs_fail
;
413 /* read CCK false alarm */
414 ret_value
= rtl_get_bbreg(hw
, 0xc64, MASKDWORD
);
415 falsealm_cnt
->cnt_cck_fail
= (ret_value
& 0xffff);
416 falsealm_cnt
->cnt_all
= falsealm_cnt
->cnt_ofdm_fail
+
417 falsealm_cnt
->cnt_cck_fail
;
420 static void rtl92s_backoff_enable_flag(struct ieee80211_hw
*hw
)
422 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
423 struct dig_t
*digtable
= &rtlpriv
->dm_digtable
;
424 struct false_alarm_statistics
*falsealm_cnt
= &(rtlpriv
->falsealm_cnt
);
426 if (falsealm_cnt
->cnt_all
> digtable
->fa_highthresh
) {
427 if ((digtable
->backoff_val
- 6) <
428 digtable
->backoffval_range_min
)
429 digtable
->backoff_val
= digtable
->backoffval_range_min
;
431 digtable
->backoff_val
-= 6;
432 } else if (falsealm_cnt
->cnt_all
< digtable
->fa_lowthresh
) {
433 if ((digtable
->backoff_val
+ 6) >
434 digtable
->backoffval_range_max
)
435 digtable
->backoff_val
=
436 digtable
->backoffval_range_max
;
438 digtable
->backoff_val
+= 6;
442 static void _rtl92s_dm_initial_gain_sta_beforeconnect(struct ieee80211_hw
*hw
)
444 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
445 struct dig_t
*digtable
= &rtlpriv
->dm_digtable
;
446 struct false_alarm_statistics
*falsealm_cnt
= &(rtlpriv
->falsealm_cnt
);
447 static u8 initialized
, force_write
;
450 if ((digtable
->pre_sta_connectstate
== digtable
->cur_sta_connectstate
) ||
451 (digtable
->cur_sta_connectstate
== DIG_STA_BEFORE_CONNECT
)) {
452 if (digtable
->cur_sta_connectstate
== DIG_STA_BEFORE_CONNECT
) {
453 if (rtlpriv
->psc
.rfpwr_state
!= ERFON
)
456 if (digtable
->backoff_enable_flag
)
457 rtl92s_backoff_enable_flag(hw
);
459 digtable
->backoff_val
= DM_DIG_BACKOFF
;
461 if ((digtable
->rssi_val
+ 10 - digtable
->backoff_val
) >
462 digtable
->rx_gain_range_max
)
463 digtable
->cur_igvalue
=
464 digtable
->rx_gain_range_max
;
465 else if ((digtable
->rssi_val
+ 10 - digtable
->backoff_val
)
466 < digtable
->rx_gain_range_min
)
467 digtable
->cur_igvalue
=
468 digtable
->rx_gain_range_min
;
470 digtable
->cur_igvalue
= digtable
->rssi_val
+ 10 -
471 digtable
->backoff_val
;
473 if (falsealm_cnt
->cnt_all
> 10000)
474 digtable
->cur_igvalue
=
475 (digtable
->cur_igvalue
> 0x33) ?
476 digtable
->cur_igvalue
: 0x33;
478 if (falsealm_cnt
->cnt_all
> 16000)
479 digtable
->cur_igvalue
=
480 digtable
->rx_gain_range_max
;
481 /* connected -> connected or disconnected -> disconnected */
483 /* Firmware control DIG, do nothing in driver dm */
486 /* disconnected -> connected or connected ->
487 * disconnected or beforeconnect->(dis)connected */
490 digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
491 rtl92s_phy_set_fw_cmd(hw
, FW_CMD_DIG_ENABLE
);
493 digtable
->backoff_val
= DM_DIG_BACKOFF
;
494 digtable
->cur_igvalue
= rtlpriv
->phy
.default_initialgain
[0];
495 digtable
->pre_igvalue
= 0;
499 /* Forced writing to prevent from fw-dig overwriting. */
500 if (digtable
->pre_igvalue
!= rtl_get_bbreg(hw
, ROFDM0_XAAGCCORE1
,
504 if ((digtable
->pre_igvalue
!= digtable
->cur_igvalue
) ||
505 !initialized
|| force_write
) {
507 rtl92s_phy_set_fw_cmd(hw
, FW_CMD_DIG_DISABLE
);
509 initial_gain
= (u8
)digtable
->cur_igvalue
;
511 /* Set initial gain. */
512 rtl_set_bbreg(hw
, ROFDM0_XAAGCCORE1
, MASKBYTE0
, initial_gain
);
513 rtl_set_bbreg(hw
, ROFDM0_XBAGCCORE1
, MASKBYTE0
, initial_gain
);
514 digtable
->pre_igvalue
= digtable
->cur_igvalue
;
520 static void _rtl92s_dm_ctrl_initgain_bytwoport(struct ieee80211_hw
*hw
)
522 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
523 struct dig_t
*digtable
= &rtlpriv
->dm_digtable
;
525 if (rtlpriv
->mac80211
.act_scanning
)
528 /* Decide the current status and if modify initial gain or not */
529 if (rtlpriv
->mac80211
.link_state
>= MAC80211_LINKED
||
530 rtlpriv
->mac80211
.opmode
== NL80211_IFTYPE_ADHOC
)
531 digtable
->cur_sta_connectstate
= DIG_STA_CONNECT
;
533 digtable
->cur_sta_connectstate
= DIG_STA_DISCONNECT
;
535 digtable
->rssi_val
= rtlpriv
->dm
.undecorated_smoothed_pwdb
;
537 /* Change dig mode to rssi */
538 if (digtable
->cur_sta_connectstate
!= DIG_STA_DISCONNECT
) {
539 if (digtable
->dig_twoport_algorithm
==
540 DIG_TWO_PORT_ALGO_FALSE_ALARM
) {
541 digtable
->dig_twoport_algorithm
= DIG_TWO_PORT_ALGO_RSSI
;
542 rtl92s_phy_set_fw_cmd(hw
, FW_CMD_DIG_MODE_SS
);
546 _rtl92s_dm_false_alarm_counter_statistics(hw
);
547 _rtl92s_dm_initial_gain_sta_beforeconnect(hw
);
549 digtable
->pre_sta_connectstate
= digtable
->cur_sta_connectstate
;
552 static void _rtl92s_dm_ctrl_initgain_byrssi(struct ieee80211_hw
*hw
)
554 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
555 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
556 struct dig_t
*digtable
= &rtlpriv
->dm_digtable
;
559 if (rtlphy
->rf_type
== RF_2T2R
)
562 if (!rtlpriv
->dm
.dm_initialgain_enable
)
565 if (digtable
->dig_enable_flag
== false)
568 _rtl92s_dm_ctrl_initgain_bytwoport(hw
);
571 static void _rtl92s_dm_dynamic_txpower(struct ieee80211_hw
*hw
)
573 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
574 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
575 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
576 long undecorated_smoothed_pwdb
;
577 long txpwr_threshold_lv1
, txpwr_threshold_lv2
;
580 if (rtlphy
->rf_type
== RF_2T2R
)
583 if (!rtlpriv
->dm
.dynamic_txpower_enable
||
584 rtlpriv
->dm
.dm_flag
& HAL_DM_HIPWR_DISABLE
) {
585 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TX_HIGHPWR_LEVEL_NORMAL
;
589 if ((mac
->link_state
< MAC80211_LINKED
) &&
590 (rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
== 0)) {
591 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_TRACE
,
592 "Not connected to any\n");
594 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TX_HIGHPWR_LEVEL_NORMAL
;
596 rtlpriv
->dm
.last_dtp_lvl
= TX_HIGHPWR_LEVEL_NORMAL
;
600 if (mac
->link_state
>= MAC80211_LINKED
) {
601 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
602 undecorated_smoothed_pwdb
=
603 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
604 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
605 "AP Client PWDB = 0x%lx\n",
606 undecorated_smoothed_pwdb
);
608 undecorated_smoothed_pwdb
=
609 rtlpriv
->dm
.undecorated_smoothed_pwdb
;
610 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
611 "STA Default Port PWDB = 0x%lx\n",
612 undecorated_smoothed_pwdb
);
615 undecorated_smoothed_pwdb
=
616 rtlpriv
->dm
.entry_min_undecoratedsmoothed_pwdb
;
618 RT_TRACE(rtlpriv
, COMP_POWER
, DBG_LOUD
,
619 "AP Ext Port PWDB = 0x%lx\n",
620 undecorated_smoothed_pwdb
);
623 txpwr_threshold_lv2
= TX_POWER_NEAR_FIELD_THRESH_LVL2
;
624 txpwr_threshold_lv1
= TX_POWER_NEAR_FIELD_THRESH_LVL1
;
626 if (rtl_get_bbreg(hw
, 0xc90, MASKBYTE0
) == 1)
627 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TX_HIGHPWR_LEVEL_NORMAL
;
628 else if (undecorated_smoothed_pwdb
>= txpwr_threshold_lv2
)
629 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TX_HIGHPWR_LEVEL_NORMAL2
;
630 else if ((undecorated_smoothed_pwdb
< (txpwr_threshold_lv2
- 3)) &&
631 (undecorated_smoothed_pwdb
>= txpwr_threshold_lv1
))
632 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TX_HIGHPWR_LEVEL_NORMAL1
;
633 else if (undecorated_smoothed_pwdb
< (txpwr_threshold_lv1
- 3))
634 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TX_HIGHPWR_LEVEL_NORMAL
;
636 if ((rtlpriv
->dm
.dynamic_txhighpower_lvl
!= rtlpriv
->dm
.last_dtp_lvl
))
637 rtl92s_phy_set_txpower(hw
, rtlphy
->current_channel
);
639 rtlpriv
->dm
.last_dtp_lvl
= rtlpriv
->dm
.dynamic_txhighpower_lvl
;
642 static void _rtl92s_dm_init_dig(struct ieee80211_hw
*hw
)
644 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
645 struct dig_t
*digtable
= &rtlpriv
->dm_digtable
;
647 /* Disable DIG scheme now.*/
648 digtable
->dig_enable_flag
= true;
649 digtable
->backoff_enable_flag
= true;
651 if ((rtlpriv
->dm
.dm_type
== DM_TYPE_BYDRIVER
) &&
652 (hal_get_firmwareversion(rtlpriv
) >= 0x3c))
653 digtable
->dig_algorithm
= DIG_ALGO_BY_TOW_PORT
;
655 digtable
->dig_algorithm
=
656 DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM
;
658 digtable
->dig_twoport_algorithm
= DIG_TWO_PORT_ALGO_RSSI
;
659 digtable
->dig_ext_port_stage
= DIG_EXT_PORT_STAGE_MAX
;
660 /* off=by real rssi value, on=by digtable->rssi_val for new dig */
661 digtable
->dig_dbgmode
= DM_DBG_OFF
;
662 digtable
->dig_slgorithm_switch
= 0;
664 /* 2007/10/04 MH Define init gain threshol. */
665 digtable
->dig_state
= DM_STA_DIG_MAX
;
666 digtable
->dig_highpwrstate
= DM_STA_DIG_MAX
;
668 digtable
->cur_sta_connectstate
= DIG_STA_DISCONNECT
;
669 digtable
->pre_sta_connectstate
= DIG_STA_DISCONNECT
;
670 digtable
->cur_ap_connectstate
= DIG_AP_DISCONNECT
;
671 digtable
->pre_ap_connectstate
= DIG_AP_DISCONNECT
;
673 digtable
->rssi_lowthresh
= DM_DIG_THRESH_LOW
;
674 digtable
->rssi_highthresh
= DM_DIG_THRESH_HIGH
;
676 digtable
->fa_lowthresh
= DM_FALSEALARM_THRESH_LOW
;
677 digtable
->fa_highthresh
= DM_FALSEALARM_THRESH_HIGH
;
679 digtable
->rssi_highpower_lowthresh
= DM_DIG_HIGH_PWR_THRESH_LOW
;
680 digtable
->rssi_highpower_highthresh
= DM_DIG_HIGH_PWR_THRESH_HIGH
;
682 /* for dig debug rssi value */
683 digtable
->rssi_val
= 50;
684 digtable
->backoff_val
= DM_DIG_BACKOFF
;
685 digtable
->rx_gain_range_max
= DM_DIG_MAX
;
687 digtable
->rx_gain_range_min
= DM_DIG_MIN
;
689 digtable
->backoffval_range_max
= DM_DIG_BACKOFF_MAX
;
690 digtable
->backoffval_range_min
= DM_DIG_BACKOFF_MIN
;
693 static void _rtl92s_dm_init_dynamic_txpower(struct ieee80211_hw
*hw
)
695 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
697 if ((hal_get_firmwareversion(rtlpriv
) >= 60) &&
698 (rtlpriv
->dm
.dm_type
== DM_TYPE_BYDRIVER
))
699 rtlpriv
->dm
.dynamic_txpower_enable
= true;
701 rtlpriv
->dm
.dynamic_txpower_enable
= false;
703 rtlpriv
->dm
.last_dtp_lvl
= TX_HIGHPWR_LEVEL_NORMAL
;
704 rtlpriv
->dm
.dynamic_txhighpower_lvl
= TX_HIGHPWR_LEVEL_NORMAL
;
707 void rtl92s_dm_init(struct ieee80211_hw
*hw
)
709 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
711 rtlpriv
->dm
.dm_type
= DM_TYPE_BYDRIVER
;
712 rtlpriv
->dm
.undecorated_smoothed_pwdb
= -1;
714 _rtl92s_dm_init_dynamic_txpower(hw
);
715 rtl92s_dm_init_edca_turbo(hw
);
716 _rtl92s_dm_init_rate_adaptive_mask(hw
);
717 _rtl92s_dm_init_txpowertracking_thermalmeter(hw
);
718 _rtl92s_dm_init_dig(hw
);
720 rtl_write_dword(rtlpriv
, WFM5
, FW_CCA_CHK_ENABLE
);
723 void rtl92s_dm_watchdog(struct ieee80211_hw
*hw
)
725 _rtl92s_dm_check_edca_turbo(hw
);
726 _rtl92s_dm_check_txpowertracking_thermalmeter(hw
);
727 _rtl92s_dm_ctrl_initgain_byrssi(hw
);
728 _rtl92s_dm_dynamic_txpower(hw
);
729 _rtl92s_dm_refresh_rateadaptive_mask(hw
);
730 _rtl92s_dm_switch_baseband_mrc(hw
);