Merge branch 'next' into for-linus
[deliverable/linux.git] / drivers / net / wireless / rtlwifi / rtl8723be / trx.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2014 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 #include "../wifi.h"
27 #include "../pci.h"
28 #include "../base.h"
29 #include "../stats.h"
30 #include "reg.h"
31 #include "def.h"
32 #include "phy.h"
33 #include "trx.h"
34 #include "led.h"
35 #include "dm.h"
36 #include "phy.h"
37
38 static u8 _rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
39 {
40 __le16 fc = rtl_get_fc(skb);
41
42 if (unlikely(ieee80211_is_beacon(fc)))
43 return QSLT_BEACON;
44 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
45 return QSLT_MGNT;
46
47 return skb->priority;
48 }
49
50 /* mac80211's rate_idx is like this:
51 *
52 * 2.4G band:rx_status->band == IEEE80211_BAND_2GHZ
53 *
54 * B/G rate:
55 * (rx_status->flag & RX_FLAG_HT) = 0,
56 * DESC92C_RATE1M-->DESC92C_RATE54M ==> idx is 0-->11,
57 *
58 * N rate:
59 * (rx_status->flag & RX_FLAG_HT) = 1,
60 * DESC92C_RATEMCS0-->DESC92C_RATEMCS15 ==> idx is 0-->15
61 *
62 * 5G band:rx_status->band == IEEE80211_BAND_5GHZ
63 * A rate:
64 * (rx_status->flag & RX_FLAG_HT) = 0,
65 * DESC92C_RATE6M-->DESC92C_RATE54M ==> idx is 0-->7,
66 *
67 * N rate:
68 * (rx_status->flag & RX_FLAG_HT) = 1,
69 * DESC92C_RATEMCS0-->DESC92C_RATEMCS15 ==> idx is 0-->15
70 */
71 static int _rtl8723be_rate_mapping(struct ieee80211_hw *hw,
72 bool isht, u8 desc_rate)
73 {
74 int rate_idx;
75
76 if (!isht) {
77 if (IEEE80211_BAND_2GHZ == hw->conf.chandef.chan->band) {
78 switch (desc_rate) {
79 case DESC92C_RATE1M:
80 rate_idx = 0;
81 break;
82 case DESC92C_RATE2M:
83 rate_idx = 1;
84 break;
85 case DESC92C_RATE5_5M:
86 rate_idx = 2;
87 break;
88 case DESC92C_RATE11M:
89 rate_idx = 3;
90 break;
91 case DESC92C_RATE6M:
92 rate_idx = 4;
93 break;
94 case DESC92C_RATE9M:
95 rate_idx = 5;
96 break;
97 case DESC92C_RATE12M:
98 rate_idx = 6;
99 break;
100 case DESC92C_RATE18M:
101 rate_idx = 7;
102 break;
103 case DESC92C_RATE24M:
104 rate_idx = 8;
105 break;
106 case DESC92C_RATE36M:
107 rate_idx = 9;
108 break;
109 case DESC92C_RATE48M:
110 rate_idx = 10;
111 break;
112 case DESC92C_RATE54M:
113 rate_idx = 11;
114 break;
115 default:
116 rate_idx = 0;
117 break;
118 }
119 } else {
120 switch (desc_rate) {
121 case DESC92C_RATE6M:
122 rate_idx = 0;
123 break;
124 case DESC92C_RATE9M:
125 rate_idx = 1;
126 break;
127 case DESC92C_RATE12M:
128 rate_idx = 2;
129 break;
130 case DESC92C_RATE18M:
131 rate_idx = 3;
132 break;
133 case DESC92C_RATE24M:
134 rate_idx = 4;
135 break;
136 case DESC92C_RATE36M:
137 rate_idx = 5;
138 break;
139 case DESC92C_RATE48M:
140 rate_idx = 6;
141 break;
142 case DESC92C_RATE54M:
143 rate_idx = 7;
144 break;
145 default:
146 rate_idx = 0;
147 break;
148 }
149 }
150 } else {
151 switch (desc_rate) {
152 case DESC92C_RATEMCS0:
153 rate_idx = 0;
154 break;
155 case DESC92C_RATEMCS1:
156 rate_idx = 1;
157 break;
158 case DESC92C_RATEMCS2:
159 rate_idx = 2;
160 break;
161 case DESC92C_RATEMCS3:
162 rate_idx = 3;
163 break;
164 case DESC92C_RATEMCS4:
165 rate_idx = 4;
166 break;
167 case DESC92C_RATEMCS5:
168 rate_idx = 5;
169 break;
170 case DESC92C_RATEMCS6:
171 rate_idx = 6;
172 break;
173 case DESC92C_RATEMCS7:
174 rate_idx = 7;
175 break;
176 case DESC92C_RATEMCS8:
177 rate_idx = 8;
178 break;
179 case DESC92C_RATEMCS9:
180 rate_idx = 9;
181 break;
182 case DESC92C_RATEMCS10:
183 rate_idx = 10;
184 break;
185 case DESC92C_RATEMCS11:
186 rate_idx = 11;
187 break;
188 case DESC92C_RATEMCS12:
189 rate_idx = 12;
190 break;
191 case DESC92C_RATEMCS13:
192 rate_idx = 13;
193 break;
194 case DESC92C_RATEMCS14:
195 rate_idx = 14;
196 break;
197 case DESC92C_RATEMCS15:
198 rate_idx = 15;
199 break;
200 default:
201 rate_idx = 0;
202 break;
203 }
204 }
205 return rate_idx;
206 }
207
208 static void _rtl8723be_query_rxphystatus(struct ieee80211_hw *hw,
209 struct rtl_stats *pstatus, u8 *pdesc,
210 struct rx_fwinfo_8723be *p_drvinfo,
211 bool packet_match_bssid,
212 bool packet_toself,
213 bool packet_beacon)
214 {
215 struct rtl_priv *rtlpriv = rtl_priv(hw);
216 struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
217 struct phy_sts_cck_8723e_t *cck_buf;
218 struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
219 struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
220 char rx_pwr_all = 0, rx_pwr[4];
221 u8 rf_rx_num = 0, evm, pwdb_all;
222 u8 i, max_spatial_stream;
223 u32 rssi, total_rssi = 0;
224 bool is_cck = pstatus->is_cck;
225 u8 lan_idx, vga_idx;
226
227 /* Record it for next packet processing */
228 pstatus->packet_matchbssid = packet_match_bssid;
229 pstatus->packet_toself = packet_toself;
230 pstatus->packet_beacon = packet_beacon;
231 pstatus->rx_mimo_sig_qual[0] = -1;
232 pstatus->rx_mimo_sig_qual[1] = -1;
233
234 if (is_cck) {
235 u8 cck_highpwr;
236 u8 cck_agc_rpt;
237 /* CCK Driver info Structure is not the same as OFDM packet. */
238 cck_buf = (struct phy_sts_cck_8723e_t *)p_drvinfo;
239 cck_agc_rpt = cck_buf->cck_agc_rpt;
240
241 /* (1)Hardware does not provide RSSI for CCK
242 * (2)PWDB, Average PWDB cacluated by
243 * hardware (for rate adaptive)
244 */
245 if (ppsc->rfpwr_state == ERFON)
246 cck_highpwr = (u8) rtl_get_bbreg(hw,
247 RFPGA0_XA_HSSIPARAMETER2,
248 BIT(9));
249 else
250 cck_highpwr = false;
251
252 lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
253 vga_idx = (cck_agc_rpt & 0x1f);
254 switch (lan_idx) {
255 case 7:
256 if (vga_idx <= 27)/*VGA_idx = 27~2*/
257 rx_pwr_all = -100 + 2 * (27 - vga_idx);
258 else
259 rx_pwr_all = -100;
260 break;
261 case 6:/*VGA_idx = 2~0*/
262 rx_pwr_all = -48 + 2 * (2 - vga_idx);
263 break;
264 case 5:/*VGA_idx = 7~5*/
265 rx_pwr_all = -42 + 2 * (7 - vga_idx);
266 break;
267 case 4:/*VGA_idx = 7~4*/
268 rx_pwr_all = -36 + 2 * (7 - vga_idx);
269 break;
270 case 3:/*VGA_idx = 7~0*/
271 rx_pwr_all = -24 + 2 * (7 - vga_idx);
272 break;
273 case 2:
274 if (cck_highpwr)/*VGA_idx = 5~0*/
275 rx_pwr_all = -12 + 2 * (5 - vga_idx);
276 else
277 rx_pwr_all = -6 + 2 * (5 - vga_idx);
278 break;
279 case 1:
280 rx_pwr_all = 8 - 2 * vga_idx;
281 break;
282 case 0:
283 rx_pwr_all = 14 - 2 * vga_idx;
284 break;
285 default:
286 break;
287 }
288 rx_pwr_all += 6;
289 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
290 /* CCK gain is smaller than OFDM/MCS gain, */
291 /* so we add gain diff by experiences,
292 * the val is 6
293 */
294 pwdb_all += 6;
295 if (pwdb_all > 100)
296 pwdb_all = 100;
297 /* modify the offset to make the same gain index with OFDM. */
298 if (pwdb_all > 34 && pwdb_all <= 42)
299 pwdb_all -= 2;
300 else if (pwdb_all > 26 && pwdb_all <= 34)
301 pwdb_all -= 6;
302 else if (pwdb_all > 14 && pwdb_all <= 26)
303 pwdb_all -= 8;
304 else if (pwdb_all > 4 && pwdb_all <= 14)
305 pwdb_all -= 4;
306 if (!cck_highpwr) {
307 if (pwdb_all >= 80)
308 pwdb_all = ((pwdb_all - 80) << 1) +
309 ((pwdb_all - 80) >> 1) + 80;
310 else if ((pwdb_all <= 78) && (pwdb_all >= 20))
311 pwdb_all += 3;
312 if (pwdb_all > 100)
313 pwdb_all = 100;
314 }
315
316 pstatus->rx_pwdb_all = pwdb_all;
317 pstatus->recvsignalpower = rx_pwr_all;
318
319 /* (3) Get Signal Quality (EVM) */
320 if (packet_match_bssid) {
321 u8 sq;
322
323 if (pstatus->rx_pwdb_all > 40) {
324 sq = 100;
325 } else {
326 sq = cck_buf->sq_rpt;
327 if (sq > 64)
328 sq = 0;
329 else if (sq < 20)
330 sq = 100;
331 else
332 sq = ((64 - sq) * 100) / 44;
333 }
334
335 pstatus->signalquality = sq;
336 pstatus->rx_mimo_sig_qual[0] = sq;
337 pstatus->rx_mimo_sig_qual[1] = -1;
338 }
339 } else {
340 rtlpriv->dm.rfpath_rxenable[0] = true;
341 rtlpriv->dm.rfpath_rxenable[1] = true;
342
343 /* (1)Get RSSI for HT rate */
344 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
345 /* we will judge RF RX path now. */
346 if (rtlpriv->dm.rfpath_rxenable[i])
347 rf_rx_num++;
348
349 rx_pwr[i] = ((p_drvinfo->gain_trsw[i] & 0x3f)*2) - 110;
350
351 /* Translate DBM to percentage. */
352 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
353 total_rssi += rssi;
354
355 /* Get Rx snr value in DB */
356 rtlpriv->stats.rx_snr_db[i] =
357 (long)(p_drvinfo->rxsnr[i] / 2);
358
359 /* Record Signal Strength for next packet */
360 if (packet_match_bssid)
361 pstatus->rx_mimo_signalstrength[i] = (u8) rssi;
362 }
363
364 /* (2)PWDB, Avg cacluated by hardware (for rate adaptive) */
365 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
366
367 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
368 pstatus->rx_pwdb_all = pwdb_all;
369 pstatus->rxpower = rx_pwr_all;
370 pstatus->recvsignalpower = rx_pwr_all;
371
372 /* (3)EVM of HT rate */
373 if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 &&
374 pstatus->rate <= DESC92C_RATEMCS15)
375 max_spatial_stream = 2;
376 else
377 max_spatial_stream = 1;
378
379 for (i = 0; i < max_spatial_stream; i++) {
380 evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
381
382 if (packet_match_bssid) {
383 /* Fill value in RFD, Get the first
384 * spatial stream only
385 */
386 if (i == 0)
387 pstatus->signalquality =
388 (u8) (evm & 0xff);
389 pstatus->rx_mimo_sig_qual[i] =
390 (u8) (evm & 0xff);
391 }
392 }
393 if (packet_match_bssid) {
394 for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
395 rtl_priv(hw)->dm.cfo_tail[i] =
396 (char)p_phystrpt->path_cfotail[i];
397
398 rtl_priv(hw)->dm.packet_count++;
399 if (rtl_priv(hw)->dm.packet_count == 0xffffffff)
400 rtl_priv(hw)->dm.packet_count = 0;
401 }
402 }
403
404 /* UI BSS List signal strength(in percentage),
405 * make it good looking, from 0~100.
406 */
407 if (is_cck)
408 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
409 pwdb_all));
410 else if (rf_rx_num != 0)
411 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
412 total_rssi /= rf_rx_num));
413 /*HW antenna diversity*/
414 rtldm->fat_table.antsel_rx_keep_0 = p_phystrpt->ant_sel;
415 rtldm->fat_table.antsel_rx_keep_1 = p_phystrpt->ant_sel_b;
416 rtldm->fat_table.antsel_rx_keep_2 = p_phystrpt->antsel_rx_keep_2;
417 }
418
419 static void _rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw *hw,
420 struct sk_buff *skb,
421 struct rtl_stats *pstatus,
422 u8 *pdesc,
423 struct rx_fwinfo_8723be *p_drvinfo)
424 {
425 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
426 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
427 struct ieee80211_hdr *hdr;
428 u8 *tmp_buf;
429 u8 *praddr;
430 u8 *psaddr;
431 u16 fc, type;
432 bool packet_matchbssid, packet_toself, packet_beacon;
433
434 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
435
436 hdr = (struct ieee80211_hdr *)tmp_buf;
437 fc = le16_to_cpu(hdr->frame_control);
438 type = WLAN_FC_GET_TYPE(hdr->frame_control);
439 praddr = hdr->addr1;
440 psaddr = ieee80211_get_SA(hdr);
441 memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
442
443 packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
444 (!ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
445 hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
446 hdr->addr2 : hdr->addr3)) &&
447 (!pstatus->hwerror) &&
448 (!pstatus->crc) && (!pstatus->icv));
449
450 packet_toself = packet_matchbssid &&
451 (!ether_addr_equal(praddr, rtlefuse->dev_addr));
452
453 /* YP: packet_beacon is not initialized,
454 * this assignment is neccesary,
455 * otherwise it counld be true in this case
456 * the situation is much worse in Kernel 3.10
457 */
458 if (ieee80211_is_beacon(hdr->frame_control))
459 packet_beacon = true;
460 else
461 packet_beacon = false;
462
463 if (packet_beacon && packet_matchbssid)
464 rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
465
466 _rtl8723be_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
467 packet_matchbssid,
468 packet_toself,
469 packet_beacon);
470
471 rtl_process_phyinfo(hw, tmp_buf, pstatus);
472 }
473
474 static void _rtl8723be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
475 u8 *virtualaddress)
476 {
477 u32 dwtmp = 0;
478 memset(virtualaddress, 0, 8);
479
480 SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
481 if (ptcb_desc->empkt_num == 1) {
482 dwtmp = ptcb_desc->empkt_len[0];
483 } else {
484 dwtmp = ptcb_desc->empkt_len[0];
485 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
486 dwtmp += ptcb_desc->empkt_len[1];
487 }
488 SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
489
490 if (ptcb_desc->empkt_num <= 3) {
491 dwtmp = ptcb_desc->empkt_len[2];
492 } else {
493 dwtmp = ptcb_desc->empkt_len[2];
494 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
495 dwtmp += ptcb_desc->empkt_len[3];
496 }
497 SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
498 if (ptcb_desc->empkt_num <= 5) {
499 dwtmp = ptcb_desc->empkt_len[4];
500 } else {
501 dwtmp = ptcb_desc->empkt_len[4];
502 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
503 dwtmp += ptcb_desc->empkt_len[5];
504 }
505 SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
506 SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
507 if (ptcb_desc->empkt_num <= 7) {
508 dwtmp = ptcb_desc->empkt_len[6];
509 } else {
510 dwtmp = ptcb_desc->empkt_len[6];
511 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
512 dwtmp += ptcb_desc->empkt_len[7];
513 }
514 SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
515 if (ptcb_desc->empkt_num <= 9) {
516 dwtmp = ptcb_desc->empkt_len[8];
517 } else {
518 dwtmp = ptcb_desc->empkt_len[8];
519 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
520 dwtmp += ptcb_desc->empkt_len[9];
521 }
522 SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
523 }
524
525 bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,
526 struct rtl_stats *status,
527 struct ieee80211_rx_status *rx_status,
528 u8 *pdesc, struct sk_buff *skb)
529 {
530 struct rtl_priv *rtlpriv = rtl_priv(hw);
531 struct rx_fwinfo_8723be *p_drvinfo;
532 struct ieee80211_hdr *hdr;
533
534 u32 phystatus = GET_RX_DESC_PHYST(pdesc);
535 status->packet_report_type = (u8)GET_RX_STATUS_DESC_RPT_SEL(pdesc);
536 if (status->packet_report_type == TX_REPORT2)
537 status->length = (u16) GET_RX_RPT2_DESC_PKT_LEN(pdesc);
538 else
539 status->length = (u16) GET_RX_DESC_PKT_LEN(pdesc);
540 status->rx_drvinfo_size = (u8) GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
541 RX_DRV_INFO_SIZE_UNIT;
542 status->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
543 status->icv = (u16) GET_RX_DESC_ICV(pdesc);
544 status->crc = (u16) GET_RX_DESC_CRC32(pdesc);
545 status->hwerror = (status->crc | status->icv);
546 status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
547 status->rate = (u8) GET_RX_DESC_RXMCS(pdesc);
548 status->shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
549 status->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
550 status->isfirst_ampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
551 if (status->packet_report_type == NORMAL_RX)
552 status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
553 status->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
554 status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
555
556 status->is_cck = RTL8723E_RX_HAL_IS_CCK_RATE(status->rate);
557
558 status->macid = GET_RX_DESC_MACID(pdesc);
559 if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
560 status->wake_match = BIT(2);
561 else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
562 status->wake_match = BIT(1);
563 else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
564 status->wake_match = BIT(0);
565 else
566 status->wake_match = 0;
567 if (status->wake_match)
568 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
569 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
570 status->wake_match);
571 rx_status->freq = hw->conf.chandef.chan->center_freq;
572 rx_status->band = hw->conf.chandef.chan->band;
573
574
575 hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
576 status->rx_bufshift);
577
578 if (status->crc)
579 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
580
581 if (status->rx_is40Mhzpacket)
582 rx_status->flag |= RX_FLAG_40MHZ;
583
584 if (status->is_ht)
585 rx_status->flag |= RX_FLAG_HT;
586
587 rx_status->flag |= RX_FLAG_MACTIME_START;
588
589 /* hw will set status->decrypted true, if it finds the
590 * frame is open data frame or mgmt frame.
591 * So hw will not decryption robust managment frame
592 * for IEEE80211w but still set status->decrypted
593 * true, so here we should set it back to undecrypted
594 * for IEEE80211w frame, and mac80211 sw will help
595 * to decrypt it
596 */
597 if (status->decrypted) {
598 if (!hdr) {
599 WARN_ON_ONCE(true);
600 pr_err("decrypted is true but hdr NULL in skb %p\n",
601 rtl_get_hdr(skb));
602 return false;
603 }
604
605 if ((_ieee80211_is_robust_mgmt_frame(hdr)) &&
606 (ieee80211_has_protected(hdr->frame_control)))
607 rx_status->flag &= ~RX_FLAG_DECRYPTED;
608 else
609 rx_status->flag |= RX_FLAG_DECRYPTED;
610 }
611
612 /* rate_idx: index of data rate into band's
613 * supported rates or MCS index if HT rates
614 * are use (RX_FLAG_HT)
615 * Notice: this is diff with windows define
616 */
617 rx_status->rate_idx = _rtl8723be_rate_mapping(hw, status->is_ht,
618 status->rate);
619
620 rx_status->mactime = status->timestamp_low;
621 if (phystatus) {
622 p_drvinfo = (struct rx_fwinfo_8723be *)(skb->data +
623 status->rx_bufshift);
624
625 _rtl8723be_translate_rx_signal_stuff(hw, skb, status,
626 pdesc, p_drvinfo);
627 }
628
629 /*rx_status->qual = status->signal; */
630 rx_status->signal = status->recvsignalpower + 10;
631 if (status->packet_report_type == TX_REPORT2) {
632 status->macid_valid_entry[0] =
633 GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
634 status->macid_valid_entry[1] =
635 GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
636 }
637 return true;
638 }
639
640 void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,
641 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
642 u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
643 struct ieee80211_sta *sta, struct sk_buff *skb,
644 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
645 {
646 struct rtl_priv *rtlpriv = rtl_priv(hw);
647 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
648 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
649 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
650 u8 *pdesc = pdesc_tx;
651 u16 seq_number;
652 __le16 fc = hdr->frame_control;
653 unsigned int buf_len = 0;
654 unsigned int skb_len = skb->len;
655 u8 fw_qsel = _rtl8723be_map_hwqueue_to_fwqueue(skb, hw_queue);
656 bool firstseg = ((hdr->seq_ctrl &
657 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
658 bool lastseg = ((hdr->frame_control &
659 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
660 dma_addr_t mapping;
661 u8 bw_40 = 0;
662 u8 short_gi = 0;
663
664 if (mac->opmode == NL80211_IFTYPE_STATION) {
665 bw_40 = mac->bw_40;
666 } else if (mac->opmode == NL80211_IFTYPE_AP ||
667 mac->opmode == NL80211_IFTYPE_ADHOC) {
668 if (sta)
669 bw_40 = sta->ht_cap.cap &
670 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
671 }
672 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
673 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
674 /* reserve 8 byte for AMPDU early mode */
675 if (rtlhal->earlymode_enable) {
676 skb_push(skb, EM_HDR_LEN);
677 memset(skb->data, 0, EM_HDR_LEN);
678 }
679 buf_len = skb->len;
680 mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
681 PCI_DMA_TODEVICE);
682 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
683 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "DMA mapping error");
684 return;
685 }
686 CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8723be));
687 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
688 firstseg = true;
689 lastseg = true;
690 }
691 if (firstseg) {
692 if (rtlhal->earlymode_enable) {
693 SET_TX_DESC_PKT_OFFSET(pdesc, 1);
694 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
695 EM_HDR_LEN);
696 if (ptcb_desc->empkt_num) {
697 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
698 "Insert 8 byte.pTcb->EMPktNum:%d\n",
699 ptcb_desc->empkt_num);
700 _rtl8723be_insert_emcontent(ptcb_desc,
701 (u8 *)(skb->data));
702 }
703 } else {
704 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
705 }
706
707 /* ptcb_desc->use_driver_rate = true; */
708 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
709 if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
710 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
711 else
712 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
713
714 SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
715
716 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
717 SET_TX_DESC_AGG_ENABLE(pdesc, 1);
718 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
719 }
720 SET_TX_DESC_SEQ(pdesc, seq_number);
721 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
722 !ptcb_desc->cts_enable) ?
723 1 : 0));
724 SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
725 SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ?
726 1 : 0));
727
728 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
729
730 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
731 SET_TX_DESC_RTS_SHORT(pdesc,
732 ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
733 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
734 (ptcb_desc->rts_use_shortgi ? 1 : 0)));
735
736 if (ptcb_desc->btx_enable_sw_calc_duration)
737 SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
738
739 if (bw_40) {
740 if (ptcb_desc->packet_bw) {
741 SET_TX_DESC_DATA_BW(pdesc, 1);
742 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
743 } else {
744 SET_TX_DESC_DATA_BW(pdesc, 0);
745 SET_TX_DESC_TX_SUB_CARRIER(pdesc, mac->cur_40_prime_sc);
746 }
747 } else {
748 SET_TX_DESC_DATA_BW(pdesc, 0);
749 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
750 }
751
752 SET_TX_DESC_LINIP(pdesc, 0);
753 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb_len);
754 if (sta) {
755 u8 ampdu_density = sta->ht_cap.ampdu_density;
756 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
757 }
758 if (info->control.hw_key) {
759 struct ieee80211_key_conf *keyconf =
760 info->control.hw_key;
761 switch (keyconf->cipher) {
762 case WLAN_CIPHER_SUITE_WEP40:
763 case WLAN_CIPHER_SUITE_WEP104:
764 case WLAN_CIPHER_SUITE_TKIP:
765 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
766 break;
767 case WLAN_CIPHER_SUITE_CCMP:
768 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
769 break;
770 default:
771 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
772 break;
773 }
774 }
775
776 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
777 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
778 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
779 SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
780 1 : 0);
781 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
782
783 if (ieee80211_is_data_qos(fc)) {
784 if (mac->rdg_en) {
785 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
786 "Enable RDG function.\n");
787 SET_TX_DESC_RDG_ENABLE(pdesc, 1);
788 SET_TX_DESC_HTC(pdesc, 1);
789 }
790 }
791 }
792
793 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
794 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
795 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) buf_len);
796 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
797 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
798 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
799
800 if (!ieee80211_is_data_qos(fc)) {
801 SET_TX_DESC_HWSEQ_EN(pdesc, 1);
802 SET_TX_DESC_HWSEQ_SEL(pdesc, 0);
803 }
804 SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
805 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
806 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
807 SET_TX_DESC_BMC(pdesc, 1);
808 }
809 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
810 }
811
812 void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
813 bool b_firstseg, bool b_lastseg,
814 struct sk_buff *skb)
815 {
816 struct rtl_priv *rtlpriv = rtl_priv(hw);
817 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
818 u8 fw_queue = QSLT_BEACON;
819
820 dma_addr_t mapping = pci_map_single(rtlpci->pdev,
821 skb->data, skb->len,
822 PCI_DMA_TODEVICE);
823
824 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
825 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
826 "DMA mapping error");
827 return;
828 }
829 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
830
831 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
832
833 SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
834
835 SET_TX_DESC_SEQ(pdesc, 0);
836
837 SET_TX_DESC_LINIP(pdesc, 0);
838
839 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
840
841 SET_TX_DESC_FIRST_SEG(pdesc, 1);
842 SET_TX_DESC_LAST_SEG(pdesc, 1);
843
844 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
845
846 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
847
848 SET_TX_DESC_RATE_ID(pdesc, 0);
849 SET_TX_DESC_MACID(pdesc, 0);
850
851 SET_TX_DESC_OWN(pdesc, 1);
852
853 SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
854
855 SET_TX_DESC_FIRST_SEG(pdesc, 1);
856 SET_TX_DESC_LAST_SEG(pdesc, 1);
857
858 SET_TX_DESC_USE_RATE(pdesc, 1);
859 }
860
861 void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
862 u8 desc_name, u8 *val)
863 {
864 if (istx) {
865 switch (desc_name) {
866 case HW_DESC_OWN:
867 SET_TX_DESC_OWN(pdesc, 1);
868 break;
869 case HW_DESC_TX_NEXTDESC_ADDR:
870 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
871 break;
872 default:
873 RT_ASSERT(false, "ERR txdesc :%d not process\n",
874 desc_name);
875 break;
876 }
877 } else {
878 switch (desc_name) {
879 case HW_DESC_RXOWN:
880 SET_RX_DESC_OWN(pdesc, 1);
881 break;
882 case HW_DESC_RXBUFF_ADDR:
883 SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
884 break;
885 case HW_DESC_RXPKT_LEN:
886 SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
887 break;
888 case HW_DESC_RXERO:
889 SET_RX_DESC_EOR(pdesc, 1);
890 break;
891 default:
892 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
893 desc_name);
894 break;
895 }
896 }
897 }
898
899 u32 rtl8723be_get_desc(u8 *pdesc, bool istx, u8 desc_name)
900 {
901 u32 ret = 0;
902
903 if (istx) {
904 switch (desc_name) {
905 case HW_DESC_OWN:
906 ret = GET_TX_DESC_OWN(pdesc);
907 break;
908 case HW_DESC_TXBUFF_ADDR:
909 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
910 break;
911 default:
912 RT_ASSERT(false, "ERR txdesc :%d not process\n",
913 desc_name);
914 break;
915 }
916 } else {
917 switch (desc_name) {
918 case HW_DESC_OWN:
919 ret = GET_RX_DESC_OWN(pdesc);
920 break;
921 case HW_DESC_RXPKT_LEN:
922 ret = GET_RX_DESC_PKT_LEN(pdesc);
923 break;
924 default:
925 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
926 desc_name);
927 break;
928 }
929 }
930 return ret;
931 }
932
933 bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,
934 u8 hw_queue, u16 index)
935 {
936 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
937 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
938 u8 *entry = (u8 *)(&ring->desc[ring->idx]);
939 u8 own = (u8) rtl8723be_get_desc(entry, true, HW_DESC_OWN);
940
941 /*beacon packet will only use the first
942 *descriptor by default, and the own may not
943 *be cleared by the hardware
944 */
945 if (own)
946 return false;
947 else
948 return true;
949 }
950
951 void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
952 {
953 struct rtl_priv *rtlpriv = rtl_priv(hw);
954 if (hw_queue == BEACON_QUEUE) {
955 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
956 } else {
957 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
958 BIT(0) << (hw_queue));
959 }
960 }
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