2 * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
4 * This is a new flat driver which is based on the original emac_lite
5 * driver from John Williams <john.williams@petalogix.com>.
7 * 2007-2009 (c) Xilinx, Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/module.h>
16 #include <linux/uaccess.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/skbuff.h>
22 #include <linux/slab.h>
23 #include <linux/of_address.h>
24 #include <linux/of_device.h>
25 #include <linux/of_platform.h>
26 #include <linux/of_mdio.h>
27 #include <linux/of_net.h>
28 #include <linux/phy.h>
29 #include <linux/interrupt.h>
31 #define DRIVER_NAME "xilinx_emaclite"
33 /* Register offsets for the EmacLite Core */
34 #define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */
35 #define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */
36 #define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */
37 #define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */
38 #define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */
39 #define XEL_GIER_OFFSET 0x07F8 /* GIE Register */
40 #define XEL_TSR_OFFSET 0x07FC /* Tx status */
41 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
43 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
44 #define XEL_RPLR_OFFSET 0x100C /* Rx packet length */
45 #define XEL_RSR_OFFSET 0x17FC /* Rx status */
47 #define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */
49 /* MDIO Address Register Bit Masks */
50 #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */
51 #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */
52 #define XEL_MDIOADDR_PHYADR_SHIFT 5
53 #define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */
55 /* MDIO Write Data Register Bit Masks */
56 #define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */
58 /* MDIO Read Data Register Bit Masks */
59 #define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */
61 /* MDIO Control Register Bit Masks */
62 #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */
63 #define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */
65 /* Global Interrupt Enable Register (GIER) Bit Masks */
66 #define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */
68 /* Transmit Status Register (TSR) Bit Masks */
69 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */
70 #define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */
71 #define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */
72 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit
73 * only. This is not documented
76 /* Define for programming the MAC address into the EmacLite */
77 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
79 /* Receive Status Register (RSR) */
80 #define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */
81 #define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */
83 /* Transmit Packet Length Register (TPLR) */
84 #define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */
86 /* Receive Packet Length Register (RPLR) */
87 #define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */
89 #define XEL_HEADER_OFFSET 12 /* Offset to length field */
90 #define XEL_HEADER_SHIFT 16 /* Shift value for length */
92 /* General Ethernet Definitions */
93 #define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */
94 #define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */
98 #define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */
101 /* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */
102 #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
105 * struct net_local - Our private per device data
106 * @ndev: instance of the network device
107 * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW
108 * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW
109 * @next_tx_buf_to_use: next Tx buffer to write to
110 * @next_rx_buf_to_use: next Rx buffer to read from
111 * @base_addr: base address of the Emaclite device
112 * @reset_lock: lock used for synchronization
113 * @deferred_skb: holds an skb (for transmission at a later time) when the
114 * Tx buffer is not free
115 * @phy_dev: pointer to the PHY device
116 * @phy_node: pointer to the PHY device node
117 * @mii_bus: pointer to the MII bus
118 * @mdio_irqs: IRQs table for MDIO bus
119 * @last_link: last link status
120 * @has_mdio: indicates whether MDIO is included in the HW
124 struct net_device
*ndev
;
128 u32 next_tx_buf_to_use
;
129 u32 next_rx_buf_to_use
;
130 void __iomem
*base_addr
;
132 spinlock_t reset_lock
;
133 struct sk_buff
*deferred_skb
;
135 struct phy_device
*phy_dev
;
136 struct device_node
*phy_node
;
138 struct mii_bus
*mii_bus
;
139 int mdio_irqs
[PHY_MAX_ADDR
];
146 /*************************/
147 /* EmacLite driver calls */
148 /*************************/
151 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
152 * @drvdata: Pointer to the Emaclite device private data
154 * This function enables the Tx and Rx interrupts for the Emaclite device along
155 * with the Global Interrupt Enable.
157 static void xemaclite_enable_interrupts(struct net_local
*drvdata
)
161 /* Enable the Tx interrupts for the first Buffer */
162 reg_data
= in_be32(drvdata
->base_addr
+ XEL_TSR_OFFSET
);
163 out_be32(drvdata
->base_addr
+ XEL_TSR_OFFSET
,
164 reg_data
| XEL_TSR_XMIT_IE_MASK
);
166 /* Enable the Tx interrupts for the second Buffer if
167 * configured in HW */
168 if (drvdata
->tx_ping_pong
!= 0) {
169 reg_data
= in_be32(drvdata
->base_addr
+
170 XEL_BUFFER_OFFSET
+ XEL_TSR_OFFSET
);
171 out_be32(drvdata
->base_addr
+ XEL_BUFFER_OFFSET
+
173 reg_data
| XEL_TSR_XMIT_IE_MASK
);
176 /* Enable the Rx interrupts for the first buffer */
177 out_be32(drvdata
->base_addr
+ XEL_RSR_OFFSET
,
178 XEL_RSR_RECV_IE_MASK
);
180 /* Enable the Rx interrupts for the second Buffer if
181 * configured in HW */
182 if (drvdata
->rx_ping_pong
!= 0) {
183 out_be32(drvdata
->base_addr
+ XEL_BUFFER_OFFSET
+
185 XEL_RSR_RECV_IE_MASK
);
188 /* Enable the Global Interrupt Enable */
189 out_be32(drvdata
->base_addr
+ XEL_GIER_OFFSET
, XEL_GIER_GIE_MASK
);
193 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
194 * @drvdata: Pointer to the Emaclite device private data
196 * This function disables the Tx and Rx interrupts for the Emaclite device,
197 * along with the Global Interrupt Enable.
199 static void xemaclite_disable_interrupts(struct net_local
*drvdata
)
203 /* Disable the Global Interrupt Enable */
204 out_be32(drvdata
->base_addr
+ XEL_GIER_OFFSET
, XEL_GIER_GIE_MASK
);
206 /* Disable the Tx interrupts for the first buffer */
207 reg_data
= in_be32(drvdata
->base_addr
+ XEL_TSR_OFFSET
);
208 out_be32(drvdata
->base_addr
+ XEL_TSR_OFFSET
,
209 reg_data
& (~XEL_TSR_XMIT_IE_MASK
));
211 /* Disable the Tx interrupts for the second Buffer
212 * if configured in HW */
213 if (drvdata
->tx_ping_pong
!= 0) {
214 reg_data
= in_be32(drvdata
->base_addr
+ XEL_BUFFER_OFFSET
+
216 out_be32(drvdata
->base_addr
+ XEL_BUFFER_OFFSET
+
218 reg_data
& (~XEL_TSR_XMIT_IE_MASK
));
221 /* Disable the Rx interrupts for the first buffer */
222 reg_data
= in_be32(drvdata
->base_addr
+ XEL_RSR_OFFSET
);
223 out_be32(drvdata
->base_addr
+ XEL_RSR_OFFSET
,
224 reg_data
& (~XEL_RSR_RECV_IE_MASK
));
226 /* Disable the Rx interrupts for the second buffer
227 * if configured in HW */
228 if (drvdata
->rx_ping_pong
!= 0) {
230 reg_data
= in_be32(drvdata
->base_addr
+ XEL_BUFFER_OFFSET
+
232 out_be32(drvdata
->base_addr
+ XEL_BUFFER_OFFSET
+
234 reg_data
& (~XEL_RSR_RECV_IE_MASK
));
239 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
240 * @src_ptr: Void pointer to the 16-bit aligned source address
241 * @dest_ptr: Pointer to the 32-bit aligned destination address
242 * @length: Number bytes to write from source to destination
244 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
245 * address in the EmacLite device.
247 static void xemaclite_aligned_write(void *src_ptr
, u32
*dest_ptr
,
252 u16
*from_u16_ptr
, *to_u16_ptr
;
254 to_u32_ptr
= dest_ptr
;
255 from_u16_ptr
= (u16
*) src_ptr
;
258 for (; length
> 3; length
-= 4) {
259 to_u16_ptr
= (u16
*) ((void *) &align_buffer
);
260 *to_u16_ptr
++ = *from_u16_ptr
++;
261 *to_u16_ptr
++ = *from_u16_ptr
++;
264 *to_u32_ptr
++ = align_buffer
;
267 u8
*from_u8_ptr
, *to_u8_ptr
;
269 /* Set up to output the remaining data */
271 to_u8_ptr
= (u8
*) &align_buffer
;
272 from_u8_ptr
= (u8
*) from_u16_ptr
;
274 /* Output the remaining data */
275 for (; length
> 0; length
--)
276 *to_u8_ptr
++ = *from_u8_ptr
++;
278 *to_u32_ptr
= align_buffer
;
283 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
284 * @src_ptr: Pointer to the 32-bit aligned source address
285 * @dest_ptr: Pointer to the 16-bit aligned destination address
286 * @length: Number bytes to read from source to destination
288 * This function reads data from a 32-bit aligned address in the EmacLite device
289 * to a 16-bit aligned buffer.
291 static void xemaclite_aligned_read(u32
*src_ptr
, u8
*dest_ptr
,
294 u16
*to_u16_ptr
, *from_u16_ptr
;
298 from_u32_ptr
= src_ptr
;
299 to_u16_ptr
= (u16
*) dest_ptr
;
301 for (; length
> 3; length
-= 4) {
302 /* Copy each word into the temporary buffer */
303 align_buffer
= *from_u32_ptr
++;
304 from_u16_ptr
= (u16
*)&align_buffer
;
306 /* Read data from source */
307 *to_u16_ptr
++ = *from_u16_ptr
++;
308 *to_u16_ptr
++ = *from_u16_ptr
++;
312 u8
*to_u8_ptr
, *from_u8_ptr
;
314 /* Set up to read the remaining data */
315 to_u8_ptr
= (u8
*) to_u16_ptr
;
316 align_buffer
= *from_u32_ptr
++;
317 from_u8_ptr
= (u8
*) &align_buffer
;
319 /* Read the remaining data */
320 for (; length
> 0; length
--)
321 *to_u8_ptr
= *from_u8_ptr
;
326 * xemaclite_send_data - Send an Ethernet frame
327 * @drvdata: Pointer to the Emaclite device private data
328 * @data: Pointer to the data to be sent
329 * @byte_count: Total frame size, including header
331 * This function checks if the Tx buffer of the Emaclite device is free to send
332 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
335 * Return: 0 upon success or -1 if the buffer(s) are full.
337 * Note: The maximum Tx packet size can not be more than Ethernet header
338 * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
340 static int xemaclite_send_data(struct net_local
*drvdata
, u8
*data
,
341 unsigned int byte_count
)
346 /* Determine the expected Tx buffer address */
347 addr
= drvdata
->base_addr
+ drvdata
->next_tx_buf_to_use
;
349 /* If the length is too large, truncate it */
350 if (byte_count
> ETH_FRAME_LEN
)
351 byte_count
= ETH_FRAME_LEN
;
353 /* Check if the expected buffer is available */
354 reg_data
= in_be32(addr
+ XEL_TSR_OFFSET
);
355 if ((reg_data
& (XEL_TSR_XMIT_BUSY_MASK
|
356 XEL_TSR_XMIT_ACTIVE_MASK
)) == 0) {
358 /* Switch to next buffer if configured */
359 if (drvdata
->tx_ping_pong
!= 0)
360 drvdata
->next_tx_buf_to_use
^= XEL_BUFFER_OFFSET
;
361 } else if (drvdata
->tx_ping_pong
!= 0) {
362 /* If the expected buffer is full, try the other buffer,
363 * if it is configured in HW */
365 addr
= (void __iomem __force
*)((u32 __force
)addr
^
367 reg_data
= in_be32(addr
+ XEL_TSR_OFFSET
);
369 if ((reg_data
& (XEL_TSR_XMIT_BUSY_MASK
|
370 XEL_TSR_XMIT_ACTIVE_MASK
)) != 0)
371 return -1; /* Buffers were full, return failure */
373 return -1; /* Buffer was full, return failure */
375 /* Write the frame to the buffer */
376 xemaclite_aligned_write(data
, (u32 __force
*) addr
, byte_count
);
378 out_be32(addr
+ XEL_TPLR_OFFSET
, (byte_count
& XEL_TPLR_LENGTH_MASK
));
380 /* Update the Tx Status Register to indicate that there is a
381 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
382 * is used by the interrupt handler to check whether a frame
383 * has been transmitted */
384 reg_data
= in_be32(addr
+ XEL_TSR_OFFSET
);
385 reg_data
|= (XEL_TSR_XMIT_BUSY_MASK
| XEL_TSR_XMIT_ACTIVE_MASK
);
386 out_be32(addr
+ XEL_TSR_OFFSET
, reg_data
);
392 * xemaclite_recv_data - Receive a frame
393 * @drvdata: Pointer to the Emaclite device private data
394 * @data: Address where the data is to be received
396 * This function is intended to be called from the interrupt context or
397 * with a wrapper which waits for the receive frame to be available.
399 * Return: Total number of bytes received
401 static u16
xemaclite_recv_data(struct net_local
*drvdata
, u8
*data
)
404 u16 length
, proto_type
;
407 /* Determine the expected buffer address */
408 addr
= (drvdata
->base_addr
+ drvdata
->next_rx_buf_to_use
);
410 /* Verify which buffer has valid data */
411 reg_data
= in_be32(addr
+ XEL_RSR_OFFSET
);
413 if ((reg_data
& XEL_RSR_RECV_DONE_MASK
) == XEL_RSR_RECV_DONE_MASK
) {
414 if (drvdata
->rx_ping_pong
!= 0)
415 drvdata
->next_rx_buf_to_use
^= XEL_BUFFER_OFFSET
;
417 /* The instance is out of sync, try other buffer if other
418 * buffer is configured, return 0 otherwise. If the instance is
419 * out of sync, do not update the 'next_rx_buf_to_use' since it
420 * will correct on subsequent calls */
421 if (drvdata
->rx_ping_pong
!= 0)
422 addr
= (void __iomem __force
*)((u32 __force
)addr
^
425 return 0; /* No data was available */
427 /* Verify that buffer has valid data */
428 reg_data
= in_be32(addr
+ XEL_RSR_OFFSET
);
429 if ((reg_data
& XEL_RSR_RECV_DONE_MASK
) !=
430 XEL_RSR_RECV_DONE_MASK
)
431 return 0; /* No data was available */
434 /* Get the protocol type of the ethernet frame that arrived */
435 proto_type
= ((ntohl(in_be32(addr
+ XEL_HEADER_OFFSET
+
436 XEL_RXBUFF_OFFSET
)) >> XEL_HEADER_SHIFT
) &
437 XEL_RPLR_LENGTH_MASK
);
439 /* Check if received ethernet frame is a raw ethernet frame
440 * or an IP packet or an ARP packet */
441 if (proto_type
> (ETH_FRAME_LEN
+ ETH_FCS_LEN
)) {
443 if (proto_type
== ETH_P_IP
) {
444 length
= ((ntohl(in_be32(addr
+
445 XEL_HEADER_IP_LENGTH_OFFSET
+
446 XEL_RXBUFF_OFFSET
)) >>
448 XEL_RPLR_LENGTH_MASK
);
449 length
+= ETH_HLEN
+ ETH_FCS_LEN
;
451 } else if (proto_type
== ETH_P_ARP
)
452 length
= XEL_ARP_PACKET_SIZE
+ ETH_HLEN
+ ETH_FCS_LEN
;
454 /* Field contains type other than IP or ARP, use max
455 * frame size and let user parse it */
456 length
= ETH_FRAME_LEN
+ ETH_FCS_LEN
;
458 /* Use the length in the frame, plus the header and trailer */
459 length
= proto_type
+ ETH_HLEN
+ ETH_FCS_LEN
;
461 /* Read from the EmacLite device */
462 xemaclite_aligned_read((u32 __force
*) (addr
+ XEL_RXBUFF_OFFSET
),
465 /* Acknowledge the frame */
466 reg_data
= in_be32(addr
+ XEL_RSR_OFFSET
);
467 reg_data
&= ~XEL_RSR_RECV_DONE_MASK
;
468 out_be32(addr
+ XEL_RSR_OFFSET
, reg_data
);
474 * xemaclite_update_address - Update the MAC address in the device
475 * @drvdata: Pointer to the Emaclite device private data
476 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
478 * Tx must be idle and Rx should be idle for deterministic results.
479 * It is recommended that this function should be called after the
480 * initialization and before transmission of any packets from the device.
481 * The MAC address can be programmed using any of the two transmit
482 * buffers (if configured).
484 static void xemaclite_update_address(struct net_local
*drvdata
,
490 /* Determine the expected Tx buffer address */
491 addr
= drvdata
->base_addr
+ drvdata
->next_tx_buf_to_use
;
493 xemaclite_aligned_write(address_ptr
, (u32 __force
*) addr
, ETH_ALEN
);
495 out_be32(addr
+ XEL_TPLR_OFFSET
, ETH_ALEN
);
497 /* Update the MAC address in the EmacLite */
498 reg_data
= in_be32(addr
+ XEL_TSR_OFFSET
);
499 out_be32(addr
+ XEL_TSR_OFFSET
, reg_data
| XEL_TSR_PROG_MAC_ADDR
);
501 /* Wait for EmacLite to finish with the MAC address update */
502 while ((in_be32(addr
+ XEL_TSR_OFFSET
) &
503 XEL_TSR_PROG_MAC_ADDR
) != 0)
508 * xemaclite_set_mac_address - Set the MAC address for this device
509 * @dev: Pointer to the network device instance
510 * @addr: Void pointer to the sockaddr structure
512 * This function copies the HW address from the sockaddr strucutre to the
513 * net_device structure and updates the address in HW.
515 * Return: Error if the net device is busy or 0 if the addr is set
518 static int xemaclite_set_mac_address(struct net_device
*dev
, void *address
)
520 struct net_local
*lp
= netdev_priv(dev
);
521 struct sockaddr
*addr
= address
;
523 if (netif_running(dev
))
526 memcpy(dev
->dev_addr
, addr
->sa_data
, dev
->addr_len
);
527 xemaclite_update_address(lp
, dev
->dev_addr
);
532 * xemaclite_tx_timeout - Callback for Tx Timeout
533 * @dev: Pointer to the network device
535 * This function is called when Tx time out occurs for Emaclite device.
537 static void xemaclite_tx_timeout(struct net_device
*dev
)
539 struct net_local
*lp
= netdev_priv(dev
);
542 dev_err(&lp
->ndev
->dev
, "Exceeded transmit timeout of %lu ms\n",
543 TX_TIMEOUT
* 1000UL / HZ
);
545 dev
->stats
.tx_errors
++;
547 /* Reset the device */
548 spin_lock_irqsave(&lp
->reset_lock
, flags
);
550 /* Shouldn't really be necessary, but shouldn't hurt */
551 netif_stop_queue(dev
);
553 xemaclite_disable_interrupts(lp
);
554 xemaclite_enable_interrupts(lp
);
556 if (lp
->deferred_skb
) {
557 dev_kfree_skb(lp
->deferred_skb
);
558 lp
->deferred_skb
= NULL
;
559 dev
->stats
.tx_errors
++;
562 /* To exclude tx timeout */
563 dev
->trans_start
= jiffies
; /* prevent tx timeout */
565 /* We're all ready to go. Start the queue */
566 netif_wake_queue(dev
);
567 spin_unlock_irqrestore(&lp
->reset_lock
, flags
);
570 /**********************/
571 /* Interrupt Handlers */
572 /**********************/
575 * xemaclite_tx_handler - Interrupt handler for frames sent
576 * @dev: Pointer to the network device
578 * This function updates the number of packets transmitted and handles the
579 * deferred skb, if there is one.
581 static void xemaclite_tx_handler(struct net_device
*dev
)
583 struct net_local
*lp
= netdev_priv(dev
);
585 dev
->stats
.tx_packets
++;
586 if (lp
->deferred_skb
) {
587 if (xemaclite_send_data(lp
,
588 (u8
*) lp
->deferred_skb
->data
,
589 lp
->deferred_skb
->len
) != 0)
592 dev
->stats
.tx_bytes
+= lp
->deferred_skb
->len
;
593 dev_kfree_skb_irq(lp
->deferred_skb
);
594 lp
->deferred_skb
= NULL
;
595 dev
->trans_start
= jiffies
; /* prevent tx timeout */
596 netif_wake_queue(dev
);
602 * xemaclite_rx_handler- Interrupt handler for frames received
603 * @dev: Pointer to the network device
605 * This function allocates memory for a socket buffer, fills it with data
606 * received and hands it over to the TCP/IP stack.
608 static void xemaclite_rx_handler(struct net_device
*dev
)
610 struct net_local
*lp
= netdev_priv(dev
);
615 len
= ETH_FRAME_LEN
+ ETH_FCS_LEN
;
616 skb
= dev_alloc_skb(len
+ ALIGNMENT
);
618 /* Couldn't get memory. */
619 dev
->stats
.rx_dropped
++;
620 dev_err(&lp
->ndev
->dev
, "Could not allocate receive buffer\n");
625 * A new skb should have the data halfword aligned, but this code is
626 * here just in case that isn't true. Calculate how many
627 * bytes we should reserve to get the data to start on a word
629 align
= BUFFER_ALIGN(skb
->data
);
631 skb_reserve(skb
, align
);
635 len
= xemaclite_recv_data(lp
, (u8
*) skb
->data
);
638 dev
->stats
.rx_errors
++;
639 dev_kfree_skb_irq(skb
);
643 skb_put(skb
, len
); /* Tell the skb how much data we got */
645 skb
->protocol
= eth_type_trans(skb
, dev
);
646 skb_checksum_none_assert(skb
);
648 dev
->stats
.rx_packets
++;
649 dev
->stats
.rx_bytes
+= len
;
651 netif_rx(skb
); /* Send the packet upstream */
655 * xemaclite_interrupt - Interrupt handler for this driver
656 * @irq: Irq of the Emaclite device
657 * @dev_id: Void pointer to the network device instance used as callback
660 * This function handles the Tx and Rx interrupts of the EmacLite device.
662 static irqreturn_t
xemaclite_interrupt(int irq
, void *dev_id
)
664 bool tx_complete
= 0;
665 struct net_device
*dev
= dev_id
;
666 struct net_local
*lp
= netdev_priv(dev
);
667 void __iomem
*base_addr
= lp
->base_addr
;
670 /* Check if there is Rx Data available */
671 if ((in_be32(base_addr
+ XEL_RSR_OFFSET
) & XEL_RSR_RECV_DONE_MASK
) ||
672 (in_be32(base_addr
+ XEL_BUFFER_OFFSET
+ XEL_RSR_OFFSET
)
673 & XEL_RSR_RECV_DONE_MASK
))
675 xemaclite_rx_handler(dev
);
677 /* Check if the Transmission for the first buffer is completed */
678 tx_status
= in_be32(base_addr
+ XEL_TSR_OFFSET
);
679 if (((tx_status
& XEL_TSR_XMIT_BUSY_MASK
) == 0) &&
680 (tx_status
& XEL_TSR_XMIT_ACTIVE_MASK
) != 0) {
682 tx_status
&= ~XEL_TSR_XMIT_ACTIVE_MASK
;
683 out_be32(base_addr
+ XEL_TSR_OFFSET
, tx_status
);
688 /* Check if the Transmission for the second buffer is completed */
689 tx_status
= in_be32(base_addr
+ XEL_BUFFER_OFFSET
+ XEL_TSR_OFFSET
);
690 if (((tx_status
& XEL_TSR_XMIT_BUSY_MASK
) == 0) &&
691 (tx_status
& XEL_TSR_XMIT_ACTIVE_MASK
) != 0) {
693 tx_status
&= ~XEL_TSR_XMIT_ACTIVE_MASK
;
694 out_be32(base_addr
+ XEL_BUFFER_OFFSET
+ XEL_TSR_OFFSET
,
700 /* If there was a Tx interrupt, call the Tx Handler */
701 if (tx_complete
!= 0)
702 xemaclite_tx_handler(dev
);
707 /**********************/
708 /* MDIO Bus functions */
709 /**********************/
712 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
713 * @lp: Pointer to the Emaclite device private data
715 * This function waits till the device is ready to accept a new MDIO
718 * Return: 0 for success or ETIMEDOUT for a timeout
721 static int xemaclite_mdio_wait(struct net_local
*lp
)
723 long end
= jiffies
+ 2;
725 /* wait for the MDIO interface to not be busy or timeout
728 while (in_be32(lp
->base_addr
+ XEL_MDIOCTRL_OFFSET
) &
729 XEL_MDIOCTRL_MDIOSTS_MASK
) {
730 if (end
- jiffies
<= 0) {
740 * xemaclite_mdio_read - Read from a given MII management register
741 * @bus: the mii_bus struct
742 * @phy_id: the phy address
743 * @reg: register number to read from
745 * This function waits till the device is ready to accept a new MDIO
746 * request and then writes the phy address to the MDIO Address register
747 * and reads data from MDIO Read Data register, when its available.
749 * Return: Value read from the MII management register
751 static int xemaclite_mdio_read(struct mii_bus
*bus
, int phy_id
, int reg
)
753 struct net_local
*lp
= bus
->priv
;
757 if (xemaclite_mdio_wait(lp
))
760 /* Write the PHY address, register number and set the OP bit in the
761 * MDIO Address register. Set the Status bit in the MDIO Control
762 * register to start a MDIO read transaction.
764 ctrl_reg
= in_be32(lp
->base_addr
+ XEL_MDIOCTRL_OFFSET
);
765 out_be32(lp
->base_addr
+ XEL_MDIOADDR_OFFSET
,
766 XEL_MDIOADDR_OP_MASK
|
767 ((phy_id
<< XEL_MDIOADDR_PHYADR_SHIFT
) | reg
));
768 out_be32(lp
->base_addr
+ XEL_MDIOCTRL_OFFSET
,
769 ctrl_reg
| XEL_MDIOCTRL_MDIOSTS_MASK
);
771 if (xemaclite_mdio_wait(lp
))
774 rc
= in_be32(lp
->base_addr
+ XEL_MDIORD_OFFSET
);
776 dev_dbg(&lp
->ndev
->dev
,
777 "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
784 * xemaclite_mdio_write - Write to a given MII management register
785 * @bus: the mii_bus struct
786 * @phy_id: the phy address
787 * @reg: register number to write to
788 * @val: value to write to the register number specified by reg
790 * This function waits till the device is ready to accept a new MDIO
791 * request and then writes the val to the MDIO Write Data register.
793 static int xemaclite_mdio_write(struct mii_bus
*bus
, int phy_id
, int reg
,
796 struct net_local
*lp
= bus
->priv
;
799 dev_dbg(&lp
->ndev
->dev
,
800 "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
803 if (xemaclite_mdio_wait(lp
))
806 /* Write the PHY address, register number and clear the OP bit in the
807 * MDIO Address register and then write the value into the MDIO Write
808 * Data register. Finally, set the Status bit in the MDIO Control
809 * register to start a MDIO write transaction.
811 ctrl_reg
= in_be32(lp
->base_addr
+ XEL_MDIOCTRL_OFFSET
);
812 out_be32(lp
->base_addr
+ XEL_MDIOADDR_OFFSET
,
813 ~XEL_MDIOADDR_OP_MASK
&
814 ((phy_id
<< XEL_MDIOADDR_PHYADR_SHIFT
) | reg
));
815 out_be32(lp
->base_addr
+ XEL_MDIOWR_OFFSET
, val
);
816 out_be32(lp
->base_addr
+ XEL_MDIOCTRL_OFFSET
,
817 ctrl_reg
| XEL_MDIOCTRL_MDIOSTS_MASK
);
823 * xemaclite_mdio_reset - Reset the mdio bus.
824 * @bus: Pointer to the MII bus
826 * This function is required(?) as per Documentation/networking/phy.txt.
827 * There is no reset in this device; this function always returns 0.
829 static int xemaclite_mdio_reset(struct mii_bus
*bus
)
835 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
836 * @lp: Pointer to the Emaclite device private data
837 * @ofdev: Pointer to OF device structure
839 * This function enables MDIO bus in the Emaclite device and registers a
842 * Return: 0 upon success or a negative error upon failure
844 static int xemaclite_mdio_setup(struct net_local
*lp
, struct device
*dev
)
849 struct device_node
*np
= of_get_parent(lp
->phy_node
);
851 /* Don't register the MDIO bus if the phy_node or its parent node
857 /* Enable the MDIO bus by asserting the enable bit in MDIO Control
860 out_be32(lp
->base_addr
+ XEL_MDIOCTRL_OFFSET
,
861 XEL_MDIOCTRL_MDIOEN_MASK
);
863 bus
= mdiobus_alloc();
867 of_address_to_resource(np
, 0, &res
);
868 snprintf(bus
->id
, MII_BUS_ID_SIZE
, "%.8llx",
869 (unsigned long long)res
.start
);
871 bus
->name
= "Xilinx Emaclite MDIO";
872 bus
->read
= xemaclite_mdio_read
;
873 bus
->write
= xemaclite_mdio_write
;
874 bus
->reset
= xemaclite_mdio_reset
;
876 bus
->irq
= lp
->mdio_irqs
; /* preallocated IRQ table */
880 rc
= of_mdiobus_register(bus
, np
);
892 * xemaclite_adjust_link - Link state callback for the Emaclite device
893 * @ndev: pointer to net_device struct
895 * There's nothing in the Emaclite device to be configured when the link
896 * state changes. We just print the status.
898 void xemaclite_adjust_link(struct net_device
*ndev
)
900 struct net_local
*lp
= netdev_priv(ndev
);
901 struct phy_device
*phy
= lp
->phy_dev
;
904 /* hash together the state values to decide if something has changed */
905 link_state
= phy
->speed
| (phy
->duplex
<< 1) | phy
->link
;
907 if (lp
->last_link
!= link_state
) {
908 lp
->last_link
= link_state
;
909 phy_print_status(phy
);
914 * xemaclite_open - Open the network device
915 * @dev: Pointer to the network device
917 * This function sets the MAC address, requests an IRQ and enables interrupts
918 * for the Emaclite device and starts the Tx queue.
919 * It also connects to the phy device, if MDIO is included in Emaclite device.
921 static int xemaclite_open(struct net_device
*dev
)
923 struct net_local
*lp
= netdev_priv(dev
);
926 /* Just to be safe, stop the device first */
927 xemaclite_disable_interrupts(lp
);
932 lp
->phy_dev
= of_phy_connect(lp
->ndev
, lp
->phy_node
,
933 xemaclite_adjust_link
, 0,
934 PHY_INTERFACE_MODE_MII
);
936 dev_err(&lp
->ndev
->dev
, "of_phy_connect() failed\n");
940 /* EmacLite doesn't support giga-bit speeds */
941 lp
->phy_dev
->supported
&= (PHY_BASIC_FEATURES
);
942 lp
->phy_dev
->advertising
= lp
->phy_dev
->supported
;
944 /* Don't advertise 1000BASE-T Full/Half duplex speeds */
945 phy_write(lp
->phy_dev
, MII_CTRL1000
, 0);
947 /* Advertise only 10 and 100mbps full/half duplex speeds */
948 phy_write(lp
->phy_dev
, MII_ADVERTISE
, ADVERTISE_ALL
);
950 /* Restart auto negotiation */
951 bmcr
= phy_read(lp
->phy_dev
, MII_BMCR
);
952 bmcr
|= (BMCR_ANENABLE
| BMCR_ANRESTART
);
953 phy_write(lp
->phy_dev
, MII_BMCR
, bmcr
);
955 phy_start(lp
->phy_dev
);
958 /* Set the MAC address each time opened */
959 xemaclite_update_address(lp
, dev
->dev_addr
);
962 retval
= request_irq(dev
->irq
, xemaclite_interrupt
, 0, dev
->name
, dev
);
964 dev_err(&lp
->ndev
->dev
, "Could not allocate interrupt %d\n",
967 phy_disconnect(lp
->phy_dev
);
973 /* Enable Interrupts */
974 xemaclite_enable_interrupts(lp
);
976 /* We're ready to go */
977 netif_start_queue(dev
);
983 * xemaclite_close - Close the network device
984 * @dev: Pointer to the network device
986 * This function stops the Tx queue, disables interrupts and frees the IRQ for
987 * the Emaclite device.
988 * It also disconnects the phy device associated with the Emaclite device.
990 static int xemaclite_close(struct net_device
*dev
)
992 struct net_local
*lp
= netdev_priv(dev
);
994 netif_stop_queue(dev
);
995 xemaclite_disable_interrupts(lp
);
996 free_irq(dev
->irq
, dev
);
999 phy_disconnect(lp
->phy_dev
);
1006 * xemaclite_send - Transmit a frame
1007 * @orig_skb: Pointer to the socket buffer to be transmitted
1008 * @dev: Pointer to the network device
1010 * This function checks if the Tx buffer of the Emaclite device is free to send
1011 * data. If so, it fills the Tx buffer with data from socket buffer data,
1012 * updates the stats and frees the socket buffer. The Tx completion is signaled
1013 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
1014 * deferred and the Tx queue is stopped so that the deferred socket buffer can
1015 * be transmitted when the Emaclite device is free to transmit data.
1017 * Return: 0, always.
1019 static int xemaclite_send(struct sk_buff
*orig_skb
, struct net_device
*dev
)
1021 struct net_local
*lp
= netdev_priv(dev
);
1022 struct sk_buff
*new_skb
;
1024 unsigned long flags
;
1026 len
= orig_skb
->len
;
1030 spin_lock_irqsave(&lp
->reset_lock
, flags
);
1031 if (xemaclite_send_data(lp
, (u8
*) new_skb
->data
, len
) != 0) {
1032 /* If the Emaclite Tx buffer is busy, stop the Tx queue and
1033 * defer the skb for transmission at a later point when the
1034 * current transmission is complete */
1035 netif_stop_queue(dev
);
1036 lp
->deferred_skb
= new_skb
;
1037 spin_unlock_irqrestore(&lp
->reset_lock
, flags
);
1040 spin_unlock_irqrestore(&lp
->reset_lock
, flags
);
1042 dev
->stats
.tx_bytes
+= len
;
1043 dev_kfree_skb(new_skb
);
1049 * xemaclite_remove_ndev - Free the network device
1050 * @ndev: Pointer to the network device to be freed
1052 * This function un maps the IO region of the Emaclite device and frees the net
1055 static void xemaclite_remove_ndev(struct net_device
*ndev
)
1058 struct net_local
*lp
= netdev_priv(ndev
);
1061 iounmap((void __iomem __force
*) (lp
->base_addr
));
1067 * get_bool - Get a parameter from the OF device
1068 * @ofdev: Pointer to OF device structure
1069 * @s: Property to be retrieved
1071 * This function looks for a property in the device node and returns the value
1072 * of the property if its found or 0 if the property is not found.
1074 * Return: Value of the parameter if the parameter is found, or 0 otherwise
1076 static bool get_bool(struct platform_device
*ofdev
, const char *s
)
1078 u32
*p
= (u32
*)of_get_property(ofdev
->dev
.of_node
, s
, NULL
);
1083 dev_warn(&ofdev
->dev
, "Parameter %s not found,"
1084 "defaulting to false\n", s
);
1089 static struct net_device_ops xemaclite_netdev_ops
;
1092 * xemaclite_of_probe - Probe method for the Emaclite device.
1093 * @ofdev: Pointer to OF device structure
1094 * @match: Pointer to the structure used for matching a device
1096 * This function probes for the Emaclite device in the device tree.
1097 * It initializes the driver data structure and the hardware, sets the MAC
1098 * address and registers the network device.
1099 * It also registers a mii_bus for the Emaclite device, if MDIO is included
1102 * Return: 0, if the driver is bound to the Emaclite device, or
1103 * a negative error if there is failure.
1105 static int __devinit
xemaclite_of_probe(struct platform_device
*ofdev
)
1107 struct resource r_irq
; /* Interrupt resources */
1108 struct resource r_mem
; /* IO mem resources */
1109 struct net_device
*ndev
= NULL
;
1110 struct net_local
*lp
= NULL
;
1111 struct device
*dev
= &ofdev
->dev
;
1112 const void *mac_address
;
1116 dev_info(dev
, "Device Tree Probing\n");
1118 /* Get iospace for the device */
1119 rc
= of_address_to_resource(ofdev
->dev
.of_node
, 0, &r_mem
);
1121 dev_err(dev
, "invalid address\n");
1125 /* Get IRQ for the device */
1126 rc
= of_irq_to_resource(ofdev
->dev
.of_node
, 0, &r_irq
);
1128 dev_err(dev
, "no IRQ found\n");
1132 /* Create an ethernet device instance */
1133 ndev
= alloc_etherdev(sizeof(struct net_local
));
1135 dev_err(dev
, "Could not allocate network device\n");
1139 dev_set_drvdata(dev
, ndev
);
1140 SET_NETDEV_DEV(ndev
, &ofdev
->dev
);
1142 ndev
->irq
= r_irq
.start
;
1143 ndev
->mem_start
= r_mem
.start
;
1144 ndev
->mem_end
= r_mem
.end
;
1146 lp
= netdev_priv(ndev
);
1149 if (!request_mem_region(ndev
->mem_start
,
1150 ndev
->mem_end
- ndev
->mem_start
+ 1,
1152 dev_err(dev
, "Couldn't lock memory region at %p\n",
1153 (void *)ndev
->mem_start
);
1158 /* Get the virtual base address for the device */
1159 lp
->base_addr
= ioremap(r_mem
.start
, resource_size(&r_mem
));
1160 if (NULL
== lp
->base_addr
) {
1161 dev_err(dev
, "EmacLite: Could not allocate iomem\n");
1166 spin_lock_init(&lp
->reset_lock
);
1167 lp
->next_tx_buf_to_use
= 0x0;
1168 lp
->next_rx_buf_to_use
= 0x0;
1169 lp
->tx_ping_pong
= get_bool(ofdev
, "xlnx,tx-ping-pong");
1170 lp
->rx_ping_pong
= get_bool(ofdev
, "xlnx,rx-ping-pong");
1171 mac_address
= of_get_mac_address(ofdev
->dev
.of_node
);
1174 /* Set the MAC address. */
1175 memcpy(ndev
->dev_addr
, mac_address
, 6);
1177 dev_warn(dev
, "No MAC address found\n");
1179 /* Clear the Tx CSR's in case this is a restart */
1180 out_be32(lp
->base_addr
+ XEL_TSR_OFFSET
, 0);
1181 out_be32(lp
->base_addr
+ XEL_BUFFER_OFFSET
+ XEL_TSR_OFFSET
, 0);
1183 /* Set the MAC address in the EmacLite device */
1184 xemaclite_update_address(lp
, ndev
->dev_addr
);
1186 lp
->phy_node
= of_parse_phandle(ofdev
->dev
.of_node
, "phy-handle", 0);
1187 rc
= xemaclite_mdio_setup(lp
, &ofdev
->dev
);
1189 dev_warn(&ofdev
->dev
, "error registering MDIO bus\n");
1191 dev_info(dev
, "MAC address is now %pM\n", ndev
->dev_addr
);
1193 ndev
->netdev_ops
= &xemaclite_netdev_ops
;
1194 ndev
->flags
&= ~IFF_MULTICAST
;
1195 ndev
->watchdog_timeo
= TX_TIMEOUT
;
1197 /* Finally, register the device */
1198 rc
= register_netdev(ndev
);
1201 "Cannot register network device, aborting\n");
1206 "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n",
1207 (unsigned int __force
)ndev
->mem_start
,
1208 (unsigned int __force
)lp
->base_addr
, ndev
->irq
);
1212 release_mem_region(ndev
->mem_start
, resource_size(&r_mem
));
1215 xemaclite_remove_ndev(ndev
);
1220 * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1221 * @of_dev: Pointer to OF device structure
1223 * This function is called if a device is physically removed from the system or
1224 * if the driver module is being unloaded. It frees any resources allocated to
1227 * Return: 0, always.
1229 static int __devexit
xemaclite_of_remove(struct platform_device
*of_dev
)
1231 struct device
*dev
= &of_dev
->dev
;
1232 struct net_device
*ndev
= dev_get_drvdata(dev
);
1234 struct net_local
*lp
= netdev_priv(ndev
);
1236 /* Un-register the mii_bus, if configured */
1238 mdiobus_unregister(lp
->mii_bus
);
1239 kfree(lp
->mii_bus
->irq
);
1240 mdiobus_free(lp
->mii_bus
);
1244 unregister_netdev(ndev
);
1247 of_node_put(lp
->phy_node
);
1248 lp
->phy_node
= NULL
;
1250 release_mem_region(ndev
->mem_start
, ndev
->mem_end
-ndev
->mem_start
+ 1);
1252 xemaclite_remove_ndev(ndev
);
1253 dev_set_drvdata(dev
, NULL
);
1258 #ifdef CONFIG_NET_POLL_CONTROLLER
1260 xemaclite_poll_controller(struct net_device
*ndev
)
1262 disable_irq(ndev
->irq
);
1263 xemaclite_interrupt(ndev
->irq
, ndev
);
1264 enable_irq(ndev
->irq
);
1268 static struct net_device_ops xemaclite_netdev_ops
= {
1269 .ndo_open
= xemaclite_open
,
1270 .ndo_stop
= xemaclite_close
,
1271 .ndo_start_xmit
= xemaclite_send
,
1272 .ndo_set_mac_address
= xemaclite_set_mac_address
,
1273 .ndo_tx_timeout
= xemaclite_tx_timeout
,
1274 #ifdef CONFIG_NET_POLL_CONTROLLER
1275 .ndo_poll_controller
= xemaclite_poll_controller
,
1279 /* Match table for OF platform binding */
1280 static struct of_device_id xemaclite_of_match
[] __devinitdata
= {
1281 { .compatible
= "xlnx,opb-ethernetlite-1.01.a", },
1282 { .compatible
= "xlnx,opb-ethernetlite-1.01.b", },
1283 { .compatible
= "xlnx,xps-ethernetlite-1.00.a", },
1284 { .compatible
= "xlnx,xps-ethernetlite-2.00.a", },
1285 { .compatible
= "xlnx,xps-ethernetlite-2.01.a", },
1286 { .compatible
= "xlnx,xps-ethernetlite-3.00.a", },
1287 { /* end of list */ },
1289 MODULE_DEVICE_TABLE(of
, xemaclite_of_match
);
1291 static struct platform_driver xemaclite_of_driver
= {
1293 .name
= DRIVER_NAME
,
1294 .owner
= THIS_MODULE
,
1295 .of_match_table
= xemaclite_of_match
,
1297 .probe
= xemaclite_of_probe
,
1298 .remove
= __devexit_p(xemaclite_of_remove
),
1302 * xgpiopss_init - Initial driver registration call
1304 * Return: 0 upon success, or a negative error upon failure.
1306 static int __init
xemaclite_init(void)
1308 /* No kernel boot options used, we just need to register the driver */
1309 return platform_driver_register(&xemaclite_of_driver
);
1313 * xemaclite_cleanup - Driver un-registration call
1315 static void __exit
xemaclite_cleanup(void)
1317 platform_driver_unregister(&xemaclite_of_driver
);
1320 module_init(xemaclite_init
);
1321 module_exit(xemaclite_cleanup
);
1323 MODULE_AUTHOR("Xilinx, Inc.");
1324 MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1325 MODULE_LICENSE("GPL");