BUG_ON() Conversion in drivers/parisc/
[deliverable/linux.git] / drivers / parisc / superio.c
1 /* National Semiconductor NS87560UBD Super I/O controller used in
2 * HP [BCJ]x000 workstations.
3 *
4 * This chip is a horrid piece of engineering, and National
5 * denies any knowledge of its existence. Thus no datasheet is
6 * available off www.national.com.
7 *
8 * (C) Copyright 2000 Linuxcare, Inc.
9 * (C) Copyright 2000 Linuxcare Canada, Inc.
10 * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
11 * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
12 * (C) Copyright 2001 John Marvin <jsm fc hp com>
13 * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
14 * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * The initial version of this is by Martin Peterson. Alex deVries
22 * has spent a bit of time trying to coax it into working.
23 *
24 * Major changes to get basic interrupt infrastructure working to
25 * hopefully be able to support all SuperIO devices. Currently
26 * works with serial. -- John Marvin <jsm@fc.hp.com>
27 *
28 * Converted superio_init() to be a PCI_FIXUP_FINAL callee.
29 * -- Kyle McMartin <kyle@parisc-linux.org>
30 */
31
32
33 /* NOTES:
34 *
35 * Function 0 is an IDE controller. It is identical to a PC87415 IDE
36 * controller (and identifies itself as such).
37 *
38 * Function 1 is a "Legacy I/O" controller. Under this function is a
39 * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
40 * all the functionality in hardware, but the following is available:
41 *
42 * Two 16550A compatible serial controllers
43 * An IEEE 1284 compatible parallel port
44 * A floppy disk controller
45 *
46 * Function 2 is a USB controller.
47 *
48 * We must be incredibly careful during initialization. Since all
49 * interrupts are routed through function 1 (which is not allowed by
50 * the PCI spec), we need to program the PICs on the legacy I/O port
51 * *before* we attempt to set up IDE and USB. @#$!&
52 *
53 * According to HP, devices are only enabled by firmware if they have
54 * a physical device connected.
55 *
56 * Configuration register bits:
57 * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
58 * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
59 *
60 */
61
62 #include <linux/errno.h>
63 #include <linux/init.h>
64 #include <linux/module.h>
65 #include <linux/types.h>
66 #include <linux/interrupt.h>
67 #include <linux/ioport.h>
68 #include <linux/serial.h>
69 #include <linux/pci.h>
70 #include <linux/parport.h>
71 #include <linux/parport_pc.h>
72 #include <linux/termios.h>
73 #include <linux/tty.h>
74 #include <linux/serial_core.h>
75 #include <linux/delay.h>
76
77 #include <asm/io.h>
78 #include <asm/hardware.h>
79 #include <asm/superio.h>
80
81 static struct superio_device sio_dev;
82
83
84 #undef DEBUG_SUPERIO_INIT
85
86 #ifdef DEBUG_SUPERIO_INIT
87 #define DBG_INIT(x...) printk(x)
88 #else
89 #define DBG_INIT(x...)
90 #endif
91
92 #define SUPERIO "SuperIO"
93 #define PFX SUPERIO ": "
94
95 static irqreturn_t
96 superio_interrupt(int parent_irq, void *devp, struct pt_regs *regs)
97 {
98 u8 results;
99 u8 local_irq;
100
101 /* Poll the 8259 to see if there's an interrupt. */
102 outb (OCW3_POLL,IC_PIC1+0);
103
104 results = inb(IC_PIC1+0);
105
106 /*
107 * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
108 * Bits 6-3: zero
109 * Bits 2-0: highest priority, active requesting interrupt ID (0-7)
110 */
111 if ((results & 0x80) == 0) {
112 /* I suspect "spurious" interrupts are from unmasking an IRQ.
113 * We don't know if an interrupt was/is pending and thus
114 * just call the handler for that IRQ as if it were pending.
115 */
116 return IRQ_NONE;
117 }
118
119 /* Check to see which device is interrupting */
120 local_irq = results & 0x0f;
121
122 if (local_irq == 2 || local_irq > 7) {
123 printk(KERN_ERR PFX "slave interrupted!\n");
124 return IRQ_HANDLED;
125 }
126
127 if (local_irq == 7) {
128
129 /* Could be spurious. Check in service bits */
130
131 outb(OCW3_ISR,IC_PIC1+0);
132 results = inb(IC_PIC1+0);
133 if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
134 printk(KERN_WARNING PFX "spurious interrupt!\n");
135 return IRQ_HANDLED;
136 }
137 }
138
139 /* Call the appropriate device's interrupt */
140 __do_IRQ(local_irq, regs);
141
142 /* set EOI - forces a new interrupt if a lower priority device
143 * still needs service.
144 */
145 outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
146 return IRQ_HANDLED;
147 }
148
149 /* Initialize Super I/O device */
150 static void
151 superio_init(struct pci_dev *pcidev)
152 {
153 struct superio_device *sio = &sio_dev;
154 struct pci_dev *pdev = sio->lio_pdev;
155 u16 word;
156
157 if (sio->suckyio_irq_enabled)
158 return;
159
160 BUG_ON(!pdev);
161 BUG_ON(!sio->usb_pdev);
162
163 /* use the IRQ iosapic found for USB INT D... */
164 pdev->irq = sio->usb_pdev->irq;
165
166 /* ...then properly fixup the USB to point at suckyio PIC */
167 sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
168
169 printk(KERN_INFO PFX "Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
170 pci_name(pdev), pdev->irq);
171
172 pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
173 sio->sp1_base &= ~1;
174 printk(KERN_INFO PFX "Serial port 1 at 0x%x\n", sio->sp1_base);
175
176 pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
177 sio->sp2_base &= ~1;
178 printk(KERN_INFO PFX "Serial port 2 at 0x%x\n", sio->sp2_base);
179
180 pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
181 sio->pp_base &= ~1;
182 printk(KERN_INFO PFX "Parallel port at 0x%x\n", sio->pp_base);
183
184 pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
185 sio->fdc_base &= ~1;
186 printk(KERN_INFO PFX "Floppy controller at 0x%x\n", sio->fdc_base);
187 pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
188 sio->acpi_base &= ~1;
189 printk(KERN_INFO PFX "ACPI at 0x%x\n", sio->acpi_base);
190
191 request_region (IC_PIC1, 0x1f, "pic1");
192 request_region (IC_PIC2, 0x1f, "pic2");
193 request_region (sio->acpi_base, 0x1f, "acpi");
194
195 /* Enable the legacy I/O function */
196 pci_read_config_word (pdev, PCI_COMMAND, &word);
197 word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
198 pci_write_config_word (pdev, PCI_COMMAND, word);
199
200 pci_set_master (pdev);
201 pci_enable_device(pdev);
202
203 /*
204 * Next project is programming the onboard interrupt controllers.
205 * PDC hasn't done this for us, since it's using polled I/O.
206 *
207 * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
208 * space access. PCI is by nature a 32-bit bus and config
209 * space can be sensitive to that.
210 */
211
212 /* 0x64 - 0x67 :
213 DMA Rtg 2
214 DMA Rtg 3
215 DMA Chan Ctl
216 TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
217 */
218 pci_write_config_dword (pdev, 0x64, 0x82000000U);
219
220 /* 0x68 - 0x6b :
221 TRIGGER_2 == 0x00 all edge triggered (not used)
222 CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
223 CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
224 CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
225 */
226 pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
227
228 /* 0x6c - 0x6f :
229 CFG_IR_INTAB == 0x00
230 CFG_IR_INTCD == 0x10 USB = IRQ1
231 CFG_IR_PS2 == 0x00
232 CFG_IR_FXBUS == 0x00
233 */
234 pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
235
236 /* 0x70 - 0x73 :
237 CFG_IR_USB == 0x00 not used. USB is connected to INTD.
238 CFG_IR_ACPI == 0x00 not used.
239 DMA Priority == 0x4c88 Power on default value. NFC.
240 */
241 pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
242
243 /* PIC1 Initialization Command Word register programming */
244 outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */
245 outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
246 outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
247 outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
248
249 /* PIC1 Program Operational Control Words */
250 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
251 outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
252
253 /* PIC2 Initialization Command Word register programming */
254 outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */
255 outb (0x00,IC_PIC2+1); /* ICW2: N/A */
256 outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
257 outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
258
259 /* Program Operational Control Words */
260 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
261 outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */
262
263 /* Write master mask reg */
264 outb (0xff,IC_PIC1+1);
265
266 /* Setup USB power regulation */
267 outb(1, sio->acpi_base + USB_REG_CR);
268 if (inb(sio->acpi_base + USB_REG_CR) & 1)
269 printk(KERN_INFO PFX "USB regulator enabled\n");
270 else
271 printk(KERN_ERR PFX "USB regulator not initialized!\n");
272
273 if (request_irq(pdev->irq, superio_interrupt, SA_INTERRUPT,
274 SUPERIO, (void *)sio)) {
275
276 printk(KERN_ERR PFX "could not get irq\n");
277 BUG();
278 return;
279 }
280
281 sio->suckyio_irq_enabled = 1;
282 }
283 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
284
285 static void superio_disable_irq(unsigned int irq)
286 {
287 u8 r8;
288
289 if ((irq < 1) || (irq == 2) || (irq > 7)) {
290 printk(KERN_ERR PFX "Illegal irq number.\n");
291 BUG();
292 return;
293 }
294
295 /* Mask interrupt */
296
297 r8 = inb(IC_PIC1+1);
298 r8 |= (1 << irq);
299 outb (r8,IC_PIC1+1);
300 }
301
302 static void superio_enable_irq(unsigned int irq)
303 {
304 u8 r8;
305
306 if ((irq < 1) || (irq == 2) || (irq > 7)) {
307 printk(KERN_ERR PFX "Illegal irq number (%d).\n", irq);
308 BUG();
309 return;
310 }
311
312 /* Unmask interrupt */
313 r8 = inb(IC_PIC1+1);
314 r8 &= ~(1 << irq);
315 outb (r8,IC_PIC1+1);
316 }
317
318 static unsigned int superio_startup_irq(unsigned int irq)
319 {
320 superio_enable_irq(irq);
321 return 0;
322 }
323
324 static struct hw_interrupt_type superio_interrupt_type = {
325 .typename = SUPERIO,
326 .startup = superio_startup_irq,
327 .shutdown = superio_disable_irq,
328 .enable = superio_enable_irq,
329 .disable = superio_disable_irq,
330 .ack = no_ack_irq,
331 .end = no_end_irq,
332 };
333
334 #ifdef DEBUG_SUPERIO_INIT
335 static unsigned short expected_device[3] = {
336 PCI_DEVICE_ID_NS_87415,
337 PCI_DEVICE_ID_NS_87560_LIO,
338 PCI_DEVICE_ID_NS_87560_USB
339 };
340 #endif
341
342 int superio_fixup_irq(struct pci_dev *pcidev)
343 {
344 int local_irq, i;
345
346 #ifdef DEBUG_SUPERIO_INIT
347 int fn;
348 fn = PCI_FUNC(pcidev->devfn);
349
350 /* Verify the function number matches the expected device id. */
351 if (expected_device[fn] != pcidev->device) {
352 BUG();
353 return -1;
354 }
355 printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
356 pci_name(pcidev),
357 pcidev->vendor, pcidev->device,
358 __builtin_return_address(0));
359 #endif
360
361 for (i = 0; i < 16; i++) {
362 irq_desc[i].handler = &superio_interrupt_type;
363 }
364
365 /*
366 * We don't allocate a SuperIO irq for the legacy IO function,
367 * since it is a "bridge". Instead, we will allocate irq's for
368 * each legacy device as they are initialized.
369 */
370
371 switch(pcidev->device) {
372 case PCI_DEVICE_ID_NS_87415: /* Function 0 */
373 local_irq = IDE_IRQ;
374 break;
375 case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
376 sio_dev.lio_pdev = pcidev; /* save for superio_init() */
377 return -1;
378 case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
379 sio_dev.usb_pdev = pcidev; /* save for superio_init() */
380 local_irq = USB_IRQ;
381 break;
382 default:
383 local_irq = -1;
384 BUG();
385 break;
386 }
387
388 return local_irq;
389 }
390
391 static struct uart_port serial[] = {
392 {
393 .iotype = UPIO_PORT,
394 .line = 0,
395 .type = PORT_16550A,
396 .uartclk = 115200*16,
397 .fifosize = 16,
398 },
399 {
400 .iotype = UPIO_PORT,
401 .line = 1,
402 .type = PORT_16550A,
403 .uartclk = 115200*16,
404 .fifosize = 16,
405 }
406 };
407
408 static void __devinit superio_serial_init(void)
409 {
410 #ifdef CONFIG_SERIAL_8250
411 int retval;
412
413 serial[0].iobase = sio_dev.sp1_base;
414 serial[0].irq = SP1_IRQ;
415 spin_lock_init(&serial[0].lock);
416
417 retval = early_serial_setup(&serial[0]);
418 if (retval < 0) {
419 printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
420 return;
421 }
422
423 serial[1].iobase = sio_dev.sp2_base;
424 serial[1].irq = SP2_IRQ;
425 spin_lock_init(&serial[1].lock);
426 retval = early_serial_setup(&serial[1]);
427
428 if (retval < 0)
429 printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
430 #endif /* CONFIG_SERIAL_8250 */
431 }
432
433
434 static void __devinit superio_parport_init(void)
435 {
436 #ifdef CONFIG_PARPORT_PC
437 if (!parport_pc_probe_port(sio_dev.pp_base,
438 0 /*base_hi*/,
439 PAR_IRQ,
440 PARPORT_DMA_NONE /* dma */,
441 NULL /*struct pci_dev* */) )
442
443 printk(KERN_WARNING PFX "Probing parallel port failed.\n");
444 #endif /* CONFIG_PARPORT_PC */
445 }
446
447
448 static void superio_fixup_pci(struct pci_dev *pdev)
449 {
450 u8 prog;
451
452 pdev->class |= 0x5;
453 pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
454
455 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
456 printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
457 }
458 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
459
460
461 static int __devinit
462 superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
463 {
464 struct superio_device *sio = &sio_dev;
465
466 /*
467 ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
468 ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
469 ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
470 */
471 DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
472 pci_name(dev),
473 dev->vendor, dev->device,
474 dev->subsystem_vendor, dev->subsystem_device,
475 dev->class);
476
477 BUG_ON(!sio->suckyio_irq_enabled); /* Enabled by PCI_FIXUP_FINAL */
478
479 if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
480 superio_parport_init();
481 superio_serial_init();
482 /* REVISIT XXX : superio_fdc_init() ? */
483 return 0;
484 } else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
485 DBG_INIT("superio_probe: ignoring IDE 87415\n");
486 } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
487 DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
488 } else {
489 DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
490 }
491
492 /* Let appropriate other driver claim this device. */
493 return -ENODEV;
494 }
495
496 static struct pci_device_id superio_tbl[] = {
497 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
498 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
499 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
500 { 0, }
501 };
502
503 static struct pci_driver superio_driver = {
504 .name = SUPERIO,
505 .id_table = superio_tbl,
506 .probe = superio_probe,
507 };
508
509 static int __init superio_modinit(void)
510 {
511 return pci_register_driver(&superio_driver);
512 }
513
514 static void __exit superio_exit(void)
515 {
516 pci_unregister_driver(&superio_driver);
517 }
518
519 module_init(superio_modinit);
520 module_exit(superio_exit);
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