ipc: delete "nr_ipc_ns"
[deliverable/linux.git] / drivers / pci / host / pci-hyperv.c
1 /*
2 * Copyright (c) Microsoft Corporation.
3 *
4 * Author:
5 * Jake Oshins <jakeo@microsoft.com>
6 *
7 * This driver acts as a paravirtual front-end for PCI Express root buses.
8 * When a PCI Express function (either an entire device or an SR-IOV
9 * Virtual Function) is being passed through to the VM, this driver exposes
10 * a new bus to the guest VM. This is modeled as a root PCI bus because
11 * no bridges are being exposed to the VM. In fact, with a "Generation 2"
12 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
13 * until a device as been exposed using this driver.
14 *
15 * Each root PCI bus has its own PCI domain, which is called "Segment" in
16 * the PCI Firmware Specifications. Thus while each device passed through
17 * to the VM using this front-end will appear at "device 0", the domain will
18 * be unique. Typically, each bus will have one PCI function on it, though
19 * this driver does support more than one.
20 *
21 * In order to map the interrupts from the device through to the guest VM,
22 * this driver also implements an IRQ Domain, which handles interrupts (either
23 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
24 * set up, torn down, or reaffined, this driver communicates with the
25 * underlying hypervisor to adjust the mappings in the I/O MMU so that each
26 * interrupt will be delivered to the correct virtual processor at the right
27 * vector. This driver does not support level-triggered (line-based)
28 * interrupts, and will report that the Interrupt Line register in the
29 * function's configuration space is zero.
30 *
31 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
32 * facilities. For instance, the configuration space of a function exposed
33 * by Hyper-V is mapped into a single page of memory space, and the
34 * read and write handlers for config space must be aware of this mechanism.
35 * Similarly, device setup and teardown involves messages sent to and from
36 * the PCI back-end driver in Hyper-V.
37 *
38 * This program is free software; you can redistribute it and/or modify it
39 * under the terms of the GNU General Public License version 2 as published
40 * by the Free Software Foundation.
41 *
42 * This program is distributed in the hope that it will be useful, but
43 * WITHOUT ANY WARRANTY; without even the implied warranty of
44 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
45 * NON INFRINGEMENT. See the GNU General Public License for more
46 * details.
47 *
48 */
49
50 #include <linux/kernel.h>
51 #include <linux/module.h>
52 #include <linux/pci.h>
53 #include <linux/semaphore.h>
54 #include <linux/irqdomain.h>
55 #include <asm/irqdomain.h>
56 #include <asm/apic.h>
57 #include <linux/msi.h>
58 #include <linux/hyperv.h>
59 #include <asm/mshyperv.h>
60
61 /*
62 * Protocol versions. The low word is the minor version, the high word the
63 * major version.
64 */
65
66 #define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (major)))
67 #define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
68 #define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
69
70 enum {
71 PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1),
72 PCI_PROTOCOL_VERSION_CURRENT = PCI_PROTOCOL_VERSION_1_1
73 };
74
75 #define PCI_CONFIG_MMIO_LENGTH 0x2000
76 #define CFG_PAGE_OFFSET 0x1000
77 #define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
78
79 #define MAX_SUPPORTED_MSI_MESSAGES 0x400
80
81 /*
82 * Message Types
83 */
84
85 enum pci_message_type {
86 /*
87 * Version 1.1
88 */
89 PCI_MESSAGE_BASE = 0x42490000,
90 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
91 PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1,
92 PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4,
93 PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
94 PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6,
95 PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7,
96 PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8,
97 PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9,
98 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
99 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
100 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
101 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
102 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
103 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
104 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
105 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
106 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
107 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
108 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
109 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
110 PCI_MESSAGE_MAXIMUM
111 };
112
113 /*
114 * Structures defining the virtual PCI Express protocol.
115 */
116
117 union pci_version {
118 struct {
119 u16 minor_version;
120 u16 major_version;
121 } parts;
122 u32 version;
123 } __packed;
124
125 /*
126 * Function numbers are 8-bits wide on Express, as interpreted through ARI,
127 * which is all this driver does. This representation is the one used in
128 * Windows, which is what is expected when sending this back and forth with
129 * the Hyper-V parent partition.
130 */
131 union win_slot_encoding {
132 struct {
133 u32 func:8;
134 u32 reserved:24;
135 } bits;
136 u32 slot;
137 } __packed;
138
139 /*
140 * Pretty much as defined in the PCI Specifications.
141 */
142 struct pci_function_description {
143 u16 v_id; /* vendor ID */
144 u16 d_id; /* device ID */
145 u8 rev;
146 u8 prog_intf;
147 u8 subclass;
148 u8 base_class;
149 u32 subsystem_id;
150 union win_slot_encoding win_slot;
151 u32 ser; /* serial number */
152 } __packed;
153
154 /**
155 * struct hv_msi_desc
156 * @vector: IDT entry
157 * @delivery_mode: As defined in Intel's Programmer's
158 * Reference Manual, Volume 3, Chapter 8.
159 * @vector_count: Number of contiguous entries in the
160 * Interrupt Descriptor Table that are
161 * occupied by this Message-Signaled
162 * Interrupt. For "MSI", as first defined
163 * in PCI 2.2, this can be between 1 and
164 * 32. For "MSI-X," as first defined in PCI
165 * 3.0, this must be 1, as each MSI-X table
166 * entry would have its own descriptor.
167 * @reserved: Empty space
168 * @cpu_mask: All the target virtual processors.
169 */
170 struct hv_msi_desc {
171 u8 vector;
172 u8 delivery_mode;
173 u16 vector_count;
174 u32 reserved;
175 u64 cpu_mask;
176 } __packed;
177
178 /**
179 * struct tran_int_desc
180 * @reserved: unused, padding
181 * @vector_count: same as in hv_msi_desc
182 * @data: This is the "data payload" value that is
183 * written by the device when it generates
184 * a message-signaled interrupt, either MSI
185 * or MSI-X.
186 * @address: This is the address to which the data
187 * payload is written on interrupt
188 * generation.
189 */
190 struct tran_int_desc {
191 u16 reserved;
192 u16 vector_count;
193 u32 data;
194 u64 address;
195 } __packed;
196
197 /*
198 * A generic message format for virtual PCI.
199 * Specific message formats are defined later in the file.
200 */
201
202 struct pci_message {
203 u32 message_type;
204 } __packed;
205
206 struct pci_child_message {
207 u32 message_type;
208 union win_slot_encoding wslot;
209 } __packed;
210
211 struct pci_incoming_message {
212 struct vmpacket_descriptor hdr;
213 struct pci_message message_type;
214 } __packed;
215
216 struct pci_response {
217 struct vmpacket_descriptor hdr;
218 s32 status; /* negative values are failures */
219 } __packed;
220
221 struct pci_packet {
222 void (*completion_func)(void *context, struct pci_response *resp,
223 int resp_packet_size);
224 void *compl_ctxt;
225 struct pci_message message;
226 };
227
228 /*
229 * Specific message types supporting the PCI protocol.
230 */
231
232 /*
233 * Version negotiation message. Sent from the guest to the host.
234 * The guest is free to try different versions until the host
235 * accepts the version.
236 *
237 * pci_version: The protocol version requested.
238 * is_last_attempt: If TRUE, this is the last version guest will request.
239 * reservedz: Reserved field, set to zero.
240 */
241
242 struct pci_version_request {
243 struct pci_message message_type;
244 enum pci_message_type protocol_version;
245 } __packed;
246
247 /*
248 * Bus D0 Entry. This is sent from the guest to the host when the virtual
249 * bus (PCI Express port) is ready for action.
250 */
251
252 struct pci_bus_d0_entry {
253 struct pci_message message_type;
254 u32 reserved;
255 u64 mmio_base;
256 } __packed;
257
258 struct pci_bus_relations {
259 struct pci_incoming_message incoming;
260 u32 device_count;
261 struct pci_function_description func[1];
262 } __packed;
263
264 struct pci_q_res_req_response {
265 struct vmpacket_descriptor hdr;
266 s32 status; /* negative values are failures */
267 u32 probed_bar[6];
268 } __packed;
269
270 struct pci_set_power {
271 struct pci_message message_type;
272 union win_slot_encoding wslot;
273 u32 power_state; /* In Windows terms */
274 u32 reserved;
275 } __packed;
276
277 struct pci_set_power_response {
278 struct vmpacket_descriptor hdr;
279 s32 status; /* negative values are failures */
280 union win_slot_encoding wslot;
281 u32 resultant_state; /* In Windows terms */
282 u32 reserved;
283 } __packed;
284
285 struct pci_resources_assigned {
286 struct pci_message message_type;
287 union win_slot_encoding wslot;
288 u8 memory_range[0x14][6]; /* not used here */
289 u32 msi_descriptors;
290 u32 reserved[4];
291 } __packed;
292
293 struct pci_create_interrupt {
294 struct pci_message message_type;
295 union win_slot_encoding wslot;
296 struct hv_msi_desc int_desc;
297 } __packed;
298
299 struct pci_create_int_response {
300 struct pci_response response;
301 u32 reserved;
302 struct tran_int_desc int_desc;
303 } __packed;
304
305 struct pci_delete_interrupt {
306 struct pci_message message_type;
307 union win_slot_encoding wslot;
308 struct tran_int_desc int_desc;
309 } __packed;
310
311 struct pci_dev_incoming {
312 struct pci_incoming_message incoming;
313 union win_slot_encoding wslot;
314 } __packed;
315
316 struct pci_eject_response {
317 u32 message_type;
318 union win_slot_encoding wslot;
319 u32 status;
320 } __packed;
321
322 static int pci_ring_size = (4 * PAGE_SIZE);
323
324 /*
325 * Definitions or interrupt steering hypercall.
326 */
327 #define HV_PARTITION_ID_SELF ((u64)-1)
328 #define HVCALL_RETARGET_INTERRUPT 0x7e
329
330 struct retarget_msi_interrupt {
331 u64 partition_id; /* use "self" */
332 u64 device_id;
333 u32 source; /* 1 for MSI(-X) */
334 u32 reserved1;
335 u32 address;
336 u32 data;
337 u64 reserved2;
338 u32 vector;
339 u32 flags;
340 u64 vp_mask;
341 } __packed;
342
343 /*
344 * Driver specific state.
345 */
346
347 enum hv_pcibus_state {
348 hv_pcibus_init = 0,
349 hv_pcibus_probed,
350 hv_pcibus_installed,
351 hv_pcibus_maximum
352 };
353
354 struct hv_pcibus_device {
355 struct pci_sysdata sysdata;
356 enum hv_pcibus_state state;
357 atomic_t remove_lock;
358 struct hv_device *hdev;
359 resource_size_t low_mmio_space;
360 resource_size_t high_mmio_space;
361 struct resource *mem_config;
362 struct resource *low_mmio_res;
363 struct resource *high_mmio_res;
364 struct completion *survey_event;
365 struct completion remove_event;
366 struct pci_bus *pci_bus;
367 spinlock_t config_lock; /* Avoid two threads writing index page */
368 spinlock_t device_list_lock; /* Protect lists below */
369 void __iomem *cfg_addr;
370
371 struct semaphore enum_sem;
372 struct list_head resources_for_children;
373
374 struct list_head children;
375 struct list_head dr_list;
376 struct work_struct wrk;
377
378 struct msi_domain_info msi_info;
379 struct msi_controller msi_chip;
380 struct irq_domain *irq_domain;
381 };
382
383 /*
384 * Tracks "Device Relations" messages from the host, which must be both
385 * processed in order and deferred so that they don't run in the context
386 * of the incoming packet callback.
387 */
388 struct hv_dr_work {
389 struct work_struct wrk;
390 struct hv_pcibus_device *bus;
391 };
392
393 struct hv_dr_state {
394 struct list_head list_entry;
395 u32 device_count;
396 struct pci_function_description func[1];
397 };
398
399 enum hv_pcichild_state {
400 hv_pcichild_init = 0,
401 hv_pcichild_requirements,
402 hv_pcichild_resourced,
403 hv_pcichild_ejecting,
404 hv_pcichild_maximum
405 };
406
407 enum hv_pcidev_ref_reason {
408 hv_pcidev_ref_invalid = 0,
409 hv_pcidev_ref_initial,
410 hv_pcidev_ref_by_slot,
411 hv_pcidev_ref_packet,
412 hv_pcidev_ref_pnp,
413 hv_pcidev_ref_childlist,
414 hv_pcidev_irqdata,
415 hv_pcidev_ref_max
416 };
417
418 struct hv_pci_dev {
419 /* List protected by pci_rescan_remove_lock */
420 struct list_head list_entry;
421 atomic_t refs;
422 enum hv_pcichild_state state;
423 struct pci_function_description desc;
424 bool reported_missing;
425 struct hv_pcibus_device *hbus;
426 struct work_struct wrk;
427
428 /*
429 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
430 * read it back, for each of the BAR offsets within config space.
431 */
432 u32 probed_bar[6];
433 };
434
435 struct hv_pci_compl {
436 struct completion host_event;
437 s32 completion_status;
438 };
439
440 /**
441 * hv_pci_generic_compl() - Invoked for a completion packet
442 * @context: Set up by the sender of the packet.
443 * @resp: The response packet
444 * @resp_packet_size: Size in bytes of the packet
445 *
446 * This function is used to trigger an event and report status
447 * for any message for which the completion packet contains a
448 * status and nothing else.
449 */
450 static
451 void
452 hv_pci_generic_compl(void *context, struct pci_response *resp,
453 int resp_packet_size)
454 {
455 struct hv_pci_compl *comp_pkt = context;
456
457 if (resp_packet_size >= offsetofend(struct pci_response, status))
458 comp_pkt->completion_status = resp->status;
459 complete(&comp_pkt->host_event);
460 }
461
462 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
463 u32 wslot);
464 static void get_pcichild(struct hv_pci_dev *hv_pcidev,
465 enum hv_pcidev_ref_reason reason);
466 static void put_pcichild(struct hv_pci_dev *hv_pcidev,
467 enum hv_pcidev_ref_reason reason);
468
469 static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
470 static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
471
472 /**
473 * devfn_to_wslot() - Convert from Linux PCI slot to Windows
474 * @devfn: The Linux representation of PCI slot
475 *
476 * Windows uses a slightly different representation of PCI slot.
477 *
478 * Return: The Windows representation
479 */
480 static u32 devfn_to_wslot(int devfn)
481 {
482 union win_slot_encoding wslot;
483
484 wslot.slot = 0;
485 wslot.bits.func = PCI_SLOT(devfn) | (PCI_FUNC(devfn) << 5);
486
487 return wslot.slot;
488 }
489
490 /**
491 * wslot_to_devfn() - Convert from Windows PCI slot to Linux
492 * @wslot: The Windows representation of PCI slot
493 *
494 * Windows uses a slightly different representation of PCI slot.
495 *
496 * Return: The Linux representation
497 */
498 static int wslot_to_devfn(u32 wslot)
499 {
500 union win_slot_encoding slot_no;
501
502 slot_no.slot = wslot;
503 return PCI_DEVFN(0, slot_no.bits.func);
504 }
505
506 /*
507 * PCI Configuration Space for these root PCI buses is implemented as a pair
508 * of pages in memory-mapped I/O space. Writing to the first page chooses
509 * the PCI function being written or read. Once the first page has been
510 * written to, the following page maps in the entire configuration space of
511 * the function.
512 */
513
514 /**
515 * _hv_pcifront_read_config() - Internal PCI config read
516 * @hpdev: The PCI driver's representation of the device
517 * @where: Offset within config space
518 * @size: Size of the transfer
519 * @val: Pointer to the buffer receiving the data
520 */
521 static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
522 int size, u32 *val)
523 {
524 unsigned long flags;
525 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
526
527 /*
528 * If the attempt is to read the IDs or the ROM BAR, simulate that.
529 */
530 if (where + size <= PCI_COMMAND) {
531 memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
532 } else if (where >= PCI_CLASS_REVISION && where + size <=
533 PCI_CACHE_LINE_SIZE) {
534 memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
535 PCI_CLASS_REVISION, size);
536 } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
537 PCI_ROM_ADDRESS) {
538 memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
539 PCI_SUBSYSTEM_VENDOR_ID, size);
540 } else if (where >= PCI_ROM_ADDRESS && where + size <=
541 PCI_CAPABILITY_LIST) {
542 /* ROM BARs are unimplemented */
543 *val = 0;
544 } else if (where >= PCI_INTERRUPT_LINE && where + size <=
545 PCI_INTERRUPT_PIN) {
546 /*
547 * Interrupt Line and Interrupt PIN are hard-wired to zero
548 * because this front-end only supports message-signaled
549 * interrupts.
550 */
551 *val = 0;
552 } else if (where + size <= CFG_PAGE_SIZE) {
553 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
554 /* Choose the function to be read. (See comment above) */
555 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
556 /* Make sure the function was chosen before we start reading. */
557 mb();
558 /* Read from that function's config space. */
559 switch (size) {
560 case 1:
561 *val = readb(addr);
562 break;
563 case 2:
564 *val = readw(addr);
565 break;
566 default:
567 *val = readl(addr);
568 break;
569 }
570 /*
571 * Make sure the write was done before we release the spinlock
572 * allowing consecutive reads/writes.
573 */
574 mb();
575 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
576 } else {
577 dev_err(&hpdev->hbus->hdev->device,
578 "Attempt to read beyond a function's config space.\n");
579 }
580 }
581
582 /**
583 * _hv_pcifront_write_config() - Internal PCI config write
584 * @hpdev: The PCI driver's representation of the device
585 * @where: Offset within config space
586 * @size: Size of the transfer
587 * @val: The data being transferred
588 */
589 static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
590 int size, u32 val)
591 {
592 unsigned long flags;
593 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
594
595 if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
596 where + size <= PCI_CAPABILITY_LIST) {
597 /* SSIDs and ROM BARs are read-only */
598 } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
599 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
600 /* Choose the function to be written. (See comment above) */
601 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
602 /* Make sure the function was chosen before we start writing. */
603 wmb();
604 /* Write to that function's config space. */
605 switch (size) {
606 case 1:
607 writeb(val, addr);
608 break;
609 case 2:
610 writew(val, addr);
611 break;
612 default:
613 writel(val, addr);
614 break;
615 }
616 /*
617 * Make sure the write was done before we release the spinlock
618 * allowing consecutive reads/writes.
619 */
620 mb();
621 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
622 } else {
623 dev_err(&hpdev->hbus->hdev->device,
624 "Attempt to write beyond a function's config space.\n");
625 }
626 }
627
628 /**
629 * hv_pcifront_read_config() - Read configuration space
630 * @bus: PCI Bus structure
631 * @devfn: Device/function
632 * @where: Offset from base
633 * @size: Byte/word/dword
634 * @val: Value to be read
635 *
636 * Return: PCIBIOS_SUCCESSFUL on success
637 * PCIBIOS_DEVICE_NOT_FOUND on failure
638 */
639 static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
640 int where, int size, u32 *val)
641 {
642 struct hv_pcibus_device *hbus =
643 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
644 struct hv_pci_dev *hpdev;
645
646 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
647 if (!hpdev)
648 return PCIBIOS_DEVICE_NOT_FOUND;
649
650 _hv_pcifront_read_config(hpdev, where, size, val);
651
652 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
653 return PCIBIOS_SUCCESSFUL;
654 }
655
656 /**
657 * hv_pcifront_write_config() - Write configuration space
658 * @bus: PCI Bus structure
659 * @devfn: Device/function
660 * @where: Offset from base
661 * @size: Byte/word/dword
662 * @val: Value to be written to device
663 *
664 * Return: PCIBIOS_SUCCESSFUL on success
665 * PCIBIOS_DEVICE_NOT_FOUND on failure
666 */
667 static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
668 int where, int size, u32 val)
669 {
670 struct hv_pcibus_device *hbus =
671 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
672 struct hv_pci_dev *hpdev;
673
674 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
675 if (!hpdev)
676 return PCIBIOS_DEVICE_NOT_FOUND;
677
678 _hv_pcifront_write_config(hpdev, where, size, val);
679
680 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
681 return PCIBIOS_SUCCESSFUL;
682 }
683
684 /* PCIe operations */
685 static struct pci_ops hv_pcifront_ops = {
686 .read = hv_pcifront_read_config,
687 .write = hv_pcifront_write_config,
688 };
689
690 /* Interrupt management hooks */
691 static void hv_int_desc_free(struct hv_pci_dev *hpdev,
692 struct tran_int_desc *int_desc)
693 {
694 struct pci_delete_interrupt *int_pkt;
695 struct {
696 struct pci_packet pkt;
697 u8 buffer[sizeof(struct pci_delete_interrupt) -
698 sizeof(struct pci_message)];
699 } ctxt;
700
701 memset(&ctxt, 0, sizeof(ctxt));
702 int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
703 int_pkt->message_type.message_type =
704 PCI_DELETE_INTERRUPT_MESSAGE;
705 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
706 int_pkt->int_desc = *int_desc;
707 vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
708 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
709 kfree(int_desc);
710 }
711
712 /**
713 * hv_msi_free() - Free the MSI.
714 * @domain: The interrupt domain pointer
715 * @info: Extra MSI-related context
716 * @irq: Identifies the IRQ.
717 *
718 * The Hyper-V parent partition and hypervisor are tracking the
719 * messages that are in use, keeping the interrupt redirection
720 * table up to date. This callback sends a message that frees
721 * the IRT entry and related tracking nonsense.
722 */
723 static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
724 unsigned int irq)
725 {
726 struct hv_pcibus_device *hbus;
727 struct hv_pci_dev *hpdev;
728 struct pci_dev *pdev;
729 struct tran_int_desc *int_desc;
730 struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
731 struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
732
733 pdev = msi_desc_to_pci_dev(msi);
734 hbus = info->data;
735 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
736 if (!hpdev)
737 return;
738
739 int_desc = irq_data_get_irq_chip_data(irq_data);
740 if (int_desc) {
741 irq_data->chip_data = NULL;
742 hv_int_desc_free(hpdev, int_desc);
743 }
744
745 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
746 }
747
748 static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
749 bool force)
750 {
751 struct irq_data *parent = data->parent_data;
752
753 return parent->chip->irq_set_affinity(parent, dest, force);
754 }
755
756 void hv_irq_mask(struct irq_data *data)
757 {
758 pci_msi_mask_irq(data);
759 }
760
761 /**
762 * hv_irq_unmask() - "Unmask" the IRQ by setting its current
763 * affinity.
764 * @data: Describes the IRQ
765 *
766 * Build new a destination for the MSI and make a hypercall to
767 * update the Interrupt Redirection Table. "Device Logical ID"
768 * is built out of this PCI bus's instance GUID and the function
769 * number of the device.
770 */
771 void hv_irq_unmask(struct irq_data *data)
772 {
773 struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
774 struct irq_cfg *cfg = irqd_cfg(data);
775 struct retarget_msi_interrupt params;
776 struct hv_pcibus_device *hbus;
777 struct cpumask *dest;
778 struct pci_bus *pbus;
779 struct pci_dev *pdev;
780 int cpu;
781
782 dest = irq_data_get_affinity_mask(data);
783 pdev = msi_desc_to_pci_dev(msi_desc);
784 pbus = pdev->bus;
785 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
786
787 memset(&params, 0, sizeof(params));
788 params.partition_id = HV_PARTITION_ID_SELF;
789 params.source = 1; /* MSI(-X) */
790 params.address = msi_desc->msg.address_lo;
791 params.data = msi_desc->msg.data;
792 params.device_id = (hbus->hdev->dev_instance.b[5] << 24) |
793 (hbus->hdev->dev_instance.b[4] << 16) |
794 (hbus->hdev->dev_instance.b[7] << 8) |
795 (hbus->hdev->dev_instance.b[6] & 0xf8) |
796 PCI_FUNC(pdev->devfn);
797 params.vector = cfg->vector;
798
799 for_each_cpu_and(cpu, dest, cpu_online_mask)
800 params.vp_mask |= (1ULL << vmbus_cpu_number_to_vp_number(cpu));
801
802 hv_do_hypercall(HVCALL_RETARGET_INTERRUPT, &params, NULL);
803
804 pci_msi_unmask_irq(data);
805 }
806
807 struct compose_comp_ctxt {
808 struct hv_pci_compl comp_pkt;
809 struct tran_int_desc int_desc;
810 };
811
812 static void hv_pci_compose_compl(void *context, struct pci_response *resp,
813 int resp_packet_size)
814 {
815 struct compose_comp_ctxt *comp_pkt = context;
816 struct pci_create_int_response *int_resp =
817 (struct pci_create_int_response *)resp;
818
819 comp_pkt->comp_pkt.completion_status = resp->status;
820 comp_pkt->int_desc = int_resp->int_desc;
821 complete(&comp_pkt->comp_pkt.host_event);
822 }
823
824 /**
825 * hv_compose_msi_msg() - Supplies a valid MSI address/data
826 * @data: Everything about this MSI
827 * @msg: Buffer that is filled in by this function
828 *
829 * This function unpacks the IRQ looking for target CPU set, IDT
830 * vector and mode and sends a message to the parent partition
831 * asking for a mapping for that tuple in this partition. The
832 * response supplies a data value and address to which that data
833 * should be written to trigger that interrupt.
834 */
835 static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
836 {
837 struct irq_cfg *cfg = irqd_cfg(data);
838 struct hv_pcibus_device *hbus;
839 struct hv_pci_dev *hpdev;
840 struct pci_bus *pbus;
841 struct pci_dev *pdev;
842 struct pci_create_interrupt *int_pkt;
843 struct compose_comp_ctxt comp;
844 struct tran_int_desc *int_desc;
845 struct cpumask *affinity;
846 struct {
847 struct pci_packet pkt;
848 u8 buffer[sizeof(struct pci_create_interrupt) -
849 sizeof(struct pci_message)];
850 } ctxt;
851 int cpu;
852 int ret;
853
854 pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
855 pbus = pdev->bus;
856 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
857 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
858 if (!hpdev)
859 goto return_null_message;
860
861 /* Free any previous message that might have already been composed. */
862 if (data->chip_data) {
863 int_desc = data->chip_data;
864 data->chip_data = NULL;
865 hv_int_desc_free(hpdev, int_desc);
866 }
867
868 int_desc = kzalloc(sizeof(*int_desc), GFP_KERNEL);
869 if (!int_desc)
870 goto drop_reference;
871
872 memset(&ctxt, 0, sizeof(ctxt));
873 init_completion(&comp.comp_pkt.host_event);
874 ctxt.pkt.completion_func = hv_pci_compose_compl;
875 ctxt.pkt.compl_ctxt = &comp;
876 int_pkt = (struct pci_create_interrupt *)&ctxt.pkt.message;
877 int_pkt->message_type.message_type = PCI_CREATE_INTERRUPT_MESSAGE;
878 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
879 int_pkt->int_desc.vector = cfg->vector;
880 int_pkt->int_desc.vector_count = 1;
881 int_pkt->int_desc.delivery_mode =
882 (apic->irq_delivery_mode == dest_LowestPrio) ? 1 : 0;
883
884 /*
885 * This bit doesn't have to work on machines with more than 64
886 * processors because Hyper-V only supports 64 in a guest.
887 */
888 affinity = irq_data_get_affinity_mask(data);
889 for_each_cpu_and(cpu, affinity, cpu_online_mask) {
890 int_pkt->int_desc.cpu_mask |=
891 (1ULL << vmbus_cpu_number_to_vp_number(cpu));
892 }
893
894 ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt,
895 sizeof(*int_pkt), (unsigned long)&ctxt.pkt,
896 VM_PKT_DATA_INBAND,
897 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
898 if (!ret)
899 wait_for_completion(&comp.comp_pkt.host_event);
900
901 if (comp.comp_pkt.completion_status < 0) {
902 dev_err(&hbus->hdev->device,
903 "Request for interrupt failed: 0x%x",
904 comp.comp_pkt.completion_status);
905 goto free_int_desc;
906 }
907
908 /*
909 * Record the assignment so that this can be unwound later. Using
910 * irq_set_chip_data() here would be appropriate, but the lock it takes
911 * is already held.
912 */
913 *int_desc = comp.int_desc;
914 data->chip_data = int_desc;
915
916 /* Pass up the result. */
917 msg->address_hi = comp.int_desc.address >> 32;
918 msg->address_lo = comp.int_desc.address & 0xffffffff;
919 msg->data = comp.int_desc.data;
920
921 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
922 return;
923
924 free_int_desc:
925 kfree(int_desc);
926 drop_reference:
927 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
928 return_null_message:
929 msg->address_hi = 0;
930 msg->address_lo = 0;
931 msg->data = 0;
932 }
933
934 /* HW Interrupt Chip Descriptor */
935 static struct irq_chip hv_msi_irq_chip = {
936 .name = "Hyper-V PCIe MSI",
937 .irq_compose_msi_msg = hv_compose_msi_msg,
938 .irq_set_affinity = hv_set_affinity,
939 .irq_ack = irq_chip_ack_parent,
940 .irq_mask = hv_irq_mask,
941 .irq_unmask = hv_irq_unmask,
942 };
943
944 static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
945 msi_alloc_info_t *arg)
946 {
947 return arg->msi_hwirq;
948 }
949
950 static struct msi_domain_ops hv_msi_ops = {
951 .get_hwirq = hv_msi_domain_ops_get_hwirq,
952 .msi_prepare = pci_msi_prepare,
953 .set_desc = pci_msi_set_desc,
954 .msi_free = hv_msi_free,
955 };
956
957 /**
958 * hv_pcie_init_irq_domain() - Initialize IRQ domain
959 * @hbus: The root PCI bus
960 *
961 * This function creates an IRQ domain which will be used for
962 * interrupts from devices that have been passed through. These
963 * devices only support MSI and MSI-X, not line-based interrupts
964 * or simulations of line-based interrupts through PCIe's
965 * fabric-layer messages. Because interrupts are remapped, we
966 * can support multi-message MSI here.
967 *
968 * Return: '0' on success and error value on failure
969 */
970 static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
971 {
972 hbus->msi_info.chip = &hv_msi_irq_chip;
973 hbus->msi_info.ops = &hv_msi_ops;
974 hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
975 MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
976 MSI_FLAG_PCI_MSIX);
977 hbus->msi_info.handler = handle_edge_irq;
978 hbus->msi_info.handler_name = "edge";
979 hbus->msi_info.data = hbus;
980 hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
981 &hbus->msi_info,
982 x86_vector_domain);
983 if (!hbus->irq_domain) {
984 dev_err(&hbus->hdev->device,
985 "Failed to build an MSI IRQ domain\n");
986 return -ENODEV;
987 }
988
989 return 0;
990 }
991
992 /**
993 * get_bar_size() - Get the address space consumed by a BAR
994 * @bar_val: Value that a BAR returned after -1 was written
995 * to it.
996 *
997 * This function returns the size of the BAR, rounded up to 1
998 * page. It has to be rounded up because the hypervisor's page
999 * table entry that maps the BAR into the VM can't specify an
1000 * offset within a page. The invariant is that the hypervisor
1001 * must place any BARs of smaller than page length at the
1002 * beginning of a page.
1003 *
1004 * Return: Size in bytes of the consumed MMIO space.
1005 */
1006 static u64 get_bar_size(u64 bar_val)
1007 {
1008 return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1009 PAGE_SIZE);
1010 }
1011
1012 /**
1013 * survey_child_resources() - Total all MMIO requirements
1014 * @hbus: Root PCI bus, as understood by this driver
1015 */
1016 static void survey_child_resources(struct hv_pcibus_device *hbus)
1017 {
1018 struct list_head *iter;
1019 struct hv_pci_dev *hpdev;
1020 resource_size_t bar_size = 0;
1021 unsigned long flags;
1022 struct completion *event;
1023 u64 bar_val;
1024 int i;
1025
1026 /* If nobody is waiting on the answer, don't compute it. */
1027 event = xchg(&hbus->survey_event, NULL);
1028 if (!event)
1029 return;
1030
1031 /* If the answer has already been computed, go with it. */
1032 if (hbus->low_mmio_space || hbus->high_mmio_space) {
1033 complete(event);
1034 return;
1035 }
1036
1037 spin_lock_irqsave(&hbus->device_list_lock, flags);
1038
1039 /*
1040 * Due to an interesting quirk of the PCI spec, all memory regions
1041 * for a child device are a power of 2 in size and aligned in memory,
1042 * so it's sufficient to just add them up without tracking alignment.
1043 */
1044 list_for_each(iter, &hbus->children) {
1045 hpdev = container_of(iter, struct hv_pci_dev, list_entry);
1046 for (i = 0; i < 6; i++) {
1047 if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1048 dev_err(&hbus->hdev->device,
1049 "There's an I/O BAR in this list!\n");
1050
1051 if (hpdev->probed_bar[i] != 0) {
1052 /*
1053 * A probed BAR has all the upper bits set that
1054 * can be changed.
1055 */
1056
1057 bar_val = hpdev->probed_bar[i];
1058 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1059 bar_val |=
1060 ((u64)hpdev->probed_bar[++i] << 32);
1061 else
1062 bar_val |= 0xffffffff00000000ULL;
1063
1064 bar_size = get_bar_size(bar_val);
1065
1066 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1067 hbus->high_mmio_space += bar_size;
1068 else
1069 hbus->low_mmio_space += bar_size;
1070 }
1071 }
1072 }
1073
1074 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1075 complete(event);
1076 }
1077
1078 /**
1079 * prepopulate_bars() - Fill in BARs with defaults
1080 * @hbus: Root PCI bus, as understood by this driver
1081 *
1082 * The core PCI driver code seems much, much happier if the BARs
1083 * for a device have values upon first scan. So fill them in.
1084 * The algorithm below works down from large sizes to small,
1085 * attempting to pack the assignments optimally. The assumption,
1086 * enforced in other parts of the code, is that the beginning of
1087 * the memory-mapped I/O space will be aligned on the largest
1088 * BAR size.
1089 */
1090 static void prepopulate_bars(struct hv_pcibus_device *hbus)
1091 {
1092 resource_size_t high_size = 0;
1093 resource_size_t low_size = 0;
1094 resource_size_t high_base = 0;
1095 resource_size_t low_base = 0;
1096 resource_size_t bar_size;
1097 struct hv_pci_dev *hpdev;
1098 struct list_head *iter;
1099 unsigned long flags;
1100 u64 bar_val;
1101 u32 command;
1102 bool high;
1103 int i;
1104
1105 if (hbus->low_mmio_space) {
1106 low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1107 low_base = hbus->low_mmio_res->start;
1108 }
1109
1110 if (hbus->high_mmio_space) {
1111 high_size = 1ULL <<
1112 (63 - __builtin_clzll(hbus->high_mmio_space));
1113 high_base = hbus->high_mmio_res->start;
1114 }
1115
1116 spin_lock_irqsave(&hbus->device_list_lock, flags);
1117
1118 /* Pick addresses for the BARs. */
1119 do {
1120 list_for_each(iter, &hbus->children) {
1121 hpdev = container_of(iter, struct hv_pci_dev,
1122 list_entry);
1123 for (i = 0; i < 6; i++) {
1124 bar_val = hpdev->probed_bar[i];
1125 if (bar_val == 0)
1126 continue;
1127 high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1128 if (high) {
1129 bar_val |=
1130 ((u64)hpdev->probed_bar[i + 1]
1131 << 32);
1132 } else {
1133 bar_val |= 0xffffffffULL << 32;
1134 }
1135 bar_size = get_bar_size(bar_val);
1136 if (high) {
1137 if (high_size != bar_size) {
1138 i++;
1139 continue;
1140 }
1141 _hv_pcifront_write_config(hpdev,
1142 PCI_BASE_ADDRESS_0 + (4 * i),
1143 4,
1144 (u32)(high_base & 0xffffff00));
1145 i++;
1146 _hv_pcifront_write_config(hpdev,
1147 PCI_BASE_ADDRESS_0 + (4 * i),
1148 4, (u32)(high_base >> 32));
1149 high_base += bar_size;
1150 } else {
1151 if (low_size != bar_size)
1152 continue;
1153 _hv_pcifront_write_config(hpdev,
1154 PCI_BASE_ADDRESS_0 + (4 * i),
1155 4,
1156 (u32)(low_base & 0xffffff00));
1157 low_base += bar_size;
1158 }
1159 }
1160 if (high_size <= 1 && low_size <= 1) {
1161 /* Set the memory enable bit. */
1162 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1163 &command);
1164 command |= PCI_COMMAND_MEMORY;
1165 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1166 command);
1167 break;
1168 }
1169 }
1170
1171 high_size >>= 1;
1172 low_size >>= 1;
1173 } while (high_size || low_size);
1174
1175 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1176 }
1177
1178 /**
1179 * create_root_hv_pci_bus() - Expose a new root PCI bus
1180 * @hbus: Root PCI bus, as understood by this driver
1181 *
1182 * Return: 0 on success, -errno on failure
1183 */
1184 static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1185 {
1186 /* Register the device */
1187 hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1188 0, /* bus number is always zero */
1189 &hv_pcifront_ops,
1190 &hbus->sysdata,
1191 &hbus->resources_for_children);
1192 if (!hbus->pci_bus)
1193 return -ENODEV;
1194
1195 hbus->pci_bus->msi = &hbus->msi_chip;
1196 hbus->pci_bus->msi->dev = &hbus->hdev->device;
1197
1198 pci_scan_child_bus(hbus->pci_bus);
1199 pci_bus_assign_resources(hbus->pci_bus);
1200 pci_bus_add_devices(hbus->pci_bus);
1201 hbus->state = hv_pcibus_installed;
1202 return 0;
1203 }
1204
1205 struct q_res_req_compl {
1206 struct completion host_event;
1207 struct hv_pci_dev *hpdev;
1208 };
1209
1210 /**
1211 * q_resource_requirements() - Query Resource Requirements
1212 * @context: The completion context.
1213 * @resp: The response that came from the host.
1214 * @resp_packet_size: The size in bytes of resp.
1215 *
1216 * This function is invoked on completion of a Query Resource
1217 * Requirements packet.
1218 */
1219 static void q_resource_requirements(void *context, struct pci_response *resp,
1220 int resp_packet_size)
1221 {
1222 struct q_res_req_compl *completion = context;
1223 struct pci_q_res_req_response *q_res_req =
1224 (struct pci_q_res_req_response *)resp;
1225 int i;
1226
1227 if (resp->status < 0) {
1228 dev_err(&completion->hpdev->hbus->hdev->device,
1229 "query resource requirements failed: %x\n",
1230 resp->status);
1231 } else {
1232 for (i = 0; i < 6; i++) {
1233 completion->hpdev->probed_bar[i] =
1234 q_res_req->probed_bar[i];
1235 }
1236 }
1237
1238 complete(&completion->host_event);
1239 }
1240
1241 static void get_pcichild(struct hv_pci_dev *hpdev,
1242 enum hv_pcidev_ref_reason reason)
1243 {
1244 atomic_inc(&hpdev->refs);
1245 }
1246
1247 static void put_pcichild(struct hv_pci_dev *hpdev,
1248 enum hv_pcidev_ref_reason reason)
1249 {
1250 if (atomic_dec_and_test(&hpdev->refs))
1251 kfree(hpdev);
1252 }
1253
1254 /**
1255 * new_pcichild_device() - Create a new child device
1256 * @hbus: The internal struct tracking this root PCI bus.
1257 * @desc: The information supplied so far from the host
1258 * about the device.
1259 *
1260 * This function creates the tracking structure for a new child
1261 * device and kicks off the process of figuring out what it is.
1262 *
1263 * Return: Pointer to the new tracking struct
1264 */
1265 static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1266 struct pci_function_description *desc)
1267 {
1268 struct hv_pci_dev *hpdev;
1269 struct pci_child_message *res_req;
1270 struct q_res_req_compl comp_pkt;
1271 union {
1272 struct pci_packet init_packet;
1273 u8 buffer[0x100];
1274 } pkt;
1275 unsigned long flags;
1276 int ret;
1277
1278 hpdev = kzalloc(sizeof(*hpdev), GFP_ATOMIC);
1279 if (!hpdev)
1280 return NULL;
1281
1282 hpdev->hbus = hbus;
1283
1284 memset(&pkt, 0, sizeof(pkt));
1285 init_completion(&comp_pkt.host_event);
1286 comp_pkt.hpdev = hpdev;
1287 pkt.init_packet.compl_ctxt = &comp_pkt;
1288 pkt.init_packet.completion_func = q_resource_requirements;
1289 res_req = (struct pci_child_message *)&pkt.init_packet.message;
1290 res_req->message_type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1291 res_req->wslot.slot = desc->win_slot.slot;
1292
1293 ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1294 sizeof(struct pci_child_message),
1295 (unsigned long)&pkt.init_packet,
1296 VM_PKT_DATA_INBAND,
1297 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1298 if (ret)
1299 goto error;
1300
1301 wait_for_completion(&comp_pkt.host_event);
1302
1303 hpdev->desc = *desc;
1304 get_pcichild(hpdev, hv_pcidev_ref_initial);
1305 get_pcichild(hpdev, hv_pcidev_ref_childlist);
1306 spin_lock_irqsave(&hbus->device_list_lock, flags);
1307 list_add_tail(&hpdev->list_entry, &hbus->children);
1308 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1309 return hpdev;
1310
1311 error:
1312 kfree(hpdev);
1313 return NULL;
1314 }
1315
1316 /**
1317 * get_pcichild_wslot() - Find device from slot
1318 * @hbus: Root PCI bus, as understood by this driver
1319 * @wslot: Location on the bus
1320 *
1321 * This function looks up a PCI device and returns the internal
1322 * representation of it. It acquires a reference on it, so that
1323 * the device won't be deleted while somebody is using it. The
1324 * caller is responsible for calling put_pcichild() to release
1325 * this reference.
1326 *
1327 * Return: Internal representation of a PCI device
1328 */
1329 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1330 u32 wslot)
1331 {
1332 unsigned long flags;
1333 struct hv_pci_dev *iter, *hpdev = NULL;
1334
1335 spin_lock_irqsave(&hbus->device_list_lock, flags);
1336 list_for_each_entry(iter, &hbus->children, list_entry) {
1337 if (iter->desc.win_slot.slot == wslot) {
1338 hpdev = iter;
1339 get_pcichild(hpdev, hv_pcidev_ref_by_slot);
1340 break;
1341 }
1342 }
1343 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1344
1345 return hpdev;
1346 }
1347
1348 /**
1349 * pci_devices_present_work() - Handle new list of child devices
1350 * @work: Work struct embedded in struct hv_dr_work
1351 *
1352 * "Bus Relations" is the Windows term for "children of this
1353 * bus." The terminology is preserved here for people trying to
1354 * debug the interaction between Hyper-V and Linux. This
1355 * function is called when the parent partition reports a list
1356 * of functions that should be observed under this PCI Express
1357 * port (bus).
1358 *
1359 * This function updates the list, and must tolerate being
1360 * called multiple times with the same information. The typical
1361 * number of child devices is one, with very atypical cases
1362 * involving three or four, so the algorithms used here can be
1363 * simple and inefficient.
1364 *
1365 * It must also treat the omission of a previously observed device as
1366 * notification that the device no longer exists.
1367 *
1368 * Note that this function is a work item, and it may not be
1369 * invoked in the order that it was queued. Back to back
1370 * updates of the list of present devices may involve queuing
1371 * multiple work items, and this one may run before ones that
1372 * were sent later. As such, this function only does something
1373 * if is the last one in the queue.
1374 */
1375 static void pci_devices_present_work(struct work_struct *work)
1376 {
1377 u32 child_no;
1378 bool found;
1379 struct list_head *iter;
1380 struct pci_function_description *new_desc;
1381 struct hv_pci_dev *hpdev;
1382 struct hv_pcibus_device *hbus;
1383 struct list_head removed;
1384 struct hv_dr_work *dr_wrk;
1385 struct hv_dr_state *dr = NULL;
1386 unsigned long flags;
1387
1388 dr_wrk = container_of(work, struct hv_dr_work, wrk);
1389 hbus = dr_wrk->bus;
1390 kfree(dr_wrk);
1391
1392 INIT_LIST_HEAD(&removed);
1393
1394 if (down_interruptible(&hbus->enum_sem)) {
1395 put_hvpcibus(hbus);
1396 return;
1397 }
1398
1399 /* Pull this off the queue and process it if it was the last one. */
1400 spin_lock_irqsave(&hbus->device_list_lock, flags);
1401 while (!list_empty(&hbus->dr_list)) {
1402 dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
1403 list_entry);
1404 list_del(&dr->list_entry);
1405
1406 /* Throw this away if the list still has stuff in it. */
1407 if (!list_empty(&hbus->dr_list)) {
1408 kfree(dr);
1409 continue;
1410 }
1411 }
1412 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1413
1414 if (!dr) {
1415 up(&hbus->enum_sem);
1416 put_hvpcibus(hbus);
1417 return;
1418 }
1419
1420 /* First, mark all existing children as reported missing. */
1421 spin_lock_irqsave(&hbus->device_list_lock, flags);
1422 list_for_each(iter, &hbus->children) {
1423 hpdev = container_of(iter, struct hv_pci_dev,
1424 list_entry);
1425 hpdev->reported_missing = true;
1426 }
1427 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1428
1429 /* Next, add back any reported devices. */
1430 for (child_no = 0; child_no < dr->device_count; child_no++) {
1431 found = false;
1432 new_desc = &dr->func[child_no];
1433
1434 spin_lock_irqsave(&hbus->device_list_lock, flags);
1435 list_for_each(iter, &hbus->children) {
1436 hpdev = container_of(iter, struct hv_pci_dev,
1437 list_entry);
1438 if ((hpdev->desc.win_slot.slot ==
1439 new_desc->win_slot.slot) &&
1440 (hpdev->desc.v_id == new_desc->v_id) &&
1441 (hpdev->desc.d_id == new_desc->d_id) &&
1442 (hpdev->desc.ser == new_desc->ser)) {
1443 hpdev->reported_missing = false;
1444 found = true;
1445 }
1446 }
1447 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1448
1449 if (!found) {
1450 hpdev = new_pcichild_device(hbus, new_desc);
1451 if (!hpdev)
1452 dev_err(&hbus->hdev->device,
1453 "couldn't record a child device.\n");
1454 }
1455 }
1456
1457 /* Move missing children to a list on the stack. */
1458 spin_lock_irqsave(&hbus->device_list_lock, flags);
1459 do {
1460 found = false;
1461 list_for_each(iter, &hbus->children) {
1462 hpdev = container_of(iter, struct hv_pci_dev,
1463 list_entry);
1464 if (hpdev->reported_missing) {
1465 found = true;
1466 put_pcichild(hpdev, hv_pcidev_ref_childlist);
1467 list_del(&hpdev->list_entry);
1468 list_add_tail(&hpdev->list_entry, &removed);
1469 break;
1470 }
1471 }
1472 } while (found);
1473 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1474
1475 /* Delete everything that should no longer exist. */
1476 while (!list_empty(&removed)) {
1477 hpdev = list_first_entry(&removed, struct hv_pci_dev,
1478 list_entry);
1479 list_del(&hpdev->list_entry);
1480 put_pcichild(hpdev, hv_pcidev_ref_initial);
1481 }
1482
1483 /* Tell the core to rescan bus because there may have been changes. */
1484 if (hbus->state == hv_pcibus_installed) {
1485 pci_lock_rescan_remove();
1486 pci_scan_child_bus(hbus->pci_bus);
1487 pci_unlock_rescan_remove();
1488 } else {
1489 survey_child_resources(hbus);
1490 }
1491
1492 up(&hbus->enum_sem);
1493 put_hvpcibus(hbus);
1494 kfree(dr);
1495 }
1496
1497 /**
1498 * hv_pci_devices_present() - Handles list of new children
1499 * @hbus: Root PCI bus, as understood by this driver
1500 * @relations: Packet from host listing children
1501 *
1502 * This function is invoked whenever a new list of devices for
1503 * this bus appears.
1504 */
1505 static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
1506 struct pci_bus_relations *relations)
1507 {
1508 struct hv_dr_state *dr;
1509 struct hv_dr_work *dr_wrk;
1510 unsigned long flags;
1511
1512 dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
1513 if (!dr_wrk)
1514 return;
1515
1516 dr = kzalloc(offsetof(struct hv_dr_state, func) +
1517 (sizeof(struct pci_function_description) *
1518 (relations->device_count)), GFP_NOWAIT);
1519 if (!dr) {
1520 kfree(dr_wrk);
1521 return;
1522 }
1523
1524 INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
1525 dr_wrk->bus = hbus;
1526 dr->device_count = relations->device_count;
1527 if (dr->device_count != 0) {
1528 memcpy(dr->func, relations->func,
1529 sizeof(struct pci_function_description) *
1530 dr->device_count);
1531 }
1532
1533 spin_lock_irqsave(&hbus->device_list_lock, flags);
1534 list_add_tail(&dr->list_entry, &hbus->dr_list);
1535 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1536
1537 get_hvpcibus(hbus);
1538 schedule_work(&dr_wrk->wrk);
1539 }
1540
1541 /**
1542 * hv_eject_device_work() - Asynchronously handles ejection
1543 * @work: Work struct embedded in internal device struct
1544 *
1545 * This function handles ejecting a device. Windows will
1546 * attempt to gracefully eject a device, waiting 60 seconds to
1547 * hear back from the guest OS that this completed successfully.
1548 * If this timer expires, the device will be forcibly removed.
1549 */
1550 static void hv_eject_device_work(struct work_struct *work)
1551 {
1552 struct pci_eject_response *ejct_pkt;
1553 struct hv_pci_dev *hpdev;
1554 struct pci_dev *pdev;
1555 unsigned long flags;
1556 int wslot;
1557 struct {
1558 struct pci_packet pkt;
1559 u8 buffer[sizeof(struct pci_eject_response) -
1560 sizeof(struct pci_message)];
1561 } ctxt;
1562
1563 hpdev = container_of(work, struct hv_pci_dev, wrk);
1564
1565 if (hpdev->state != hv_pcichild_ejecting) {
1566 put_pcichild(hpdev, hv_pcidev_ref_pnp);
1567 return;
1568 }
1569
1570 /*
1571 * Ejection can come before or after the PCI bus has been set up, so
1572 * attempt to find it and tear down the bus state, if it exists. This
1573 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
1574 * because hbus->pci_bus may not exist yet.
1575 */
1576 wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
1577 pdev = pci_get_domain_bus_and_slot(hpdev->hbus->sysdata.domain, 0,
1578 wslot);
1579 if (pdev) {
1580 pci_stop_and_remove_bus_device(pdev);
1581 pci_dev_put(pdev);
1582 }
1583
1584 memset(&ctxt, 0, sizeof(ctxt));
1585 ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
1586 ejct_pkt->message_type = PCI_EJECTION_COMPLETE;
1587 ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1588 vmbus_sendpacket(hpdev->hbus->hdev->channel, ejct_pkt,
1589 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
1590 VM_PKT_DATA_INBAND, 0);
1591
1592 spin_lock_irqsave(&hpdev->hbus->device_list_lock, flags);
1593 list_del(&hpdev->list_entry);
1594 spin_unlock_irqrestore(&hpdev->hbus->device_list_lock, flags);
1595
1596 put_pcichild(hpdev, hv_pcidev_ref_childlist);
1597 put_pcichild(hpdev, hv_pcidev_ref_pnp);
1598 put_hvpcibus(hpdev->hbus);
1599 }
1600
1601 /**
1602 * hv_pci_eject_device() - Handles device ejection
1603 * @hpdev: Internal device tracking struct
1604 *
1605 * This function is invoked when an ejection packet arrives. It
1606 * just schedules work so that we don't re-enter the packet
1607 * delivery code handling the ejection.
1608 */
1609 static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
1610 {
1611 hpdev->state = hv_pcichild_ejecting;
1612 get_pcichild(hpdev, hv_pcidev_ref_pnp);
1613 INIT_WORK(&hpdev->wrk, hv_eject_device_work);
1614 get_hvpcibus(hpdev->hbus);
1615 schedule_work(&hpdev->wrk);
1616 }
1617
1618 /**
1619 * hv_pci_onchannelcallback() - Handles incoming packets
1620 * @context: Internal bus tracking struct
1621 *
1622 * This function is invoked whenever the host sends a packet to
1623 * this channel (which is private to this root PCI bus).
1624 */
1625 static void hv_pci_onchannelcallback(void *context)
1626 {
1627 const int packet_size = 0x100;
1628 int ret;
1629 struct hv_pcibus_device *hbus = context;
1630 u32 bytes_recvd;
1631 u64 req_id;
1632 struct vmpacket_descriptor *desc;
1633 unsigned char *buffer;
1634 int bufferlen = packet_size;
1635 struct pci_packet *comp_packet;
1636 struct pci_response *response;
1637 struct pci_incoming_message *new_message;
1638 struct pci_bus_relations *bus_rel;
1639 struct pci_dev_incoming *dev_message;
1640 struct hv_pci_dev *hpdev;
1641
1642 buffer = kmalloc(bufferlen, GFP_ATOMIC);
1643 if (!buffer)
1644 return;
1645
1646 while (1) {
1647 ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
1648 bufferlen, &bytes_recvd, &req_id);
1649
1650 if (ret == -ENOBUFS) {
1651 kfree(buffer);
1652 /* Handle large packet */
1653 bufferlen = bytes_recvd;
1654 buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
1655 if (!buffer)
1656 return;
1657 continue;
1658 }
1659
1660 /*
1661 * All incoming packets must be at least as large as a
1662 * response.
1663 */
1664 if (bytes_recvd <= sizeof(struct pci_response)) {
1665 kfree(buffer);
1666 return;
1667 }
1668 desc = (struct vmpacket_descriptor *)buffer;
1669
1670 switch (desc->type) {
1671 case VM_PKT_COMP:
1672
1673 /*
1674 * The host is trusted, and thus it's safe to interpret
1675 * this transaction ID as a pointer.
1676 */
1677 comp_packet = (struct pci_packet *)req_id;
1678 response = (struct pci_response *)buffer;
1679 comp_packet->completion_func(comp_packet->compl_ctxt,
1680 response,
1681 bytes_recvd);
1682 kfree(buffer);
1683 return;
1684
1685 case VM_PKT_DATA_INBAND:
1686
1687 new_message = (struct pci_incoming_message *)buffer;
1688 switch (new_message->message_type.message_type) {
1689 case PCI_BUS_RELATIONS:
1690
1691 bus_rel = (struct pci_bus_relations *)buffer;
1692 if (bytes_recvd <
1693 offsetof(struct pci_bus_relations, func) +
1694 (sizeof(struct pci_function_description) *
1695 (bus_rel->device_count))) {
1696 dev_err(&hbus->hdev->device,
1697 "bus relations too small\n");
1698 break;
1699 }
1700
1701 hv_pci_devices_present(hbus, bus_rel);
1702 break;
1703
1704 case PCI_EJECT:
1705
1706 dev_message = (struct pci_dev_incoming *)buffer;
1707 hpdev = get_pcichild_wslot(hbus,
1708 dev_message->wslot.slot);
1709 if (hpdev) {
1710 hv_pci_eject_device(hpdev);
1711 put_pcichild(hpdev,
1712 hv_pcidev_ref_by_slot);
1713 }
1714 break;
1715
1716 default:
1717 dev_warn(&hbus->hdev->device,
1718 "Unimplemented protocol message %x\n",
1719 new_message->message_type.message_type);
1720 break;
1721 }
1722 break;
1723
1724 default:
1725 dev_err(&hbus->hdev->device,
1726 "unhandled packet type %d, tid %llx len %d\n",
1727 desc->type, req_id, bytes_recvd);
1728 break;
1729 }
1730 break;
1731 }
1732 }
1733
1734 /**
1735 * hv_pci_protocol_negotiation() - Set up protocol
1736 * @hdev: VMBus's tracking struct for this root PCI bus
1737 *
1738 * This driver is intended to support running on Windows 10
1739 * (server) and later versions. It will not run on earlier
1740 * versions, as they assume that many of the operations which
1741 * Linux needs accomplished with a spinlock held were done via
1742 * asynchronous messaging via VMBus. Windows 10 increases the
1743 * surface area of PCI emulation so that these actions can take
1744 * place by suspending a virtual processor for their duration.
1745 *
1746 * This function negotiates the channel protocol version,
1747 * failing if the host doesn't support the necessary protocol
1748 * level.
1749 */
1750 static int hv_pci_protocol_negotiation(struct hv_device *hdev)
1751 {
1752 struct pci_version_request *version_req;
1753 struct hv_pci_compl comp_pkt;
1754 struct pci_packet *pkt;
1755 int ret;
1756
1757 /*
1758 * Initiate the handshake with the host and negotiate
1759 * a version that the host can support. We start with the
1760 * highest version number and go down if the host cannot
1761 * support it.
1762 */
1763 pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
1764 if (!pkt)
1765 return -ENOMEM;
1766
1767 init_completion(&comp_pkt.host_event);
1768 pkt->completion_func = hv_pci_generic_compl;
1769 pkt->compl_ctxt = &comp_pkt;
1770 version_req = (struct pci_version_request *)&pkt->message;
1771 version_req->message_type.message_type = PCI_QUERY_PROTOCOL_VERSION;
1772 version_req->protocol_version = PCI_PROTOCOL_VERSION_CURRENT;
1773
1774 ret = vmbus_sendpacket(hdev->channel, version_req,
1775 sizeof(struct pci_version_request),
1776 (unsigned long)pkt, VM_PKT_DATA_INBAND,
1777 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1778 if (ret)
1779 goto exit;
1780
1781 wait_for_completion(&comp_pkt.host_event);
1782
1783 if (comp_pkt.completion_status < 0) {
1784 dev_err(&hdev->device,
1785 "PCI Pass-through VSP failed version request %x\n",
1786 comp_pkt.completion_status);
1787 ret = -EPROTO;
1788 goto exit;
1789 }
1790
1791 ret = 0;
1792
1793 exit:
1794 kfree(pkt);
1795 return ret;
1796 }
1797
1798 /**
1799 * hv_pci_free_bridge_windows() - Release memory regions for the
1800 * bus
1801 * @hbus: Root PCI bus, as understood by this driver
1802 */
1803 static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
1804 {
1805 /*
1806 * Set the resources back to the way they looked when they
1807 * were allocated by setting IORESOURCE_BUSY again.
1808 */
1809
1810 if (hbus->low_mmio_space && hbus->low_mmio_res) {
1811 hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
1812 vmbus_free_mmio(hbus->low_mmio_res->start,
1813 resource_size(hbus->low_mmio_res));
1814 }
1815
1816 if (hbus->high_mmio_space && hbus->high_mmio_res) {
1817 hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
1818 vmbus_free_mmio(hbus->high_mmio_res->start,
1819 resource_size(hbus->high_mmio_res));
1820 }
1821 }
1822
1823 /**
1824 * hv_pci_allocate_bridge_windows() - Allocate memory regions
1825 * for the bus
1826 * @hbus: Root PCI bus, as understood by this driver
1827 *
1828 * This function calls vmbus_allocate_mmio(), which is itself a
1829 * bit of a compromise. Ideally, we might change the pnp layer
1830 * in the kernel such that it comprehends either PCI devices
1831 * which are "grandchildren of ACPI," with some intermediate bus
1832 * node (in this case, VMBus) or change it such that it
1833 * understands VMBus. The pnp layer, however, has been declared
1834 * deprecated, and not subject to change.
1835 *
1836 * The workaround, implemented here, is to ask VMBus to allocate
1837 * MMIO space for this bus. VMBus itself knows which ranges are
1838 * appropriate by looking at its own ACPI objects. Then, after
1839 * these ranges are claimed, they're modified to look like they
1840 * would have looked if the ACPI and pnp code had allocated
1841 * bridge windows. These descriptors have to exist in this form
1842 * in order to satisfy the code which will get invoked when the
1843 * endpoint PCI function driver calls request_mem_region() or
1844 * request_mem_region_exclusive().
1845 *
1846 * Return: 0 on success, -errno on failure
1847 */
1848 static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
1849 {
1850 resource_size_t align;
1851 int ret;
1852
1853 if (hbus->low_mmio_space) {
1854 align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1855 ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
1856 (u64)(u32)0xffffffff,
1857 hbus->low_mmio_space,
1858 align, false);
1859 if (ret) {
1860 dev_err(&hbus->hdev->device,
1861 "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
1862 hbus->low_mmio_space);
1863 return ret;
1864 }
1865
1866 /* Modify this resource to become a bridge window. */
1867 hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
1868 hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
1869 pci_add_resource(&hbus->resources_for_children,
1870 hbus->low_mmio_res);
1871 }
1872
1873 if (hbus->high_mmio_space) {
1874 align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
1875 ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
1876 0x100000000, -1,
1877 hbus->high_mmio_space, align,
1878 false);
1879 if (ret) {
1880 dev_err(&hbus->hdev->device,
1881 "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
1882 hbus->high_mmio_space);
1883 goto release_low_mmio;
1884 }
1885
1886 /* Modify this resource to become a bridge window. */
1887 hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
1888 hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
1889 pci_add_resource(&hbus->resources_for_children,
1890 hbus->high_mmio_res);
1891 }
1892
1893 return 0;
1894
1895 release_low_mmio:
1896 if (hbus->low_mmio_res) {
1897 vmbus_free_mmio(hbus->low_mmio_res->start,
1898 resource_size(hbus->low_mmio_res));
1899 }
1900
1901 return ret;
1902 }
1903
1904 /**
1905 * hv_allocate_config_window() - Find MMIO space for PCI Config
1906 * @hbus: Root PCI bus, as understood by this driver
1907 *
1908 * This function claims memory-mapped I/O space for accessing
1909 * configuration space for the functions on this bus.
1910 *
1911 * Return: 0 on success, -errno on failure
1912 */
1913 static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
1914 {
1915 int ret;
1916
1917 /*
1918 * Set up a region of MMIO space to use for accessing configuration
1919 * space.
1920 */
1921 ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
1922 PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
1923 if (ret)
1924 return ret;
1925
1926 /*
1927 * vmbus_allocate_mmio() gets used for allocating both device endpoint
1928 * resource claims (those which cannot be overlapped) and the ranges
1929 * which are valid for the children of this bus, which are intended
1930 * to be overlapped by those children. Set the flag on this claim
1931 * meaning that this region can't be overlapped.
1932 */
1933
1934 hbus->mem_config->flags |= IORESOURCE_BUSY;
1935
1936 return 0;
1937 }
1938
1939 static void hv_free_config_window(struct hv_pcibus_device *hbus)
1940 {
1941 vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
1942 }
1943
1944 /**
1945 * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
1946 * @hdev: VMBus's tracking struct for this root PCI bus
1947 *
1948 * Return: 0 on success, -errno on failure
1949 */
1950 static int hv_pci_enter_d0(struct hv_device *hdev)
1951 {
1952 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
1953 struct pci_bus_d0_entry *d0_entry;
1954 struct hv_pci_compl comp_pkt;
1955 struct pci_packet *pkt;
1956 int ret;
1957
1958 /*
1959 * Tell the host that the bus is ready to use, and moved into the
1960 * powered-on state. This includes telling the host which region
1961 * of memory-mapped I/O space has been chosen for configuration space
1962 * access.
1963 */
1964 pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
1965 if (!pkt)
1966 return -ENOMEM;
1967
1968 init_completion(&comp_pkt.host_event);
1969 pkt->completion_func = hv_pci_generic_compl;
1970 pkt->compl_ctxt = &comp_pkt;
1971 d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
1972 d0_entry->message_type.message_type = PCI_BUS_D0ENTRY;
1973 d0_entry->mmio_base = hbus->mem_config->start;
1974
1975 ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
1976 (unsigned long)pkt, VM_PKT_DATA_INBAND,
1977 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1978 if (ret)
1979 goto exit;
1980
1981 wait_for_completion(&comp_pkt.host_event);
1982
1983 if (comp_pkt.completion_status < 0) {
1984 dev_err(&hdev->device,
1985 "PCI Pass-through VSP failed D0 Entry with status %x\n",
1986 comp_pkt.completion_status);
1987 ret = -EPROTO;
1988 goto exit;
1989 }
1990
1991 ret = 0;
1992
1993 exit:
1994 kfree(pkt);
1995 return ret;
1996 }
1997
1998 /**
1999 * hv_pci_query_relations() - Ask host to send list of child
2000 * devices
2001 * @hdev: VMBus's tracking struct for this root PCI bus
2002 *
2003 * Return: 0 on success, -errno on failure
2004 */
2005 static int hv_pci_query_relations(struct hv_device *hdev)
2006 {
2007 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2008 struct pci_message message;
2009 struct completion comp;
2010 int ret;
2011
2012 /* Ask the host to send along the list of child devices */
2013 init_completion(&comp);
2014 if (cmpxchg(&hbus->survey_event, NULL, &comp))
2015 return -ENOTEMPTY;
2016
2017 memset(&message, 0, sizeof(message));
2018 message.message_type = PCI_QUERY_BUS_RELATIONS;
2019
2020 ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2021 0, VM_PKT_DATA_INBAND, 0);
2022 if (ret)
2023 return ret;
2024
2025 wait_for_completion(&comp);
2026 return 0;
2027 }
2028
2029 /**
2030 * hv_send_resources_allocated() - Report local resource choices
2031 * @hdev: VMBus's tracking struct for this root PCI bus
2032 *
2033 * The host OS is expecting to be sent a request as a message
2034 * which contains all the resources that the device will use.
2035 * The response contains those same resources, "translated"
2036 * which is to say, the values which should be used by the
2037 * hardware, when it delivers an interrupt. (MMIO resources are
2038 * used in local terms.) This is nice for Windows, and lines up
2039 * with the FDO/PDO split, which doesn't exist in Linux. Linux
2040 * is deeply expecting to scan an emulated PCI configuration
2041 * space. So this message is sent here only to drive the state
2042 * machine on the host forward.
2043 *
2044 * Return: 0 on success, -errno on failure
2045 */
2046 static int hv_send_resources_allocated(struct hv_device *hdev)
2047 {
2048 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2049 struct pci_resources_assigned *res_assigned;
2050 struct hv_pci_compl comp_pkt;
2051 struct hv_pci_dev *hpdev;
2052 struct pci_packet *pkt;
2053 u32 wslot;
2054 int ret;
2055
2056 pkt = kmalloc(sizeof(*pkt) + sizeof(*res_assigned), GFP_KERNEL);
2057 if (!pkt)
2058 return -ENOMEM;
2059
2060 ret = 0;
2061
2062 for (wslot = 0; wslot < 256; wslot++) {
2063 hpdev = get_pcichild_wslot(hbus, wslot);
2064 if (!hpdev)
2065 continue;
2066
2067 memset(pkt, 0, sizeof(*pkt) + sizeof(*res_assigned));
2068 init_completion(&comp_pkt.host_event);
2069 pkt->completion_func = hv_pci_generic_compl;
2070 pkt->compl_ctxt = &comp_pkt;
2071 pkt->message.message_type = PCI_RESOURCES_ASSIGNED;
2072 res_assigned = (struct pci_resources_assigned *)&pkt->message;
2073 res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2074
2075 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
2076
2077 ret = vmbus_sendpacket(
2078 hdev->channel, &pkt->message,
2079 sizeof(*res_assigned),
2080 (unsigned long)pkt,
2081 VM_PKT_DATA_INBAND,
2082 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2083 if (ret)
2084 break;
2085
2086 wait_for_completion(&comp_pkt.host_event);
2087
2088 if (comp_pkt.completion_status < 0) {
2089 ret = -EPROTO;
2090 dev_err(&hdev->device,
2091 "resource allocated returned 0x%x",
2092 comp_pkt.completion_status);
2093 break;
2094 }
2095 }
2096
2097 kfree(pkt);
2098 return ret;
2099 }
2100
2101 /**
2102 * hv_send_resources_released() - Report local resources
2103 * released
2104 * @hdev: VMBus's tracking struct for this root PCI bus
2105 *
2106 * Return: 0 on success, -errno on failure
2107 */
2108 static int hv_send_resources_released(struct hv_device *hdev)
2109 {
2110 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2111 struct pci_child_message pkt;
2112 struct hv_pci_dev *hpdev;
2113 u32 wslot;
2114 int ret;
2115
2116 for (wslot = 0; wslot < 256; wslot++) {
2117 hpdev = get_pcichild_wslot(hbus, wslot);
2118 if (!hpdev)
2119 continue;
2120
2121 memset(&pkt, 0, sizeof(pkt));
2122 pkt.message_type = PCI_RESOURCES_RELEASED;
2123 pkt.wslot.slot = hpdev->desc.win_slot.slot;
2124
2125 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
2126
2127 ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2128 VM_PKT_DATA_INBAND, 0);
2129 if (ret)
2130 return ret;
2131 }
2132
2133 return 0;
2134 }
2135
2136 static void get_hvpcibus(struct hv_pcibus_device *hbus)
2137 {
2138 atomic_inc(&hbus->remove_lock);
2139 }
2140
2141 static void put_hvpcibus(struct hv_pcibus_device *hbus)
2142 {
2143 if (atomic_dec_and_test(&hbus->remove_lock))
2144 complete(&hbus->remove_event);
2145 }
2146
2147 /**
2148 * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
2149 * @hdev: VMBus's tracking struct for this root PCI bus
2150 * @dev_id: Identifies the device itself
2151 *
2152 * Return: 0 on success, -errno on failure
2153 */
2154 static int hv_pci_probe(struct hv_device *hdev,
2155 const struct hv_vmbus_device_id *dev_id)
2156 {
2157 struct hv_pcibus_device *hbus;
2158 int ret;
2159
2160 hbus = kzalloc(sizeof(*hbus), GFP_KERNEL);
2161 if (!hbus)
2162 return -ENOMEM;
2163
2164 /*
2165 * The PCI bus "domain" is what is called "segment" in ACPI and
2166 * other specs. Pull it from the instance ID, to get something
2167 * unique. Bytes 8 and 9 are what is used in Windows guests, so
2168 * do the same thing for consistency. Note that, since this code
2169 * only runs in a Hyper-V VM, Hyper-V can (and does) guarantee
2170 * that (1) the only domain in use for something that looks like
2171 * a physical PCI bus (which is actually emulated by the
2172 * hypervisor) is domain 0 and (2) there will be no overlap
2173 * between domains derived from these instance IDs in the same
2174 * VM.
2175 */
2176 hbus->sysdata.domain = hdev->dev_instance.b[9] |
2177 hdev->dev_instance.b[8] << 8;
2178
2179 hbus->hdev = hdev;
2180 atomic_inc(&hbus->remove_lock);
2181 INIT_LIST_HEAD(&hbus->children);
2182 INIT_LIST_HEAD(&hbus->dr_list);
2183 INIT_LIST_HEAD(&hbus->resources_for_children);
2184 spin_lock_init(&hbus->config_lock);
2185 spin_lock_init(&hbus->device_list_lock);
2186 sema_init(&hbus->enum_sem, 1);
2187 init_completion(&hbus->remove_event);
2188
2189 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
2190 hv_pci_onchannelcallback, hbus);
2191 if (ret)
2192 goto free_bus;
2193
2194 hv_set_drvdata(hdev, hbus);
2195
2196 ret = hv_pci_protocol_negotiation(hdev);
2197 if (ret)
2198 goto close;
2199
2200 ret = hv_allocate_config_window(hbus);
2201 if (ret)
2202 goto close;
2203
2204 hbus->cfg_addr = ioremap(hbus->mem_config->start,
2205 PCI_CONFIG_MMIO_LENGTH);
2206 if (!hbus->cfg_addr) {
2207 dev_err(&hdev->device,
2208 "Unable to map a virtual address for config space\n");
2209 ret = -ENOMEM;
2210 goto free_config;
2211 }
2212
2213 hbus->sysdata.fwnode = irq_domain_alloc_fwnode(hbus);
2214 if (!hbus->sysdata.fwnode) {
2215 ret = -ENOMEM;
2216 goto unmap;
2217 }
2218
2219 ret = hv_pcie_init_irq_domain(hbus);
2220 if (ret)
2221 goto free_fwnode;
2222
2223 ret = hv_pci_query_relations(hdev);
2224 if (ret)
2225 goto free_irq_domain;
2226
2227 ret = hv_pci_enter_d0(hdev);
2228 if (ret)
2229 goto free_irq_domain;
2230
2231 ret = hv_pci_allocate_bridge_windows(hbus);
2232 if (ret)
2233 goto free_irq_domain;
2234
2235 ret = hv_send_resources_allocated(hdev);
2236 if (ret)
2237 goto free_windows;
2238
2239 prepopulate_bars(hbus);
2240
2241 hbus->state = hv_pcibus_probed;
2242
2243 ret = create_root_hv_pci_bus(hbus);
2244 if (ret)
2245 goto free_windows;
2246
2247 return 0;
2248
2249 free_windows:
2250 hv_pci_free_bridge_windows(hbus);
2251 free_irq_domain:
2252 irq_domain_remove(hbus->irq_domain);
2253 free_fwnode:
2254 irq_domain_free_fwnode(hbus->sysdata.fwnode);
2255 unmap:
2256 iounmap(hbus->cfg_addr);
2257 free_config:
2258 hv_free_config_window(hbus);
2259 close:
2260 vmbus_close(hdev->channel);
2261 free_bus:
2262 kfree(hbus);
2263 return ret;
2264 }
2265
2266 /**
2267 * hv_pci_remove() - Remove routine for this VMBus channel
2268 * @hdev: VMBus's tracking struct for this root PCI bus
2269 *
2270 * Return: 0 on success, -errno on failure
2271 */
2272 static int hv_pci_remove(struct hv_device *hdev)
2273 {
2274 int ret;
2275 struct hv_pcibus_device *hbus;
2276 union {
2277 struct pci_packet teardown_packet;
2278 u8 buffer[0x100];
2279 } pkt;
2280 struct pci_bus_relations relations;
2281 struct hv_pci_compl comp_pkt;
2282
2283 hbus = hv_get_drvdata(hdev);
2284
2285 memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
2286 init_completion(&comp_pkt.host_event);
2287 pkt.teardown_packet.completion_func = hv_pci_generic_compl;
2288 pkt.teardown_packet.compl_ctxt = &comp_pkt;
2289 pkt.teardown_packet.message.message_type = PCI_BUS_D0EXIT;
2290
2291 ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
2292 sizeof(struct pci_message),
2293 (unsigned long)&pkt.teardown_packet,
2294 VM_PKT_DATA_INBAND,
2295 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2296 if (!ret)
2297 wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ);
2298
2299 if (hbus->state == hv_pcibus_installed) {
2300 /* Remove the bus from PCI's point of view. */
2301 pci_lock_rescan_remove();
2302 pci_stop_root_bus(hbus->pci_bus);
2303 pci_remove_root_bus(hbus->pci_bus);
2304 pci_unlock_rescan_remove();
2305 }
2306
2307 ret = hv_send_resources_released(hdev);
2308 if (ret)
2309 dev_err(&hdev->device,
2310 "Couldn't send resources released packet(s)\n");
2311
2312 vmbus_close(hdev->channel);
2313
2314 /* Delete any children which might still exist. */
2315 memset(&relations, 0, sizeof(relations));
2316 hv_pci_devices_present(hbus, &relations);
2317
2318 iounmap(hbus->cfg_addr);
2319 hv_free_config_window(hbus);
2320 pci_free_resource_list(&hbus->resources_for_children);
2321 hv_pci_free_bridge_windows(hbus);
2322 irq_domain_remove(hbus->irq_domain);
2323 irq_domain_free_fwnode(hbus->sysdata.fwnode);
2324 put_hvpcibus(hbus);
2325 wait_for_completion(&hbus->remove_event);
2326 kfree(hbus);
2327 return 0;
2328 }
2329
2330 static const struct hv_vmbus_device_id hv_pci_id_table[] = {
2331 /* PCI Pass-through Class ID */
2332 /* 44C4F61D-4444-4400-9D52-802E27EDE19F */
2333 { HV_PCIE_GUID, },
2334 { },
2335 };
2336
2337 MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
2338
2339 static struct hv_driver hv_pci_drv = {
2340 .name = "hv_pci",
2341 .id_table = hv_pci_id_table,
2342 .probe = hv_pci_probe,
2343 .remove = hv_pci_remove,
2344 };
2345
2346 static void __exit exit_hv_pci_drv(void)
2347 {
2348 vmbus_driver_unregister(&hv_pci_drv);
2349 }
2350
2351 static int __init init_hv_pci_drv(void)
2352 {
2353 return vmbus_driver_register(&hv_pci_drv);
2354 }
2355
2356 module_init(init_hv_pci_drv);
2357 module_exit(exit_hv_pci_drv);
2358
2359 MODULE_DESCRIPTION("Hyper-V PCI");
2360 MODULE_LICENSE("GPL v2");
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