PCI: Add pcibios_iov_resource_alignment() interface
[deliverable/linux.git] / drivers / pci / iov.c
1 /*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
8 * Address Translation Service 1.0
9 */
10
11 #include <linux/pci.h>
12 #include <linux/slab.h>
13 #include <linux/mutex.h>
14 #include <linux/export.h>
15 #include <linux/string.h>
16 #include <linux/delay.h>
17 #include <linux/pci-ats.h>
18 #include "pci.h"
19
20 #define VIRTFN_ID_LEN 16
21
22 int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
23 {
24 if (!dev->is_physfn)
25 return -EINVAL;
26 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
27 dev->sriov->stride * vf_id) >> 8);
28 }
29
30 int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
31 {
32 if (!dev->is_physfn)
33 return -EINVAL;
34 return (dev->devfn + dev->sriov->offset +
35 dev->sriov->stride * vf_id) & 0xff;
36 }
37
38 /*
39 * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
40 * change when NumVFs changes.
41 *
42 * Update iov->offset and iov->stride when NumVFs is written.
43 */
44 static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
45 {
46 struct pci_sriov *iov = dev->sriov;
47
48 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
49 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
50 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
51 }
52
53 /*
54 * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
55 * determine how many additional bus numbers will be consumed by VFs.
56 *
57 * Iterate over all valid NumVFs and calculate the maximum number of bus
58 * numbers that could ever be required.
59 */
60 static inline u8 virtfn_max_buses(struct pci_dev *dev)
61 {
62 struct pci_sriov *iov = dev->sriov;
63 int nr_virtfn;
64 u8 max = 0;
65 int busnr;
66
67 for (nr_virtfn = 1; nr_virtfn <= iov->total_VFs; nr_virtfn++) {
68 pci_iov_set_numvfs(dev, nr_virtfn);
69 busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
70 if (busnr > max)
71 max = busnr;
72 }
73
74 return max;
75 }
76
77 static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
78 {
79 struct pci_bus *child;
80
81 if (bus->number == busnr)
82 return bus;
83
84 child = pci_find_bus(pci_domain_nr(bus), busnr);
85 if (child)
86 return child;
87
88 child = pci_add_new_bus(bus, NULL, busnr);
89 if (!child)
90 return NULL;
91
92 pci_bus_insert_busn_res(child, busnr, busnr);
93
94 return child;
95 }
96
97 static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
98 {
99 if (physbus != virtbus && list_empty(&virtbus->devices))
100 pci_remove_bus(virtbus);
101 }
102
103 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
104 {
105 if (!dev->is_physfn)
106 return 0;
107
108 return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
109 }
110
111 static int virtfn_add(struct pci_dev *dev, int id, int reset)
112 {
113 int i;
114 int rc = -ENOMEM;
115 u64 size;
116 char buf[VIRTFN_ID_LEN];
117 struct pci_dev *virtfn;
118 struct resource *res;
119 struct pci_sriov *iov = dev->sriov;
120 struct pci_bus *bus;
121
122 mutex_lock(&iov->dev->sriov->lock);
123 bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
124 if (!bus)
125 goto failed;
126
127 virtfn = pci_alloc_dev(bus);
128 if (!virtfn)
129 goto failed0;
130
131 virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
132 virtfn->vendor = dev->vendor;
133 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
134 pci_setup_device(virtfn);
135 virtfn->dev.parent = dev->dev.parent;
136 virtfn->physfn = pci_dev_get(dev);
137 virtfn->is_virtfn = 1;
138 virtfn->multifunction = 0;
139
140 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
141 res = &dev->resource[i + PCI_IOV_RESOURCES];
142 if (!res->parent)
143 continue;
144 virtfn->resource[i].name = pci_name(virtfn);
145 virtfn->resource[i].flags = res->flags;
146 size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
147 virtfn->resource[i].start = res->start + size * id;
148 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
149 rc = request_resource(res, &virtfn->resource[i]);
150 BUG_ON(rc);
151 }
152
153 if (reset)
154 __pci_reset_function(virtfn);
155
156 pci_device_add(virtfn, virtfn->bus);
157 mutex_unlock(&iov->dev->sriov->lock);
158
159 pci_bus_add_device(virtfn);
160 sprintf(buf, "virtfn%u", id);
161 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
162 if (rc)
163 goto failed1;
164 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
165 if (rc)
166 goto failed2;
167
168 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
169
170 return 0;
171
172 failed2:
173 sysfs_remove_link(&dev->dev.kobj, buf);
174 failed1:
175 pci_dev_put(dev);
176 mutex_lock(&iov->dev->sriov->lock);
177 pci_stop_and_remove_bus_device(virtfn);
178 failed0:
179 virtfn_remove_bus(dev->bus, bus);
180 failed:
181 mutex_unlock(&iov->dev->sriov->lock);
182
183 return rc;
184 }
185
186 static void virtfn_remove(struct pci_dev *dev, int id, int reset)
187 {
188 char buf[VIRTFN_ID_LEN];
189 struct pci_dev *virtfn;
190 struct pci_sriov *iov = dev->sriov;
191
192 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
193 pci_iov_virtfn_bus(dev, id),
194 pci_iov_virtfn_devfn(dev, id));
195 if (!virtfn)
196 return;
197
198 if (reset) {
199 device_release_driver(&virtfn->dev);
200 __pci_reset_function(virtfn);
201 }
202
203 sprintf(buf, "virtfn%u", id);
204 sysfs_remove_link(&dev->dev.kobj, buf);
205 /*
206 * pci_stop_dev() could have been called for this virtfn already,
207 * so the directory for the virtfn may have been removed before.
208 * Double check to avoid spurious sysfs warnings.
209 */
210 if (virtfn->dev.kobj.sd)
211 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
212
213 mutex_lock(&iov->dev->sriov->lock);
214 pci_stop_and_remove_bus_device(virtfn);
215 virtfn_remove_bus(dev->bus, virtfn->bus);
216 mutex_unlock(&iov->dev->sriov->lock);
217
218 /* balance pci_get_domain_bus_and_slot() */
219 pci_dev_put(virtfn);
220 pci_dev_put(dev);
221 }
222
223 int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
224 {
225 return 0;
226 }
227
228 static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
229 {
230 int rc;
231 int i, j;
232 int nres;
233 u16 offset, stride, initial;
234 struct resource *res;
235 struct pci_dev *pdev;
236 struct pci_sriov *iov = dev->sriov;
237 int bars = 0;
238 int bus;
239 int retval;
240
241 if (!nr_virtfn)
242 return 0;
243
244 if (iov->num_VFs)
245 return -EINVAL;
246
247 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
248 if (initial > iov->total_VFs ||
249 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
250 return -EIO;
251
252 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
253 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
254 return -EINVAL;
255
256 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
257 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
258 if (!offset || (nr_virtfn > 1 && !stride))
259 return -EIO;
260
261 nres = 0;
262 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
263 bars |= (1 << (i + PCI_IOV_RESOURCES));
264 res = &dev->resource[i + PCI_IOV_RESOURCES];
265 if (res->parent)
266 nres++;
267 }
268 if (nres != iov->nres) {
269 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
270 return -ENOMEM;
271 }
272
273 iov->offset = offset;
274 iov->stride = stride;
275
276 bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
277 if (bus > dev->bus->busn_res.end) {
278 dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
279 nr_virtfn, bus, &dev->bus->busn_res);
280 return -ENOMEM;
281 }
282
283 if (pci_enable_resources(dev, bars)) {
284 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
285 return -ENOMEM;
286 }
287
288 if (iov->link != dev->devfn) {
289 pdev = pci_get_slot(dev->bus, iov->link);
290 if (!pdev)
291 return -ENODEV;
292
293 if (!pdev->is_physfn) {
294 pci_dev_put(pdev);
295 return -ENOSYS;
296 }
297
298 rc = sysfs_create_link(&dev->dev.kobj,
299 &pdev->dev.kobj, "dep_link");
300 pci_dev_put(pdev);
301 if (rc)
302 return rc;
303 }
304
305 pci_iov_set_numvfs(dev, nr_virtfn);
306 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
307 pci_cfg_access_lock(dev);
308 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
309 msleep(100);
310 pci_cfg_access_unlock(dev);
311
312 iov->initial_VFs = initial;
313 if (nr_virtfn < initial)
314 initial = nr_virtfn;
315
316 if ((retval = pcibios_sriov_enable(dev, initial))) {
317 dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n",
318 retval);
319 return retval;
320 }
321
322 for (i = 0; i < initial; i++) {
323 rc = virtfn_add(dev, i, 0);
324 if (rc)
325 goto failed;
326 }
327
328 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
329 iov->num_VFs = nr_virtfn;
330
331 return 0;
332
333 failed:
334 for (j = 0; j < i; j++)
335 virtfn_remove(dev, j, 0);
336
337 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
338 pci_cfg_access_lock(dev);
339 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
340 pci_iov_set_numvfs(dev, 0);
341 ssleep(1);
342 pci_cfg_access_unlock(dev);
343
344 if (iov->link != dev->devfn)
345 sysfs_remove_link(&dev->dev.kobj, "dep_link");
346
347 return rc;
348 }
349
350 int __weak pcibios_sriov_disable(struct pci_dev *pdev)
351 {
352 return 0;
353 }
354
355 static void sriov_disable(struct pci_dev *dev)
356 {
357 int i;
358 struct pci_sriov *iov = dev->sriov;
359
360 if (!iov->num_VFs)
361 return;
362
363 for (i = 0; i < iov->num_VFs; i++)
364 virtfn_remove(dev, i, 0);
365
366 pcibios_sriov_disable(dev);
367
368 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
369 pci_cfg_access_lock(dev);
370 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
371 ssleep(1);
372 pci_cfg_access_unlock(dev);
373
374 if (iov->link != dev->devfn)
375 sysfs_remove_link(&dev->dev.kobj, "dep_link");
376
377 iov->num_VFs = 0;
378 pci_iov_set_numvfs(dev, 0);
379 }
380
381 static int sriov_init(struct pci_dev *dev, int pos)
382 {
383 int i, bar64;
384 int rc;
385 int nres;
386 u32 pgsz;
387 u16 ctrl, total, offset, stride;
388 struct pci_sriov *iov;
389 struct resource *res;
390 struct pci_dev *pdev;
391
392 if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
393 pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
394 return -ENODEV;
395
396 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
397 if (ctrl & PCI_SRIOV_CTRL_VFE) {
398 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
399 ssleep(1);
400 }
401
402 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
403 if (!total)
404 return 0;
405
406 ctrl = 0;
407 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
408 if (pdev->is_physfn)
409 goto found;
410
411 pdev = NULL;
412 if (pci_ari_enabled(dev->bus))
413 ctrl |= PCI_SRIOV_CTRL_ARI;
414
415 found:
416 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
417 pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0);
418 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
419 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
420 if (!offset || (total > 1 && !stride))
421 return -EIO;
422
423 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
424 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
425 pgsz &= ~((1 << i) - 1);
426 if (!pgsz)
427 return -EIO;
428
429 pgsz &= ~(pgsz - 1);
430 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
431
432 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
433 if (!iov)
434 return -ENOMEM;
435
436 nres = 0;
437 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
438 res = &dev->resource[i + PCI_IOV_RESOURCES];
439 bar64 = __pci_read_base(dev, pci_bar_unknown, res,
440 pos + PCI_SRIOV_BAR + i * 4);
441 if (!res->flags)
442 continue;
443 if (resource_size(res) & (PAGE_SIZE - 1)) {
444 rc = -EIO;
445 goto failed;
446 }
447 iov->barsz[i] = resource_size(res);
448 res->end = res->start + resource_size(res) * total - 1;
449 dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
450 i, res, i, total);
451 i += bar64;
452 nres++;
453 }
454
455 iov->pos = pos;
456 iov->nres = nres;
457 iov->ctrl = ctrl;
458 iov->total_VFs = total;
459 iov->offset = offset;
460 iov->stride = stride;
461 iov->pgsz = pgsz;
462 iov->self = dev;
463 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
464 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
465 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
466 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
467
468 if (pdev)
469 iov->dev = pci_dev_get(pdev);
470 else
471 iov->dev = dev;
472
473 mutex_init(&iov->lock);
474
475 dev->sriov = iov;
476 dev->is_physfn = 1;
477 iov->max_VF_buses = virtfn_max_buses(dev);
478
479 return 0;
480
481 failed:
482 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
483 res = &dev->resource[i + PCI_IOV_RESOURCES];
484 res->flags = 0;
485 }
486
487 kfree(iov);
488 return rc;
489 }
490
491 static void sriov_release(struct pci_dev *dev)
492 {
493 BUG_ON(dev->sriov->num_VFs);
494
495 if (dev != dev->sriov->dev)
496 pci_dev_put(dev->sriov->dev);
497
498 mutex_destroy(&dev->sriov->lock);
499
500 kfree(dev->sriov);
501 dev->sriov = NULL;
502 }
503
504 static void sriov_restore_state(struct pci_dev *dev)
505 {
506 int i;
507 u16 ctrl;
508 struct pci_sriov *iov = dev->sriov;
509
510 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
511 if (ctrl & PCI_SRIOV_CTRL_VFE)
512 return;
513
514 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
515 pci_update_resource(dev, i);
516
517 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
518 pci_iov_set_numvfs(dev, iov->num_VFs);
519 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
520 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
521 msleep(100);
522 }
523
524 /**
525 * pci_iov_init - initialize the IOV capability
526 * @dev: the PCI device
527 *
528 * Returns 0 on success, or negative on failure.
529 */
530 int pci_iov_init(struct pci_dev *dev)
531 {
532 int pos;
533
534 if (!pci_is_pcie(dev))
535 return -ENODEV;
536
537 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
538 if (pos)
539 return sriov_init(dev, pos);
540
541 return -ENODEV;
542 }
543
544 /**
545 * pci_iov_release - release resources used by the IOV capability
546 * @dev: the PCI device
547 */
548 void pci_iov_release(struct pci_dev *dev)
549 {
550 if (dev->is_physfn)
551 sriov_release(dev);
552 }
553
554 /**
555 * pci_iov_resource_bar - get position of the SR-IOV BAR
556 * @dev: the PCI device
557 * @resno: the resource number
558 *
559 * Returns position of the BAR encapsulated in the SR-IOV capability.
560 */
561 int pci_iov_resource_bar(struct pci_dev *dev, int resno)
562 {
563 if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
564 return 0;
565
566 BUG_ON(!dev->is_physfn);
567
568 return dev->sriov->pos + PCI_SRIOV_BAR +
569 4 * (resno - PCI_IOV_RESOURCES);
570 }
571
572 resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
573 int resno)
574 {
575 return pci_iov_resource_size(dev, resno);
576 }
577
578 /**
579 * pci_sriov_resource_alignment - get resource alignment for VF BAR
580 * @dev: the PCI device
581 * @resno: the resource number
582 *
583 * Returns the alignment of the VF BAR found in the SR-IOV capability.
584 * This is not the same as the resource size which is defined as
585 * the VF BAR size multiplied by the number of VFs. The alignment
586 * is just the VF BAR size.
587 */
588 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
589 {
590 return pcibios_iov_resource_alignment(dev, resno);
591 }
592
593 /**
594 * pci_restore_iov_state - restore the state of the IOV capability
595 * @dev: the PCI device
596 */
597 void pci_restore_iov_state(struct pci_dev *dev)
598 {
599 if (dev->is_physfn)
600 sriov_restore_state(dev);
601 }
602
603 /**
604 * pci_iov_bus_range - find bus range used by Virtual Function
605 * @bus: the PCI bus
606 *
607 * Returns max number of buses (exclude current one) used by Virtual
608 * Functions.
609 */
610 int pci_iov_bus_range(struct pci_bus *bus)
611 {
612 int max = 0;
613 struct pci_dev *dev;
614
615 list_for_each_entry(dev, &bus->devices, bus_list) {
616 if (!dev->is_physfn)
617 continue;
618 if (dev->sriov->max_VF_buses > max)
619 max = dev->sriov->max_VF_buses;
620 }
621
622 return max ? max - bus->number : 0;
623 }
624
625 /**
626 * pci_enable_sriov - enable the SR-IOV capability
627 * @dev: the PCI device
628 * @nr_virtfn: number of virtual functions to enable
629 *
630 * Returns 0 on success, or negative on failure.
631 */
632 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
633 {
634 might_sleep();
635
636 if (!dev->is_physfn)
637 return -ENOSYS;
638
639 return sriov_enable(dev, nr_virtfn);
640 }
641 EXPORT_SYMBOL_GPL(pci_enable_sriov);
642
643 /**
644 * pci_disable_sriov - disable the SR-IOV capability
645 * @dev: the PCI device
646 */
647 void pci_disable_sriov(struct pci_dev *dev)
648 {
649 might_sleep();
650
651 if (!dev->is_physfn)
652 return;
653
654 sriov_disable(dev);
655 }
656 EXPORT_SYMBOL_GPL(pci_disable_sriov);
657
658 /**
659 * pci_num_vf - return number of VFs associated with a PF device_release_driver
660 * @dev: the PCI device
661 *
662 * Returns number of VFs, or 0 if SR-IOV is not enabled.
663 */
664 int pci_num_vf(struct pci_dev *dev)
665 {
666 if (!dev->is_physfn)
667 return 0;
668
669 return dev->sriov->num_VFs;
670 }
671 EXPORT_SYMBOL_GPL(pci_num_vf);
672
673 /**
674 * pci_vfs_assigned - returns number of VFs are assigned to a guest
675 * @dev: the PCI device
676 *
677 * Returns number of VFs belonging to this device that are assigned to a guest.
678 * If device is not a physical function returns 0.
679 */
680 int pci_vfs_assigned(struct pci_dev *dev)
681 {
682 struct pci_dev *vfdev;
683 unsigned int vfs_assigned = 0;
684 unsigned short dev_id;
685
686 /* only search if we are a PF */
687 if (!dev->is_physfn)
688 return 0;
689
690 /*
691 * determine the device ID for the VFs, the vendor ID will be the
692 * same as the PF so there is no need to check for that one
693 */
694 pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
695
696 /* loop through all the VFs to see if we own any that are assigned */
697 vfdev = pci_get_device(dev->vendor, dev_id, NULL);
698 while (vfdev) {
699 /*
700 * It is considered assigned if it is a virtual function with
701 * our dev as the physical function and the assigned bit is set
702 */
703 if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
704 pci_is_dev_assigned(vfdev))
705 vfs_assigned++;
706
707 vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
708 }
709
710 return vfs_assigned;
711 }
712 EXPORT_SYMBOL_GPL(pci_vfs_assigned);
713
714 /**
715 * pci_sriov_set_totalvfs -- reduce the TotalVFs available
716 * @dev: the PCI PF device
717 * @numvfs: number that should be used for TotalVFs supported
718 *
719 * Should be called from PF driver's probe routine with
720 * device's mutex held.
721 *
722 * Returns 0 if PF is an SRIOV-capable device and
723 * value of numvfs valid. If not a PF return -ENOSYS;
724 * if numvfs is invalid return -EINVAL;
725 * if VFs already enabled, return -EBUSY.
726 */
727 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
728 {
729 if (!dev->is_physfn)
730 return -ENOSYS;
731 if (numvfs > dev->sriov->total_VFs)
732 return -EINVAL;
733
734 /* Shouldn't change if VFs already enabled */
735 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
736 return -EBUSY;
737 else
738 dev->sriov->driver_max_VFs = numvfs;
739
740 return 0;
741 }
742 EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
743
744 /**
745 * pci_sriov_get_totalvfs -- get total VFs supported on this device
746 * @dev: the PCI PF device
747 *
748 * For a PCIe device with SRIOV support, return the PCIe
749 * SRIOV capability value of TotalVFs or the value of driver_max_VFs
750 * if the driver reduced it. Otherwise 0.
751 */
752 int pci_sriov_get_totalvfs(struct pci_dev *dev)
753 {
754 if (!dev->is_physfn)
755 return 0;
756
757 if (dev->sriov->driver_max_VFs)
758 return dev->sriov->driver_max_VFs;
759
760 return dev->sriov->total_VFs;
761 }
762 EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
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