3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
11 #include <linux/irq.h>
12 #include <linux/interrupt.h>
13 #include <linux/export.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/proc_fs.h>
17 #include <linux/msi.h>
18 #include <linux/smp.h>
19 #include <linux/errno.h>
21 #include <linux/slab.h>
25 static int pci_msi_enable
= 1;
27 #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
32 int __weak
arch_setup_msi_irq(struct pci_dev
*dev
, struct msi_desc
*desc
)
34 struct msi_chip
*chip
= dev
->bus
->msi
;
37 if (!chip
|| !chip
->setup_irq
)
40 err
= chip
->setup_irq(chip
, dev
, desc
);
44 irq_set_chip_data(desc
->irq
, chip
);
49 void __weak
arch_teardown_msi_irq(unsigned int irq
)
51 struct msi_chip
*chip
= irq_get_chip_data(irq
);
53 if (!chip
|| !chip
->teardown_irq
)
56 chip
->teardown_irq(chip
, irq
);
59 int __weak
arch_msi_check_device(struct pci_dev
*dev
, int nvec
, int type
)
61 struct msi_chip
*chip
= dev
->bus
->msi
;
63 if (!chip
|| !chip
->check_device
)
66 return chip
->check_device(chip
, dev
, nvec
, type
);
69 int __weak
arch_setup_msi_irqs(struct pci_dev
*dev
, int nvec
, int type
)
71 struct msi_desc
*entry
;
75 * If an architecture wants to support multiple MSI, it needs to
76 * override arch_setup_msi_irqs()
78 if (type
== PCI_CAP_ID_MSI
&& nvec
> 1)
81 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
82 ret
= arch_setup_msi_irq(dev
, entry
);
93 * We have a default implementation available as a separate non-weak
94 * function, as it is used by the Xen x86 PCI code
96 void default_teardown_msi_irqs(struct pci_dev
*dev
)
98 struct msi_desc
*entry
;
100 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
104 if (entry
->nvec_used
)
105 nvec
= entry
->nvec_used
;
107 nvec
= 1 << entry
->msi_attrib
.multiple
;
108 for (i
= 0; i
< nvec
; i
++)
109 arch_teardown_msi_irq(entry
->irq
+ i
);
113 void __weak
arch_teardown_msi_irqs(struct pci_dev
*dev
)
115 return default_teardown_msi_irqs(dev
);
118 static void default_restore_msi_irq(struct pci_dev
*dev
, int irq
)
120 struct msi_desc
*entry
;
123 if (dev
->msix_enabled
) {
124 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
125 if (irq
== entry
->irq
)
128 } else if (dev
->msi_enabled
) {
129 entry
= irq_get_msi_desc(irq
);
133 write_msi_msg(irq
, &entry
->msg
);
136 void __weak
arch_restore_msi_irqs(struct pci_dev
*dev
)
138 return default_restore_msi_irqs(dev
);
141 static void msi_set_enable(struct pci_dev
*dev
, int enable
)
145 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &control
);
146 control
&= ~PCI_MSI_FLAGS_ENABLE
;
148 control
|= PCI_MSI_FLAGS_ENABLE
;
149 pci_write_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, control
);
152 static void msix_clear_and_set_ctrl(struct pci_dev
*dev
, u16 clear
, u16 set
)
156 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &ctrl
);
159 pci_write_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, ctrl
);
162 static inline __attribute_const__ u32
msi_mask(unsigned x
)
164 /* Don't shift by >= width of type */
167 return (1 << (1 << x
)) - 1;
171 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
172 * mask all MSI interrupts by clearing the MSI enable bit does not work
173 * reliably as devices without an INTx disable bit will then generate a
174 * level IRQ which will never be cleared.
176 u32
default_msi_mask_irq(struct msi_desc
*desc
, u32 mask
, u32 flag
)
178 u32 mask_bits
= desc
->masked
;
180 if (!desc
->msi_attrib
.maskbit
)
185 pci_write_config_dword(desc
->dev
, desc
->mask_pos
, mask_bits
);
190 __weak u32
arch_msi_mask_irq(struct msi_desc
*desc
, u32 mask
, u32 flag
)
192 return default_msi_mask_irq(desc
, mask
, flag
);
195 static void msi_mask_irq(struct msi_desc
*desc
, u32 mask
, u32 flag
)
197 desc
->masked
= arch_msi_mask_irq(desc
, mask
, flag
);
201 * This internal function does not flush PCI writes to the device.
202 * All users must ensure that they read from the device before either
203 * assuming that the device state is up to date, or returning out of this
204 * file. This saves a few milliseconds when initialising devices with lots
205 * of MSI-X interrupts.
207 u32
default_msix_mask_irq(struct msi_desc
*desc
, u32 flag
)
209 u32 mask_bits
= desc
->masked
;
210 unsigned offset
= desc
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
211 PCI_MSIX_ENTRY_VECTOR_CTRL
;
212 mask_bits
&= ~PCI_MSIX_ENTRY_CTRL_MASKBIT
;
214 mask_bits
|= PCI_MSIX_ENTRY_CTRL_MASKBIT
;
215 writel(mask_bits
, desc
->mask_base
+ offset
);
220 __weak u32
arch_msix_mask_irq(struct msi_desc
*desc
, u32 flag
)
222 return default_msix_mask_irq(desc
, flag
);
225 static void msix_mask_irq(struct msi_desc
*desc
, u32 flag
)
227 desc
->masked
= arch_msix_mask_irq(desc
, flag
);
230 static void msi_set_mask_bit(struct irq_data
*data
, u32 flag
)
232 struct msi_desc
*desc
= irq_data_get_msi(data
);
234 if (desc
->msi_attrib
.is_msix
) {
235 msix_mask_irq(desc
, flag
);
236 readl(desc
->mask_base
); /* Flush write to device */
238 unsigned offset
= data
->irq
- desc
->dev
->irq
;
239 msi_mask_irq(desc
, 1 << offset
, flag
<< offset
);
243 void mask_msi_irq(struct irq_data
*data
)
245 msi_set_mask_bit(data
, 1);
248 void unmask_msi_irq(struct irq_data
*data
)
250 msi_set_mask_bit(data
, 0);
253 void default_restore_msi_irqs(struct pci_dev
*dev
)
255 struct msi_desc
*entry
;
257 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
258 default_restore_msi_irq(dev
, entry
->irq
);
262 void __read_msi_msg(struct msi_desc
*entry
, struct msi_msg
*msg
)
264 BUG_ON(entry
->dev
->current_state
!= PCI_D0
);
266 if (entry
->msi_attrib
.is_msix
) {
267 void __iomem
*base
= entry
->mask_base
+
268 entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
;
270 msg
->address_lo
= readl(base
+ PCI_MSIX_ENTRY_LOWER_ADDR
);
271 msg
->address_hi
= readl(base
+ PCI_MSIX_ENTRY_UPPER_ADDR
);
272 msg
->data
= readl(base
+ PCI_MSIX_ENTRY_DATA
);
274 struct pci_dev
*dev
= entry
->dev
;
275 int pos
= dev
->msi_cap
;
278 pci_read_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_LO
,
280 if (entry
->msi_attrib
.is_64
) {
281 pci_read_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_HI
,
283 pci_read_config_word(dev
, pos
+ PCI_MSI_DATA_64
, &data
);
286 pci_read_config_word(dev
, pos
+ PCI_MSI_DATA_32
, &data
);
292 void read_msi_msg(unsigned int irq
, struct msi_msg
*msg
)
294 struct msi_desc
*entry
= irq_get_msi_desc(irq
);
296 __read_msi_msg(entry
, msg
);
299 void __get_cached_msi_msg(struct msi_desc
*entry
, struct msi_msg
*msg
)
301 /* Assert that the cache is valid, assuming that
302 * valid messages are not all-zeroes. */
303 BUG_ON(!(entry
->msg
.address_hi
| entry
->msg
.address_lo
|
309 void get_cached_msi_msg(unsigned int irq
, struct msi_msg
*msg
)
311 struct msi_desc
*entry
= irq_get_msi_desc(irq
);
313 __get_cached_msi_msg(entry
, msg
);
316 void __write_msi_msg(struct msi_desc
*entry
, struct msi_msg
*msg
)
318 if (entry
->dev
->current_state
!= PCI_D0
) {
319 /* Don't touch the hardware now */
320 } else if (entry
->msi_attrib
.is_msix
) {
322 base
= entry
->mask_base
+
323 entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
;
325 writel(msg
->address_lo
, base
+ PCI_MSIX_ENTRY_LOWER_ADDR
);
326 writel(msg
->address_hi
, base
+ PCI_MSIX_ENTRY_UPPER_ADDR
);
327 writel(msg
->data
, base
+ PCI_MSIX_ENTRY_DATA
);
329 struct pci_dev
*dev
= entry
->dev
;
330 int pos
= dev
->msi_cap
;
333 pci_read_config_word(dev
, pos
+ PCI_MSI_FLAGS
, &msgctl
);
334 msgctl
&= ~PCI_MSI_FLAGS_QSIZE
;
335 msgctl
|= entry
->msi_attrib
.multiple
<< 4;
336 pci_write_config_word(dev
, pos
+ PCI_MSI_FLAGS
, msgctl
);
338 pci_write_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_LO
,
340 if (entry
->msi_attrib
.is_64
) {
341 pci_write_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_HI
,
343 pci_write_config_word(dev
, pos
+ PCI_MSI_DATA_64
,
346 pci_write_config_word(dev
, pos
+ PCI_MSI_DATA_32
,
353 void write_msi_msg(unsigned int irq
, struct msi_msg
*msg
)
355 struct msi_desc
*entry
= irq_get_msi_desc(irq
);
357 __write_msi_msg(entry
, msg
);
360 static void free_msi_irqs(struct pci_dev
*dev
)
362 struct msi_desc
*entry
, *tmp
;
363 struct attribute
**msi_attrs
;
364 struct device_attribute
*dev_attr
;
367 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
371 if (entry
->nvec_used
)
372 nvec
= entry
->nvec_used
;
374 nvec
= 1 << entry
->msi_attrib
.multiple
;
375 for (i
= 0; i
< nvec
; i
++)
376 BUG_ON(irq_has_action(entry
->irq
+ i
));
379 arch_teardown_msi_irqs(dev
);
381 list_for_each_entry_safe(entry
, tmp
, &dev
->msi_list
, list
) {
382 if (entry
->msi_attrib
.is_msix
) {
383 if (list_is_last(&entry
->list
, &dev
->msi_list
))
384 iounmap(entry
->mask_base
);
388 * Its possible that we get into this path
389 * When populate_msi_sysfs fails, which means the entries
390 * were not registered with sysfs. In that case don't
393 if (entry
->kobj
.parent
) {
394 kobject_del(&entry
->kobj
);
395 kobject_put(&entry
->kobj
);
398 list_del(&entry
->list
);
402 if (dev
->msi_irq_groups
) {
403 sysfs_remove_groups(&dev
->dev
.kobj
, dev
->msi_irq_groups
);
404 msi_attrs
= dev
->msi_irq_groups
[0]->attrs
;
405 while (msi_attrs
[count
]) {
406 dev_attr
= container_of(msi_attrs
[count
],
407 struct device_attribute
, attr
);
408 kfree(dev_attr
->attr
.name
);
413 kfree(dev
->msi_irq_groups
[0]);
414 kfree(dev
->msi_irq_groups
);
415 dev
->msi_irq_groups
= NULL
;
419 static struct msi_desc
*alloc_msi_entry(struct pci_dev
*dev
)
421 struct msi_desc
*desc
= kzalloc(sizeof(*desc
), GFP_KERNEL
);
425 INIT_LIST_HEAD(&desc
->list
);
431 static void pci_intx_for_msi(struct pci_dev
*dev
, int enable
)
433 if (!(dev
->dev_flags
& PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG
))
434 pci_intx(dev
, enable
);
437 static void __pci_restore_msi_state(struct pci_dev
*dev
)
440 struct msi_desc
*entry
;
442 if (!dev
->msi_enabled
)
445 entry
= irq_get_msi_desc(dev
->irq
);
447 pci_intx_for_msi(dev
, 0);
448 msi_set_enable(dev
, 0);
449 arch_restore_msi_irqs(dev
);
451 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &control
);
452 msi_mask_irq(entry
, msi_mask(entry
->msi_attrib
.multi_cap
),
454 control
&= ~PCI_MSI_FLAGS_QSIZE
;
455 control
|= (entry
->msi_attrib
.multiple
<< 4) | PCI_MSI_FLAGS_ENABLE
;
456 pci_write_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, control
);
459 static void __pci_restore_msix_state(struct pci_dev
*dev
)
461 struct msi_desc
*entry
;
463 if (!dev
->msix_enabled
)
465 BUG_ON(list_empty(&dev
->msi_list
));
466 entry
= list_first_entry(&dev
->msi_list
, struct msi_desc
, list
);
468 /* route the table */
469 pci_intx_for_msi(dev
, 0);
470 msix_clear_and_set_ctrl(dev
, 0,
471 PCI_MSIX_FLAGS_ENABLE
| PCI_MSIX_FLAGS_MASKALL
);
473 arch_restore_msi_irqs(dev
);
474 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
475 msix_mask_irq(entry
, entry
->masked
);
478 msix_clear_and_set_ctrl(dev
, PCI_MSIX_FLAGS_MASKALL
, 0);
481 void pci_restore_msi_state(struct pci_dev
*dev
)
483 __pci_restore_msi_state(dev
);
484 __pci_restore_msix_state(dev
);
486 EXPORT_SYMBOL_GPL(pci_restore_msi_state
);
488 static ssize_t
msi_mode_show(struct device
*dev
, struct device_attribute
*attr
,
491 struct pci_dev
*pdev
= to_pci_dev(dev
);
492 struct msi_desc
*entry
;
496 retval
= kstrtoul(attr
->attr
.name
, 10, &irq
);
500 list_for_each_entry(entry
, &pdev
->msi_list
, list
) {
501 if (entry
->irq
== irq
) {
502 return sprintf(buf
, "%s\n",
503 entry
->msi_attrib
.is_msix
? "msix" : "msi");
509 static int populate_msi_sysfs(struct pci_dev
*pdev
)
511 struct attribute
**msi_attrs
;
512 struct attribute
*msi_attr
;
513 struct device_attribute
*msi_dev_attr
;
514 struct attribute_group
*msi_irq_group
;
515 const struct attribute_group
**msi_irq_groups
;
516 struct msi_desc
*entry
;
521 /* Determine how many msi entries we have */
522 list_for_each_entry(entry
, &pdev
->msi_list
, list
) {
528 /* Dynamically create the MSI attributes for the PCI device */
529 msi_attrs
= kzalloc(sizeof(void *) * (num_msi
+ 1), GFP_KERNEL
);
532 list_for_each_entry(entry
, &pdev
->msi_list
, list
) {
533 msi_dev_attr
= kzalloc(sizeof(*msi_dev_attr
), GFP_KERNEL
);
536 msi_attrs
[count
] = &msi_dev_attr
->attr
;
538 sysfs_attr_init(&msi_dev_attr
->attr
);
539 msi_dev_attr
->attr
.name
= kasprintf(GFP_KERNEL
, "%d",
541 if (!msi_dev_attr
->attr
.name
)
543 msi_dev_attr
->attr
.mode
= S_IRUGO
;
544 msi_dev_attr
->show
= msi_mode_show
;
548 msi_irq_group
= kzalloc(sizeof(*msi_irq_group
), GFP_KERNEL
);
551 msi_irq_group
->name
= "msi_irqs";
552 msi_irq_group
->attrs
= msi_attrs
;
554 msi_irq_groups
= kzalloc(sizeof(void *) * 2, GFP_KERNEL
);
556 goto error_irq_group
;
557 msi_irq_groups
[0] = msi_irq_group
;
559 ret
= sysfs_create_groups(&pdev
->dev
.kobj
, msi_irq_groups
);
561 goto error_irq_groups
;
562 pdev
->msi_irq_groups
= msi_irq_groups
;
567 kfree(msi_irq_groups
);
569 kfree(msi_irq_group
);
572 msi_attr
= msi_attrs
[count
];
574 msi_dev_attr
= container_of(msi_attr
, struct device_attribute
, attr
);
575 kfree(msi_attr
->name
);
578 msi_attr
= msi_attrs
[count
];
584 static struct msi_desc
*msi_setup_entry(struct pci_dev
*dev
)
587 struct msi_desc
*entry
;
589 /* MSI Entry Initialization */
590 entry
= alloc_msi_entry(dev
);
594 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &control
);
596 entry
->msi_attrib
.is_msix
= 0;
597 entry
->msi_attrib
.is_64
= !!(control
& PCI_MSI_FLAGS_64BIT
);
598 entry
->msi_attrib
.entry_nr
= 0;
599 entry
->msi_attrib
.maskbit
= !!(control
& PCI_MSI_FLAGS_MASKBIT
);
600 entry
->msi_attrib
.default_irq
= dev
->irq
; /* Save IOAPIC IRQ */
601 entry
->msi_attrib
.pos
= dev
->msi_cap
;
602 entry
->msi_attrib
.multi_cap
= (control
& PCI_MSI_FLAGS_QMASK
) >> 1;
604 if (control
& PCI_MSI_FLAGS_64BIT
)
605 entry
->mask_pos
= dev
->msi_cap
+ PCI_MSI_MASK_64
;
607 entry
->mask_pos
= dev
->msi_cap
+ PCI_MSI_MASK_32
;
609 /* Save the initial mask status */
610 if (entry
->msi_attrib
.maskbit
)
611 pci_read_config_dword(dev
, entry
->mask_pos
, &entry
->masked
);
617 * msi_capability_init - configure device's MSI capability structure
618 * @dev: pointer to the pci_dev data structure of MSI device function
619 * @nvec: number of interrupts to allocate
621 * Setup the MSI capability structure of the device with the requested
622 * number of interrupts. A return value of zero indicates the successful
623 * setup of an entry with the new MSI irq. A negative return value indicates
624 * an error, and a positive return value indicates the number of interrupts
625 * which could have been allocated.
627 static int msi_capability_init(struct pci_dev
*dev
, int nvec
)
629 struct msi_desc
*entry
;
633 msi_set_enable(dev
, 0); /* Disable MSI during set up */
635 entry
= msi_setup_entry(dev
);
639 /* All MSIs are unmasked by default, Mask them all */
640 mask
= msi_mask(entry
->msi_attrib
.multi_cap
);
641 msi_mask_irq(entry
, mask
, mask
);
643 list_add_tail(&entry
->list
, &dev
->msi_list
);
645 /* Configure MSI capability structure */
646 ret
= arch_setup_msi_irqs(dev
, nvec
, PCI_CAP_ID_MSI
);
648 msi_mask_irq(entry
, mask
, ~mask
);
653 ret
= populate_msi_sysfs(dev
);
655 msi_mask_irq(entry
, mask
, ~mask
);
660 /* Set MSI enabled bits */
661 pci_intx_for_msi(dev
, 0);
662 msi_set_enable(dev
, 1);
663 dev
->msi_enabled
= 1;
665 dev
->irq
= entry
->irq
;
669 static void __iomem
*msix_map_region(struct pci_dev
*dev
, unsigned nr_entries
)
671 resource_size_t phys_addr
;
675 pci_read_config_dword(dev
, dev
->msix_cap
+ PCI_MSIX_TABLE
,
677 bir
= (u8
)(table_offset
& PCI_MSIX_TABLE_BIR
);
678 table_offset
&= PCI_MSIX_TABLE_OFFSET
;
679 phys_addr
= pci_resource_start(dev
, bir
) + table_offset
;
681 return ioremap_nocache(phys_addr
, nr_entries
* PCI_MSIX_ENTRY_SIZE
);
684 static int msix_setup_entries(struct pci_dev
*dev
, void __iomem
*base
,
685 struct msix_entry
*entries
, int nvec
)
687 struct msi_desc
*entry
;
690 for (i
= 0; i
< nvec
; i
++) {
691 entry
= alloc_msi_entry(dev
);
697 /* No enough memory. Don't try again */
701 entry
->msi_attrib
.is_msix
= 1;
702 entry
->msi_attrib
.is_64
= 1;
703 entry
->msi_attrib
.entry_nr
= entries
[i
].entry
;
704 entry
->msi_attrib
.default_irq
= dev
->irq
;
705 entry
->msi_attrib
.pos
= dev
->msix_cap
;
706 entry
->mask_base
= base
;
708 list_add_tail(&entry
->list
, &dev
->msi_list
);
714 static void msix_program_entries(struct pci_dev
*dev
,
715 struct msix_entry
*entries
)
717 struct msi_desc
*entry
;
720 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
721 int offset
= entries
[i
].entry
* PCI_MSIX_ENTRY_SIZE
+
722 PCI_MSIX_ENTRY_VECTOR_CTRL
;
724 entries
[i
].vector
= entry
->irq
;
725 irq_set_msi_desc(entry
->irq
, entry
);
726 entry
->masked
= readl(entry
->mask_base
+ offset
);
727 msix_mask_irq(entry
, 1);
733 * msix_capability_init - configure device's MSI-X capability
734 * @dev: pointer to the pci_dev data structure of MSI-X device function
735 * @entries: pointer to an array of struct msix_entry entries
736 * @nvec: number of @entries
738 * Setup the MSI-X capability structure of device function with a
739 * single MSI-X irq. A return of zero indicates the successful setup of
740 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
742 static int msix_capability_init(struct pci_dev
*dev
,
743 struct msix_entry
*entries
, int nvec
)
749 /* Ensure MSI-X is disabled while it is set up */
750 msix_clear_and_set_ctrl(dev
, PCI_MSIX_FLAGS_ENABLE
, 0);
752 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &control
);
753 /* Request & Map MSI-X table region */
754 base
= msix_map_region(dev
, msix_table_size(control
));
758 ret
= msix_setup_entries(dev
, base
, entries
, nvec
);
762 ret
= arch_setup_msi_irqs(dev
, nvec
, PCI_CAP_ID_MSIX
);
767 * Some devices require MSI-X to be enabled before we can touch the
768 * MSI-X registers. We need to mask all the vectors to prevent
769 * interrupts coming in before they're fully set up.
771 msix_clear_and_set_ctrl(dev
, 0,
772 PCI_MSIX_FLAGS_MASKALL
| PCI_MSIX_FLAGS_ENABLE
);
774 msix_program_entries(dev
, entries
);
776 ret
= populate_msi_sysfs(dev
);
780 /* Set MSI-X enabled bits and unmask the function */
781 pci_intx_for_msi(dev
, 0);
782 dev
->msix_enabled
= 1;
784 msix_clear_and_set_ctrl(dev
, PCI_MSIX_FLAGS_MASKALL
, 0);
791 * If we had some success, report the number of irqs
792 * we succeeded in setting up.
794 struct msi_desc
*entry
;
797 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
812 * pci_msi_check_device - check whether MSI may be enabled on a device
813 * @dev: pointer to the pci_dev data structure of MSI device function
814 * @nvec: how many MSIs have been requested ?
815 * @type: are we checking for MSI or MSI-X ?
817 * Look at global flags, the device itself, and its parent buses
818 * to determine if MSI/-X are supported for the device. If MSI/-X is
819 * supported return 0, else return an error code.
821 static int pci_msi_check_device(struct pci_dev
*dev
, int nvec
, int type
)
826 /* MSI must be globally enabled and supported by the device */
827 if (!pci_msi_enable
|| !dev
|| dev
->no_msi
)
831 * You can't ask to have 0 or less MSIs configured.
833 * b) the list manipulation code assumes nvec >= 1.
839 * Any bridge which does NOT route MSI transactions from its
840 * secondary bus to its primary bus must set NO_MSI flag on
841 * the secondary pci_bus.
842 * We expect only arch-specific PCI host bus controller driver
843 * or quirks for specific PCI bridges to be setting NO_MSI.
845 for (bus
= dev
->bus
; bus
; bus
= bus
->parent
)
846 if (bus
->bus_flags
& PCI_BUS_FLAGS_NO_MSI
)
849 ret
= arch_msi_check_device(dev
, nvec
, type
);
857 * pci_msi_vec_count - Return the number of MSI vectors a device can send
858 * @dev: device to report about
860 * This function returns the number of MSI vectors a device requested via
861 * Multiple Message Capable register. It returns a negative errno if the
862 * device is not capable sending MSI interrupts. Otherwise, the call succeeds
863 * and returns a power of two, up to a maximum of 2^5 (32), according to the
866 int pci_msi_vec_count(struct pci_dev
*dev
)
874 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &msgctl
);
875 ret
= 1 << ((msgctl
& PCI_MSI_FLAGS_QMASK
) >> 1);
879 EXPORT_SYMBOL(pci_msi_vec_count
);
881 void pci_msi_shutdown(struct pci_dev
*dev
)
883 struct msi_desc
*desc
;
886 if (!pci_msi_enable
|| !dev
|| !dev
->msi_enabled
)
889 BUG_ON(list_empty(&dev
->msi_list
));
890 desc
= list_first_entry(&dev
->msi_list
, struct msi_desc
, list
);
892 msi_set_enable(dev
, 0);
893 pci_intx_for_msi(dev
, 1);
894 dev
->msi_enabled
= 0;
896 /* Return the device with MSI unmasked as initial states */
897 mask
= msi_mask(desc
->msi_attrib
.multi_cap
);
898 /* Keep cached state to be restored */
899 arch_msi_mask_irq(desc
, mask
, ~mask
);
901 /* Restore dev->irq to its default pin-assertion irq */
902 dev
->irq
= desc
->msi_attrib
.default_irq
;
905 void pci_disable_msi(struct pci_dev
*dev
)
907 if (!pci_msi_enable
|| !dev
|| !dev
->msi_enabled
)
910 pci_msi_shutdown(dev
);
913 EXPORT_SYMBOL(pci_disable_msi
);
916 * pci_msix_vec_count - return the number of device's MSI-X table entries
917 * @dev: pointer to the pci_dev data structure of MSI-X device function
918 * This function returns the number of device's MSI-X table entries and
919 * therefore the number of MSI-X vectors device is capable of sending.
920 * It returns a negative errno if the device is not capable of sending MSI-X
923 int pci_msix_vec_count(struct pci_dev
*dev
)
930 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &control
);
931 return msix_table_size(control
);
933 EXPORT_SYMBOL(pci_msix_vec_count
);
936 * pci_enable_msix - configure device's MSI-X capability structure
937 * @dev: pointer to the pci_dev data structure of MSI-X device function
938 * @entries: pointer to an array of MSI-X entries
939 * @nvec: number of MSI-X irqs requested for allocation by device driver
941 * Setup the MSI-X capability structure of device function with the number
942 * of requested irqs upon its software driver call to request for
943 * MSI-X mode enabled on its hardware device function. A return of zero
944 * indicates the successful configuration of MSI-X capability structure
945 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
946 * Or a return of > 0 indicates that driver request is exceeding the number
947 * of irqs or MSI-X vectors available. Driver should use the returned value to
948 * re-send its request.
950 int pci_enable_msix(struct pci_dev
*dev
, struct msix_entry
*entries
, int nvec
)
952 int status
, nr_entries
;
955 if (!entries
|| !dev
->msix_cap
|| dev
->current_state
!= PCI_D0
)
958 status
= pci_msi_check_device(dev
, nvec
, PCI_CAP_ID_MSIX
);
962 nr_entries
= pci_msix_vec_count(dev
);
965 if (nvec
> nr_entries
)
968 /* Check for any invalid entries */
969 for (i
= 0; i
< nvec
; i
++) {
970 if (entries
[i
].entry
>= nr_entries
)
971 return -EINVAL
; /* invalid entry */
972 for (j
= i
+ 1; j
< nvec
; j
++) {
973 if (entries
[i
].entry
== entries
[j
].entry
)
974 return -EINVAL
; /* duplicate entry */
977 WARN_ON(!!dev
->msix_enabled
);
979 /* Check whether driver already requested for MSI irq */
980 if (dev
->msi_enabled
) {
981 dev_info(&dev
->dev
, "can't enable MSI-X (MSI IRQ already assigned)\n");
984 status
= msix_capability_init(dev
, entries
, nvec
);
987 EXPORT_SYMBOL(pci_enable_msix
);
989 void pci_msix_shutdown(struct pci_dev
*dev
)
991 struct msi_desc
*entry
;
993 if (!pci_msi_enable
|| !dev
|| !dev
->msix_enabled
)
996 /* Return the device with MSI-X masked as initial states */
997 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
998 /* Keep cached states to be restored */
999 arch_msix_mask_irq(entry
, 1);
1002 msix_clear_and_set_ctrl(dev
, PCI_MSIX_FLAGS_ENABLE
, 0);
1003 pci_intx_for_msi(dev
, 1);
1004 dev
->msix_enabled
= 0;
1007 void pci_disable_msix(struct pci_dev
*dev
)
1009 if (!pci_msi_enable
|| !dev
|| !dev
->msix_enabled
)
1012 pci_msix_shutdown(dev
);
1015 EXPORT_SYMBOL(pci_disable_msix
);
1018 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
1019 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1021 * Being called during hotplug remove, from which the device function
1022 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
1023 * allocated for this device function, are reclaimed to unused state,
1024 * which may be used later on.
1026 void msi_remove_pci_irq_vectors(struct pci_dev
*dev
)
1028 if (!pci_msi_enable
|| !dev
)
1031 if (dev
->msi_enabled
|| dev
->msix_enabled
)
1035 void pci_no_msi(void)
1041 * pci_msi_enabled - is MSI enabled?
1043 * Returns true if MSI has not been disabled by the command-line option
1046 int pci_msi_enabled(void)
1048 return pci_msi_enable
;
1050 EXPORT_SYMBOL(pci_msi_enabled
);
1052 void pci_msi_init_pci_dev(struct pci_dev
*dev
)
1054 INIT_LIST_HEAD(&dev
->msi_list
);
1056 /* Disable the msi hardware to avoid screaming interrupts
1057 * during boot. This is the power on reset default so
1058 * usually this should be a noop.
1060 dev
->msi_cap
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
1062 msi_set_enable(dev
, 0);
1064 dev
->msix_cap
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
1066 msix_clear_and_set_ctrl(dev
, PCI_MSIX_FLAGS_ENABLE
, 0);
1070 * pci_enable_msi_range - configure device's MSI capability structure
1071 * @dev: device to configure
1072 * @minvec: minimal number of interrupts to configure
1073 * @maxvec: maximum number of interrupts to configure
1075 * This function tries to allocate a maximum possible number of interrupts in a
1076 * range between @minvec and @maxvec. It returns a negative errno if an error
1077 * occurs. If it succeeds, it returns the actual number of interrupts allocated
1078 * and updates the @dev's irq member to the lowest new interrupt number;
1079 * the other interrupt numbers allocated to this device are consecutive.
1081 int pci_enable_msi_range(struct pci_dev
*dev
, int minvec
, int maxvec
)
1086 if (dev
->current_state
!= PCI_D0
)
1089 WARN_ON(!!dev
->msi_enabled
);
1091 /* Check whether driver already requested MSI-X irqs */
1092 if (dev
->msix_enabled
) {
1094 "can't enable MSI (MSI-X already enabled)\n");
1098 if (maxvec
< minvec
)
1101 nvec
= pci_msi_vec_count(dev
);
1104 else if (nvec
< minvec
)
1106 else if (nvec
> maxvec
)
1110 rc
= pci_msi_check_device(dev
, nvec
, PCI_CAP_ID_MSI
);
1113 } else if (rc
> 0) {
1121 rc
= msi_capability_init(dev
, nvec
);
1124 } else if (rc
> 0) {
1133 EXPORT_SYMBOL(pci_enable_msi_range
);
1136 * pci_enable_msix_range - configure device's MSI-X capability structure
1137 * @dev: pointer to the pci_dev data structure of MSI-X device function
1138 * @entries: pointer to an array of MSI-X entries
1139 * @minvec: minimum number of MSI-X irqs requested
1140 * @maxvec: maximum number of MSI-X irqs requested
1142 * Setup the MSI-X capability structure of device function with a maximum
1143 * possible number of interrupts in the range between @minvec and @maxvec
1144 * upon its software driver call to request for MSI-X mode enabled on its
1145 * hardware device function. It returns a negative errno if an error occurs.
1146 * If it succeeds, it returns the actual number of interrupts allocated and
1147 * indicates the successful configuration of MSI-X capability structure
1148 * with new allocated MSI-X interrupts.
1150 int pci_enable_msix_range(struct pci_dev
*dev
, struct msix_entry
*entries
,
1151 int minvec
, int maxvec
)
1156 if (maxvec
< minvec
)
1160 rc
= pci_enable_msix(dev
, entries
, nvec
);
1163 } else if (rc
> 0) {
1172 EXPORT_SYMBOL(pci_enable_msix_range
);