3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
11 #include <linux/irq.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/export.h>
15 #include <linux/ioport.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
18 #include <linux/msi.h>
19 #include <linux/smp.h>
20 #include <linux/errno.h>
22 #include <linux/slab.h>
26 static int pci_msi_enable
= 1;
28 #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
33 #ifndef arch_msi_check_device
34 int arch_msi_check_device(struct pci_dev
*dev
, int nvec
, int type
)
40 #ifndef arch_setup_msi_irqs
41 # define arch_setup_msi_irqs default_setup_msi_irqs
42 # define HAVE_DEFAULT_MSI_SETUP_IRQS
45 #ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
46 int default_setup_msi_irqs(struct pci_dev
*dev
, int nvec
, int type
)
48 struct msi_desc
*entry
;
52 * If an architecture wants to support multiple MSI, it needs to
53 * override arch_setup_msi_irqs()
55 if (type
== PCI_CAP_ID_MSI
&& nvec
> 1)
58 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
59 ret
= arch_setup_msi_irq(dev
, entry
);
70 #ifndef arch_teardown_msi_irqs
71 # define arch_teardown_msi_irqs default_teardown_msi_irqs
72 # define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
75 #ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
76 void default_teardown_msi_irqs(struct pci_dev
*dev
)
78 struct msi_desc
*entry
;
80 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
85 nvec
= entry
->nvec_used
;
87 nvec
= 1 << entry
->msi_attrib
.multiple
;
88 for (i
= 0; i
< nvec
; i
++)
89 arch_teardown_msi_irq(entry
->irq
+ i
);
94 #ifndef arch_restore_msi_irqs
95 # define arch_restore_msi_irqs default_restore_msi_irqs
96 # define HAVE_DEFAULT_MSI_RESTORE_IRQS
99 #ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
100 void default_restore_msi_irqs(struct pci_dev
*dev
, int irq
)
102 struct msi_desc
*entry
;
105 if (dev
->msix_enabled
) {
106 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
107 if (irq
== entry
->irq
)
110 } else if (dev
->msi_enabled
) {
111 entry
= irq_get_msi_desc(irq
);
115 write_msi_msg(irq
, &entry
->msg
);
119 static void msi_set_enable(struct pci_dev
*dev
, int enable
)
123 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &control
);
124 control
&= ~PCI_MSI_FLAGS_ENABLE
;
126 control
|= PCI_MSI_FLAGS_ENABLE
;
127 pci_write_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, control
);
130 static void msix_set_enable(struct pci_dev
*dev
, int enable
)
134 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &control
);
135 control
&= ~PCI_MSIX_FLAGS_ENABLE
;
137 control
|= PCI_MSIX_FLAGS_ENABLE
;
138 pci_write_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, control
);
141 static inline __attribute_const__ u32
msi_mask(unsigned x
)
143 /* Don't shift by >= width of type */
146 return (1 << (1 << x
)) - 1;
149 static inline __attribute_const__ u32
msi_capable_mask(u16 control
)
151 return msi_mask((control
>> 1) & 7);
154 static inline __attribute_const__ u32
msi_enabled_mask(u16 control
)
156 return msi_mask((control
>> 4) & 7);
160 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
161 * mask all MSI interrupts by clearing the MSI enable bit does not work
162 * reliably as devices without an INTx disable bit will then generate a
163 * level IRQ which will never be cleared.
165 static u32
__msi_mask_irq(struct msi_desc
*desc
, u32 mask
, u32 flag
)
167 u32 mask_bits
= desc
->masked
;
169 if (!desc
->msi_attrib
.maskbit
)
174 pci_write_config_dword(desc
->dev
, desc
->mask_pos
, mask_bits
);
179 static void msi_mask_irq(struct msi_desc
*desc
, u32 mask
, u32 flag
)
181 desc
->masked
= __msi_mask_irq(desc
, mask
, flag
);
185 * This internal function does not flush PCI writes to the device.
186 * All users must ensure that they read from the device before either
187 * assuming that the device state is up to date, or returning out of this
188 * file. This saves a few milliseconds when initialising devices with lots
189 * of MSI-X interrupts.
191 static u32
__msix_mask_irq(struct msi_desc
*desc
, u32 flag
)
193 u32 mask_bits
= desc
->masked
;
194 unsigned offset
= desc
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
195 PCI_MSIX_ENTRY_VECTOR_CTRL
;
196 mask_bits
&= ~PCI_MSIX_ENTRY_CTRL_MASKBIT
;
198 mask_bits
|= PCI_MSIX_ENTRY_CTRL_MASKBIT
;
199 writel(mask_bits
, desc
->mask_base
+ offset
);
204 static void msix_mask_irq(struct msi_desc
*desc
, u32 flag
)
206 desc
->masked
= __msix_mask_irq(desc
, flag
);
209 #ifdef CONFIG_GENERIC_HARDIRQS
211 static void msi_set_mask_bit(struct irq_data
*data
, u32 flag
)
213 struct msi_desc
*desc
= irq_data_get_msi(data
);
215 if (desc
->msi_attrib
.is_msix
) {
216 msix_mask_irq(desc
, flag
);
217 readl(desc
->mask_base
); /* Flush write to device */
219 unsigned offset
= data
->irq
- desc
->dev
->irq
;
220 msi_mask_irq(desc
, 1 << offset
, flag
<< offset
);
224 void mask_msi_irq(struct irq_data
*data
)
226 msi_set_mask_bit(data
, 1);
229 void unmask_msi_irq(struct irq_data
*data
)
231 msi_set_mask_bit(data
, 0);
234 #endif /* CONFIG_GENERIC_HARDIRQS */
236 void __read_msi_msg(struct msi_desc
*entry
, struct msi_msg
*msg
)
238 BUG_ON(entry
->dev
->current_state
!= PCI_D0
);
240 if (entry
->msi_attrib
.is_msix
) {
241 void __iomem
*base
= entry
->mask_base
+
242 entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
;
244 msg
->address_lo
= readl(base
+ PCI_MSIX_ENTRY_LOWER_ADDR
);
245 msg
->address_hi
= readl(base
+ PCI_MSIX_ENTRY_UPPER_ADDR
);
246 msg
->data
= readl(base
+ PCI_MSIX_ENTRY_DATA
);
248 struct pci_dev
*dev
= entry
->dev
;
249 int pos
= dev
->msi_cap
;
252 pci_read_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_LO
,
254 if (entry
->msi_attrib
.is_64
) {
255 pci_read_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_HI
,
257 pci_read_config_word(dev
, pos
+ PCI_MSI_DATA_64
, &data
);
260 pci_read_config_word(dev
, pos
+ PCI_MSI_DATA_32
, &data
);
266 void read_msi_msg(unsigned int irq
, struct msi_msg
*msg
)
268 struct msi_desc
*entry
= irq_get_msi_desc(irq
);
270 __read_msi_msg(entry
, msg
);
273 void __get_cached_msi_msg(struct msi_desc
*entry
, struct msi_msg
*msg
)
275 /* Assert that the cache is valid, assuming that
276 * valid messages are not all-zeroes. */
277 BUG_ON(!(entry
->msg
.address_hi
| entry
->msg
.address_lo
|
283 void get_cached_msi_msg(unsigned int irq
, struct msi_msg
*msg
)
285 struct msi_desc
*entry
= irq_get_msi_desc(irq
);
287 __get_cached_msi_msg(entry
, msg
);
290 void __write_msi_msg(struct msi_desc
*entry
, struct msi_msg
*msg
)
292 if (entry
->dev
->current_state
!= PCI_D0
) {
293 /* Don't touch the hardware now */
294 } else if (entry
->msi_attrib
.is_msix
) {
296 base
= entry
->mask_base
+
297 entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
;
299 writel(msg
->address_lo
, base
+ PCI_MSIX_ENTRY_LOWER_ADDR
);
300 writel(msg
->address_hi
, base
+ PCI_MSIX_ENTRY_UPPER_ADDR
);
301 writel(msg
->data
, base
+ PCI_MSIX_ENTRY_DATA
);
303 struct pci_dev
*dev
= entry
->dev
;
304 int pos
= dev
->msi_cap
;
307 pci_read_config_word(dev
, pos
+ PCI_MSI_FLAGS
, &msgctl
);
308 msgctl
&= ~PCI_MSI_FLAGS_QSIZE
;
309 msgctl
|= entry
->msi_attrib
.multiple
<< 4;
310 pci_write_config_word(dev
, pos
+ PCI_MSI_FLAGS
, msgctl
);
312 pci_write_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_LO
,
314 if (entry
->msi_attrib
.is_64
) {
315 pci_write_config_dword(dev
, pos
+ PCI_MSI_ADDRESS_HI
,
317 pci_write_config_word(dev
, pos
+ PCI_MSI_DATA_64
,
320 pci_write_config_word(dev
, pos
+ PCI_MSI_DATA_32
,
327 void write_msi_msg(unsigned int irq
, struct msi_msg
*msg
)
329 struct msi_desc
*entry
= irq_get_msi_desc(irq
);
331 __write_msi_msg(entry
, msg
);
334 static void free_msi_irqs(struct pci_dev
*dev
)
336 struct msi_desc
*entry
, *tmp
;
338 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
342 if (entry
->nvec_used
)
343 nvec
= entry
->nvec_used
;
345 nvec
= 1 << entry
->msi_attrib
.multiple
;
346 #ifdef CONFIG_GENERIC_HARDIRQS
347 for (i
= 0; i
< nvec
; i
++)
348 BUG_ON(irq_has_action(entry
->irq
+ i
));
352 arch_teardown_msi_irqs(dev
);
354 list_for_each_entry_safe(entry
, tmp
, &dev
->msi_list
, list
) {
355 if (entry
->msi_attrib
.is_msix
) {
356 if (list_is_last(&entry
->list
, &dev
->msi_list
))
357 iounmap(entry
->mask_base
);
361 * Its possible that we get into this path
362 * When populate_msi_sysfs fails, which means the entries
363 * were not registered with sysfs. In that case don't
366 if (entry
->kobj
.parent
) {
367 kobject_del(&entry
->kobj
);
368 kobject_put(&entry
->kobj
);
371 list_del(&entry
->list
);
376 static struct msi_desc
*alloc_msi_entry(struct pci_dev
*dev
)
378 struct msi_desc
*desc
= kzalloc(sizeof(*desc
), GFP_KERNEL
);
382 INIT_LIST_HEAD(&desc
->list
);
388 static void pci_intx_for_msi(struct pci_dev
*dev
, int enable
)
390 if (!(dev
->dev_flags
& PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG
))
391 pci_intx(dev
, enable
);
394 static void __pci_restore_msi_state(struct pci_dev
*dev
)
397 struct msi_desc
*entry
;
399 if (!dev
->msi_enabled
)
402 entry
= irq_get_msi_desc(dev
->irq
);
404 pci_intx_for_msi(dev
, 0);
405 msi_set_enable(dev
, 0);
406 arch_restore_msi_irqs(dev
, dev
->irq
);
408 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &control
);
409 msi_mask_irq(entry
, msi_capable_mask(control
), entry
->masked
);
410 control
&= ~PCI_MSI_FLAGS_QSIZE
;
411 control
|= (entry
->msi_attrib
.multiple
<< 4) | PCI_MSI_FLAGS_ENABLE
;
412 pci_write_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, control
);
415 static void __pci_restore_msix_state(struct pci_dev
*dev
)
417 struct msi_desc
*entry
;
420 if (!dev
->msix_enabled
)
422 BUG_ON(list_empty(&dev
->msi_list
));
423 entry
= list_first_entry(&dev
->msi_list
, struct msi_desc
, list
);
424 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &control
);
426 /* route the table */
427 pci_intx_for_msi(dev
, 0);
428 control
|= PCI_MSIX_FLAGS_ENABLE
| PCI_MSIX_FLAGS_MASKALL
;
429 pci_write_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, control
);
431 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
432 arch_restore_msi_irqs(dev
, entry
->irq
);
433 msix_mask_irq(entry
, entry
->masked
);
436 control
&= ~PCI_MSIX_FLAGS_MASKALL
;
437 pci_write_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, control
);
440 void pci_restore_msi_state(struct pci_dev
*dev
)
442 __pci_restore_msi_state(dev
);
443 __pci_restore_msix_state(dev
);
445 EXPORT_SYMBOL_GPL(pci_restore_msi_state
);
448 #define to_msi_attr(obj) container_of(obj, struct msi_attribute, attr)
449 #define to_msi_desc(obj) container_of(obj, struct msi_desc, kobj)
451 struct msi_attribute
{
452 struct attribute attr
;
453 ssize_t (*show
)(struct msi_desc
*entry
, struct msi_attribute
*attr
,
455 ssize_t (*store
)(struct msi_desc
*entry
, struct msi_attribute
*attr
,
456 const char *buf
, size_t count
);
459 static ssize_t
show_msi_mode(struct msi_desc
*entry
, struct msi_attribute
*atr
,
462 return sprintf(buf
, "%s\n", entry
->msi_attrib
.is_msix
? "msix" : "msi");
465 static ssize_t
msi_irq_attr_show(struct kobject
*kobj
,
466 struct attribute
*attr
, char *buf
)
468 struct msi_attribute
*attribute
= to_msi_attr(attr
);
469 struct msi_desc
*entry
= to_msi_desc(kobj
);
471 if (!attribute
->show
)
474 return attribute
->show(entry
, attribute
, buf
);
477 static const struct sysfs_ops msi_irq_sysfs_ops
= {
478 .show
= msi_irq_attr_show
,
481 static struct msi_attribute mode_attribute
=
482 __ATTR(mode
, S_IRUGO
, show_msi_mode
, NULL
);
485 static struct attribute
*msi_irq_default_attrs
[] = {
486 &mode_attribute
.attr
,
490 static void msi_kobj_release(struct kobject
*kobj
)
492 struct msi_desc
*entry
= to_msi_desc(kobj
);
494 pci_dev_put(entry
->dev
);
497 static struct kobj_type msi_irq_ktype
= {
498 .release
= msi_kobj_release
,
499 .sysfs_ops
= &msi_irq_sysfs_ops
,
500 .default_attrs
= msi_irq_default_attrs
,
503 static int populate_msi_sysfs(struct pci_dev
*pdev
)
505 struct msi_desc
*entry
;
506 struct kobject
*kobj
;
510 pdev
->msi_kset
= kset_create_and_add("msi_irqs", NULL
, &pdev
->dev
.kobj
);
514 list_for_each_entry(entry
, &pdev
->msi_list
, list
) {
516 kobj
->kset
= pdev
->msi_kset
;
518 ret
= kobject_init_and_add(kobj
, &msi_irq_ktype
, NULL
,
529 list_for_each_entry(entry
, &pdev
->msi_list
, list
) {
532 kobject_del(&entry
->kobj
);
533 kobject_put(&entry
->kobj
);
540 * msi_capability_init - configure device's MSI capability structure
541 * @dev: pointer to the pci_dev data structure of MSI device function
542 * @nvec: number of interrupts to allocate
544 * Setup the MSI capability structure of the device with the requested
545 * number of interrupts. A return value of zero indicates the successful
546 * setup of an entry with the new MSI irq. A negative return value indicates
547 * an error, and a positive return value indicates the number of interrupts
548 * which could have been allocated.
550 static int msi_capability_init(struct pci_dev
*dev
, int nvec
)
552 struct msi_desc
*entry
;
557 msi_set_enable(dev
, 0); /* Disable MSI during set up */
559 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &control
);
560 /* MSI Entry Initialization */
561 entry
= alloc_msi_entry(dev
);
565 entry
->msi_attrib
.is_msix
= 0;
566 entry
->msi_attrib
.is_64
= !!(control
& PCI_MSI_FLAGS_64BIT
);
567 entry
->msi_attrib
.entry_nr
= 0;
568 entry
->msi_attrib
.maskbit
= !!(control
& PCI_MSI_FLAGS_MASKBIT
);
569 entry
->msi_attrib
.default_irq
= dev
->irq
; /* Save IOAPIC IRQ */
570 entry
->msi_attrib
.pos
= dev
->msi_cap
;
572 if (control
& PCI_MSI_FLAGS_64BIT
)
573 entry
->mask_pos
= dev
->msi_cap
+ PCI_MSI_MASK_64
;
575 entry
->mask_pos
= dev
->msi_cap
+ PCI_MSI_MASK_32
;
576 /* All MSIs are unmasked by default, Mask them all */
577 if (entry
->msi_attrib
.maskbit
)
578 pci_read_config_dword(dev
, entry
->mask_pos
, &entry
->masked
);
579 mask
= msi_capable_mask(control
);
580 msi_mask_irq(entry
, mask
, mask
);
582 list_add_tail(&entry
->list
, &dev
->msi_list
);
584 /* Configure MSI capability structure */
585 ret
= arch_setup_msi_irqs(dev
, nvec
, PCI_CAP_ID_MSI
);
587 msi_mask_irq(entry
, mask
, ~mask
);
592 ret
= populate_msi_sysfs(dev
);
594 msi_mask_irq(entry
, mask
, ~mask
);
599 /* Set MSI enabled bits */
600 pci_intx_for_msi(dev
, 0);
601 msi_set_enable(dev
, 1);
602 dev
->msi_enabled
= 1;
604 dev
->irq
= entry
->irq
;
608 static void __iomem
*msix_map_region(struct pci_dev
*dev
, unsigned nr_entries
)
610 resource_size_t phys_addr
;
614 pci_read_config_dword(dev
, dev
->msix_cap
+ PCI_MSIX_TABLE
,
616 bir
= (u8
)(table_offset
& PCI_MSIX_TABLE_BIR
);
617 table_offset
&= PCI_MSIX_TABLE_OFFSET
;
618 phys_addr
= pci_resource_start(dev
, bir
) + table_offset
;
620 return ioremap_nocache(phys_addr
, nr_entries
* PCI_MSIX_ENTRY_SIZE
);
623 static int msix_setup_entries(struct pci_dev
*dev
, void __iomem
*base
,
624 struct msix_entry
*entries
, int nvec
)
626 struct msi_desc
*entry
;
629 for (i
= 0; i
< nvec
; i
++) {
630 entry
= alloc_msi_entry(dev
);
636 /* No enough memory. Don't try again */
640 entry
->msi_attrib
.is_msix
= 1;
641 entry
->msi_attrib
.is_64
= 1;
642 entry
->msi_attrib
.entry_nr
= entries
[i
].entry
;
643 entry
->msi_attrib
.default_irq
= dev
->irq
;
644 entry
->msi_attrib
.pos
= dev
->msix_cap
;
645 entry
->mask_base
= base
;
647 list_add_tail(&entry
->list
, &dev
->msi_list
);
653 static void msix_program_entries(struct pci_dev
*dev
,
654 struct msix_entry
*entries
)
656 struct msi_desc
*entry
;
659 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
660 int offset
= entries
[i
].entry
* PCI_MSIX_ENTRY_SIZE
+
661 PCI_MSIX_ENTRY_VECTOR_CTRL
;
663 entries
[i
].vector
= entry
->irq
;
664 irq_set_msi_desc(entry
->irq
, entry
);
665 entry
->masked
= readl(entry
->mask_base
+ offset
);
666 msix_mask_irq(entry
, 1);
672 * msix_capability_init - configure device's MSI-X capability
673 * @dev: pointer to the pci_dev data structure of MSI-X device function
674 * @entries: pointer to an array of struct msix_entry entries
675 * @nvec: number of @entries
677 * Setup the MSI-X capability structure of device function with a
678 * single MSI-X irq. A return of zero indicates the successful setup of
679 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
681 static int msix_capability_init(struct pci_dev
*dev
,
682 struct msix_entry
*entries
, int nvec
)
688 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &control
);
690 /* Ensure MSI-X is disabled while it is set up */
691 control
&= ~PCI_MSIX_FLAGS_ENABLE
;
692 pci_write_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, control
);
694 /* Request & Map MSI-X table region */
695 base
= msix_map_region(dev
, msix_table_size(control
));
699 ret
= msix_setup_entries(dev
, base
, entries
, nvec
);
703 ret
= arch_setup_msi_irqs(dev
, nvec
, PCI_CAP_ID_MSIX
);
708 * Some devices require MSI-X to be enabled before we can touch the
709 * MSI-X registers. We need to mask all the vectors to prevent
710 * interrupts coming in before they're fully set up.
712 control
|= PCI_MSIX_FLAGS_MASKALL
| PCI_MSIX_FLAGS_ENABLE
;
713 pci_write_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, control
);
715 msix_program_entries(dev
, entries
);
717 ret
= populate_msi_sysfs(dev
);
723 /* Set MSI-X enabled bits and unmask the function */
724 pci_intx_for_msi(dev
, 0);
725 dev
->msix_enabled
= 1;
727 control
&= ~PCI_MSIX_FLAGS_MASKALL
;
728 pci_write_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, control
);
735 * If we had some success, report the number of irqs
736 * we succeeded in setting up.
738 struct msi_desc
*entry
;
741 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
755 * pci_msi_check_device - check whether MSI may be enabled on a device
756 * @dev: pointer to the pci_dev data structure of MSI device function
757 * @nvec: how many MSIs have been requested ?
758 * @type: are we checking for MSI or MSI-X ?
760 * Look at global flags, the device itself, and its parent busses
761 * to determine if MSI/-X are supported for the device. If MSI/-X is
762 * supported return 0, else return an error code.
764 static int pci_msi_check_device(struct pci_dev
*dev
, int nvec
, int type
)
769 /* MSI must be globally enabled and supported by the device */
770 if (!pci_msi_enable
|| !dev
|| dev
->no_msi
)
774 * You can't ask to have 0 or less MSIs configured.
776 * b) the list manipulation code assumes nvec >= 1.
782 * Any bridge which does NOT route MSI transactions from its
783 * secondary bus to its primary bus must set NO_MSI flag on
784 * the secondary pci_bus.
785 * We expect only arch-specific PCI host bus controller driver
786 * or quirks for specific PCI bridges to be setting NO_MSI.
788 for (bus
= dev
->bus
; bus
; bus
= bus
->parent
)
789 if (bus
->bus_flags
& PCI_BUS_FLAGS_NO_MSI
)
792 ret
= arch_msi_check_device(dev
, nvec
, type
);
800 * pci_enable_msi_block - configure device's MSI capability structure
801 * @dev: device to configure
802 * @nvec: number of interrupts to configure
804 * Allocate IRQs for a device with the MSI capability.
805 * This function returns a negative errno if an error occurs. If it
806 * is unable to allocate the number of interrupts requested, it returns
807 * the number of interrupts it might be able to allocate. If it successfully
808 * allocates at least the number of interrupts requested, it returns 0 and
809 * updates the @dev's irq member to the lowest new interrupt number; the
810 * other interrupt numbers allocated to this device are consecutive.
812 int pci_enable_msi_block(struct pci_dev
*dev
, unsigned int nvec
)
820 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &msgctl
);
821 maxvec
= 1 << ((msgctl
& PCI_MSI_FLAGS_QMASK
) >> 1);
825 status
= pci_msi_check_device(dev
, nvec
, PCI_CAP_ID_MSI
);
829 WARN_ON(!!dev
->msi_enabled
);
831 /* Check whether driver already requested MSI-X irqs */
832 if (dev
->msix_enabled
) {
833 dev_info(&dev
->dev
, "can't enable MSI "
834 "(MSI-X already enabled)\n");
838 status
= msi_capability_init(dev
, nvec
);
841 EXPORT_SYMBOL(pci_enable_msi_block
);
843 int pci_enable_msi_block_auto(struct pci_dev
*dev
, unsigned int *maxvec
)
851 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &msgctl
);
852 ret
= 1 << ((msgctl
& PCI_MSI_FLAGS_QMASK
) >> 1);
859 ret
= pci_enable_msi_block(dev
, nvec
);
866 EXPORT_SYMBOL(pci_enable_msi_block_auto
);
868 void pci_msi_shutdown(struct pci_dev
*dev
)
870 struct msi_desc
*desc
;
874 if (!pci_msi_enable
|| !dev
|| !dev
->msi_enabled
)
877 BUG_ON(list_empty(&dev
->msi_list
));
878 desc
= list_first_entry(&dev
->msi_list
, struct msi_desc
, list
);
880 msi_set_enable(dev
, 0);
881 pci_intx_for_msi(dev
, 1);
882 dev
->msi_enabled
= 0;
884 /* Return the device with MSI unmasked as initial states */
885 pci_read_config_word(dev
, dev
->msi_cap
+ PCI_MSI_FLAGS
, &ctrl
);
886 mask
= msi_capable_mask(ctrl
);
887 /* Keep cached state to be restored */
888 __msi_mask_irq(desc
, mask
, ~mask
);
890 /* Restore dev->irq to its default pin-assertion irq */
891 dev
->irq
= desc
->msi_attrib
.default_irq
;
894 void pci_disable_msi(struct pci_dev
*dev
)
896 if (!pci_msi_enable
|| !dev
|| !dev
->msi_enabled
)
899 pci_msi_shutdown(dev
);
901 kset_unregister(dev
->msi_kset
);
902 dev
->msi_kset
= NULL
;
904 EXPORT_SYMBOL(pci_disable_msi
);
907 * pci_msix_table_size - return the number of device's MSI-X table entries
908 * @dev: pointer to the pci_dev data structure of MSI-X device function
910 int pci_msix_table_size(struct pci_dev
*dev
)
917 pci_read_config_word(dev
, dev
->msix_cap
+ PCI_MSIX_FLAGS
, &control
);
918 return msix_table_size(control
);
922 * pci_enable_msix - configure device's MSI-X capability structure
923 * @dev: pointer to the pci_dev data structure of MSI-X device function
924 * @entries: pointer to an array of MSI-X entries
925 * @nvec: number of MSI-X irqs requested for allocation by device driver
927 * Setup the MSI-X capability structure of device function with the number
928 * of requested irqs upon its software driver call to request for
929 * MSI-X mode enabled on its hardware device function. A return of zero
930 * indicates the successful configuration of MSI-X capability structure
931 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
932 * Or a return of > 0 indicates that driver request is exceeding the number
933 * of irqs or MSI-X vectors available. Driver should use the returned value to
934 * re-send its request.
936 int pci_enable_msix(struct pci_dev
*dev
, struct msix_entry
*entries
, int nvec
)
938 int status
, nr_entries
;
941 if (!entries
|| !dev
->msix_cap
)
944 status
= pci_msi_check_device(dev
, nvec
, PCI_CAP_ID_MSIX
);
948 nr_entries
= pci_msix_table_size(dev
);
949 if (nvec
> nr_entries
)
952 /* Check for any invalid entries */
953 for (i
= 0; i
< nvec
; i
++) {
954 if (entries
[i
].entry
>= nr_entries
)
955 return -EINVAL
; /* invalid entry */
956 for (j
= i
+ 1; j
< nvec
; j
++) {
957 if (entries
[i
].entry
== entries
[j
].entry
)
958 return -EINVAL
; /* duplicate entry */
961 WARN_ON(!!dev
->msix_enabled
);
963 /* Check whether driver already requested for MSI irq */
964 if (dev
->msi_enabled
) {
965 dev_info(&dev
->dev
, "can't enable MSI-X "
966 "(MSI IRQ already assigned)\n");
969 status
= msix_capability_init(dev
, entries
, nvec
);
972 EXPORT_SYMBOL(pci_enable_msix
);
974 void pci_msix_shutdown(struct pci_dev
*dev
)
976 struct msi_desc
*entry
;
978 if (!pci_msi_enable
|| !dev
|| !dev
->msix_enabled
)
981 /* Return the device with MSI-X masked as initial states */
982 list_for_each_entry(entry
, &dev
->msi_list
, list
) {
983 /* Keep cached states to be restored */
984 __msix_mask_irq(entry
, 1);
987 msix_set_enable(dev
, 0);
988 pci_intx_for_msi(dev
, 1);
989 dev
->msix_enabled
= 0;
992 void pci_disable_msix(struct pci_dev
*dev
)
994 if (!pci_msi_enable
|| !dev
|| !dev
->msix_enabled
)
997 pci_msix_shutdown(dev
);
999 kset_unregister(dev
->msi_kset
);
1000 dev
->msi_kset
= NULL
;
1002 EXPORT_SYMBOL(pci_disable_msix
);
1005 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
1006 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1008 * Being called during hotplug remove, from which the device function
1009 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
1010 * allocated for this device function, are reclaimed to unused state,
1011 * which may be used later on.
1013 void msi_remove_pci_irq_vectors(struct pci_dev
*dev
)
1015 if (!pci_msi_enable
|| !dev
)
1018 if (dev
->msi_enabled
|| dev
->msix_enabled
)
1022 void pci_no_msi(void)
1028 * pci_msi_enabled - is MSI enabled?
1030 * Returns true if MSI has not been disabled by the command-line option
1033 int pci_msi_enabled(void)
1035 return pci_msi_enable
;
1037 EXPORT_SYMBOL(pci_msi_enabled
);
1039 void pci_msi_init_pci_dev(struct pci_dev
*dev
)
1041 INIT_LIST_HEAD(&dev
->msi_list
);
1043 /* Disable the msi hardware to avoid screaming interrupts
1044 * during boot. This is the power on reset default so
1045 * usually this should be a noop.
1047 dev
->msi_cap
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
1049 msi_set_enable(dev
, 0);
1051 dev
->msix_cap
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
1053 msix_set_enable(dev
, 0);