[PATCH] PCI: Block config access during BIST
[deliverable/linux.git] / drivers / pci / pci-sysfs.c
1 /*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
18 #include <linux/config.h>
19 #include <linux/kernel.h>
20 #include <linux/pci.h>
21 #include <linux/stat.h>
22 #include <linux/topology.h>
23 #include <linux/mm.h>
24
25 #include "pci.h"
26
27 static int sysfs_initialized; /* = 0 */
28
29 /* show configuration fields */
30 #define pci_config_attr(field, format_string) \
31 static ssize_t \
32 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
33 { \
34 struct pci_dev *pdev; \
35 \
36 pdev = to_pci_dev (dev); \
37 return sprintf (buf, format_string, pdev->field); \
38 }
39
40 pci_config_attr(vendor, "0x%04x\n");
41 pci_config_attr(device, "0x%04x\n");
42 pci_config_attr(subsystem_vendor, "0x%04x\n");
43 pci_config_attr(subsystem_device, "0x%04x\n");
44 pci_config_attr(class, "0x%06x\n");
45 pci_config_attr(irq, "%u\n");
46
47 static ssize_t local_cpus_show(struct device *dev,
48 struct device_attribute *attr, char *buf)
49 {
50 cpumask_t mask;
51 int len;
52
53 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
54 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
55 strcat(buf,"\n");
56 return 1+len;
57 }
58
59 /* show resources */
60 static ssize_t
61 resource_show(struct device * dev, struct device_attribute *attr, char * buf)
62 {
63 struct pci_dev * pci_dev = to_pci_dev(dev);
64 char * str = buf;
65 int i;
66 int max = 7;
67 u64 start, end;
68
69 if (pci_dev->subordinate)
70 max = DEVICE_COUNT_RESOURCE;
71
72 for (i = 0; i < max; i++) {
73 struct resource *res = &pci_dev->resource[i];
74 pci_resource_to_user(pci_dev, i, res, &start, &end);
75 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
76 (unsigned long long)start,
77 (unsigned long long)end,
78 (unsigned long long)res->flags);
79 }
80 return (str - buf);
81 }
82
83 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
84 {
85 struct pci_dev *pci_dev = to_pci_dev(dev);
86
87 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
88 pci_dev->vendor, pci_dev->device,
89 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
90 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
91 (u8)(pci_dev->class));
92 }
93
94 struct device_attribute pci_dev_attrs[] = {
95 __ATTR_RO(resource),
96 __ATTR_RO(vendor),
97 __ATTR_RO(device),
98 __ATTR_RO(subsystem_vendor),
99 __ATTR_RO(subsystem_device),
100 __ATTR_RO(class),
101 __ATTR_RO(irq),
102 __ATTR_RO(local_cpus),
103 __ATTR_RO(modalias),
104 __ATTR_NULL,
105 };
106
107 static ssize_t
108 pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
109 {
110 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
111 unsigned int size = 64;
112 loff_t init_off = off;
113 u8 *data = (u8*) buf;
114
115 /* Several chips lock up trying to read undefined config space */
116 if (capable(CAP_SYS_ADMIN)) {
117 size = dev->cfg_size;
118 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
119 size = 128;
120 }
121
122 if (off > size)
123 return 0;
124 if (off + count > size) {
125 size -= off;
126 count = size;
127 } else {
128 size = count;
129 }
130
131 if ((off & 1) && size) {
132 u8 val;
133 pci_user_read_config_byte(dev, off, &val);
134 data[off - init_off] = val;
135 off++;
136 size--;
137 }
138
139 if ((off & 3) && size > 2) {
140 u16 val;
141 pci_user_read_config_word(dev, off, &val);
142 data[off - init_off] = val & 0xff;
143 data[off - init_off + 1] = (val >> 8) & 0xff;
144 off += 2;
145 size -= 2;
146 }
147
148 while (size > 3) {
149 u32 val;
150 pci_user_read_config_dword(dev, off, &val);
151 data[off - init_off] = val & 0xff;
152 data[off - init_off + 1] = (val >> 8) & 0xff;
153 data[off - init_off + 2] = (val >> 16) & 0xff;
154 data[off - init_off + 3] = (val >> 24) & 0xff;
155 off += 4;
156 size -= 4;
157 }
158
159 if (size >= 2) {
160 u16 val;
161 pci_user_read_config_word(dev, off, &val);
162 data[off - init_off] = val & 0xff;
163 data[off - init_off + 1] = (val >> 8) & 0xff;
164 off += 2;
165 size -= 2;
166 }
167
168 if (size > 0) {
169 u8 val;
170 pci_user_read_config_byte(dev, off, &val);
171 data[off - init_off] = val;
172 off++;
173 --size;
174 }
175
176 return count;
177 }
178
179 static ssize_t
180 pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
181 {
182 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
183 unsigned int size = count;
184 loff_t init_off = off;
185 u8 *data = (u8*) buf;
186
187 if (off > dev->cfg_size)
188 return 0;
189 if (off + count > dev->cfg_size) {
190 size = dev->cfg_size - off;
191 count = size;
192 }
193
194 if ((off & 1) && size) {
195 pci_user_write_config_byte(dev, off, data[off - init_off]);
196 off++;
197 size--;
198 }
199
200 if ((off & 3) && size > 2) {
201 u16 val = data[off - init_off];
202 val |= (u16) data[off - init_off + 1] << 8;
203 pci_user_write_config_word(dev, off, val);
204 off += 2;
205 size -= 2;
206 }
207
208 while (size > 3) {
209 u32 val = data[off - init_off];
210 val |= (u32) data[off - init_off + 1] << 8;
211 val |= (u32) data[off - init_off + 2] << 16;
212 val |= (u32) data[off - init_off + 3] << 24;
213 pci_user_write_config_dword(dev, off, val);
214 off += 4;
215 size -= 4;
216 }
217
218 if (size >= 2) {
219 u16 val = data[off - init_off];
220 val |= (u16) data[off - init_off + 1] << 8;
221 pci_user_write_config_word(dev, off, val);
222 off += 2;
223 size -= 2;
224 }
225
226 if (size) {
227 pci_user_write_config_byte(dev, off, data[off - init_off]);
228 off++;
229 --size;
230 }
231
232 return count;
233 }
234
235 #ifdef HAVE_PCI_LEGACY
236 /**
237 * pci_read_legacy_io - read byte(s) from legacy I/O port space
238 * @kobj: kobject corresponding to file to read from
239 * @buf: buffer to store results
240 * @off: offset into legacy I/O port space
241 * @count: number of bytes to read
242 *
243 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
244 * callback routine (pci_legacy_read).
245 */
246 ssize_t
247 pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
248 {
249 struct pci_bus *bus = to_pci_bus(container_of(kobj,
250 struct class_device,
251 kobj));
252
253 /* Only support 1, 2 or 4 byte accesses */
254 if (count != 1 && count != 2 && count != 4)
255 return -EINVAL;
256
257 return pci_legacy_read(bus, off, (u32 *)buf, count);
258 }
259
260 /**
261 * pci_write_legacy_io - write byte(s) to legacy I/O port space
262 * @kobj: kobject corresponding to file to read from
263 * @buf: buffer containing value to be written
264 * @off: offset into legacy I/O port space
265 * @count: number of bytes to write
266 *
267 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
268 * callback routine (pci_legacy_write).
269 */
270 ssize_t
271 pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
272 {
273 struct pci_bus *bus = to_pci_bus(container_of(kobj,
274 struct class_device,
275 kobj));
276 /* Only support 1, 2 or 4 byte accesses */
277 if (count != 1 && count != 2 && count != 4)
278 return -EINVAL;
279
280 return pci_legacy_write(bus, off, *(u32 *)buf, count);
281 }
282
283 /**
284 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
285 * @kobj: kobject corresponding to device to be mapped
286 * @attr: struct bin_attribute for this file
287 * @vma: struct vm_area_struct passed to mmap
288 *
289 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
290 * legacy memory space (first meg of bus space) into application virtual
291 * memory space.
292 */
293 int
294 pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
295 struct vm_area_struct *vma)
296 {
297 struct pci_bus *bus = to_pci_bus(container_of(kobj,
298 struct class_device,
299 kobj));
300
301 return pci_mmap_legacy_page_range(bus, vma);
302 }
303 #endif /* HAVE_PCI_LEGACY */
304
305 #ifdef HAVE_PCI_MMAP
306 /**
307 * pci_mmap_resource - map a PCI resource into user memory space
308 * @kobj: kobject for mapping
309 * @attr: struct bin_attribute for the file being mapped
310 * @vma: struct vm_area_struct passed into the mmap
311 *
312 * Use the regular PCI mapping routines to map a PCI resource into userspace.
313 * FIXME: write combining? maybe automatic for prefetchable regions?
314 */
315 static int
316 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
317 struct vm_area_struct *vma)
318 {
319 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
320 struct device, kobj));
321 struct resource *res = (struct resource *)attr->private;
322 enum pci_mmap_state mmap_type;
323 u64 start, end;
324 int i;
325
326 for (i = 0; i < PCI_ROM_RESOURCE; i++)
327 if (res == &pdev->resource[i])
328 break;
329 if (i >= PCI_ROM_RESOURCE)
330 return -ENODEV;
331
332 /* pci_mmap_page_range() expects the same kind of entry as coming
333 * from /proc/bus/pci/ which is a "user visible" value. If this is
334 * different from the resource itself, arch will do necessary fixup.
335 */
336 pci_resource_to_user(pdev, i, res, &start, &end);
337 vma->vm_pgoff += start >> PAGE_SHIFT;
338 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
339
340 return pci_mmap_page_range(pdev, vma, mmap_type, 0);
341 }
342
343 /**
344 * pci_create_resource_files - create resource files in sysfs for @dev
345 * @dev: dev in question
346 *
347 * Walk the resources in @dev creating files for each resource available.
348 */
349 static void
350 pci_create_resource_files(struct pci_dev *pdev)
351 {
352 int i;
353
354 /* Expose the PCI resources from this device as files */
355 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
356 struct bin_attribute *res_attr;
357
358 /* skip empty resources */
359 if (!pci_resource_len(pdev, i))
360 continue;
361
362 /* allocate attribute structure, piggyback attribute name */
363 res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
364 if (res_attr) {
365 char *res_attr_name = (char *)(res_attr + 1);
366
367 pdev->res_attr[i] = res_attr;
368 sprintf(res_attr_name, "resource%d", i);
369 res_attr->attr.name = res_attr_name;
370 res_attr->attr.mode = S_IRUSR | S_IWUSR;
371 res_attr->attr.owner = THIS_MODULE;
372 res_attr->size = pci_resource_len(pdev, i);
373 res_attr->mmap = pci_mmap_resource;
374 res_attr->private = &pdev->resource[i];
375 sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
376 }
377 }
378 }
379
380 /**
381 * pci_remove_resource_files - cleanup resource files
382 * @dev: dev to cleanup
383 *
384 * If we created resource files for @dev, remove them from sysfs and
385 * free their resources.
386 */
387 static void
388 pci_remove_resource_files(struct pci_dev *pdev)
389 {
390 int i;
391
392 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
393 struct bin_attribute *res_attr;
394
395 res_attr = pdev->res_attr[i];
396 if (res_attr) {
397 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
398 kfree(res_attr);
399 }
400 }
401 }
402 #else /* !HAVE_PCI_MMAP */
403 static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
404 static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
405 #endif /* HAVE_PCI_MMAP */
406
407 /**
408 * pci_write_rom - used to enable access to the PCI ROM display
409 * @kobj: kernel object handle
410 * @buf: user input
411 * @off: file offset
412 * @count: number of byte in input
413 *
414 * writing anything except 0 enables it
415 */
416 static ssize_t
417 pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
418 {
419 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
420
421 if ((off == 0) && (*buf == '0') && (count == 2))
422 pdev->rom_attr_enabled = 0;
423 else
424 pdev->rom_attr_enabled = 1;
425
426 return count;
427 }
428
429 /**
430 * pci_read_rom - read a PCI ROM
431 * @kobj: kernel object handle
432 * @buf: where to put the data we read from the ROM
433 * @off: file offset
434 * @count: number of bytes to read
435 *
436 * Put @count bytes starting at @off into @buf from the ROM in the PCI
437 * device corresponding to @kobj.
438 */
439 static ssize_t
440 pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
441 {
442 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
443 void __iomem *rom;
444 size_t size;
445
446 if (!pdev->rom_attr_enabled)
447 return -EINVAL;
448
449 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
450 if (!rom)
451 return 0;
452
453 if (off >= size)
454 count = 0;
455 else {
456 if (off + count > size)
457 count = size - off;
458
459 memcpy_fromio(buf, rom + off, count);
460 }
461 pci_unmap_rom(pdev, rom);
462
463 return count;
464 }
465
466 static struct bin_attribute pci_config_attr = {
467 .attr = {
468 .name = "config",
469 .mode = S_IRUGO | S_IWUSR,
470 .owner = THIS_MODULE,
471 },
472 .size = 256,
473 .read = pci_read_config,
474 .write = pci_write_config,
475 };
476
477 static struct bin_attribute pcie_config_attr = {
478 .attr = {
479 .name = "config",
480 .mode = S_IRUGO | S_IWUSR,
481 .owner = THIS_MODULE,
482 },
483 .size = 4096,
484 .read = pci_read_config,
485 .write = pci_write_config,
486 };
487
488 int pci_create_sysfs_dev_files (struct pci_dev *pdev)
489 {
490 if (!sysfs_initialized)
491 return -EACCES;
492
493 if (pdev->cfg_size < 4096)
494 sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
495 else
496 sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
497
498 pci_create_resource_files(pdev);
499
500 /* If the device has a ROM, try to expose it in sysfs. */
501 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
502 struct bin_attribute *rom_attr;
503
504 rom_attr = kmalloc(sizeof(*rom_attr), GFP_ATOMIC);
505 if (rom_attr) {
506 memset(rom_attr, 0x00, sizeof(*rom_attr));
507 pdev->rom_attr = rom_attr;
508 rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
509 rom_attr->attr.name = "rom";
510 rom_attr->attr.mode = S_IRUSR;
511 rom_attr->attr.owner = THIS_MODULE;
512 rom_attr->read = pci_read_rom;
513 rom_attr->write = pci_write_rom;
514 sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
515 }
516 }
517 /* add platform-specific attributes */
518 pcibios_add_platform_entries(pdev);
519
520 return 0;
521 }
522
523 /**
524 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
525 * @pdev: device whose entries we should free
526 *
527 * Cleanup when @pdev is removed from sysfs.
528 */
529 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
530 {
531 if (pdev->cfg_size < 4096)
532 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
533 else
534 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
535
536 pci_remove_resource_files(pdev);
537
538 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
539 if (pdev->rom_attr) {
540 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
541 kfree(pdev->rom_attr);
542 }
543 }
544 }
545
546 static int __init pci_sysfs_init(void)
547 {
548 struct pci_dev *pdev = NULL;
549
550 sysfs_initialized = 1;
551 for_each_pci_dev(pdev)
552 pci_create_sysfs_dev_files(pdev);
553
554 return 0;
555 }
556
557 __initcall(pci_sysfs_init);
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