mn10300/PCI: Remove unused pci_mem_start
[deliverable/linux.git] / drivers / pci / pci-sysfs.c
1 /*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/pci.h>
21 #include <linux/stat.h>
22 #include <linux/export.h>
23 #include <linux/topology.h>
24 #include <linux/mm.h>
25 #include <linux/fs.h>
26 #include <linux/capability.h>
27 #include <linux/security.h>
28 #include <linux/pci-aspm.h>
29 #include <linux/slab.h>
30 #include <linux/vgaarb.h>
31 #include <linux/pm_runtime.h>
32 #include "pci.h"
33
34 static int sysfs_initialized; /* = 0 */
35
36 /* show configuration fields */
37 #define pci_config_attr(field, format_string) \
38 static ssize_t \
39 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
40 { \
41 struct pci_dev *pdev; \
42 \
43 pdev = to_pci_dev (dev); \
44 return sprintf (buf, format_string, pdev->field); \
45 }
46
47 pci_config_attr(vendor, "0x%04x\n");
48 pci_config_attr(device, "0x%04x\n");
49 pci_config_attr(subsystem_vendor, "0x%04x\n");
50 pci_config_attr(subsystem_device, "0x%04x\n");
51 pci_config_attr(class, "0x%06x\n");
52 pci_config_attr(irq, "%u\n");
53
54 static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57 {
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf (buf, "%u\n", pdev->broken_parity_status);
60 }
61
62 static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65 {
66 struct pci_dev *pdev = to_pci_dev(dev);
67 unsigned long val;
68
69 if (kstrtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
75 }
76
77 static ssize_t local_cpus_show(struct device *dev,
78 struct device_attribute *attr, char *buf)
79 {
80 const struct cpumask *mask;
81 int len;
82
83 #ifdef CONFIG_NUMA
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
86 #else
87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88 #endif
89 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
90 buf[len++] = '\n';
91 buf[len] = '\0';
92 return len;
93 }
94
95
96 static ssize_t local_cpulist_show(struct device *dev,
97 struct device_attribute *attr, char *buf)
98 {
99 const struct cpumask *mask;
100 int len;
101
102 #ifdef CONFIG_NUMA
103 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
104 cpumask_of_node(dev_to_node(dev));
105 #else
106 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
107 #endif
108 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
109 buf[len++] = '\n';
110 buf[len] = '\0';
111 return len;
112 }
113
114 /*
115 * PCI Bus Class Devices
116 */
117 static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
118 int type,
119 struct device_attribute *attr,
120 char *buf)
121 {
122 int ret;
123 const struct cpumask *cpumask;
124
125 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
126 ret = type ?
127 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
128 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
129 buf[ret++] = '\n';
130 buf[ret] = '\0';
131 return ret;
132 }
133
134 static ssize_t cpuaffinity_show(struct device *dev,
135 struct device_attribute *attr, char *buf)
136 {
137 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
138 }
139 static DEVICE_ATTR_RO(cpuaffinity);
140
141 static ssize_t cpulistaffinity_show(struct device *dev,
142 struct device_attribute *attr, char *buf)
143 {
144 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
145 }
146 static DEVICE_ATTR_RO(cpulistaffinity);
147
148 /* show resources */
149 static ssize_t
150 resource_show(struct device * dev, struct device_attribute *attr, char * buf)
151 {
152 struct pci_dev * pci_dev = to_pci_dev(dev);
153 char * str = buf;
154 int i;
155 int max;
156 resource_size_t start, end;
157
158 if (pci_dev->subordinate)
159 max = DEVICE_COUNT_RESOURCE;
160 else
161 max = PCI_BRIDGE_RESOURCES;
162
163 for (i = 0; i < max; i++) {
164 struct resource *res = &pci_dev->resource[i];
165 pci_resource_to_user(pci_dev, i, res, &start, &end);
166 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
167 (unsigned long long)start,
168 (unsigned long long)end,
169 (unsigned long long)res->flags);
170 }
171 return (str - buf);
172 }
173
174 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
175 {
176 struct pci_dev *pci_dev = to_pci_dev(dev);
177
178 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
179 pci_dev->vendor, pci_dev->device,
180 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
181 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
182 (u8)(pci_dev->class));
183 }
184
185 static ssize_t is_enabled_store(struct device *dev,
186 struct device_attribute *attr, const char *buf,
187 size_t count)
188 {
189 struct pci_dev *pdev = to_pci_dev(dev);
190 unsigned long val;
191 ssize_t result = kstrtoul(buf, 0, &val);
192
193 if (result < 0)
194 return result;
195
196 /* this can crash the machine when done on the "wrong" device */
197 if (!capable(CAP_SYS_ADMIN))
198 return -EPERM;
199
200 if (!val) {
201 if (pci_is_enabled(pdev))
202 pci_disable_device(pdev);
203 else
204 result = -EIO;
205 } else
206 result = pci_enable_device(pdev);
207
208 return result < 0 ? result : count;
209 }
210
211 static ssize_t is_enabled_show(struct device *dev,
212 struct device_attribute *attr, char *buf)
213 {
214 struct pci_dev *pdev;
215
216 pdev = to_pci_dev (dev);
217 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
218 }
219
220 #ifdef CONFIG_NUMA
221 static ssize_t
222 numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
223 {
224 return sprintf (buf, "%d\n", dev->numa_node);
225 }
226 #endif
227
228 static ssize_t
229 dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
230 {
231 struct pci_dev *pdev = to_pci_dev(dev);
232
233 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
234 }
235
236 static ssize_t
237 consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
238 char *buf)
239 {
240 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
241 }
242
243 static ssize_t
244 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
245 {
246 struct pci_dev *pdev = to_pci_dev(dev);
247
248 if (!pdev->subordinate)
249 return 0;
250
251 return sprintf (buf, "%u\n",
252 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
253 }
254
255 static ssize_t
256 msi_bus_store(struct device *dev, struct device_attribute *attr,
257 const char *buf, size_t count)
258 {
259 struct pci_dev *pdev = to_pci_dev(dev);
260 unsigned long val;
261
262 if (kstrtoul(buf, 0, &val) < 0)
263 return -EINVAL;
264
265 /* bad things may happen if the no_msi flag is changed
266 * while some drivers are loaded */
267 if (!capable(CAP_SYS_ADMIN))
268 return -EPERM;
269
270 /* Maybe pci devices without subordinate busses shouldn't even have this
271 * attribute in the first place? */
272 if (!pdev->subordinate)
273 return count;
274
275 /* Is the flag going to change, or keep the value it already had? */
276 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
277 !!val) {
278 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
279
280 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
281 " bad things could happen\n", val ? "" : " not");
282 }
283
284 return count;
285 }
286
287 static DEFINE_MUTEX(pci_remove_rescan_mutex);
288 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
289 size_t count)
290 {
291 unsigned long val;
292 struct pci_bus *b = NULL;
293
294 if (kstrtoul(buf, 0, &val) < 0)
295 return -EINVAL;
296
297 if (val) {
298 mutex_lock(&pci_remove_rescan_mutex);
299 while ((b = pci_find_next_bus(b)) != NULL)
300 pci_rescan_bus(b);
301 mutex_unlock(&pci_remove_rescan_mutex);
302 }
303 return count;
304 }
305
306 struct bus_attribute pci_bus_attrs[] = {
307 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
308 __ATTR_NULL
309 };
310
311 static ssize_t
312 dev_rescan_store(struct device *dev, struct device_attribute *attr,
313 const char *buf, size_t count)
314 {
315 unsigned long val;
316 struct pci_dev *pdev = to_pci_dev(dev);
317
318 if (kstrtoul(buf, 0, &val) < 0)
319 return -EINVAL;
320
321 if (val) {
322 mutex_lock(&pci_remove_rescan_mutex);
323 pci_rescan_bus(pdev->bus);
324 mutex_unlock(&pci_remove_rescan_mutex);
325 }
326 return count;
327 }
328 struct device_attribute dev_rescan_attr = __ATTR(rescan, (S_IWUSR|S_IWGRP),
329 NULL, dev_rescan_store);
330
331 static void remove_callback(struct device *dev)
332 {
333 struct pci_dev *pdev = to_pci_dev(dev);
334
335 mutex_lock(&pci_remove_rescan_mutex);
336 pci_stop_and_remove_bus_device(pdev);
337 mutex_unlock(&pci_remove_rescan_mutex);
338 }
339
340 static ssize_t
341 remove_store(struct device *dev, struct device_attribute *dummy,
342 const char *buf, size_t count)
343 {
344 int ret = 0;
345 unsigned long val;
346
347 if (kstrtoul(buf, 0, &val) < 0)
348 return -EINVAL;
349
350 /* An attribute cannot be unregistered by one of its own methods,
351 * so we have to use this roundabout approach.
352 */
353 if (val)
354 ret = device_schedule_callback(dev, remove_callback);
355 if (ret)
356 count = ret;
357 return count;
358 }
359 struct device_attribute dev_remove_attr = __ATTR(remove, (S_IWUSR|S_IWGRP),
360 NULL, remove_store);
361
362 static ssize_t
363 dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
364 const char *buf, size_t count)
365 {
366 unsigned long val;
367 struct pci_bus *bus = to_pci_bus(dev);
368
369 if (kstrtoul(buf, 0, &val) < 0)
370 return -EINVAL;
371
372 if (val) {
373 mutex_lock(&pci_remove_rescan_mutex);
374 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
375 pci_rescan_bus_bridge_resize(bus->self);
376 else
377 pci_rescan_bus(bus);
378 mutex_unlock(&pci_remove_rescan_mutex);
379 }
380 return count;
381 }
382 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
383
384 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
385 static ssize_t d3cold_allowed_store(struct device *dev,
386 struct device_attribute *attr,
387 const char *buf, size_t count)
388 {
389 struct pci_dev *pdev = to_pci_dev(dev);
390 unsigned long val;
391
392 if (kstrtoul(buf, 0, &val) < 0)
393 return -EINVAL;
394
395 pdev->d3cold_allowed = !!val;
396 pm_runtime_resume(dev);
397
398 return count;
399 }
400
401 static ssize_t d3cold_allowed_show(struct device *dev,
402 struct device_attribute *attr, char *buf)
403 {
404 struct pci_dev *pdev = to_pci_dev(dev);
405 return sprintf (buf, "%u\n", pdev->d3cold_allowed);
406 }
407 #endif
408
409 #ifdef CONFIG_PCI_IOV
410 static ssize_t sriov_totalvfs_show(struct device *dev,
411 struct device_attribute *attr,
412 char *buf)
413 {
414 struct pci_dev *pdev = to_pci_dev(dev);
415
416 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
417 }
418
419
420 static ssize_t sriov_numvfs_show(struct device *dev,
421 struct device_attribute *attr,
422 char *buf)
423 {
424 struct pci_dev *pdev = to_pci_dev(dev);
425
426 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
427 }
428
429 /*
430 * num_vfs > 0; number of VFs to enable
431 * num_vfs = 0; disable all VFs
432 *
433 * Note: SRIOV spec doesn't allow partial VF
434 * disable, so it's all or none.
435 */
436 static ssize_t sriov_numvfs_store(struct device *dev,
437 struct device_attribute *attr,
438 const char *buf, size_t count)
439 {
440 struct pci_dev *pdev = to_pci_dev(dev);
441 int ret;
442 u16 num_vfs;
443
444 ret = kstrtou16(buf, 0, &num_vfs);
445 if (ret < 0)
446 return ret;
447
448 if (num_vfs > pci_sriov_get_totalvfs(pdev))
449 return -ERANGE;
450
451 if (num_vfs == pdev->sriov->num_VFs)
452 return count; /* no change */
453
454 /* is PF driver loaded w/callback */
455 if (!pdev->driver || !pdev->driver->sriov_configure) {
456 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
457 return -ENOSYS;
458 }
459
460 if (num_vfs == 0) {
461 /* disable VFs */
462 ret = pdev->driver->sriov_configure(pdev, 0);
463 if (ret < 0)
464 return ret;
465 return count;
466 }
467
468 /* enable VFs */
469 if (pdev->sriov->num_VFs) {
470 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
471 pdev->sriov->num_VFs, num_vfs);
472 return -EBUSY;
473 }
474
475 ret = pdev->driver->sriov_configure(pdev, num_vfs);
476 if (ret < 0)
477 return ret;
478
479 if (ret != num_vfs)
480 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
481 num_vfs, ret);
482
483 return count;
484 }
485
486 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
487 static struct device_attribute sriov_numvfs_attr =
488 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
489 sriov_numvfs_show, sriov_numvfs_store);
490 #endif /* CONFIG_PCI_IOV */
491
492 struct device_attribute pci_dev_attrs[] = {
493 __ATTR_RO(resource),
494 __ATTR_RO(vendor),
495 __ATTR_RO(device),
496 __ATTR_RO(subsystem_vendor),
497 __ATTR_RO(subsystem_device),
498 __ATTR_RO(class),
499 __ATTR_RO(irq),
500 __ATTR_RO(local_cpus),
501 __ATTR_RO(local_cpulist),
502 __ATTR_RO(modalias),
503 #ifdef CONFIG_NUMA
504 __ATTR_RO(numa_node),
505 #endif
506 __ATTR_RO(dma_mask_bits),
507 __ATTR_RO(consistent_dma_mask_bits),
508 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
509 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
510 broken_parity_status_show,broken_parity_status_store),
511 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
512 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
513 __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
514 #endif
515 __ATTR_NULL,
516 };
517
518 static struct attribute *pcibus_attrs[] = {
519 &dev_attr_rescan.attr,
520 &dev_attr_cpuaffinity.attr,
521 &dev_attr_cpulistaffinity.attr,
522 NULL,
523 };
524
525 static const struct attribute_group pcibus_group = {
526 .attrs = pcibus_attrs,
527 };
528
529 const struct attribute_group *pcibus_groups[] = {
530 &pcibus_group,
531 NULL,
532 };
533
534 static ssize_t
535 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
536 {
537 struct pci_dev *pdev = to_pci_dev(dev);
538 struct pci_dev *vga_dev = vga_default_device();
539
540 if (vga_dev)
541 return sprintf(buf, "%u\n", (pdev == vga_dev));
542
543 return sprintf(buf, "%u\n",
544 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
545 IORESOURCE_ROM_SHADOW));
546 }
547 struct device_attribute vga_attr = __ATTR_RO(boot_vga);
548
549 static ssize_t
550 pci_read_config(struct file *filp, struct kobject *kobj,
551 struct bin_attribute *bin_attr,
552 char *buf, loff_t off, size_t count)
553 {
554 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
555 unsigned int size = 64;
556 loff_t init_off = off;
557 u8 *data = (u8*) buf;
558
559 /* Several chips lock up trying to read undefined config space */
560 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
561 size = dev->cfg_size;
562 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
563 size = 128;
564 }
565
566 if (off > size)
567 return 0;
568 if (off + count > size) {
569 size -= off;
570 count = size;
571 } else {
572 size = count;
573 }
574
575 pci_config_pm_runtime_get(dev);
576
577 if ((off & 1) && size) {
578 u8 val;
579 pci_user_read_config_byte(dev, off, &val);
580 data[off - init_off] = val;
581 off++;
582 size--;
583 }
584
585 if ((off & 3) && size > 2) {
586 u16 val;
587 pci_user_read_config_word(dev, off, &val);
588 data[off - init_off] = val & 0xff;
589 data[off - init_off + 1] = (val >> 8) & 0xff;
590 off += 2;
591 size -= 2;
592 }
593
594 while (size > 3) {
595 u32 val;
596 pci_user_read_config_dword(dev, off, &val);
597 data[off - init_off] = val & 0xff;
598 data[off - init_off + 1] = (val >> 8) & 0xff;
599 data[off - init_off + 2] = (val >> 16) & 0xff;
600 data[off - init_off + 3] = (val >> 24) & 0xff;
601 off += 4;
602 size -= 4;
603 }
604
605 if (size >= 2) {
606 u16 val;
607 pci_user_read_config_word(dev, off, &val);
608 data[off - init_off] = val & 0xff;
609 data[off - init_off + 1] = (val >> 8) & 0xff;
610 off += 2;
611 size -= 2;
612 }
613
614 if (size > 0) {
615 u8 val;
616 pci_user_read_config_byte(dev, off, &val);
617 data[off - init_off] = val;
618 off++;
619 --size;
620 }
621
622 pci_config_pm_runtime_put(dev);
623
624 return count;
625 }
626
627 static ssize_t
628 pci_write_config(struct file* filp, struct kobject *kobj,
629 struct bin_attribute *bin_attr,
630 char *buf, loff_t off, size_t count)
631 {
632 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
633 unsigned int size = count;
634 loff_t init_off = off;
635 u8 *data = (u8*) buf;
636
637 if (off > dev->cfg_size)
638 return 0;
639 if (off + count > dev->cfg_size) {
640 size = dev->cfg_size - off;
641 count = size;
642 }
643
644 pci_config_pm_runtime_get(dev);
645
646 if ((off & 1) && size) {
647 pci_user_write_config_byte(dev, off, data[off - init_off]);
648 off++;
649 size--;
650 }
651
652 if ((off & 3) && size > 2) {
653 u16 val = data[off - init_off];
654 val |= (u16) data[off - init_off + 1] << 8;
655 pci_user_write_config_word(dev, off, val);
656 off += 2;
657 size -= 2;
658 }
659
660 while (size > 3) {
661 u32 val = data[off - init_off];
662 val |= (u32) data[off - init_off + 1] << 8;
663 val |= (u32) data[off - init_off + 2] << 16;
664 val |= (u32) data[off - init_off + 3] << 24;
665 pci_user_write_config_dword(dev, off, val);
666 off += 4;
667 size -= 4;
668 }
669
670 if (size >= 2) {
671 u16 val = data[off - init_off];
672 val |= (u16) data[off - init_off + 1] << 8;
673 pci_user_write_config_word(dev, off, val);
674 off += 2;
675 size -= 2;
676 }
677
678 if (size) {
679 pci_user_write_config_byte(dev, off, data[off - init_off]);
680 off++;
681 --size;
682 }
683
684 pci_config_pm_runtime_put(dev);
685
686 return count;
687 }
688
689 static ssize_t
690 read_vpd_attr(struct file *filp, struct kobject *kobj,
691 struct bin_attribute *bin_attr,
692 char *buf, loff_t off, size_t count)
693 {
694 struct pci_dev *dev =
695 to_pci_dev(container_of(kobj, struct device, kobj));
696
697 if (off > bin_attr->size)
698 count = 0;
699 else if (count > bin_attr->size - off)
700 count = bin_attr->size - off;
701
702 return pci_read_vpd(dev, off, count, buf);
703 }
704
705 static ssize_t
706 write_vpd_attr(struct file *filp, struct kobject *kobj,
707 struct bin_attribute *bin_attr,
708 char *buf, loff_t off, size_t count)
709 {
710 struct pci_dev *dev =
711 to_pci_dev(container_of(kobj, struct device, kobj));
712
713 if (off > bin_attr->size)
714 count = 0;
715 else if (count > bin_attr->size - off)
716 count = bin_attr->size - off;
717
718 return pci_write_vpd(dev, off, count, buf);
719 }
720
721 #ifdef HAVE_PCI_LEGACY
722 /**
723 * pci_read_legacy_io - read byte(s) from legacy I/O port space
724 * @filp: open sysfs file
725 * @kobj: kobject corresponding to file to read from
726 * @bin_attr: struct bin_attribute for this file
727 * @buf: buffer to store results
728 * @off: offset into legacy I/O port space
729 * @count: number of bytes to read
730 *
731 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
732 * callback routine (pci_legacy_read).
733 */
734 static ssize_t
735 pci_read_legacy_io(struct file *filp, struct kobject *kobj,
736 struct bin_attribute *bin_attr,
737 char *buf, loff_t off, size_t count)
738 {
739 struct pci_bus *bus = to_pci_bus(container_of(kobj,
740 struct device,
741 kobj));
742
743 /* Only support 1, 2 or 4 byte accesses */
744 if (count != 1 && count != 2 && count != 4)
745 return -EINVAL;
746
747 return pci_legacy_read(bus, off, (u32 *)buf, count);
748 }
749
750 /**
751 * pci_write_legacy_io - write byte(s) to legacy I/O port space
752 * @filp: open sysfs file
753 * @kobj: kobject corresponding to file to read from
754 * @bin_attr: struct bin_attribute for this file
755 * @buf: buffer containing value to be written
756 * @off: offset into legacy I/O port space
757 * @count: number of bytes to write
758 *
759 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
760 * callback routine (pci_legacy_write).
761 */
762 static ssize_t
763 pci_write_legacy_io(struct file *filp, struct kobject *kobj,
764 struct bin_attribute *bin_attr,
765 char *buf, loff_t off, size_t count)
766 {
767 struct pci_bus *bus = to_pci_bus(container_of(kobj,
768 struct device,
769 kobj));
770 /* Only support 1, 2 or 4 byte accesses */
771 if (count != 1 && count != 2 && count != 4)
772 return -EINVAL;
773
774 return pci_legacy_write(bus, off, *(u32 *)buf, count);
775 }
776
777 /**
778 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
779 * @filp: open sysfs file
780 * @kobj: kobject corresponding to device to be mapped
781 * @attr: struct bin_attribute for this file
782 * @vma: struct vm_area_struct passed to mmap
783 *
784 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
785 * legacy memory space (first meg of bus space) into application virtual
786 * memory space.
787 */
788 static int
789 pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
790 struct bin_attribute *attr,
791 struct vm_area_struct *vma)
792 {
793 struct pci_bus *bus = to_pci_bus(container_of(kobj,
794 struct device,
795 kobj));
796
797 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
798 }
799
800 /**
801 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
802 * @filp: open sysfs file
803 * @kobj: kobject corresponding to device to be mapped
804 * @attr: struct bin_attribute for this file
805 * @vma: struct vm_area_struct passed to mmap
806 *
807 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
808 * legacy IO space (first meg of bus space) into application virtual
809 * memory space. Returns -ENOSYS if the operation isn't supported
810 */
811 static int
812 pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
813 struct bin_attribute *attr,
814 struct vm_area_struct *vma)
815 {
816 struct pci_bus *bus = to_pci_bus(container_of(kobj,
817 struct device,
818 kobj));
819
820 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
821 }
822
823 /**
824 * pci_adjust_legacy_attr - adjustment of legacy file attributes
825 * @b: bus to create files under
826 * @mmap_type: I/O port or memory
827 *
828 * Stub implementation. Can be overridden by arch if necessary.
829 */
830 void __weak
831 pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
832 {
833 return;
834 }
835
836 /**
837 * pci_create_legacy_files - create legacy I/O port and memory files
838 * @b: bus to create files under
839 *
840 * Some platforms allow access to legacy I/O port and ISA memory space on
841 * a per-bus basis. This routine creates the files and ties them into
842 * their associated read, write and mmap files from pci-sysfs.c
843 *
844 * On error unwind, but don't propagate the error to the caller
845 * as it is ok to set up the PCI bus without these files.
846 */
847 void pci_create_legacy_files(struct pci_bus *b)
848 {
849 int error;
850
851 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
852 GFP_ATOMIC);
853 if (!b->legacy_io)
854 goto kzalloc_err;
855
856 sysfs_bin_attr_init(b->legacy_io);
857 b->legacy_io->attr.name = "legacy_io";
858 b->legacy_io->size = 0xffff;
859 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
860 b->legacy_io->read = pci_read_legacy_io;
861 b->legacy_io->write = pci_write_legacy_io;
862 b->legacy_io->mmap = pci_mmap_legacy_io;
863 pci_adjust_legacy_attr(b, pci_mmap_io);
864 error = device_create_bin_file(&b->dev, b->legacy_io);
865 if (error)
866 goto legacy_io_err;
867
868 /* Allocated above after the legacy_io struct */
869 b->legacy_mem = b->legacy_io + 1;
870 sysfs_bin_attr_init(b->legacy_mem);
871 b->legacy_mem->attr.name = "legacy_mem";
872 b->legacy_mem->size = 1024*1024;
873 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
874 b->legacy_mem->mmap = pci_mmap_legacy_mem;
875 pci_adjust_legacy_attr(b, pci_mmap_mem);
876 error = device_create_bin_file(&b->dev, b->legacy_mem);
877 if (error)
878 goto legacy_mem_err;
879
880 return;
881
882 legacy_mem_err:
883 device_remove_bin_file(&b->dev, b->legacy_io);
884 legacy_io_err:
885 kfree(b->legacy_io);
886 b->legacy_io = NULL;
887 kzalloc_err:
888 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
889 "and ISA memory resources to sysfs\n");
890 return;
891 }
892
893 void pci_remove_legacy_files(struct pci_bus *b)
894 {
895 if (b->legacy_io) {
896 device_remove_bin_file(&b->dev, b->legacy_io);
897 device_remove_bin_file(&b->dev, b->legacy_mem);
898 kfree(b->legacy_io); /* both are allocated here */
899 }
900 }
901 #endif /* HAVE_PCI_LEGACY */
902
903 #ifdef HAVE_PCI_MMAP
904
905 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
906 enum pci_mmap_api mmap_api)
907 {
908 unsigned long nr, start, size, pci_start;
909
910 if (pci_resource_len(pdev, resno) == 0)
911 return 0;
912 nr = vma_pages(vma);
913 start = vma->vm_pgoff;
914 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
915 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
916 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
917 if (start >= pci_start && start < pci_start + size &&
918 start + nr <= pci_start + size)
919 return 1;
920 return 0;
921 }
922
923 /**
924 * pci_mmap_resource - map a PCI resource into user memory space
925 * @kobj: kobject for mapping
926 * @attr: struct bin_attribute for the file being mapped
927 * @vma: struct vm_area_struct passed into the mmap
928 * @write_combine: 1 for write_combine mapping
929 *
930 * Use the regular PCI mapping routines to map a PCI resource into userspace.
931 */
932 static int
933 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
934 struct vm_area_struct *vma, int write_combine)
935 {
936 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
937 struct device, kobj));
938 struct resource *res = attr->private;
939 enum pci_mmap_state mmap_type;
940 resource_size_t start, end;
941 int i;
942
943 for (i = 0; i < PCI_ROM_RESOURCE; i++)
944 if (res == &pdev->resource[i])
945 break;
946 if (i >= PCI_ROM_RESOURCE)
947 return -ENODEV;
948
949 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
950 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
951 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
952 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
953 pci_name(pdev), i,
954 (u64)pci_resource_start(pdev, i),
955 (u64)pci_resource_len(pdev, i));
956 return -EINVAL;
957 }
958
959 /* pci_mmap_page_range() expects the same kind of entry as coming
960 * from /proc/bus/pci/ which is a "user visible" value. If this is
961 * different from the resource itself, arch will do necessary fixup.
962 */
963 pci_resource_to_user(pdev, i, res, &start, &end);
964 vma->vm_pgoff += start >> PAGE_SHIFT;
965 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
966
967 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
968 return -EINVAL;
969
970 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
971 }
972
973 static int
974 pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
975 struct bin_attribute *attr,
976 struct vm_area_struct *vma)
977 {
978 return pci_mmap_resource(kobj, attr, vma, 0);
979 }
980
981 static int
982 pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
983 struct bin_attribute *attr,
984 struct vm_area_struct *vma)
985 {
986 return pci_mmap_resource(kobj, attr, vma, 1);
987 }
988
989 static ssize_t
990 pci_resource_io(struct file *filp, struct kobject *kobj,
991 struct bin_attribute *attr, char *buf,
992 loff_t off, size_t count, bool write)
993 {
994 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
995 struct device, kobj));
996 struct resource *res = attr->private;
997 unsigned long port = off;
998 int i;
999
1000 for (i = 0; i < PCI_ROM_RESOURCE; i++)
1001 if (res == &pdev->resource[i])
1002 break;
1003 if (i >= PCI_ROM_RESOURCE)
1004 return -ENODEV;
1005
1006 port += pci_resource_start(pdev, i);
1007
1008 if (port > pci_resource_end(pdev, i))
1009 return 0;
1010
1011 if (port + count - 1 > pci_resource_end(pdev, i))
1012 return -EINVAL;
1013
1014 switch (count) {
1015 case 1:
1016 if (write)
1017 outb(*(u8 *)buf, port);
1018 else
1019 *(u8 *)buf = inb(port);
1020 return 1;
1021 case 2:
1022 if (write)
1023 outw(*(u16 *)buf, port);
1024 else
1025 *(u16 *)buf = inw(port);
1026 return 2;
1027 case 4:
1028 if (write)
1029 outl(*(u32 *)buf, port);
1030 else
1031 *(u32 *)buf = inl(port);
1032 return 4;
1033 }
1034 return -EINVAL;
1035 }
1036
1037 static ssize_t
1038 pci_read_resource_io(struct file *filp, struct kobject *kobj,
1039 struct bin_attribute *attr, char *buf,
1040 loff_t off, size_t count)
1041 {
1042 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1043 }
1044
1045 static ssize_t
1046 pci_write_resource_io(struct file *filp, struct kobject *kobj,
1047 struct bin_attribute *attr, char *buf,
1048 loff_t off, size_t count)
1049 {
1050 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1051 }
1052
1053 /**
1054 * pci_remove_resource_files - cleanup resource files
1055 * @pdev: dev to cleanup
1056 *
1057 * If we created resource files for @pdev, remove them from sysfs and
1058 * free their resources.
1059 */
1060 static void
1061 pci_remove_resource_files(struct pci_dev *pdev)
1062 {
1063 int i;
1064
1065 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1066 struct bin_attribute *res_attr;
1067
1068 res_attr = pdev->res_attr[i];
1069 if (res_attr) {
1070 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1071 kfree(res_attr);
1072 }
1073
1074 res_attr = pdev->res_attr_wc[i];
1075 if (res_attr) {
1076 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1077 kfree(res_attr);
1078 }
1079 }
1080 }
1081
1082 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1083 {
1084 /* allocate attribute structure, piggyback attribute name */
1085 int name_len = write_combine ? 13 : 10;
1086 struct bin_attribute *res_attr;
1087 int retval;
1088
1089 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1090 if (res_attr) {
1091 char *res_attr_name = (char *)(res_attr + 1);
1092
1093 sysfs_bin_attr_init(res_attr);
1094 if (write_combine) {
1095 pdev->res_attr_wc[num] = res_attr;
1096 sprintf(res_attr_name, "resource%d_wc", num);
1097 res_attr->mmap = pci_mmap_resource_wc;
1098 } else {
1099 pdev->res_attr[num] = res_attr;
1100 sprintf(res_attr_name, "resource%d", num);
1101 res_attr->mmap = pci_mmap_resource_uc;
1102 }
1103 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1104 res_attr->read = pci_read_resource_io;
1105 res_attr->write = pci_write_resource_io;
1106 }
1107 res_attr->attr.name = res_attr_name;
1108 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1109 res_attr->size = pci_resource_len(pdev, num);
1110 res_attr->private = &pdev->resource[num];
1111 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1112 } else
1113 retval = -ENOMEM;
1114
1115 return retval;
1116 }
1117
1118 /**
1119 * pci_create_resource_files - create resource files in sysfs for @dev
1120 * @pdev: dev in question
1121 *
1122 * Walk the resources in @pdev creating files for each resource available.
1123 */
1124 static int pci_create_resource_files(struct pci_dev *pdev)
1125 {
1126 int i;
1127 int retval;
1128
1129 /* Expose the PCI resources from this device as files */
1130 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1131
1132 /* skip empty resources */
1133 if (!pci_resource_len(pdev, i))
1134 continue;
1135
1136 retval = pci_create_attr(pdev, i, 0);
1137 /* for prefetchable resources, create a WC mappable file */
1138 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1139 retval = pci_create_attr(pdev, i, 1);
1140
1141 if (retval) {
1142 pci_remove_resource_files(pdev);
1143 return retval;
1144 }
1145 }
1146 return 0;
1147 }
1148 #else /* !HAVE_PCI_MMAP */
1149 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1150 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1151 #endif /* HAVE_PCI_MMAP */
1152
1153 /**
1154 * pci_write_rom - used to enable access to the PCI ROM display
1155 * @filp: sysfs file
1156 * @kobj: kernel object handle
1157 * @bin_attr: struct bin_attribute for this file
1158 * @buf: user input
1159 * @off: file offset
1160 * @count: number of byte in input
1161 *
1162 * writing anything except 0 enables it
1163 */
1164 static ssize_t
1165 pci_write_rom(struct file *filp, struct kobject *kobj,
1166 struct bin_attribute *bin_attr,
1167 char *buf, loff_t off, size_t count)
1168 {
1169 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1170
1171 if ((off == 0) && (*buf == '0') && (count == 2))
1172 pdev->rom_attr_enabled = 0;
1173 else
1174 pdev->rom_attr_enabled = 1;
1175
1176 return count;
1177 }
1178
1179 /**
1180 * pci_read_rom - read a PCI ROM
1181 * @filp: sysfs file
1182 * @kobj: kernel object handle
1183 * @bin_attr: struct bin_attribute for this file
1184 * @buf: where to put the data we read from the ROM
1185 * @off: file offset
1186 * @count: number of bytes to read
1187 *
1188 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1189 * device corresponding to @kobj.
1190 */
1191 static ssize_t
1192 pci_read_rom(struct file *filp, struct kobject *kobj,
1193 struct bin_attribute *bin_attr,
1194 char *buf, loff_t off, size_t count)
1195 {
1196 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1197 void __iomem *rom;
1198 size_t size;
1199
1200 if (!pdev->rom_attr_enabled)
1201 return -EINVAL;
1202
1203 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1204 if (!rom || !size)
1205 return -EIO;
1206
1207 if (off >= size)
1208 count = 0;
1209 else {
1210 if (off + count > size)
1211 count = size - off;
1212
1213 memcpy_fromio(buf, rom + off, count);
1214 }
1215 pci_unmap_rom(pdev, rom);
1216
1217 return count;
1218 }
1219
1220 static struct bin_attribute pci_config_attr = {
1221 .attr = {
1222 .name = "config",
1223 .mode = S_IRUGO | S_IWUSR,
1224 },
1225 .size = PCI_CFG_SPACE_SIZE,
1226 .read = pci_read_config,
1227 .write = pci_write_config,
1228 };
1229
1230 static struct bin_attribute pcie_config_attr = {
1231 .attr = {
1232 .name = "config",
1233 .mode = S_IRUGO | S_IWUSR,
1234 },
1235 .size = PCI_CFG_SPACE_EXP_SIZE,
1236 .read = pci_read_config,
1237 .write = pci_write_config,
1238 };
1239
1240 int __weak pcibios_add_platform_entries(struct pci_dev *dev)
1241 {
1242 return 0;
1243 }
1244
1245 static ssize_t reset_store(struct device *dev,
1246 struct device_attribute *attr, const char *buf,
1247 size_t count)
1248 {
1249 struct pci_dev *pdev = to_pci_dev(dev);
1250 unsigned long val;
1251 ssize_t result = kstrtoul(buf, 0, &val);
1252
1253 if (result < 0)
1254 return result;
1255
1256 if (val != 1)
1257 return -EINVAL;
1258
1259 result = pci_reset_function(pdev);
1260 if (result < 0)
1261 return result;
1262
1263 return count;
1264 }
1265
1266 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1267
1268 static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1269 {
1270 int retval;
1271 struct bin_attribute *attr;
1272
1273 /* If the device has VPD, try to expose it in sysfs. */
1274 if (dev->vpd) {
1275 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1276 if (!attr)
1277 return -ENOMEM;
1278
1279 sysfs_bin_attr_init(attr);
1280 attr->size = dev->vpd->len;
1281 attr->attr.name = "vpd";
1282 attr->attr.mode = S_IRUSR | S_IWUSR;
1283 attr->read = read_vpd_attr;
1284 attr->write = write_vpd_attr;
1285 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1286 if (retval) {
1287 kfree(attr);
1288 return retval;
1289 }
1290 dev->vpd->attr = attr;
1291 }
1292
1293 /* Active State Power Management */
1294 pcie_aspm_create_sysfs_dev_files(dev);
1295
1296 if (!pci_probe_reset_function(dev)) {
1297 retval = device_create_file(&dev->dev, &reset_attr);
1298 if (retval)
1299 goto error;
1300 dev->reset_fn = 1;
1301 }
1302 return 0;
1303
1304 error:
1305 pcie_aspm_remove_sysfs_dev_files(dev);
1306 if (dev->vpd && dev->vpd->attr) {
1307 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1308 kfree(dev->vpd->attr);
1309 }
1310
1311 return retval;
1312 }
1313
1314 int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1315 {
1316 int retval;
1317 int rom_size = 0;
1318 struct bin_attribute *attr;
1319
1320 if (!sysfs_initialized)
1321 return -EACCES;
1322
1323 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1324 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1325 else
1326 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1327 if (retval)
1328 goto err;
1329
1330 retval = pci_create_resource_files(pdev);
1331 if (retval)
1332 goto err_config_file;
1333
1334 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1335 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1336 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1337 rom_size = 0x20000;
1338
1339 /* If the device has a ROM, try to expose it in sysfs. */
1340 if (rom_size) {
1341 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1342 if (!attr) {
1343 retval = -ENOMEM;
1344 goto err_resource_files;
1345 }
1346 sysfs_bin_attr_init(attr);
1347 attr->size = rom_size;
1348 attr->attr.name = "rom";
1349 attr->attr.mode = S_IRUSR | S_IWUSR;
1350 attr->read = pci_read_rom;
1351 attr->write = pci_write_rom;
1352 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1353 if (retval) {
1354 kfree(attr);
1355 goto err_resource_files;
1356 }
1357 pdev->rom_attr = attr;
1358 }
1359
1360 /* add platform-specific attributes */
1361 retval = pcibios_add_platform_entries(pdev);
1362 if (retval)
1363 goto err_rom_file;
1364
1365 /* add sysfs entries for various capabilities */
1366 retval = pci_create_capabilities_sysfs(pdev);
1367 if (retval)
1368 goto err_rom_file;
1369
1370 pci_create_firmware_label_files(pdev);
1371
1372 return 0;
1373
1374 err_rom_file:
1375 if (rom_size) {
1376 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1377 kfree(pdev->rom_attr);
1378 pdev->rom_attr = NULL;
1379 }
1380 err_resource_files:
1381 pci_remove_resource_files(pdev);
1382 err_config_file:
1383 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1384 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1385 else
1386 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1387 err:
1388 return retval;
1389 }
1390
1391 static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1392 {
1393 if (dev->vpd && dev->vpd->attr) {
1394 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1395 kfree(dev->vpd->attr);
1396 }
1397
1398 pcie_aspm_remove_sysfs_dev_files(dev);
1399 if (dev->reset_fn) {
1400 device_remove_file(&dev->dev, &reset_attr);
1401 dev->reset_fn = 0;
1402 }
1403 }
1404
1405 /**
1406 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1407 * @pdev: device whose entries we should free
1408 *
1409 * Cleanup when @pdev is removed from sysfs.
1410 */
1411 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1412 {
1413 int rom_size = 0;
1414
1415 if (!sysfs_initialized)
1416 return;
1417
1418 pci_remove_capabilities_sysfs(pdev);
1419
1420 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1421 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1422 else
1423 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1424
1425 pci_remove_resource_files(pdev);
1426
1427 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1428 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1429 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1430 rom_size = 0x20000;
1431
1432 if (rom_size && pdev->rom_attr) {
1433 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1434 kfree(pdev->rom_attr);
1435 }
1436
1437 pci_remove_firmware_label_files(pdev);
1438
1439 }
1440
1441 static int __init pci_sysfs_init(void)
1442 {
1443 struct pci_dev *pdev = NULL;
1444 int retval;
1445
1446 sysfs_initialized = 1;
1447 for_each_pci_dev(pdev) {
1448 retval = pci_create_sysfs_dev_files(pdev);
1449 if (retval) {
1450 pci_dev_put(pdev);
1451 return retval;
1452 }
1453 }
1454
1455 return 0;
1456 }
1457
1458 late_initcall(pci_sysfs_init);
1459
1460 static struct attribute *pci_dev_dev_attrs[] = {
1461 &vga_attr.attr,
1462 NULL,
1463 };
1464
1465 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1466 struct attribute *a, int n)
1467 {
1468 struct device *dev = container_of(kobj, struct device, kobj);
1469 struct pci_dev *pdev = to_pci_dev(dev);
1470
1471 if (a == &vga_attr.attr)
1472 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1473 return 0;
1474
1475 return a->mode;
1476 }
1477
1478 static struct attribute *pci_dev_hp_attrs[] = {
1479 &dev_remove_attr.attr,
1480 &dev_rescan_attr.attr,
1481 NULL,
1482 };
1483
1484 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1485 struct attribute *a, int n)
1486 {
1487 struct device *dev = container_of(kobj, struct device, kobj);
1488 struct pci_dev *pdev = to_pci_dev(dev);
1489
1490 if (pdev->is_virtfn)
1491 return 0;
1492
1493 return a->mode;
1494 }
1495
1496 static struct attribute_group pci_dev_hp_attr_group = {
1497 .attrs = pci_dev_hp_attrs,
1498 .is_visible = pci_dev_hp_attrs_are_visible,
1499 };
1500
1501 #ifdef CONFIG_PCI_IOV
1502 static struct attribute *sriov_dev_attrs[] = {
1503 &sriov_totalvfs_attr.attr,
1504 &sriov_numvfs_attr.attr,
1505 NULL,
1506 };
1507
1508 static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1509 struct attribute *a, int n)
1510 {
1511 struct device *dev = container_of(kobj, struct device, kobj);
1512
1513 if (!dev_is_pf(dev))
1514 return 0;
1515
1516 return a->mode;
1517 }
1518
1519 static struct attribute_group sriov_dev_attr_group = {
1520 .attrs = sriov_dev_attrs,
1521 .is_visible = sriov_attrs_are_visible,
1522 };
1523 #endif /* CONFIG_PCI_IOV */
1524
1525 static struct attribute_group pci_dev_attr_group = {
1526 .attrs = pci_dev_dev_attrs,
1527 .is_visible = pci_dev_attrs_are_visible,
1528 };
1529
1530 static const struct attribute_group *pci_dev_attr_groups[] = {
1531 &pci_dev_attr_group,
1532 &pci_dev_hp_attr_group,
1533 #ifdef CONFIG_PCI_IOV
1534 &sriov_dev_attr_group,
1535 #endif
1536 NULL,
1537 };
1538
1539 struct device_type pci_dev_type = {
1540 .groups = pci_dev_attr_groups,
1541 };
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