drivers/pci/pci.h

   1 #ifndef DRIVERS_PCI_H
   2 #define DRIVERS_PCI_H
   3
   4 #include <linux/workqueue.h>
   5
   6 #define PCI_CFG_SPACE_SIZE      256
   7 #define PCI_CFG_SPACE_EXP_SIZE  4096
   8
   9 /* Functions internal to the PCI core code */
  10
  11 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
  12 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
  13 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
  14 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
  15 static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
  16 { return; }
  17 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
  18 { return; }
  19 #else
  20 extern void pci_create_firmware_label_files(struct pci_dev *pdev);
  21 extern void pci_remove_firmware_label_files(struct pci_dev *pdev);
  22 #endif
  23 extern void pci_cleanup_rom(struct pci_dev *dev);
  24 #ifdef HAVE_PCI_MMAP
  25 enum pci_mmap_api {
  26         PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
  27         PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
  28 };
  29 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
  30                          struct vm_area_struct *vmai,
  31                          enum pci_mmap_api mmap_api);
  32 #endif
  33 int pci_probe_reset_function(struct pci_dev *dev);
  34
  35 /**
  36  * struct pci_platform_pm_ops - Firmware PM callbacks
  37  *
  38  * @is_manageable: returns 'true' if given device is power manageable by the
  39  *                 platform firmware
  40  *
  41  * @set_state: invokes the platform firmware to set the device's power state
  42  *
  43  * @choose_state: returns PCI power state of given device preferred by the
  44  *                platform; to be used during system-wide transitions from a
  45  *                sleeping state to the working state and vice versa
  46  *
  47  * @can_wakeup: returns 'true' if given device is capable of waking up the
  48  *              system from a sleeping state
  49  *
  50  * @sleep_wake: enables/disables the system wake up capability of given device
  51  *
  52  * @run_wake: enables/disables the platform to generate run-time wake-up events
  53  *              for given device (the device's wake-up capability has to be
  54  *              enabled by @sleep_wake for this feature to work)
  55  *
  56  * If given platform is generally capable of power managing PCI devices, all of
  57  * these callbacks are mandatory.
  58  */
  59 struct pci_platform_pm_ops {
  60         bool (*is_manageable)(struct pci_dev *dev);
  61         int (*set_state)(struct pci_dev *dev, pci_power_t state);
  62         pci_power_t (*choose_state)(struct pci_dev *dev);
  63         bool (*can_wakeup)(struct pci_dev *dev);
  64         int (*sleep_wake)(struct pci_dev *dev, bool enable);
  65         int (*run_wake)(struct pci_dev *dev, bool enable);
  66 };
  67
  68 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
  69 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
  70 extern void pci_disable_enabled_device(struct pci_dev *dev);
  71 extern int pci_finish_runtime_suspend(struct pci_dev *dev);
  72 extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
  73 extern void pci_pm_init(struct pci_dev *dev);
  74 extern void platform_pci_wakeup_init(struct pci_dev *dev);
  75 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
  76 void pci_free_cap_save_buffers(struct pci_dev *dev);
  77
  78 static inline void pci_wakeup_event(struct pci_dev *dev)
  79 {
  80         /* Wait 100 ms before the system can be put into a sleep state. */
  81         pm_wakeup_event(&dev->dev, 100);
  82 }
  83
  84 static inline bool pci_is_bridge(struct pci_dev *pci_dev)
  85 {
  86         return !!(pci_dev->subordinate);
  87 }
  88
  89 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
  90 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
  91 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
  92 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
  93 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
  94 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
  95
  96 struct pci_vpd_ops {
  97         ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
  98         ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
  99         void (*release)(struct pci_dev *dev);
 100 };
 101
 102 struct pci_vpd {
 103         unsigned int len;
 104         const struct pci_vpd_ops *ops;
 105         struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
 106 };
 107
 108 extern int pci_vpd_pci22_init(struct pci_dev *dev);
 109 static inline void pci_vpd_release(struct pci_dev *dev)
 110 {
 111         if (dev->vpd)
 112                 dev->vpd->ops->release(dev);
 113 }
 114
 115 /* PCI /proc functions */
 116 #ifdef CONFIG_PROC_FS
 117 extern int pci_proc_attach_device(struct pci_dev *dev);
 118 extern int pci_proc_detach_device(struct pci_dev *dev);
 119 extern int pci_proc_detach_bus(struct pci_bus *bus);
 120 #else
 121 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
 122 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
 123 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
 124 #endif
 125
 126 /* Functions for PCI Hotplug drivers to use */
 127 int pci_hp_add_bridge(struct pci_dev *dev);
 128 extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
 129
 130 #ifdef HAVE_PCI_LEGACY
 131 extern void pci_create_legacy_files(struct pci_bus *bus);
 132 extern void pci_remove_legacy_files(struct pci_bus *bus);
 133 #else
 134 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
 135 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
 136 #endif
 137
 138 /* Lock for read/write access to pci device and bus lists */
 139 extern struct rw_semaphore pci_bus_sem;
 140
 141 extern raw_spinlock_t pci_lock;
 142
 143 extern unsigned int pci_pm_d3_delay;
 144
 145 #ifdef CONFIG_PCI_MSI
 146 void pci_no_msi(void);
 147 extern void pci_msi_init_pci_dev(struct pci_dev *dev);
 148 #else
 149 static inline void pci_no_msi(void) { }
 150 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
 151 #endif
 152
 153 void pci_realloc_get_opt(char *);
 154
 155 static inline int pci_no_d1d2(struct pci_dev *dev)
 156 {
 157         unsigned int parent_dstates = 0;
 158
 159         if (dev->bus->self)
 160                 parent_dstates = dev->bus->self->no_d1d2;
 161         return (dev->no_d1d2 || parent_dstates);
 162
 163 }
 164 extern struct device_attribute pci_dev_attrs[];
 165 extern struct device_attribute pcibus_dev_attrs[];
 166 #ifdef CONFIG_HOTPLUG
 167 extern struct bus_attribute pci_bus_attrs[];
 168 #else
 169 #define pci_bus_attrs   NULL
 170 #endif
 171
 172
 173 /**
 174  * pci_match_one_device - Tell if a PCI device structure has a matching
 175  *                        PCI device id structure
 176  * @id: single PCI device id structure to match
 177  * @dev: the PCI device structure to match against
 178  *
 179  * Returns the matching pci_device_id structure or %NULL if there is no match.
 180  */
 181 static inline const struct pci_device_id *
 182 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
 183 {
 184         if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
 185             (id->device == PCI_ANY_ID || id->device == dev->device) &&
 186             (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
 187             (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
 188             !((id->class ^ dev->class) & id->class_mask))
 189                 return id;
 190         return NULL;
 191 }
 192
 193 /* PCI slot sysfs helper code */
 194 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
 195
 196 extern struct kset *pci_slots_kset;
 197
 198 struct pci_slot_attribute {
 199         struct attribute attr;
 200         ssize_t (*show)(struct pci_slot *, char *);
 201         ssize_t (*store)(struct pci_slot *, const char *, size_t);
 202 };
 203 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
 204
 205 enum pci_bar_type {
 206         pci_bar_unknown,        /* Standard PCI BAR probe */
 207         pci_bar_io,             /* An io port BAR */
 208         pci_bar_mem32,          /* A 32-bit memory BAR */
 209         pci_bar_mem64,          /* A 64-bit memory BAR */
 210 };
 211
 212 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
 213                                 int crs_timeout);
 214 extern int pci_setup_device(struct pci_dev *dev);
 215 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 216                                 struct resource *res, unsigned int reg);
 217 extern int pci_resource_bar(struct pci_dev *dev, int resno,
 218                             enum pci_bar_type *type);
 219 extern int pci_bus_add_child(struct pci_bus *bus);
 220 extern void pci_enable_ari(struct pci_dev *dev);
 221 /**
 222  * pci_ari_enabled - query ARI forwarding status
 223  * @bus: the PCI bus
 224  *
 225  * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
 226  */
 227 static inline int pci_ari_enabled(struct pci_bus *bus)
 228 {
 229         return bus->self && bus->self->ari_enabled;
 230 }
 231
 232 void pci_reassigndev_resource_alignment(struct pci_dev *dev);
 233 extern void pci_disable_bridge_window(struct pci_dev *dev);
 234
 235 /* Single Root I/O Virtualization */
 236 struct pci_sriov {
 237         int pos;                /* capability position */
 238         int nres;               /* number of resources */
 239         u32 cap;                /* SR-IOV Capabilities */
 240         u16 ctrl;               /* SR-IOV Control */
 241         u16 total;              /* total VFs associated with the PF */
 242         u16 initial;            /* initial VFs associated with the PF */
 243         u16 nr_virtfn;          /* number of VFs available */
 244         u16 offset;             /* first VF Routing ID offset */
 245         u16 stride;             /* following VF stride */
 246         u32 pgsz;               /* page size for BAR alignment */
 247         u8 link;                /* Function Dependency Link */
 248         struct pci_dev *dev;    /* lowest numbered PF */
 249         struct pci_dev *self;   /* this PF */
 250         struct mutex lock;      /* lock for VF bus */
 251         struct work_struct mtask; /* VF Migration task */
 252         u8 __iomem *mstate;     /* VF Migration State Array */
 253 };
 254
 255 #ifdef CONFIG_PCI_ATS
 256 extern void pci_restore_ats_state(struct pci_dev *dev);
 257 #else
 258 static inline void pci_restore_ats_state(struct pci_dev *dev)
 259 {
 260 }
 261 #endif /* CONFIG_PCI_ATS */
 262
 263 #ifdef CONFIG_PCI_IOV
 264 extern int pci_iov_init(struct pci_dev *dev);
 265 extern void pci_iov_release(struct pci_dev *dev);
 266 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 267                                 enum pci_bar_type *type);
 268 extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev,
 269                                                     int resno);
 270 extern void pci_restore_iov_state(struct pci_dev *dev);
 271 extern int pci_iov_bus_range(struct pci_bus *bus);
 272
 273 #else
 274 static inline int pci_iov_init(struct pci_dev *dev)
 275 {
 276         return -ENODEV;
 277 }
 278 static inline void pci_iov_release(struct pci_dev *dev)
 279
 280 {
 281 }
 282 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
 283                                        enum pci_bar_type *type)
 284 {
 285         return 0;
 286 }
 287 static inline void pci_restore_iov_state(struct pci_dev *dev)
 288 {
 289 }
 290 static inline int pci_iov_bus_range(struct pci_bus *bus)
 291 {
 292         return 0;
 293 }
 294
 295 #endif /* CONFIG_PCI_IOV */
 296
 297 extern unsigned long pci_cardbus_resource_alignment(struct resource *);
 298
 299 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
 300                                          struct resource *res)
 301 {
 302 #ifdef CONFIG_PCI_IOV
 303         int resno = res - dev->resource;
 304
 305         if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
 306                 return pci_sriov_resource_alignment(dev, resno);
 307 #endif
 308         if (dev->class >> 8  == PCI_CLASS_BRIDGE_CARDBUS)
 309                 return pci_cardbus_resource_alignment(res);
 310         return resource_alignment(res);
 311 }
 312
 313 extern void pci_enable_acs(struct pci_dev *dev);
 314
 315 struct pci_dev_reset_methods {
 316         u16 vendor;
 317         u16 device;
 318         int (*reset)(struct pci_dev *dev, int probe);
 319 };
 320
 321 #ifdef CONFIG_PCI_QUIRKS
 322 extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
 323 #else
 324 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
 325 {
 326         return -ENOTTY;
 327 }
 328 #endif
 329
 330 #endif /* DRIVERS_PCI_H */