drivers/phy/phy-exynos-mipi-video.c

   1 /*
   2  * Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
   3  *
   4  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
   5  * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/err.h>
  13 #include <linux/io.h>
  14 #include <linux/kernel.h>
  15 #include <linux/mfd/syscon/exynos4-pmu.h>
  16 #include <linux/module.h>
  17 #include <linux/of.h>
  18 #include <linux/of_address.h>
  19 #include <linux/phy/phy.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/regmap.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/mfd/syscon.h>
  24
  25 /* MIPI_PHYn_CONTROL reg. offset (for base address from ioremap): n = 0..1 */
  26 #define EXYNOS_MIPI_PHY_CONTROL(n)      ((n) * 4)
  27
  28 enum exynos_mipi_phy_id {
  29         EXYNOS_MIPI_PHY_ID_CSIS0,
  30         EXYNOS_MIPI_PHY_ID_DSIM0,
  31         EXYNOS_MIPI_PHY_ID_CSIS1,
  32         EXYNOS_MIPI_PHY_ID_DSIM1,
  33         EXYNOS_MIPI_PHYS_NUM
  34 };
  35
  36 #define is_mipi_dsim_phy_id(id) \
  37         ((id) == EXYNOS_MIPI_PHY_ID_DSIM0 || (id) == EXYNOS_MIPI_PHY_ID_DSIM1)
  38
  39 struct exynos_mipi_video_phy {
  40         struct video_phy_desc {
  41                 struct phy *phy;
  42                 unsigned int index;
  43         } phys[EXYNOS_MIPI_PHYS_NUM];
  44         spinlock_t slock;
  45         void __iomem *regs;
  46         struct mutex mutex;
  47         struct regmap *regmap;
  48 };
  49
  50 static int __set_phy_state(struct exynos_mipi_video_phy *state,
  51                         enum exynos_mipi_phy_id id, unsigned int on)
  52 {
  53         const unsigned int offset = EXYNOS4_MIPI_PHY_CONTROL(id / 2);
  54         void __iomem *addr;
  55         u32 val, reset;
  56
  57         if (is_mipi_dsim_phy_id(id))
  58                 reset = EXYNOS4_MIPI_PHY_MRESETN;
  59         else
  60                 reset = EXYNOS4_MIPI_PHY_SRESETN;
  61
  62         if (state->regmap) {
  63                 mutex_lock(&state->mutex);
  64                 regmap_read(state->regmap, offset, &val);
  65                 if (on)
  66                         val |= reset;
  67                 else
  68                         val &= ~reset;
  69                 regmap_write(state->regmap, offset, val);
  70                 if (on)
  71                         val |= EXYNOS4_MIPI_PHY_ENABLE;
  72                 else if (!(val & EXYNOS4_MIPI_PHY_RESET_MASK))
  73                         val &= ~EXYNOS4_MIPI_PHY_ENABLE;
  74                 regmap_write(state->regmap, offset, val);
  75                 mutex_unlock(&state->mutex);
  76         } else {
  77                 addr = state->regs + EXYNOS_MIPI_PHY_CONTROL(id / 2);
  78
  79                 spin_lock(&state->slock);
  80                 val = readl(addr);
  81                 if (on)
  82                         val |= reset;
  83                 else
  84                         val &= ~reset;
  85                 writel(val, addr);
  86                 /* Clear ENABLE bit only if MRESETN, SRESETN bits are not set */
  87                 if (on)
  88                         val |= EXYNOS4_MIPI_PHY_ENABLE;
  89                 else if (!(val & EXYNOS4_MIPI_PHY_RESET_MASK))
  90                         val &= ~EXYNOS4_MIPI_PHY_ENABLE;
  91
  92                 writel(val, addr);
  93                 spin_unlock(&state->slock);
  94         }
  95
  96         return 0;
  97 }
  98
  99 #define to_mipi_video_phy(desc) \
 100         container_of((desc), struct exynos_mipi_video_phy, phys[(desc)->index]);
 101
 102 static int exynos_mipi_video_phy_power_on(struct phy *phy)
 103 {
 104         struct video_phy_desc *phy_desc = phy_get_drvdata(phy);
 105         struct exynos_mipi_video_phy *state = to_mipi_video_phy(phy_desc);
 106
 107         return __set_phy_state(state, phy_desc->index, 1);
 108 }
 109
 110 static int exynos_mipi_video_phy_power_off(struct phy *phy)
 111 {
 112         struct video_phy_desc *phy_desc = phy_get_drvdata(phy);
 113         struct exynos_mipi_video_phy *state = to_mipi_video_phy(phy_desc);
 114
 115         return __set_phy_state(state, phy_desc->index, 0);
 116 }
 117
 118 static struct phy *exynos_mipi_video_phy_xlate(struct device *dev,
 119                                         struct of_phandle_args *args)
 120 {
 121         struct exynos_mipi_video_phy *state = dev_get_drvdata(dev);
 122
 123         if (WARN_ON(args->args[0] >= EXYNOS_MIPI_PHYS_NUM))
 124                 return ERR_PTR(-ENODEV);
 125
 126         return state->phys[args->args[0]].phy;
 127 }
 128
 129 static struct phy_ops exynos_mipi_video_phy_ops = {
 130         .power_on       = exynos_mipi_video_phy_power_on,
 131         .power_off      = exynos_mipi_video_phy_power_off,
 132         .owner          = THIS_MODULE,
 133 };
 134
 135 static int exynos_mipi_video_phy_probe(struct platform_device *pdev)
 136 {
 137         struct exynos_mipi_video_phy *state;
 138         struct device *dev = &pdev->dev;
 139         struct phy_provider *phy_provider;
 140         unsigned int i;
 141
 142         state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
 143         if (!state)
 144                 return -ENOMEM;
 145
 146         state->regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon");
 147         if (IS_ERR(state->regmap)) {
 148                 struct resource *res;
 149
 150                 dev_info(dev, "regmap lookup failed: %ld\n",
 151                          PTR_ERR(state->regmap));
 152
 153                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 154                 state->regs = devm_ioremap_resource(dev, res);
 155                 if (IS_ERR(state->regs))
 156                         return PTR_ERR(state->regs);
 157         }
 158
 159         dev_set_drvdata(dev, state);
 160         spin_lock_init(&state->slock);
 161         mutex_init(&state->mutex);
 162
 163         for (i = 0; i < EXYNOS_MIPI_PHYS_NUM; i++) {
 164                 struct phy *phy = devm_phy_create(dev, NULL,
 165                                                   &exynos_mipi_video_phy_ops);
 166                 if (IS_ERR(phy)) {
 167                         dev_err(dev, "failed to create PHY %d\n", i);
 168                         return PTR_ERR(phy);
 169                 }
 170
 171                 state->phys[i].phy = phy;
 172                 state->phys[i].index = i;
 173                 phy_set_drvdata(phy, &state->phys[i]);
 174         }
 175
 176         phy_provider = devm_of_phy_provider_register(dev,
 177                                         exynos_mipi_video_phy_xlate);
 178
 179         return PTR_ERR_OR_ZERO(phy_provider);
 180 }
 181
 182 static const struct of_device_id exynos_mipi_video_phy_of_match[] = {
 183         { .compatible = "samsung,s5pv210-mipi-video-phy" },
 184         { },
 185 };
 186 MODULE_DEVICE_TABLE(of, exynos_mipi_video_phy_of_match);
 187
 188 static struct platform_driver exynos_mipi_video_phy_driver = {
 189         .probe  = exynos_mipi_video_phy_probe,
 190         .driver = {
 191                 .of_match_table = exynos_mipi_video_phy_of_match,
 192                 .name  = "exynos-mipi-video-phy",
 193         }
 194 };
 195 module_platform_driver(exynos_mipi_video_phy_driver);
 196
 197 MODULE_DESCRIPTION("Samsung S5P/EXYNOS SoC MIPI CSI-2/DSI PHY driver");
 198 MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
 199 MODULE_LICENSE("GPL v2");