2 * Rockchip usb PHY driver
4 * Copyright (C) 2014 Yunzhi Li <lyz@rock-chips.com>
5 * Copyright (C) 2014 ROCKCHIP, Inc.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/clk.h>
18 #include <linux/clk-provider.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/mutex.h>
24 #include <linux/of_address.h>
25 #include <linux/of_platform.h>
26 #include <linux/phy/phy.h>
27 #include <linux/platform_device.h>
28 #include <linux/regulator/consumer.h>
29 #include <linux/reset.h>
30 #include <linux/regmap.h>
31 #include <linux/mfd/syscon.h>
34 * The higher 16-bit of this register is used for write protection
35 * only if BIT(13 + 16) set to 1 the BIT(13) can be written.
37 #define SIDDQ_WRITE_ENA BIT(29)
38 #define SIDDQ_ON BIT(13)
39 #define SIDDQ_OFF (0 << 13)
41 struct rockchip_usb_phys
{
46 struct rockchip_usb_phy_pdata
{
47 struct rockchip_usb_phys
*phys
;
50 struct rockchip_usb_phy_base
{
52 struct regmap
*reg_base
;
53 const struct rockchip_usb_phy_pdata
*pdata
;
56 struct rockchip_usb_phy
{
57 struct rockchip_usb_phy_base
*base
;
58 struct device_node
*np
;
59 unsigned int reg_offset
;
62 struct clk_hw clk480m_hw
;
66 static int rockchip_usb_phy_power(struct rockchip_usb_phy
*phy
,
69 return regmap_write(phy
->base
->reg_base
, phy
->reg_offset
,
70 SIDDQ_WRITE_ENA
| (siddq
? SIDDQ_ON
: SIDDQ_OFF
));
73 static unsigned long rockchip_usb_phy480m_recalc_rate(struct clk_hw
*hw
,
74 unsigned long parent_rate
)
79 static void rockchip_usb_phy480m_disable(struct clk_hw
*hw
)
81 struct rockchip_usb_phy
*phy
= container_of(hw
,
82 struct rockchip_usb_phy
,
85 /* Power down usb phy analog blocks by set siddq 1 */
86 rockchip_usb_phy_power(phy
, 1);
89 static int rockchip_usb_phy480m_enable(struct clk_hw
*hw
)
91 struct rockchip_usb_phy
*phy
= container_of(hw
,
92 struct rockchip_usb_phy
,
95 /* Power up usb phy analog blocks by set siddq 0 */
96 return rockchip_usb_phy_power(phy
, 0);
99 static int rockchip_usb_phy480m_is_enabled(struct clk_hw
*hw
)
101 struct rockchip_usb_phy
*phy
= container_of(hw
,
102 struct rockchip_usb_phy
,
107 ret
= regmap_read(phy
->base
->reg_base
, phy
->reg_offset
, &val
);
111 return (val
& SIDDQ_ON
) ? 0 : 1;
114 static const struct clk_ops rockchip_usb_phy480m_ops
= {
115 .enable
= rockchip_usb_phy480m_enable
,
116 .disable
= rockchip_usb_phy480m_disable
,
117 .is_enabled
= rockchip_usb_phy480m_is_enabled
,
118 .recalc_rate
= rockchip_usb_phy480m_recalc_rate
,
121 static int rockchip_usb_phy_power_off(struct phy
*_phy
)
123 struct rockchip_usb_phy
*phy
= phy_get_drvdata(_phy
);
125 clk_disable_unprepare(phy
->clk480m
);
130 static int rockchip_usb_phy_power_on(struct phy
*_phy
)
132 struct rockchip_usb_phy
*phy
= phy_get_drvdata(_phy
);
134 return clk_prepare_enable(phy
->clk480m
);
137 static const struct phy_ops ops
= {
138 .power_on
= rockchip_usb_phy_power_on
,
139 .power_off
= rockchip_usb_phy_power_off
,
140 .owner
= THIS_MODULE
,
143 static void rockchip_usb_phy_action(void *data
)
145 struct rockchip_usb_phy
*rk_phy
= data
;
147 of_clk_del_provider(rk_phy
->np
);
148 clk_unregister(rk_phy
->clk480m
);
151 clk_put(rk_phy
->clk
);
154 static int rockchip_usb_phy_init(struct rockchip_usb_phy_base
*base
,
155 struct device_node
*child
)
157 struct rockchip_usb_phy
*rk_phy
;
158 unsigned int reg_offset
;
159 const char *clk_name
;
160 struct clk_init_data init
;
163 rk_phy
= devm_kzalloc(base
->dev
, sizeof(*rk_phy
), GFP_KERNEL
);
170 if (of_property_read_u32(child
, "reg", ®_offset
)) {
171 dev_err(base
->dev
, "missing reg property in node %s\n",
176 rk_phy
->reg_offset
= reg_offset
;
178 rk_phy
->clk
= of_clk_get_by_name(child
, "phyclk");
179 if (IS_ERR(rk_phy
->clk
))
184 while (base
->pdata
->phys
[i
].reg
) {
185 if (base
->pdata
->phys
[i
].reg
== reg_offset
) {
186 init
.name
= base
->pdata
->phys
[i
].pll_name
;
193 dev_err(base
->dev
, "phy data not found\n");
198 clk_name
= __clk_get_name(rk_phy
->clk
);
200 init
.parent_names
= &clk_name
;
201 init
.num_parents
= 1;
203 init
.flags
= CLK_IS_ROOT
;
204 init
.parent_names
= NULL
;
205 init
.num_parents
= 0;
208 init
.ops
= &rockchip_usb_phy480m_ops
;
209 rk_phy
->clk480m_hw
.init
= &init
;
211 rk_phy
->clk480m
= clk_register(base
->dev
, &rk_phy
->clk480m_hw
);
212 if (IS_ERR(rk_phy
->clk480m
)) {
213 err
= PTR_ERR(rk_phy
->clk480m
);
217 err
= of_clk_add_provider(child
, of_clk_src_simple_get
,
222 err
= devm_add_action(base
->dev
, rockchip_usb_phy_action
, rk_phy
);
224 goto err_devm_action
;
226 rk_phy
->phy
= devm_phy_create(base
->dev
, child
, &ops
);
227 if (IS_ERR(rk_phy
->phy
)) {
228 dev_err(base
->dev
, "failed to create PHY\n");
229 return PTR_ERR(rk_phy
->phy
);
231 phy_set_drvdata(rk_phy
->phy
, rk_phy
);
233 /* only power up usb phy when it use, so disable it when init*/
234 return rockchip_usb_phy_power(rk_phy
, 1);
237 of_clk_del_provider(child
);
239 clk_unregister(rk_phy
->clk480m
);
242 clk_put(rk_phy
->clk
);
246 static const struct rockchip_usb_phy_pdata rk3066a_pdata
= {
247 .phys
= (struct rockchip_usb_phys
[]){
248 { .reg
= 0x17c, .pll_name
= "sclk_otgphy0_480m" },
249 { .reg
= 0x188, .pll_name
= "sclk_otgphy1_480m" },
254 static const struct rockchip_usb_phy_pdata rk3188_pdata
= {
255 .phys
= (struct rockchip_usb_phys
[]){
256 { .reg
= 0x10c, .pll_name
= "sclk_otgphy0_480m" },
257 { .reg
= 0x11c, .pll_name
= "sclk_otgphy1_480m" },
262 static const struct rockchip_usb_phy_pdata rk3288_pdata
= {
263 .phys
= (struct rockchip_usb_phys
[]){
264 { .reg
= 0x320, .pll_name
= "sclk_otgphy0_480m" },
265 { .reg
= 0x334, .pll_name
= "sclk_otgphy1_480m" },
266 { .reg
= 0x348, .pll_name
= "sclk_otgphy2_480m" },
271 static int rockchip_usb_phy_probe(struct platform_device
*pdev
)
273 struct device
*dev
= &pdev
->dev
;
274 struct rockchip_usb_phy_base
*phy_base
;
275 struct phy_provider
*phy_provider
;
276 const struct of_device_id
*match
;
277 struct device_node
*child
;
280 phy_base
= devm_kzalloc(dev
, sizeof(*phy_base
), GFP_KERNEL
);
284 match
= of_match_device(dev
->driver
->of_match_table
, dev
);
285 if (!match
|| !match
->data
) {
286 dev_err(dev
, "missing phy data\n");
290 phy_base
->pdata
= match
->data
;
293 phy_base
->reg_base
= syscon_regmap_lookup_by_phandle(dev
->of_node
,
295 if (IS_ERR(phy_base
->reg_base
)) {
296 dev_err(&pdev
->dev
, "Missing rockchip,grf property\n");
297 return PTR_ERR(phy_base
->reg_base
);
300 for_each_available_child_of_node(dev
->of_node
, child
) {
301 err
= rockchip_usb_phy_init(phy_base
, child
);
308 phy_provider
= devm_of_phy_provider_register(dev
, of_phy_simple_xlate
);
309 return PTR_ERR_OR_ZERO(phy_provider
);
312 static const struct of_device_id rockchip_usb_phy_dt_ids
[] = {
313 { .compatible
= "rockchip,rk3066a-usb-phy", .data
= &rk3066a_pdata
},
314 { .compatible
= "rockchip,rk3188-usb-phy", .data
= &rk3188_pdata
},
315 { .compatible
= "rockchip,rk3288-usb-phy", .data
= &rk3288_pdata
},
319 MODULE_DEVICE_TABLE(of
, rockchip_usb_phy_dt_ids
);
321 static struct platform_driver rockchip_usb_driver
= {
322 .probe
= rockchip_usb_phy_probe
,
324 .name
= "rockchip-usb-phy",
325 .of_match_table
= rockchip_usb_phy_dt_ids
,
329 module_platform_driver(rockchip_usb_driver
);
331 MODULE_AUTHOR("Yunzhi Li <lyz@rock-chips.com>");
332 MODULE_DESCRIPTION("Rockchip USB 2.0 PHY driver");
333 MODULE_LICENSE("GPL v2");