f8aa3a28176730c0e2d73ed927b9fd604b77ac4b
[deliverable/linux.git] / drivers / pinctrl / meson / pinctrl-meson8.c
1 /*
2 * Pin controller and GPIO driver for Amlogic Meson8.
3 *
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program. If not, see <http://www.gnu.org/licenses/>.
12 */
13
14 #include <dt-bindings/gpio/meson8-gpio.h>
15 #include "pinctrl-meson.h"
16
17 #define AO_OFFSET 120
18
19 #define PIN_GPIOX_0 GPIOX_0
20 #define PIN_GPIOX_1 GPIOX_1
21 #define PIN_GPIOX_2 GPIOX_2
22 #define PIN_GPIOX_3 GPIOX_3
23 #define PIN_GPIOX_4 GPIOX_4
24 #define PIN_GPIOX_5 GPIOX_5
25 #define PIN_GPIOX_6 GPIOX_6
26 #define PIN_GPIOX_7 GPIOX_7
27 #define PIN_GPIOX_8 GPIOX_8
28 #define PIN_GPIOX_9 GPIOX_9
29 #define PIN_GPIOX_10 GPIOX_10
30 #define PIN_GPIOX_11 GPIOX_11
31 #define PIN_GPIOX_12 GPIOX_12
32 #define PIN_GPIOX_13 GPIOX_13
33 #define PIN_GPIOX_14 GPIOX_14
34 #define PIN_GPIOX_15 GPIOX_15
35 #define PIN_GPIOX_16 GPIOX_16
36 #define PIN_GPIOX_17 GPIOX_17
37 #define PIN_GPIOX_18 GPIOX_18
38 #define PIN_GPIOX_19 GPIOX_19
39 #define PIN_GPIOX_20 GPIOX_20
40 #define PIN_GPIOX_21 GPIOX_21
41 #define PIN_GPIOY_0 GPIOY_0
42 #define PIN_GPIOY_1 GPIOY_1
43 #define PIN_GPIOY_2 GPIOY_2
44 #define PIN_GPIOY_3 GPIOY_3
45 #define PIN_GPIOY_4 GPIOY_4
46 #define PIN_GPIOY_5 GPIOY_5
47 #define PIN_GPIOY_6 GPIOY_6
48 #define PIN_GPIOY_7 GPIOY_7
49 #define PIN_GPIOY_8 GPIOY_8
50 #define PIN_GPIOY_9 GPIOY_9
51 #define PIN_GPIOY_10 GPIOY_10
52 #define PIN_GPIOY_11 GPIOY_11
53 #define PIN_GPIOY_12 GPIOY_12
54 #define PIN_GPIOY_13 GPIOY_13
55 #define PIN_GPIOY_14 GPIOY_14
56 #define PIN_GPIOY_15 GPIOY_15
57 #define PIN_GPIOY_16 GPIOY_16
58 #define PIN_GPIODV_0 GPIODV_0
59 #define PIN_GPIODV_1 GPIODV_1
60 #define PIN_GPIODV_2 GPIODV_2
61 #define PIN_GPIODV_3 GPIODV_3
62 #define PIN_GPIODV_4 GPIODV_4
63 #define PIN_GPIODV_5 GPIODV_5
64 #define PIN_GPIODV_6 GPIODV_6
65 #define PIN_GPIODV_7 GPIODV_7
66 #define PIN_GPIODV_8 GPIODV_8
67 #define PIN_GPIODV_9 GPIODV_9
68 #define PIN_GPIODV_10 GPIODV_10
69 #define PIN_GPIODV_11 GPIODV_11
70 #define PIN_GPIODV_12 GPIODV_12
71 #define PIN_GPIODV_13 GPIODV_13
72 #define PIN_GPIODV_14 GPIODV_14
73 #define PIN_GPIODV_15 GPIODV_15
74 #define PIN_GPIODV_16 GPIODV_16
75 #define PIN_GPIODV_17 GPIODV_17
76 #define PIN_GPIODV_18 GPIODV_18
77 #define PIN_GPIODV_19 GPIODV_19
78 #define PIN_GPIODV_20 GPIODV_20
79 #define PIN_GPIODV_21 GPIODV_21
80 #define PIN_GPIODV_22 GPIODV_22
81 #define PIN_GPIODV_23 GPIODV_23
82 #define PIN_GPIODV_24 GPIODV_24
83 #define PIN_GPIODV_25 GPIODV_25
84 #define PIN_GPIODV_26 GPIODV_26
85 #define PIN_GPIODV_27 GPIODV_27
86 #define PIN_GPIODV_28 GPIODV_28
87 #define PIN_GPIODV_29 GPIODV_29
88 #define PIN_GPIOH_0 GPIOH_0
89 #define PIN_GPIOH_1 GPIOH_1
90 #define PIN_GPIOH_2 GPIOH_2
91 #define PIN_GPIOH_3 GPIOH_3
92 #define PIN_GPIOH_4 GPIOH_4
93 #define PIN_GPIOH_5 GPIOH_5
94 #define PIN_GPIOH_6 GPIOH_6
95 #define PIN_GPIOH_7 GPIOH_7
96 #define PIN_GPIOH_8 GPIOH_8
97 #define PIN_GPIOH_9 GPIOH_9
98 #define PIN_GPIOZ_0 GPIOZ_0
99 #define PIN_GPIOZ_1 GPIOZ_1
100 #define PIN_GPIOZ_2 GPIOZ_2
101 #define PIN_GPIOZ_3 GPIOZ_3
102 #define PIN_GPIOZ_4 GPIOZ_4
103 #define PIN_GPIOZ_5 GPIOZ_5
104 #define PIN_GPIOZ_6 GPIOZ_6
105 #define PIN_GPIOZ_7 GPIOZ_7
106 #define PIN_GPIOZ_8 GPIOZ_8
107 #define PIN_GPIOZ_9 GPIOZ_9
108 #define PIN_GPIOZ_10 GPIOZ_10
109 #define PIN_GPIOZ_11 GPIOZ_11
110 #define PIN_GPIOZ_12 GPIOZ_12
111 #define PIN_GPIOZ_13 GPIOZ_13
112 #define PIN_GPIOZ_14 GPIOZ_14
113 #define PIN_CARD_0 CARD_0
114 #define PIN_CARD_1 CARD_1
115 #define PIN_CARD_2 CARD_2
116 #define PIN_CARD_3 CARD_3
117 #define PIN_CARD_4 CARD_4
118 #define PIN_CARD_5 CARD_5
119 #define PIN_CARD_6 CARD_6
120 #define PIN_BOOT_0 BOOT_0
121 #define PIN_BOOT_1 BOOT_1
122 #define PIN_BOOT_2 BOOT_2
123 #define PIN_BOOT_3 BOOT_3
124 #define PIN_BOOT_4 BOOT_4
125 #define PIN_BOOT_5 BOOT_5
126 #define PIN_BOOT_6 BOOT_6
127 #define PIN_BOOT_7 BOOT_7
128 #define PIN_BOOT_8 BOOT_8
129 #define PIN_BOOT_9 BOOT_9
130 #define PIN_BOOT_10 BOOT_10
131 #define PIN_BOOT_11 BOOT_11
132 #define PIN_BOOT_12 BOOT_12
133 #define PIN_BOOT_13 BOOT_13
134 #define PIN_BOOT_14 BOOT_14
135 #define PIN_BOOT_15 BOOT_15
136 #define PIN_BOOT_16 BOOT_16
137 #define PIN_BOOT_17 BOOT_17
138 #define PIN_BOOT_18 BOOT_18
139
140 #define PIN_GPIOAO_0 (AO_OFFSET + GPIOAO_0)
141 #define PIN_GPIOAO_1 (AO_OFFSET + GPIOAO_1)
142 #define PIN_GPIOAO_2 (AO_OFFSET + GPIOAO_2)
143 #define PIN_GPIOAO_3 (AO_OFFSET + GPIOAO_3)
144 #define PIN_GPIOAO_4 (AO_OFFSET + GPIOAO_4)
145 #define PIN_GPIOAO_5 (AO_OFFSET + GPIOAO_5)
146 #define PIN_GPIOAO_6 (AO_OFFSET + GPIOAO_6)
147 #define PIN_GPIOAO_7 (AO_OFFSET + GPIOAO_7)
148 #define PIN_GPIOAO_8 (AO_OFFSET + GPIOAO_8)
149 #define PIN_GPIOAO_9 (AO_OFFSET + GPIOAO_9)
150 #define PIN_GPIOAO_10 (AO_OFFSET + GPIOAO_10)
151 #define PIN_GPIOAO_11 (AO_OFFSET + GPIOAO_11)
152 #define PIN_GPIOAO_12 (AO_OFFSET + GPIOAO_12)
153 #define PIN_GPIOAO_13 (AO_OFFSET + GPIOAO_13)
154 #define PIN_GPIO_BSD_EN (AO_OFFSET + GPIO_BSD_EN)
155 #define PIN_GPIO_TEST_N (AO_OFFSET + GPIO_TEST_N)
156
157 static const struct pinctrl_pin_desc meson8_pins[] = {
158 MESON_PIN(GPIOX_0),
159 MESON_PIN(GPIOX_1),
160 MESON_PIN(GPIOX_2),
161 MESON_PIN(GPIOX_3),
162 MESON_PIN(GPIOX_4),
163 MESON_PIN(GPIOX_5),
164 MESON_PIN(GPIOX_6),
165 MESON_PIN(GPIOX_7),
166 MESON_PIN(GPIOX_8),
167 MESON_PIN(GPIOX_9),
168 MESON_PIN(GPIOX_10),
169 MESON_PIN(GPIOX_11),
170 MESON_PIN(GPIOX_12),
171 MESON_PIN(GPIOX_13),
172 MESON_PIN(GPIOX_14),
173 MESON_PIN(GPIOX_15),
174 MESON_PIN(GPIOX_16),
175 MESON_PIN(GPIOX_17),
176 MESON_PIN(GPIOX_18),
177 MESON_PIN(GPIOX_19),
178 MESON_PIN(GPIOX_20),
179 MESON_PIN(GPIOX_21),
180 MESON_PIN(GPIOY_0),
181 MESON_PIN(GPIOY_1),
182 MESON_PIN(GPIOY_2),
183 MESON_PIN(GPIOY_3),
184 MESON_PIN(GPIOY_4),
185 MESON_PIN(GPIOY_5),
186 MESON_PIN(GPIOY_6),
187 MESON_PIN(GPIOY_7),
188 MESON_PIN(GPIOY_8),
189 MESON_PIN(GPIOY_9),
190 MESON_PIN(GPIOY_10),
191 MESON_PIN(GPIOY_11),
192 MESON_PIN(GPIOY_12),
193 MESON_PIN(GPIOY_13),
194 MESON_PIN(GPIOY_14),
195 MESON_PIN(GPIOY_15),
196 MESON_PIN(GPIOY_16),
197 MESON_PIN(GPIODV_0),
198 MESON_PIN(GPIODV_1),
199 MESON_PIN(GPIODV_2),
200 MESON_PIN(GPIODV_3),
201 MESON_PIN(GPIODV_4),
202 MESON_PIN(GPIODV_5),
203 MESON_PIN(GPIODV_6),
204 MESON_PIN(GPIODV_7),
205 MESON_PIN(GPIODV_8),
206 MESON_PIN(GPIODV_9),
207 MESON_PIN(GPIODV_10),
208 MESON_PIN(GPIODV_11),
209 MESON_PIN(GPIODV_12),
210 MESON_PIN(GPIODV_13),
211 MESON_PIN(GPIODV_14),
212 MESON_PIN(GPIODV_15),
213 MESON_PIN(GPIODV_16),
214 MESON_PIN(GPIODV_17),
215 MESON_PIN(GPIODV_18),
216 MESON_PIN(GPIODV_19),
217 MESON_PIN(GPIODV_20),
218 MESON_PIN(GPIODV_21),
219 MESON_PIN(GPIODV_22),
220 MESON_PIN(GPIODV_23),
221 MESON_PIN(GPIODV_24),
222 MESON_PIN(GPIODV_25),
223 MESON_PIN(GPIODV_26),
224 MESON_PIN(GPIODV_27),
225 MESON_PIN(GPIODV_28),
226 MESON_PIN(GPIODV_29),
227 MESON_PIN(GPIOH_0),
228 MESON_PIN(GPIOH_1),
229 MESON_PIN(GPIOH_2),
230 MESON_PIN(GPIOH_3),
231 MESON_PIN(GPIOH_4),
232 MESON_PIN(GPIOH_5),
233 MESON_PIN(GPIOH_6),
234 MESON_PIN(GPIOH_7),
235 MESON_PIN(GPIOH_8),
236 MESON_PIN(GPIOH_9),
237 MESON_PIN(GPIOZ_0),
238 MESON_PIN(GPIOZ_1),
239 MESON_PIN(GPIOZ_2),
240 MESON_PIN(GPIOZ_3),
241 MESON_PIN(GPIOZ_4),
242 MESON_PIN(GPIOZ_5),
243 MESON_PIN(GPIOZ_6),
244 MESON_PIN(GPIOZ_7),
245 MESON_PIN(GPIOZ_8),
246 MESON_PIN(GPIOZ_9),
247 MESON_PIN(GPIOZ_10),
248 MESON_PIN(GPIOZ_11),
249 MESON_PIN(GPIOZ_12),
250 MESON_PIN(GPIOZ_13),
251 MESON_PIN(GPIOZ_14),
252 MESON_PIN(CARD_0),
253 MESON_PIN(CARD_1),
254 MESON_PIN(CARD_2),
255 MESON_PIN(CARD_3),
256 MESON_PIN(CARD_4),
257 MESON_PIN(CARD_5),
258 MESON_PIN(CARD_6),
259 MESON_PIN(BOOT_0),
260 MESON_PIN(BOOT_1),
261 MESON_PIN(BOOT_2),
262 MESON_PIN(BOOT_3),
263 MESON_PIN(BOOT_4),
264 MESON_PIN(BOOT_5),
265 MESON_PIN(BOOT_6),
266 MESON_PIN(BOOT_7),
267 MESON_PIN(BOOT_8),
268 MESON_PIN(BOOT_9),
269 MESON_PIN(BOOT_10),
270 MESON_PIN(BOOT_11),
271 MESON_PIN(BOOT_12),
272 MESON_PIN(BOOT_13),
273 MESON_PIN(BOOT_14),
274 MESON_PIN(BOOT_15),
275 MESON_PIN(BOOT_16),
276 MESON_PIN(BOOT_17),
277 MESON_PIN(BOOT_18),
278 MESON_PIN(GPIOAO_0),
279 MESON_PIN(GPIOAO_1),
280 MESON_PIN(GPIOAO_2),
281 MESON_PIN(GPIOAO_3),
282 MESON_PIN(GPIOAO_4),
283 MESON_PIN(GPIOAO_5),
284 MESON_PIN(GPIOAO_6),
285 MESON_PIN(GPIOAO_7),
286 MESON_PIN(GPIOAO_8),
287 MESON_PIN(GPIOAO_9),
288 MESON_PIN(GPIOAO_10),
289 MESON_PIN(GPIOAO_11),
290 MESON_PIN(GPIOAO_12),
291 MESON_PIN(GPIOAO_13),
292 MESON_PIN(GPIO_BSD_EN),
293 MESON_PIN(GPIO_TEST_N),
294 };
295
296 /* bank X */
297 static const unsigned int sd_d0_a_pins[] = { PIN_GPIOX_0 };
298 static const unsigned int sd_d1_a_pins[] = { PIN_GPIOX_1 };
299 static const unsigned int sd_d2_a_pins[] = { PIN_GPIOX_2 };
300 static const unsigned int sd_d3_a_pins[] = { PIN_GPIOX_3 };
301 static const unsigned int sd_clk_a_pins[] = { PIN_GPIOX_8 };
302 static const unsigned int sd_cmd_a_pins[] = { PIN_GPIOX_9 };
303
304 static const unsigned int sdxc_d0_a_pins[] = { PIN_GPIOX_0 };
305 static const unsigned int sdxc_d13_a_pins[] = { PIN_GPIOX_1, PIN_GPIOX_2,
306 PIN_GPIOX_3 };
307 static const unsigned int sdxc_d47_a_pins[] = { PIN_GPIOX_4, PIN_GPIOX_5,
308 PIN_GPIOX_6, PIN_GPIOX_7 };
309 static const unsigned int sdxc_clk_a_pins[] = { PIN_GPIOX_8 };
310 static const unsigned int sdxc_cmd_a_pins[] = { PIN_GPIOX_9 };
311
312 static const unsigned int pcm_out_a_pins[] = { PIN_GPIOX_4 };
313 static const unsigned int pcm_in_a_pins[] = { PIN_GPIOX_5 };
314 static const unsigned int pcm_fs_a_pins[] = { PIN_GPIOX_6 };
315 static const unsigned int pcm_clk_a_pins[] = { PIN_GPIOX_7 };
316
317 static const unsigned int uart_tx_a0_pins[] = { PIN_GPIOX_4 };
318 static const unsigned int uart_rx_a0_pins[] = { PIN_GPIOX_5 };
319 static const unsigned int uart_cts_a0_pins[] = { PIN_GPIOX_6 };
320 static const unsigned int uart_rts_a0_pins[] = { PIN_GPIOX_7 };
321
322 static const unsigned int uart_tx_a1_pins[] = { PIN_GPIOX_12 };
323 static const unsigned int uart_rx_a1_pins[] = { PIN_GPIOX_13 };
324 static const unsigned int uart_cts_a1_pins[] = { PIN_GPIOX_14 };
325 static const unsigned int uart_rts_a1_pins[] = { PIN_GPIOX_15 };
326
327 static const unsigned int uart_tx_b0_pins[] = { PIN_GPIOX_16 };
328 static const unsigned int uart_rx_b0_pins[] = { PIN_GPIOX_17 };
329 static const unsigned int uart_cts_b0_pins[] = { PIN_GPIOX_18 };
330 static const unsigned int uart_rts_b0_pins[] = { PIN_GPIOX_19 };
331
332 static const unsigned int iso7816_det_pins[] = { PIN_GPIOX_16 };
333 static const unsigned int iso7816_reset_pins[] = { PIN_GPIOX_17 };
334 static const unsigned int iso7816_clk_pins[] = { PIN_GPIOX_18 };
335 static const unsigned int iso7816_data_pins[] = { PIN_GPIOX_19 };
336
337 static const unsigned int i2c_sda_d0_pins[] = { PIN_GPIOX_16 };
338 static const unsigned int i2c_sck_d0_pins[] = { PIN_GPIOX_17 };
339
340 static const unsigned int xtal_32k_out_pins[] = { PIN_GPIOX_10 };
341 static const unsigned int xtal_24m_out_pins[] = { PIN_GPIOX_11 };
342
343 /* bank Y */
344 static const unsigned int uart_tx_c_pins[] = { PIN_GPIOY_0 };
345 static const unsigned int uart_rx_c_pins[] = { PIN_GPIOY_1 };
346 static const unsigned int uart_cts_c_pins[] = { PIN_GPIOY_2 };
347 static const unsigned int uart_rts_c_pins[] = { PIN_GPIOY_3 };
348
349 static const unsigned int pcm_out_b_pins[] = { PIN_GPIOY_4 };
350 static const unsigned int pcm_in_b_pins[] = { PIN_GPIOY_5 };
351 static const unsigned int pcm_fs_b_pins[] = { PIN_GPIOY_6 };
352 static const unsigned int pcm_clk_b_pins[] = { PIN_GPIOY_7 };
353
354 static const unsigned int i2c_sda_c0_pins[] = { PIN_GPIOY_0 };
355 static const unsigned int i2c_sck_c0_pins[] = { PIN_GPIOY_1 };
356
357 /* bank DV */
358 static const unsigned int dvin_rgb_pins[] = { PIN_GPIODV_0, PIN_GPIODV_1,
359 PIN_GPIODV_2, PIN_GPIODV_3,
360 PIN_GPIODV_4, PIN_GPIODV_5,
361 PIN_GPIODV_6, PIN_GPIODV_7,
362 PIN_GPIODV_8, PIN_GPIODV_9,
363 PIN_GPIODV_10, PIN_GPIODV_11,
364 PIN_GPIODV_12, PIN_GPIODV_13,
365 PIN_GPIODV_14, PIN_GPIODV_15,
366 PIN_GPIODV_16, PIN_GPIODV_17,
367 PIN_GPIODV_18, PIN_GPIODV_19,
368 PIN_GPIODV_20, PIN_GPIODV_21,
369 PIN_GPIODV_22, PIN_GPIODV_23 };
370 static const unsigned int dvin_vs_pins[] = { PIN_GPIODV_24 };
371 static const unsigned int dvin_hs_pins[] = { PIN_GPIODV_25 };
372 static const unsigned int dvin_clk_pins[] = { PIN_GPIODV_26 };
373 static const unsigned int dvin_de_pins[] = { PIN_GPIODV_27 };
374
375 static const unsigned int enc_0_pins[] = { PIN_GPIODV_0 };
376 static const unsigned int enc_1_pins[] = { PIN_GPIODV_1 };
377 static const unsigned int enc_2_pins[] = { PIN_GPIODV_2 };
378 static const unsigned int enc_3_pins[] = { PIN_GPIODV_3 };
379 static const unsigned int enc_4_pins[] = { PIN_GPIODV_4 };
380 static const unsigned int enc_5_pins[] = { PIN_GPIODV_5 };
381 static const unsigned int enc_6_pins[] = { PIN_GPIODV_6 };
382 static const unsigned int enc_7_pins[] = { PIN_GPIODV_7 };
383 static const unsigned int enc_8_pins[] = { PIN_GPIODV_8 };
384 static const unsigned int enc_9_pins[] = { PIN_GPIODV_9 };
385 static const unsigned int enc_10_pins[] = { PIN_GPIODV_10 };
386 static const unsigned int enc_11_pins[] = { PIN_GPIODV_11 };
387 static const unsigned int enc_12_pins[] = { PIN_GPIODV_12 };
388 static const unsigned int enc_13_pins[] = { PIN_GPIODV_13 };
389 static const unsigned int enc_14_pins[] = { PIN_GPIODV_14 };
390 static const unsigned int enc_15_pins[] = { PIN_GPIODV_15 };
391 static const unsigned int enc_16_pins[] = { PIN_GPIODV_16 };
392 static const unsigned int enc_17_pins[] = { PIN_GPIODV_17 };
393
394 static const unsigned int uart_tx_b1_pins[] = { PIN_GPIODV_24 };
395 static const unsigned int uart_rx_b1_pins[] = { PIN_GPIODV_25 };
396 static const unsigned int uart_cts_b1_pins[] = { PIN_GPIODV_26 };
397 static const unsigned int uart_rts_b1_pins[] = { PIN_GPIODV_27 };
398
399 static const unsigned int vga_vs_pins[] = { PIN_GPIODV_24 };
400 static const unsigned int vga_hs_pins[] = { PIN_GPIODV_25 };
401
402 /* bank H */
403 static const unsigned int hdmi_hpd_pins[] = { PIN_GPIOH_0 };
404 static const unsigned int hdmi_sda_pins[] = { PIN_GPIOH_1 };
405 static const unsigned int hdmi_scl_pins[] = { PIN_GPIOH_2 };
406 static const unsigned int hdmi_cec_pins[] = { PIN_GPIOH_3 };
407
408 static const unsigned int spi_ss0_0_pins[] = { PIN_GPIOH_3 };
409 static const unsigned int spi_miso_0_pins[] = { PIN_GPIOH_4 };
410 static const unsigned int spi_mosi_0_pins[] = { PIN_GPIOH_5 };
411 static const unsigned int spi_sclk_0_pins[] = { PIN_GPIOH_6 };
412
413 static const unsigned int i2c_sda_d1_pins[] = { PIN_GPIOH_7 };
414 static const unsigned int i2c_sck_d1_pins[] = { PIN_GPIOH_8 };
415
416 /* bank Z */
417 static const unsigned int spi_ss0_1_pins[] = { PIN_GPIOZ_9 };
418 static const unsigned int spi_ss1_1_pins[] = { PIN_GPIOZ_10 };
419 static const unsigned int spi_sclk_1_pins[] = { PIN_GPIOZ_11 };
420 static const unsigned int spi_mosi_1_pins[] = { PIN_GPIOZ_12 };
421 static const unsigned int spi_miso_1_pins[] = { PIN_GPIOZ_13 };
422 static const unsigned int spi_ss2_1_pins[] = { PIN_GPIOZ_14 };
423
424 static const unsigned int eth_tx_clk_50m_pins[] = { PIN_GPIOZ_4 };
425 static const unsigned int eth_tx_en_pins[] = { PIN_GPIOZ_5 };
426 static const unsigned int eth_txd1_pins[] = { PIN_GPIOZ_6 };
427 static const unsigned int eth_txd0_pins[] = { PIN_GPIOZ_7 };
428 static const unsigned int eth_rx_clk_in_pins[] = { PIN_GPIOZ_8 };
429 static const unsigned int eth_rx_dv_pins[] = { PIN_GPIOZ_9 };
430 static const unsigned int eth_rxd1_pins[] = { PIN_GPIOZ_10 };
431 static const unsigned int eth_rxd0_pins[] = { PIN_GPIOZ_11 };
432 static const unsigned int eth_mdio_pins[] = { PIN_GPIOZ_12 };
433 static const unsigned int eth_mdc_pins[] = { PIN_GPIOZ_13 };
434
435 static const unsigned int i2c_sda_a0_pins[] = { PIN_GPIOZ_0 };
436 static const unsigned int i2c_sck_a0_pins[] = { PIN_GPIOZ_1 };
437
438 static const unsigned int i2c_sda_b_pins[] = { PIN_GPIOZ_2 };
439 static const unsigned int i2c_sck_b_pins[] = { PIN_GPIOZ_3 };
440
441 static const unsigned int i2c_sda_c1_pins[] = { PIN_GPIOZ_4 };
442 static const unsigned int i2c_sck_c1_pins[] = { PIN_GPIOZ_5 };
443
444 static const unsigned int i2c_sda_a1_pins[] = { PIN_GPIOZ_0 };
445 static const unsigned int i2c_sck_a1_pins[] = { PIN_GPIOZ_1 };
446
447 static const unsigned int i2c_sda_a2_pins[] = { PIN_GPIOZ_0 };
448 static const unsigned int i2c_sck_a2_pins[] = { PIN_GPIOZ_1 };
449
450 /* bank BOOT */
451 static const unsigned int sd_d0_c_pins[] = { PIN_BOOT_0 };
452 static const unsigned int sd_d1_c_pins[] = { PIN_BOOT_1 };
453 static const unsigned int sd_d2_c_pins[] = { PIN_BOOT_2 };
454 static const unsigned int sd_d3_c_pins[] = { PIN_BOOT_3 };
455 static const unsigned int sd_cmd_c_pins[] = { PIN_BOOT_16 };
456 static const unsigned int sd_clk_c_pins[] = { PIN_BOOT_17 };
457
458 static const unsigned int sdxc_d0_c_pins[] = { PIN_BOOT_0};
459 static const unsigned int sdxc_d13_c_pins[] = { PIN_BOOT_1, PIN_BOOT_2,
460 PIN_BOOT_3 };
461 static const unsigned int sdxc_d47_c_pins[] = { PIN_BOOT_4, PIN_BOOT_5,
462 PIN_BOOT_6, PIN_BOOT_7 };
463 static const unsigned int sdxc_cmd_c_pins[] = { PIN_BOOT_16 };
464 static const unsigned int sdxc_clk_c_pins[] = { PIN_BOOT_17 };
465
466 static const unsigned int nand_io_pins[] = { PIN_BOOT_0, PIN_BOOT_1,
467 PIN_BOOT_2, PIN_BOOT_3,
468 PIN_BOOT_4, PIN_BOOT_5,
469 PIN_BOOT_6, PIN_BOOT_7 };
470 static const unsigned int nand_io_ce0_pins[] = { PIN_BOOT_8 };
471 static const unsigned int nand_io_ce1_pins[] = { PIN_BOOT_9 };
472 static const unsigned int nand_io_rb0_pins[] = { PIN_BOOT_10 };
473 static const unsigned int nand_ale_pins[] = { PIN_BOOT_11 };
474 static const unsigned int nand_cle_pins[] = { PIN_BOOT_12 };
475 static const unsigned int nand_wen_clk_pins[] = { PIN_BOOT_13 };
476 static const unsigned int nand_ren_clk_pins[] = { PIN_BOOT_14 };
477 static const unsigned int nand_dqs_pins[] = { PIN_BOOT_15 };
478 static const unsigned int nand_ce2_pins[] = { PIN_BOOT_16 };
479 static const unsigned int nand_ce3_pins[] = { PIN_BOOT_17 };
480
481 static const unsigned int nor_d_pins[] = { PIN_BOOT_11 };
482 static const unsigned int nor_q_pins[] = { PIN_BOOT_12 };
483 static const unsigned int nor_c_pins[] = { PIN_BOOT_13 };
484 static const unsigned int nor_cs_pins[] = { PIN_BOOT_18 };
485
486 /* bank CARD */
487 static const unsigned int sd_d1_b_pins[] = { PIN_CARD_0 };
488 static const unsigned int sd_d0_b_pins[] = { PIN_CARD_1 };
489 static const unsigned int sd_clk_b_pins[] = { PIN_CARD_2 };
490 static const unsigned int sd_cmd_b_pins[] = { PIN_CARD_3 };
491 static const unsigned int sd_d3_b_pins[] = { PIN_CARD_4 };
492 static const unsigned int sd_d2_b_pins[] = { PIN_CARD_5 };
493
494 static const unsigned int sdxc_d13_b_pins[] = { PIN_CARD_0, PIN_CARD_4,
495 PIN_CARD_5 };
496 static const unsigned int sdxc_d0_b_pins[] = { PIN_CARD_1 };
497 static const unsigned int sdxc_clk_b_pins[] = { PIN_CARD_2 };
498 static const unsigned int sdxc_cmd_b_pins[] = { PIN_CARD_3 };
499
500 /* bank AO */
501 static const unsigned int uart_tx_ao_a_pins[] = { PIN_GPIOAO_0 };
502 static const unsigned int uart_rx_ao_a_pins[] = { PIN_GPIOAO_1 };
503 static const unsigned int uart_cts_ao_a_pins[] = { PIN_GPIOAO_2 };
504 static const unsigned int uart_rts_ao_a_pins[] = { PIN_GPIOAO_3 };
505
506 static const unsigned int remote_input_pins[] = { PIN_GPIOAO_7 };
507
508 static const unsigned int i2c_slave_sck_ao_pins[] = { PIN_GPIOAO_4 };
509 static const unsigned int i2c_slave_sda_ao_pins[] = { PIN_GPIOAO_5 };
510
511 static const unsigned int uart_tx_ao_b0_pins[] = { PIN_GPIOAO_0 };
512 static const unsigned int uart_rx_ao_b0_pins[] = { PIN_GPIOAO_1 };
513
514 static const unsigned int uart_tx_ao_b1_pins[] = { PIN_GPIOAO_4 };
515 static const unsigned int uart_rx_ao_b1_pins[] = { PIN_GPIOAO_5 };
516
517 static const unsigned int i2c_mst_sck_ao_pins[] = { PIN_GPIOAO_4 };
518 static const unsigned int i2c_mst_sda_ao_pins[] = { PIN_GPIOAO_5 };
519
520 static struct meson_pmx_group meson8_groups[] = {
521 GPIO_GROUP(GPIOX_0),
522 GPIO_GROUP(GPIOX_1),
523 GPIO_GROUP(GPIOX_2),
524 GPIO_GROUP(GPIOX_3),
525 GPIO_GROUP(GPIOX_4),
526 GPIO_GROUP(GPIOX_5),
527 GPIO_GROUP(GPIOX_6),
528 GPIO_GROUP(GPIOX_7),
529 GPIO_GROUP(GPIOX_8),
530 GPIO_GROUP(GPIOX_9),
531 GPIO_GROUP(GPIOX_10),
532 GPIO_GROUP(GPIOX_11),
533 GPIO_GROUP(GPIOX_12),
534 GPIO_GROUP(GPIOX_13),
535 GPIO_GROUP(GPIOX_14),
536 GPIO_GROUP(GPIOX_15),
537 GPIO_GROUP(GPIOX_16),
538 GPIO_GROUP(GPIOX_17),
539 GPIO_GROUP(GPIOX_18),
540 GPIO_GROUP(GPIOX_19),
541 GPIO_GROUP(GPIOX_20),
542 GPIO_GROUP(GPIOX_21),
543 GPIO_GROUP(GPIOY_0),
544 GPIO_GROUP(GPIOY_1),
545 GPIO_GROUP(GPIOY_2),
546 GPIO_GROUP(GPIOY_3),
547 GPIO_GROUP(GPIOY_4),
548 GPIO_GROUP(GPIOY_5),
549 GPIO_GROUP(GPIOY_6),
550 GPIO_GROUP(GPIOY_7),
551 GPIO_GROUP(GPIOY_8),
552 GPIO_GROUP(GPIOY_9),
553 GPIO_GROUP(GPIOY_10),
554 GPIO_GROUP(GPIOY_11),
555 GPIO_GROUP(GPIOY_12),
556 GPIO_GROUP(GPIOY_13),
557 GPIO_GROUP(GPIOY_14),
558 GPIO_GROUP(GPIOY_15),
559 GPIO_GROUP(GPIOY_16),
560 GPIO_GROUP(GPIODV_0),
561 GPIO_GROUP(GPIODV_1),
562 GPIO_GROUP(GPIODV_2),
563 GPIO_GROUP(GPIODV_3),
564 GPIO_GROUP(GPIODV_4),
565 GPIO_GROUP(GPIODV_5),
566 GPIO_GROUP(GPIODV_6),
567 GPIO_GROUP(GPIODV_7),
568 GPIO_GROUP(GPIODV_8),
569 GPIO_GROUP(GPIODV_9),
570 GPIO_GROUP(GPIODV_10),
571 GPIO_GROUP(GPIODV_11),
572 GPIO_GROUP(GPIODV_12),
573 GPIO_GROUP(GPIODV_13),
574 GPIO_GROUP(GPIODV_14),
575 GPIO_GROUP(GPIODV_15),
576 GPIO_GROUP(GPIODV_16),
577 GPIO_GROUP(GPIODV_17),
578 GPIO_GROUP(GPIODV_18),
579 GPIO_GROUP(GPIODV_19),
580 GPIO_GROUP(GPIODV_20),
581 GPIO_GROUP(GPIODV_21),
582 GPIO_GROUP(GPIODV_22),
583 GPIO_GROUP(GPIODV_23),
584 GPIO_GROUP(GPIODV_24),
585 GPIO_GROUP(GPIODV_25),
586 GPIO_GROUP(GPIODV_26),
587 GPIO_GROUP(GPIODV_27),
588 GPIO_GROUP(GPIODV_28),
589 GPIO_GROUP(GPIODV_29),
590 GPIO_GROUP(GPIOH_0),
591 GPIO_GROUP(GPIOH_1),
592 GPIO_GROUP(GPIOH_2),
593 GPIO_GROUP(GPIOH_3),
594 GPIO_GROUP(GPIOH_4),
595 GPIO_GROUP(GPIOH_5),
596 GPIO_GROUP(GPIOH_6),
597 GPIO_GROUP(GPIOH_7),
598 GPIO_GROUP(GPIOH_8),
599 GPIO_GROUP(GPIOH_9),
600 GPIO_GROUP(GPIOZ_0),
601 GPIO_GROUP(GPIOZ_1),
602 GPIO_GROUP(GPIOZ_2),
603 GPIO_GROUP(GPIOZ_3),
604 GPIO_GROUP(GPIOZ_4),
605 GPIO_GROUP(GPIOZ_5),
606 GPIO_GROUP(GPIOZ_6),
607 GPIO_GROUP(GPIOZ_7),
608 GPIO_GROUP(GPIOZ_8),
609 GPIO_GROUP(GPIOZ_9),
610 GPIO_GROUP(GPIOZ_10),
611 GPIO_GROUP(GPIOZ_11),
612 GPIO_GROUP(GPIOZ_12),
613 GPIO_GROUP(GPIOZ_13),
614 GPIO_GROUP(GPIOZ_14),
615 GPIO_GROUP(GPIOAO_0),
616 GPIO_GROUP(GPIOAO_1),
617 GPIO_GROUP(GPIOAO_2),
618 GPIO_GROUP(GPIOAO_3),
619 GPIO_GROUP(GPIOAO_4),
620 GPIO_GROUP(GPIOAO_5),
621 GPIO_GROUP(GPIOAO_6),
622 GPIO_GROUP(GPIOAO_7),
623 GPIO_GROUP(GPIOAO_8),
624 GPIO_GROUP(GPIOAO_9),
625 GPIO_GROUP(GPIOAO_10),
626 GPIO_GROUP(GPIOAO_11),
627 GPIO_GROUP(GPIOAO_12),
628 GPIO_GROUP(GPIOAO_13),
629 GPIO_GROUP(GPIO_BSD_EN),
630 GPIO_GROUP(GPIO_TEST_N),
631
632 /* bank X */
633 GROUP(sd_d0_a, 8, 5),
634 GROUP(sd_d1_a, 8, 4),
635 GROUP(sd_d2_a, 8, 3),
636 GROUP(sd_d3_a, 8, 2),
637 GROUP(sd_clk_a, 8, 1),
638 GROUP(sd_cmd_a, 8, 0),
639
640 GROUP(sdxc_d0_a, 5, 14),
641 GROUP(sdxc_d13_a, 5, 13),
642 GROUP(sdxc_d47_a, 5, 12),
643 GROUP(sdxc_clk_a, 5, 11),
644 GROUP(sdxc_cmd_a, 5, 10),
645
646 GROUP(pcm_out_a, 3, 30),
647 GROUP(pcm_in_a, 3, 29),
648 GROUP(pcm_fs_a, 3, 28),
649 GROUP(pcm_clk_a, 3, 27),
650
651 GROUP(uart_tx_a0, 4, 17),
652 GROUP(uart_rx_a0, 4, 16),
653 GROUP(uart_cts_a0, 4, 15),
654 GROUP(uart_rts_a0, 4, 14),
655
656 GROUP(uart_tx_a1, 4, 13),
657 GROUP(uart_rx_a1, 4, 12),
658 GROUP(uart_cts_a1, 4, 11),
659 GROUP(uart_rts_a1, 4, 10),
660
661 GROUP(uart_tx_b0, 4, 9),
662 GROUP(uart_rx_b0, 4, 8),
663 GROUP(uart_cts_b0, 4, 7),
664 GROUP(uart_rts_b0, 4, 6),
665
666 GROUP(iso7816_det, 4, 21),
667 GROUP(iso7816_reset, 4, 20),
668 GROUP(iso7816_clk, 4, 19),
669 GROUP(iso7816_data, 4, 18),
670
671 GROUP(i2c_sda_d0, 4, 5),
672 GROUP(i2c_sck_d0, 4, 4),
673
674 GROUP(xtal_32k_out, 3, 22),
675 GROUP(xtal_24m_out, 3, 23),
676
677 /* bank Y */
678 GROUP(uart_tx_c, 1, 19),
679 GROUP(uart_rx_c, 1, 18),
680 GROUP(uart_cts_c, 1, 17),
681 GROUP(uart_rts_c, 1, 16),
682
683 GROUP(pcm_out_b, 4, 25),
684 GROUP(pcm_in_b, 4, 24),
685 GROUP(pcm_fs_b, 4, 23),
686 GROUP(pcm_clk_b, 4, 22),
687
688 GROUP(i2c_sda_c0, 1, 15),
689 GROUP(i2c_sck_c0, 1, 14),
690
691 /* bank DV */
692 GROUP(dvin_rgb, 0, 6),
693 GROUP(dvin_vs, 0, 9),
694 GROUP(dvin_hs, 0, 8),
695 GROUP(dvin_clk, 0, 7),
696 GROUP(dvin_de, 0, 10),
697
698 GROUP(enc_0, 7, 0),
699 GROUP(enc_1, 7, 1),
700 GROUP(enc_2, 7, 2),
701 GROUP(enc_3, 7, 3),
702 GROUP(enc_4, 7, 4),
703 GROUP(enc_5, 7, 5),
704 GROUP(enc_6, 7, 6),
705 GROUP(enc_7, 7, 7),
706 GROUP(enc_8, 7, 8),
707 GROUP(enc_9, 7, 9),
708 GROUP(enc_10, 7, 10),
709 GROUP(enc_11, 7, 11),
710 GROUP(enc_12, 7, 12),
711 GROUP(enc_13, 7, 13),
712 GROUP(enc_14, 7, 14),
713 GROUP(enc_15, 7, 15),
714 GROUP(enc_16, 7, 16),
715 GROUP(enc_17, 7, 17),
716
717 GROUP(uart_tx_b1, 6, 23),
718 GROUP(uart_rx_b1, 6, 22),
719 GROUP(uart_cts_b1, 6, 21),
720 GROUP(uart_rts_b1, 6, 20),
721
722 GROUP(vga_vs, 0, 21),
723 GROUP(vga_hs, 0, 20),
724
725 /* bank H */
726 GROUP(hdmi_hpd, 1, 26),
727 GROUP(hdmi_sda, 1, 25),
728 GROUP(hdmi_scl, 1, 24),
729 GROUP(hdmi_cec, 1, 23),
730
731 GROUP(spi_ss0_0, 9, 13),
732 GROUP(spi_miso_0, 9, 12),
733 GROUP(spi_mosi_0, 9, 11),
734 GROUP(spi_sclk_0, 9, 10),
735
736 GROUP(i2c_sda_d1, 4, 3),
737 GROUP(i2c_sck_d1, 4, 2),
738
739 /* bank Z */
740 GROUP(spi_ss0_1, 8, 16),
741 GROUP(spi_ss1_1, 8, 12),
742 GROUP(spi_sclk_1, 8, 15),
743 GROUP(spi_mosi_1, 8, 14),
744 GROUP(spi_miso_1, 8, 13),
745 GROUP(spi_ss2_1, 8, 17),
746
747 GROUP(eth_tx_clk_50m, 6, 15),
748 GROUP(eth_tx_en, 6, 14),
749 GROUP(eth_txd1, 6, 13),
750 GROUP(eth_txd0, 6, 12),
751 GROUP(eth_rx_clk_in, 6, 10),
752 GROUP(eth_rx_dv, 6, 11),
753 GROUP(eth_rxd1, 6, 8),
754 GROUP(eth_rxd0, 6, 7),
755 GROUP(eth_mdio, 6, 6),
756 GROUP(eth_mdc, 6, 5),
757
758 GROUP(i2c_sda_a0, 5, 31),
759 GROUP(i2c_sck_a0, 5, 30),
760
761 GROUP(i2c_sda_b, 5, 27),
762 GROUP(i2c_sck_b, 5, 26),
763
764 GROUP(i2c_sda_c1, 5, 25),
765 GROUP(i2c_sck_c1, 5, 24),
766
767 GROUP(i2c_sda_a1, 5, 9),
768 GROUP(i2c_sck_a1, 5, 8),
769
770 GROUP(i2c_sda_a2, 5, 7),
771 GROUP(i2c_sck_a2, 5, 6),
772
773 /* bank BOOT */
774 GROUP(sd_d0_c, 6, 29),
775 GROUP(sd_d1_c, 6, 28),
776 GROUP(sd_d2_c, 6, 27),
777 GROUP(sd_d3_c, 6, 26),
778 GROUP(sd_cmd_c, 6, 25),
779 GROUP(sd_clk_c, 6, 24),
780
781 GROUP(sdxc_d0_c, 4, 30),
782 GROUP(sdxc_d13_c, 4, 29),
783 GROUP(sdxc_d47_c, 4, 28),
784 GROUP(sdxc_cmd_c, 4, 27),
785 GROUP(sdxc_clk_c, 4, 26),
786
787 GROUP(nand_io, 2, 26),
788 GROUP(nand_io_ce0, 2, 25),
789 GROUP(nand_io_ce1, 2, 24),
790 GROUP(nand_io_rb0, 2, 17),
791 GROUP(nand_ale, 2, 21),
792 GROUP(nand_cle, 2, 20),
793 GROUP(nand_wen_clk, 2, 19),
794 GROUP(nand_ren_clk, 2, 18),
795 GROUP(nand_dqs, 2, 27),
796 GROUP(nand_ce2, 2, 23),
797 GROUP(nand_ce3, 2, 22),
798
799 GROUP(nor_d, 5, 1),
800 GROUP(nor_q, 5, 3),
801 GROUP(nor_c, 5, 2),
802 GROUP(nor_cs, 5, 0),
803
804 /* bank CARD */
805 GROUP(sd_d1_b, 2, 14),
806 GROUP(sd_d0_b, 2, 15),
807 GROUP(sd_clk_b, 2, 11),
808 GROUP(sd_cmd_b, 2, 10),
809 GROUP(sd_d3_b, 2, 12),
810 GROUP(sd_d2_b, 2, 13),
811
812 GROUP(sdxc_d13_b, 2, 6),
813 GROUP(sdxc_d0_b, 2, 7),
814 GROUP(sdxc_clk_b, 2, 5),
815 GROUP(sdxc_cmd_b, 2, 4),
816
817 /* bank AO */
818 GROUP_AO(uart_tx_ao_a, 0, 12),
819 GROUP_AO(uart_rx_ao_a, 0, 11),
820 GROUP_AO(uart_cts_ao_a, 0, 10),
821 GROUP_AO(uart_rts_ao_a, 0, 9),
822
823 GROUP_AO(remote_input, 0, 0),
824
825 GROUP_AO(i2c_slave_sck_ao, 0, 2),
826 GROUP_AO(i2c_slave_sda_ao, 0, 1),
827
828 GROUP_AO(uart_tx_ao_b0, 0, 26),
829 GROUP_AO(uart_rx_ao_b0, 0, 25),
830
831 GROUP_AO(uart_tx_ao_b1, 0, 24),
832 GROUP_AO(uart_rx_ao_b1, 0, 23),
833
834 GROUP_AO(i2c_mst_sck_ao, 0, 6),
835 GROUP_AO(i2c_mst_sda_ao, 0, 5),
836 };
837
838 static const char * const gpio_groups[] = {
839 "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
840 "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
841 "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
842 "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
843 "GPIOX_20", "GPIOX_21",
844
845 "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4",
846 "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9",
847 "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14",
848 "GPIOY_15", "GPIOY_16",
849
850 "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4",
851 "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9",
852 "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14",
853 "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19",
854 "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24",
855 "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29",
856
857 "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
858 "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
859
860 "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
861 "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
862 "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14",
863
864 "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
865 "CARD_5", "CARD_6",
866
867 "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
868 "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
869 "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
870 "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
871
872 "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
873 "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
874 "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
875 "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N"
876 };
877
878 static const char * const sd_a_groups[] = {
879 "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a", "sd_cmd_a"
880 };
881
882 static const char * const sdxc_a_groups[] = {
883 "sdxc_d0_a", "sdxc_d13_a", "sdxc_d47_a", "sdxc_clk_a", "sdxc_cmd_a"
884 };
885
886 static const char * const pcm_a_groups[] = {
887 "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
888 };
889
890 static const char * const uart_a_groups[] = {
891 "uart_tx_a0", "uart_rx_a0", "uart_cts_a0", "uart_rts_a0",
892 "uart_tx_a1", "uart_rx_a1", "uart_cts_a1", "uart_rts_a1"
893 };
894
895 static const char * const uart_b_groups[] = {
896 "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
897 "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
898 };
899
900 static const char * const iso7816_groups[] = {
901 "iso7816_det", "iso7816_reset", "iso7816_clk", "iso7816_data"
902 };
903
904 static const char * const i2c_d_groups[] = {
905 "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
906 };
907
908 static const char * const xtal_groups[] = {
909 "xtal_32k_out", "xtal_24m_out"
910 };
911
912 static const char * const uart_c_groups[] = {
913 "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
914 };
915
916 static const char * const pcm_b_groups[] = {
917 "pcm_out_b", "pcm_in_b", "pcm_fs_b", "pcm_clk_b"
918 };
919
920 static const char * const i2c_c_groups[] = {
921 "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
922 };
923
924 static const char * const dvin_groups[] = {
925 "dvin_rgb", "dvin_vs", "dvin_hs", "dvin_clk", "dvin_de"
926 };
927
928 static const char * const enc_groups[] = {
929 "enc_0", "enc_1", "enc_2", "enc_3", "enc_4", "enc_5",
930 "enc_6", "enc_7", "enc_8", "enc_9", "enc_10", "enc_11",
931 "enc_12", "enc_13", "enc_14", "enc_15", "enc_16", "enc_17"
932 };
933
934 static const char * const vga_groups[] = {
935 "vga_vs", "vga_hs"
936 };
937
938 static const char * const hdmi_groups[] = {
939 "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec"
940 };
941
942 static const char * const spi_groups[] = {
943 "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
944 "spi_ss0_1", "spi_ss1_1", "spi_sclk_1", "spi_mosi_1",
945 "spi_miso_1", "spi_ss2_1"
946 };
947
948 static const char * const ethernet_groups[] = {
949 "eth_tx_clk_50m", "eth_tx_en", "eth_txd1",
950 "eth_txd0", "eth_rx_clk_in", "eth_rx_dv",
951 "eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc"
952 };
953
954 static const char * const i2c_a_groups[] = {
955 "i2c_sda_a0", "i2c_sck_a0", "i2c_sda_a1", "i2c_sck_a1",
956 "i2c_sda_a2", "i2c_sck_a2"
957 };
958
959 static const char * const i2c_b_groups[] = {
960 "i2c_sda_b", "i2c_sck_b"
961 };
962
963 static const char * const sd_c_groups[] = {
964 "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
965 "sd_cmd_c", "sd_clk_c"
966 };
967
968 static const char * const sdxc_c_groups[] = {
969 "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
970 "sdxc_clk_c"
971 };
972
973 static const char * const nand_groups[] = {
974 "nand_io", "nand_io_ce0", "nand_io_ce1",
975 "nand_io_rb0", "nand_ale", "nand_cle",
976 "nand_wen_clk", "nand_ren_clk", "nand_dqs",
977 "nand_ce2", "nand_ce3"
978 };
979
980 static const char * const nor_groups[] = {
981 "nor_d", "nor_q", "nor_c", "nor_cs"
982 };
983
984 static const char * const sd_b_groups[] = {
985 "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
986 "sd_d3_b", "sd_d2_b"
987 };
988
989 static const char * const sdxc_b_groups[] = {
990 "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
991 };
992
993 static const char * const uart_ao_groups[] = {
994 "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
995 };
996
997 static const char * const remote_groups[] = {
998 "remote_input"
999 };
1000
1001 static const char * const i2c_slave_ao_groups[] = {
1002 "i2c_slave_sck_ao", "i2c_slave_sda_ao"
1003 };
1004
1005 static const char * const uart_ao_b_groups[] = {
1006 "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1"
1007 };
1008
1009 static const char * const i2c_mst_ao_groups[] = {
1010 "i2c_mst_sck_ao", "i2c_mst_sda_ao"
1011 };
1012
1013 static struct meson_pmx_func meson8_functions[] = {
1014 FUNCTION(gpio),
1015 FUNCTION(sd_a),
1016 FUNCTION(sdxc_a),
1017 FUNCTION(pcm_a),
1018 FUNCTION(uart_a),
1019 FUNCTION(uart_b),
1020 FUNCTION(iso7816),
1021 FUNCTION(i2c_d),
1022 FUNCTION(xtal),
1023 FUNCTION(uart_c),
1024 FUNCTION(pcm_b),
1025 FUNCTION(i2c_c),
1026 FUNCTION(dvin),
1027 FUNCTION(enc),
1028 FUNCTION(vga),
1029 FUNCTION(hdmi),
1030 FUNCTION(spi),
1031 FUNCTION(ethernet),
1032 FUNCTION(i2c_a),
1033 FUNCTION(i2c_b),
1034 FUNCTION(sd_c),
1035 FUNCTION(sdxc_c),
1036 FUNCTION(nand),
1037 FUNCTION(nor),
1038 FUNCTION(sd_b),
1039 FUNCTION(sdxc_b),
1040 FUNCTION(uart_ao),
1041 FUNCTION(remote),
1042 FUNCTION(i2c_slave_ao),
1043 FUNCTION(uart_ao_b),
1044 FUNCTION(i2c_mst_ao),
1045 };
1046
1047 static struct meson_bank meson8_banks[] = {
1048 /* name first last pullen pull dir out in */
1049 BANK("X", PIN_GPIOX_0, PIN_GPIOX_21, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
1050 BANK("Y", PIN_GPIOY_0, PIN_GPIOY_16, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
1051 BANK("DV", PIN_GPIODV_0, PIN_GPIODV_29, 0, 0, 0, 0, 7, 0, 8, 0, 9, 0),
1052 BANK("H", PIN_GPIOH_0, PIN_GPIOH_9, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
1053 BANK("Z", PIN_GPIOZ_0, PIN_GPIOZ_14, 1, 0, 1, 0, 3, 17, 4, 17, 5, 17),
1054 BANK("CARD", PIN_CARD_0, PIN_CARD_6, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
1055 BANK("BOOT", PIN_BOOT_0, PIN_BOOT_18, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
1056 };
1057
1058 static struct meson_bank meson8_ao_banks[] = {
1059 /* name first last pullen pull dir out in */
1060 BANK("AO", PIN_GPIOAO_0, PIN_GPIO_TEST_N, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
1061 };
1062
1063 static struct meson_domain_data meson8_domain_data[] = {
1064 {
1065 .name = "banks",
1066 .banks = meson8_banks,
1067 .num_banks = ARRAY_SIZE(meson8_banks),
1068 .pin_base = 0,
1069 .num_pins = 120,
1070 },
1071 {
1072 .name = "ao-bank",
1073 .banks = meson8_ao_banks,
1074 .num_banks = ARRAY_SIZE(meson8_ao_banks),
1075 .pin_base = 120,
1076 .num_pins = 16,
1077 },
1078 };
1079
1080 struct meson_pinctrl_data meson8_pinctrl_data = {
1081 .pins = meson8_pins,
1082 .groups = meson8_groups,
1083 .funcs = meson8_functions,
1084 .domain_data = meson8_domain_data,
1085 .num_pins = ARRAY_SIZE(meson8_pins),
1086 .num_groups = ARRAY_SIZE(meson8_groups),
1087 .num_funcs = ARRAY_SIZE(meson8_functions),
1088 .num_domains = ARRAY_SIZE(meson8_domain_data),
1089 };
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