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Merge remote-tracking branch 'asoc/topic/tlv320aic32x4' into asoc-next
[deliverable/linux.git] / drivers / pinctrl / nomadik / pinctrl-abx500.c
1 /*
2 * Copyright (C) ST-Ericsson SA 2013
3 *
4 * Author: Patrice Chotard <patrice.chotard@st.com>
5 * License terms: GNU General Public License (GPL) version 2
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/slab.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/err.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/gpio.h>
21 #include <linux/irq.h>
22 #include <linux/irqdomain.h>
23 #include <linux/interrupt.h>
24 #include <linux/bitops.h>
25 #include <linux/mfd/abx500.h>
26 #include <linux/mfd/abx500/ab8500.h>
27 #include <linux/pinctrl/pinctrl.h>
28 #include <linux/pinctrl/consumer.h>
29 #include <linux/pinctrl/pinmux.h>
30 #include <linux/pinctrl/pinconf.h>
31 #include <linux/pinctrl/pinconf-generic.h>
32 #include <linux/pinctrl/machine.h>
33
34 #include "pinctrl-abx500.h"
35 #include "../core.h"
36 #include "../pinconf.h"
37 #include "../pinctrl-utils.h"
38
39 /*
40 * The AB9540 and AB8540 GPIO support are extended versions
41 * of the AB8500 GPIO support.
42 * The AB9540 supports an additional (7th) register so that
43 * more GPIO may be configured and used.
44 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
45 * internal pull-up and pull-down capabilities.
46 */
47
48 /*
49 * GPIO registers offset
50 * Bank: 0x10
51 */
52 #define AB8500_GPIO_SEL1_REG 0x00
53 #define AB8500_GPIO_SEL2_REG 0x01
54 #define AB8500_GPIO_SEL3_REG 0x02
55 #define AB8500_GPIO_SEL4_REG 0x03
56 #define AB8500_GPIO_SEL5_REG 0x04
57 #define AB8500_GPIO_SEL6_REG 0x05
58 #define AB9540_GPIO_SEL7_REG 0x06
59
60 #define AB8500_GPIO_DIR1_REG 0x10
61 #define AB8500_GPIO_DIR2_REG 0x11
62 #define AB8500_GPIO_DIR3_REG 0x12
63 #define AB8500_GPIO_DIR4_REG 0x13
64 #define AB8500_GPIO_DIR5_REG 0x14
65 #define AB8500_GPIO_DIR6_REG 0x15
66 #define AB9540_GPIO_DIR7_REG 0x16
67
68 #define AB8500_GPIO_OUT1_REG 0x20
69 #define AB8500_GPIO_OUT2_REG 0x21
70 #define AB8500_GPIO_OUT3_REG 0x22
71 #define AB8500_GPIO_OUT4_REG 0x23
72 #define AB8500_GPIO_OUT5_REG 0x24
73 #define AB8500_GPIO_OUT6_REG 0x25
74 #define AB9540_GPIO_OUT7_REG 0x26
75
76 #define AB8500_GPIO_PUD1_REG 0x30
77 #define AB8500_GPIO_PUD2_REG 0x31
78 #define AB8500_GPIO_PUD3_REG 0x32
79 #define AB8500_GPIO_PUD4_REG 0x33
80 #define AB8500_GPIO_PUD5_REG 0x34
81 #define AB8500_GPIO_PUD6_REG 0x35
82 #define AB9540_GPIO_PUD7_REG 0x36
83
84 #define AB8500_GPIO_IN1_REG 0x40
85 #define AB8500_GPIO_IN2_REG 0x41
86 #define AB8500_GPIO_IN3_REG 0x42
87 #define AB8500_GPIO_IN4_REG 0x43
88 #define AB8500_GPIO_IN5_REG 0x44
89 #define AB8500_GPIO_IN6_REG 0x45
90 #define AB9540_GPIO_IN7_REG 0x46
91 #define AB8540_GPIO_VINSEL_REG 0x47
92 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48
93 #define AB8500_GPIO_ALTFUN_REG 0x50
94 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03
95 #define AB8540_GPIO_VINSEL_MASK 0x03
96 #define AB8540_GPIOX_VBAT_START 51
97 #define AB8540_GPIOX_VBAT_END 54
98
99 #define ABX500_GPIO_INPUT 0
100 #define ABX500_GPIO_OUTPUT 1
101
102 struct abx500_pinctrl {
103 struct device *dev;
104 struct pinctrl_dev *pctldev;
105 struct abx500_pinctrl_soc_data *soc;
106 struct gpio_chip chip;
107 struct ab8500 *parent;
108 struct abx500_gpio_irq_cluster *irq_cluster;
109 int irq_cluster_size;
110 };
111
112 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
113 unsigned offset, bool *bit)
114 {
115 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
116 u8 pos = offset % 8;
117 u8 val;
118 int ret;
119
120 reg += offset / 8;
121 ret = abx500_get_register_interruptible(pct->dev,
122 AB8500_MISC, reg, &val);
123
124 *bit = !!(val & BIT(pos));
125
126 if (ret < 0)
127 dev_err(pct->dev,
128 "%s read reg =%x, offset=%x failed (%d)\n",
129 __func__, reg, offset, ret);
130
131 return ret;
132 }
133
134 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
135 unsigned offset, int val)
136 {
137 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
138 u8 pos = offset % 8;
139 int ret;
140
141 reg += offset / 8;
142 ret = abx500_mask_and_set_register_interruptible(pct->dev,
143 AB8500_MISC, reg, BIT(pos), val << pos);
144 if (ret < 0)
145 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
146 __func__, reg, offset, ret);
147
148 return ret;
149 }
150
151 /**
152 * abx500_gpio_get() - Get the particular GPIO value
153 * @chip: Gpio device
154 * @offset: GPIO number to read
155 */
156 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
157 {
158 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
159 bool bit;
160 bool is_out;
161 u8 gpio_offset = offset - 1;
162 int ret;
163
164 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
165 gpio_offset, &is_out);
166 if (ret < 0)
167 goto out;
168
169 if (is_out)
170 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
171 gpio_offset, &bit);
172 else
173 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
174 gpio_offset, &bit);
175 out:
176 if (ret < 0) {
177 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
178 return ret;
179 }
180
181 return bit;
182 }
183
184 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
185 {
186 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
187 int ret;
188
189 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
190 if (ret < 0)
191 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
192 }
193
194 #ifdef CONFIG_DEBUG_FS
195 static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset,
196 enum abx500_gpio_pull_updown *pull_updown)
197 {
198 u8 pos;
199 u8 val;
200 int ret;
201 struct pullud *pullud;
202
203 if (!pct->soc->pullud) {
204 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
205 __func__);
206 ret = -EPERM;
207 goto out;
208 }
209
210 pullud = pct->soc->pullud;
211
212 if ((offset < pullud->first_pin)
213 || (offset > pullud->last_pin)) {
214 ret = -EINVAL;
215 goto out;
216 }
217
218 ret = abx500_get_register_interruptible(pct->dev,
219 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val);
220
221 pos = (offset - pullud->first_pin) << 1;
222 *pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK;
223
224 out:
225 if (ret < 0)
226 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
227
228 return ret;
229 }
230 #endif
231
232 static int abx500_set_pull_updown(struct abx500_pinctrl *pct,
233 int offset, enum abx500_gpio_pull_updown val)
234 {
235 u8 pos;
236 int ret;
237 struct pullud *pullud;
238
239 if (!pct->soc->pullud) {
240 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
241 __func__);
242 ret = -EPERM;
243 goto out;
244 }
245
246 pullud = pct->soc->pullud;
247
248 if ((offset < pullud->first_pin)
249 || (offset > pullud->last_pin)) {
250 ret = -EINVAL;
251 goto out;
252 }
253 pos = (offset - pullud->first_pin) << 1;
254
255 ret = abx500_mask_and_set_register_interruptible(pct->dev,
256 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG,
257 AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos);
258
259 out:
260 if (ret < 0)
261 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
262
263 return ret;
264 }
265
266 static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio)
267 {
268 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
269 struct pullud *pullud = pct->soc->pullud;
270
271 return (pullud &&
272 gpio >= pullud->first_pin &&
273 gpio <= pullud->last_pin);
274 }
275
276 static int abx500_gpio_direction_output(struct gpio_chip *chip,
277 unsigned offset,
278 int val)
279 {
280 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
281 unsigned gpio;
282 int ret;
283
284 /* set direction as output */
285 ret = abx500_gpio_set_bits(chip,
286 AB8500_GPIO_DIR1_REG,
287 offset,
288 ABX500_GPIO_OUTPUT);
289 if (ret < 0)
290 goto out;
291
292 /* disable pull down */
293 ret = abx500_gpio_set_bits(chip,
294 AB8500_GPIO_PUD1_REG,
295 offset,
296 ABX500_GPIO_PULL_NONE);
297 if (ret < 0)
298 goto out;
299
300 /* if supported, disable both pull down and pull up */
301 gpio = offset + 1;
302 if (abx500_pullud_supported(chip, gpio)) {
303 ret = abx500_set_pull_updown(pct,
304 gpio,
305 ABX500_GPIO_PULL_NONE);
306 }
307 out:
308 if (ret < 0) {
309 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
310 return ret;
311 }
312
313 /* set the output as 1 or 0 */
314 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
315 }
316
317 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
318 {
319 /* set the register as input */
320 return abx500_gpio_set_bits(chip,
321 AB8500_GPIO_DIR1_REG,
322 offset,
323 ABX500_GPIO_INPUT);
324 }
325
326 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
327 {
328 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
329 /* The AB8500 GPIO numbers are off by one */
330 int gpio = offset + 1;
331 int hwirq;
332 int i;
333
334 for (i = 0; i < pct->irq_cluster_size; i++) {
335 struct abx500_gpio_irq_cluster *cluster =
336 &pct->irq_cluster[i];
337
338 if (gpio >= cluster->start && gpio <= cluster->end) {
339 /*
340 * The ABx500 GPIO's associated IRQs are clustered together
341 * throughout the interrupt numbers at irregular intervals.
342 * To solve this quandry, we have placed the read-in values
343 * into the cluster information table.
344 */
345 hwirq = gpio - cluster->start + cluster->to_irq;
346 return irq_create_mapping(pct->parent->domain, hwirq);
347 }
348 }
349
350 return -EINVAL;
351 }
352
353 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
354 unsigned gpio, int alt_setting)
355 {
356 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
357 struct alternate_functions af = pct->soc->alternate_functions[gpio];
358 int ret;
359 int val;
360 unsigned offset;
361
362 const char *modes[] = {
363 [ABX500_DEFAULT] = "default",
364 [ABX500_ALT_A] = "altA",
365 [ABX500_ALT_B] = "altB",
366 [ABX500_ALT_C] = "altC",
367 };
368
369 /* sanity check */
370 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
371 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
372 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
373 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
374 modes[alt_setting]);
375 return -EINVAL;
376 }
377
378 /* on ABx5xx, there is no GPIO0, so adjust the offset */
379 offset = gpio - 1;
380
381 switch (alt_setting) {
382 case ABX500_DEFAULT:
383 /*
384 * for ABx5xx family, default mode is always selected by
385 * writing 0 to GPIOSELx register, except for pins which
386 * support at least ALT_B mode, default mode is selected
387 * by writing 1 to GPIOSELx register
388 */
389 val = 0;
390 if (af.alt_bit1 != UNUSED)
391 val++;
392
393 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
394 offset, val);
395 break;
396
397 case ABX500_ALT_A:
398 /*
399 * for ABx5xx family, alt_a mode is always selected by
400 * writing 1 to GPIOSELx register, except for pins which
401 * support at least ALT_B mode, alt_a mode is selected
402 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
403 * register
404 */
405 if (af.alt_bit1 != UNUSED) {
406 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
407 offset, 0);
408 if (ret < 0)
409 goto out;
410
411 ret = abx500_gpio_set_bits(chip,
412 AB8500_GPIO_ALTFUN_REG,
413 af.alt_bit1,
414 !!(af.alta_val & BIT(0)));
415 if (ret < 0)
416 goto out;
417
418 if (af.alt_bit2 != UNUSED)
419 ret = abx500_gpio_set_bits(chip,
420 AB8500_GPIO_ALTFUN_REG,
421 af.alt_bit2,
422 !!(af.alta_val & BIT(1)));
423 } else
424 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
425 offset, 1);
426 break;
427
428 case ABX500_ALT_B:
429 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
430 offset, 0);
431 if (ret < 0)
432 goto out;
433
434 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
435 af.alt_bit1, !!(af.altb_val & BIT(0)));
436 if (ret < 0)
437 goto out;
438
439 if (af.alt_bit2 != UNUSED)
440 ret = abx500_gpio_set_bits(chip,
441 AB8500_GPIO_ALTFUN_REG,
442 af.alt_bit2,
443 !!(af.altb_val & BIT(1)));
444 break;
445
446 case ABX500_ALT_C:
447 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
448 offset, 0);
449 if (ret < 0)
450 goto out;
451
452 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
453 af.alt_bit2, !!(af.altc_val & BIT(0)));
454 if (ret < 0)
455 goto out;
456
457 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
458 af.alt_bit2, !!(af.altc_val & BIT(1)));
459 break;
460
461 default:
462 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
463
464 return -EINVAL;
465 }
466 out:
467 if (ret < 0)
468 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
469
470 return ret;
471 }
472
473 #ifdef CONFIG_DEBUG_FS
474 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
475 unsigned gpio)
476 {
477 u8 mode;
478 bool bit_mode;
479 bool alt_bit1;
480 bool alt_bit2;
481 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
482 struct alternate_functions af = pct->soc->alternate_functions[gpio];
483 /* on ABx5xx, there is no GPIO0, so adjust the offset */
484 unsigned offset = gpio - 1;
485 int ret;
486
487 /*
488 * if gpiosel_bit is set to unused,
489 * it means no GPIO or special case
490 */
491 if (af.gpiosel_bit == UNUSED)
492 return ABX500_DEFAULT;
493
494 /* read GpioSelx register */
495 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
496 af.gpiosel_bit, &bit_mode);
497 if (ret < 0)
498 goto out;
499
500 mode = bit_mode;
501
502 /* sanity check */
503 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
504 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
505 dev_err(pct->dev,
506 "alt_bitX value not in correct range (-1 to 7)\n");
507 return -EINVAL;
508 }
509
510 /* if alt_bit2 is used, alt_bit1 must be used too */
511 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
512 dev_err(pct->dev,
513 "if alt_bit2 is used, alt_bit1 can't be unused\n");
514 return -EINVAL;
515 }
516
517 /* check if pin use AlternateFunction register */
518 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
519 return mode;
520 /*
521 * if pin GPIOSEL bit is set and pin supports alternate function,
522 * it means DEFAULT mode
523 */
524 if (mode)
525 return ABX500_DEFAULT;
526
527 /*
528 * pin use the AlternatFunction register
529 * read alt_bit1 value
530 */
531 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
532 af.alt_bit1, &alt_bit1);
533 if (ret < 0)
534 goto out;
535
536 if (af.alt_bit2 != UNUSED) {
537 /* read alt_bit2 value */
538 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
539 af.alt_bit2,
540 &alt_bit2);
541 if (ret < 0)
542 goto out;
543 } else
544 alt_bit2 = 0;
545
546 mode = (alt_bit2 << 1) + alt_bit1;
547 if (mode == af.alta_val)
548 return ABX500_ALT_A;
549 else if (mode == af.altb_val)
550 return ABX500_ALT_B;
551 else
552 return ABX500_ALT_C;
553
554 out:
555 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
556 return ret;
557 }
558
559 #include <linux/seq_file.h>
560
561 static void abx500_gpio_dbg_show_one(struct seq_file *s,
562 struct pinctrl_dev *pctldev,
563 struct gpio_chip *chip,
564 unsigned offset, unsigned gpio)
565 {
566 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
567 const char *label = gpiochip_is_requested(chip, offset - 1);
568 u8 gpio_offset = offset - 1;
569 int mode = -1;
570 bool is_out;
571 bool pd;
572 enum abx500_gpio_pull_updown pud = 0;
573 int ret;
574
575 const char *modes[] = {
576 [ABX500_DEFAULT] = "default",
577 [ABX500_ALT_A] = "altA",
578 [ABX500_ALT_B] = "altB",
579 [ABX500_ALT_C] = "altC",
580 };
581
582 const char *pull_up_down[] = {
583 [ABX500_GPIO_PULL_DOWN] = "pull down",
584 [ABX500_GPIO_PULL_NONE] = "pull none",
585 [ABX500_GPIO_PULL_NONE + 1] = "pull none",
586 [ABX500_GPIO_PULL_UP] = "pull up",
587 };
588
589 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
590 gpio_offset, &is_out);
591 if (ret < 0)
592 goto out;
593
594 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
595 gpio, label ?: "(none)",
596 is_out ? "out" : "in ");
597
598 if (!is_out) {
599 if (abx500_pullud_supported(chip, offset)) {
600 ret = abx500_get_pull_updown(pct, offset, &pud);
601 if (ret < 0)
602 goto out;
603
604 seq_printf(s, " %-9s", pull_up_down[pud]);
605 } else {
606 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
607 gpio_offset, &pd);
608 if (ret < 0)
609 goto out;
610
611 seq_printf(s, " %-9s", pull_up_down[pd]);
612 }
613 } else
614 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
615
616 mode = abx500_get_mode(pctldev, chip, offset);
617
618 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
619
620 out:
621 if (ret < 0)
622 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
623 }
624
625 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
626 {
627 unsigned i;
628 unsigned gpio = chip->base;
629 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
630 struct pinctrl_dev *pctldev = pct->pctldev;
631
632 for (i = 0; i < chip->ngpio; i++, gpio++) {
633 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
634 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
635 seq_printf(s, "\n");
636 }
637 }
638
639 #else
640 static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
641 struct pinctrl_dev *pctldev,
642 struct gpio_chip *chip,
643 unsigned offset, unsigned gpio)
644 {
645 }
646 #define abx500_gpio_dbg_show NULL
647 #endif
648
649 static struct gpio_chip abx500gpio_chip = {
650 .label = "abx500-gpio",
651 .owner = THIS_MODULE,
652 .request = gpiochip_generic_request,
653 .free = gpiochip_generic_free,
654 .direction_input = abx500_gpio_direction_input,
655 .get = abx500_gpio_get,
656 .direction_output = abx500_gpio_direction_output,
657 .set = abx500_gpio_set,
658 .to_irq = abx500_gpio_to_irq,
659 .dbg_show = abx500_gpio_dbg_show,
660 };
661
662 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
663 {
664 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
665
666 return pct->soc->nfunctions;
667 }
668
669 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
670 unsigned function)
671 {
672 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
673
674 return pct->soc->functions[function].name;
675 }
676
677 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
678 unsigned function,
679 const char * const **groups,
680 unsigned * const num_groups)
681 {
682 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
683
684 *groups = pct->soc->functions[function].groups;
685 *num_groups = pct->soc->functions[function].ngroups;
686
687 return 0;
688 }
689
690 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
691 unsigned group)
692 {
693 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
694 struct gpio_chip *chip = &pct->chip;
695 const struct abx500_pingroup *g;
696 int i;
697 int ret = 0;
698
699 g = &pct->soc->groups[group];
700 if (g->altsetting < 0)
701 return -EINVAL;
702
703 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
704
705 for (i = 0; i < g->npins; i++) {
706 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
707 g->pins[i], g->altsetting);
708
709 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
710 }
711
712 if (ret < 0)
713 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
714
715 return ret;
716 }
717
718 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
719 struct pinctrl_gpio_range *range,
720 unsigned offset)
721 {
722 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
723 const struct abx500_pinrange *p;
724 int ret;
725 int i;
726
727 /*
728 * Different ranges have different ways to enable GPIO function on a
729 * pin, so refer back to our local range type, where we handily define
730 * what altfunc enables GPIO for a certain pin.
731 */
732 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
733 p = &pct->soc->gpio_ranges[i];
734 if ((offset >= p->offset) &&
735 (offset < (p->offset + p->npins)))
736 break;
737 }
738
739 if (i == pct->soc->gpio_num_ranges) {
740 dev_err(pct->dev, "%s failed to locate range\n", __func__);
741 return -ENODEV;
742 }
743
744 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
745 p->altfunc, offset);
746
747 ret = abx500_set_mode(pct->pctldev, &pct->chip,
748 offset, p->altfunc);
749 if (ret < 0)
750 dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
751
752 return ret;
753 }
754
755 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
756 struct pinctrl_gpio_range *range,
757 unsigned offset)
758 {
759 }
760
761 static const struct pinmux_ops abx500_pinmux_ops = {
762 .get_functions_count = abx500_pmx_get_funcs_cnt,
763 .get_function_name = abx500_pmx_get_func_name,
764 .get_function_groups = abx500_pmx_get_func_groups,
765 .set_mux = abx500_pmx_set,
766 .gpio_request_enable = abx500_gpio_request_enable,
767 .gpio_disable_free = abx500_gpio_disable_free,
768 };
769
770 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
771 {
772 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
773
774 return pct->soc->ngroups;
775 }
776
777 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
778 unsigned selector)
779 {
780 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
781
782 return pct->soc->groups[selector].name;
783 }
784
785 static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
786 unsigned selector,
787 const unsigned **pins,
788 unsigned *num_pins)
789 {
790 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
791
792 *pins = pct->soc->groups[selector].pins;
793 *num_pins = pct->soc->groups[selector].npins;
794
795 return 0;
796 }
797
798 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
799 struct seq_file *s, unsigned offset)
800 {
801 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
802 struct gpio_chip *chip = &pct->chip;
803
804 abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
805 chip->base + offset - 1);
806 }
807
808 static int abx500_dt_add_map_mux(struct pinctrl_map **map,
809 unsigned *reserved_maps,
810 unsigned *num_maps, const char *group,
811 const char *function)
812 {
813 if (*num_maps == *reserved_maps)
814 return -ENOSPC;
815
816 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
817 (*map)[*num_maps].data.mux.group = group;
818 (*map)[*num_maps].data.mux.function = function;
819 (*num_maps)++;
820
821 return 0;
822 }
823
824 static int abx500_dt_add_map_configs(struct pinctrl_map **map,
825 unsigned *reserved_maps,
826 unsigned *num_maps, const char *group,
827 unsigned long *configs, unsigned num_configs)
828 {
829 unsigned long *dup_configs;
830
831 if (*num_maps == *reserved_maps)
832 return -ENOSPC;
833
834 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
835 GFP_KERNEL);
836 if (!dup_configs)
837 return -ENOMEM;
838
839 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
840
841 (*map)[*num_maps].data.configs.group_or_pin = group;
842 (*map)[*num_maps].data.configs.configs = dup_configs;
843 (*map)[*num_maps].data.configs.num_configs = num_configs;
844 (*num_maps)++;
845
846 return 0;
847 }
848
849 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
850 const char *pin_name)
851 {
852 int i, pin_number;
853 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
854
855 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
856 for (i = 0; i < npct->soc->npins; i++)
857 if (npct->soc->pins[i].number == pin_number)
858 return npct->soc->pins[i].name;
859 return NULL;
860 }
861
862 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
863 struct device_node *np,
864 struct pinctrl_map **map,
865 unsigned *reserved_maps,
866 unsigned *num_maps)
867 {
868 int ret;
869 const char *function = NULL;
870 unsigned long *configs;
871 unsigned int nconfigs = 0;
872 struct property *prop;
873
874 ret = of_property_read_string(np, "function", &function);
875 if (ret >= 0) {
876 const char *group;
877
878 ret = of_property_count_strings(np, "groups");
879 if (ret < 0)
880 goto exit;
881
882 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
883 num_maps, ret);
884 if (ret < 0)
885 goto exit;
886
887 of_property_for_each_string(np, "groups", prop, group) {
888 ret = abx500_dt_add_map_mux(map, reserved_maps,
889 num_maps, group, function);
890 if (ret < 0)
891 goto exit;
892 }
893 }
894
895 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs);
896 if (nconfigs) {
897 const char *gpio_name;
898 const char *pin;
899
900 ret = of_property_count_strings(np, "pins");
901 if (ret < 0)
902 goto exit;
903
904 ret = pinctrl_utils_reserve_map(pctldev, map,
905 reserved_maps,
906 num_maps, ret);
907 if (ret < 0)
908 goto exit;
909
910 of_property_for_each_string(np, "pins", prop, pin) {
911 gpio_name = abx500_find_pin_name(pctldev, pin);
912
913 ret = abx500_dt_add_map_configs(map, reserved_maps,
914 num_maps, gpio_name, configs, 1);
915 if (ret < 0)
916 goto exit;
917 }
918 }
919
920 exit:
921 return ret;
922 }
923
924 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
925 struct device_node *np_config,
926 struct pinctrl_map **map, unsigned *num_maps)
927 {
928 unsigned reserved_maps;
929 struct device_node *np;
930 int ret;
931
932 reserved_maps = 0;
933 *map = NULL;
934 *num_maps = 0;
935
936 for_each_child_of_node(np_config, np) {
937 ret = abx500_dt_subnode_to_map(pctldev, np, map,
938 &reserved_maps, num_maps);
939 if (ret < 0) {
940 pinctrl_utils_dt_free_map(pctldev, *map, *num_maps);
941 return ret;
942 }
943 }
944
945 return 0;
946 }
947
948 static const struct pinctrl_ops abx500_pinctrl_ops = {
949 .get_groups_count = abx500_get_groups_cnt,
950 .get_group_name = abx500_get_group_name,
951 .get_group_pins = abx500_get_group_pins,
952 .pin_dbg_show = abx500_pin_dbg_show,
953 .dt_node_to_map = abx500_dt_node_to_map,
954 .dt_free_map = pinctrl_utils_dt_free_map,
955 };
956
957 static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
958 unsigned pin,
959 unsigned long *config)
960 {
961 return -ENOSYS;
962 }
963
964 static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
965 unsigned pin,
966 unsigned long *configs,
967 unsigned num_configs)
968 {
969 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
970 struct gpio_chip *chip = &pct->chip;
971 unsigned offset;
972 int ret = -EINVAL;
973 int i;
974 enum pin_config_param param;
975 enum pin_config_param argument;
976
977 for (i = 0; i < num_configs; i++) {
978 param = pinconf_to_config_param(configs[i]);
979 argument = pinconf_to_config_argument(configs[i]);
980
981 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
982 pin, configs[i],
983 (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
984 (param == PIN_CONFIG_OUTPUT) ?
985 (argument ? "high" : "low") :
986 (argument ? "pull up" : "pull down"));
987
988 /* on ABx500, there is no GPIO0, so adjust the offset */
989 offset = pin - 1;
990
991 switch (param) {
992 case PIN_CONFIG_BIAS_DISABLE:
993 ret = abx500_gpio_direction_input(chip, offset);
994 if (ret < 0)
995 goto out;
996 /*
997 * Some chips only support pull down, while some
998 * actually support both pull up and pull down. Such
999 * chips have a "pullud" range specified for the pins
1000 * that support both features. If the pin is not
1001 * within that range, we fall back to the old bit set
1002 * that only support pull down.
1003 */
1004 if (abx500_pullud_supported(chip, pin))
1005 ret = abx500_set_pull_updown(pct,
1006 pin,
1007 ABX500_GPIO_PULL_NONE);
1008 else
1009 /* Chip only supports pull down */
1010 ret = abx500_gpio_set_bits(chip,
1011 AB8500_GPIO_PUD1_REG, offset,
1012 ABX500_GPIO_PULL_NONE);
1013 break;
1014
1015 case PIN_CONFIG_BIAS_PULL_DOWN:
1016 ret = abx500_gpio_direction_input(chip, offset);
1017 if (ret < 0)
1018 goto out;
1019 /*
1020 * if argument = 1 set the pull down
1021 * else clear the pull down
1022 * Some chips only support pull down, while some
1023 * actually support both pull up and pull down. Such
1024 * chips have a "pullud" range specified for the pins
1025 * that support both features. If the pin is not
1026 * within that range, we fall back to the old bit set
1027 * that only support pull down.
1028 */
1029 if (abx500_pullud_supported(chip, pin))
1030 ret = abx500_set_pull_updown(pct,
1031 pin,
1032 argument ? ABX500_GPIO_PULL_DOWN :
1033 ABX500_GPIO_PULL_NONE);
1034 else
1035 /* Chip only supports pull down */
1036 ret = abx500_gpio_set_bits(chip,
1037 AB8500_GPIO_PUD1_REG,
1038 offset,
1039 argument ? ABX500_GPIO_PULL_DOWN :
1040 ABX500_GPIO_PULL_NONE);
1041 break;
1042
1043 case PIN_CONFIG_BIAS_PULL_UP:
1044 ret = abx500_gpio_direction_input(chip, offset);
1045 if (ret < 0)
1046 goto out;
1047 /*
1048 * if argument = 1 set the pull up
1049 * else clear the pull up
1050 */
1051 ret = abx500_gpio_direction_input(chip, offset);
1052 /*
1053 * Some chips only support pull down, while some
1054 * actually support both pull up and pull down. Such
1055 * chips have a "pullud" range specified for the pins
1056 * that support both features. If the pin is not
1057 * within that range, do nothing
1058 */
1059 if (abx500_pullud_supported(chip, pin))
1060 ret = abx500_set_pull_updown(pct,
1061 pin,
1062 argument ? ABX500_GPIO_PULL_UP :
1063 ABX500_GPIO_PULL_NONE);
1064 break;
1065
1066 case PIN_CONFIG_OUTPUT:
1067 ret = abx500_gpio_direction_output(chip, offset,
1068 argument);
1069 break;
1070
1071 default:
1072 dev_err(chip->parent,
1073 "illegal configuration requested\n");
1074 }
1075 } /* for each config */
1076 out:
1077 if (ret < 0)
1078 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
1079
1080 return ret;
1081 }
1082
1083 static const struct pinconf_ops abx500_pinconf_ops = {
1084 .pin_config_get = abx500_pin_config_get,
1085 .pin_config_set = abx500_pin_config_set,
1086 .is_generic = true,
1087 };
1088
1089 static struct pinctrl_desc abx500_pinctrl_desc = {
1090 .name = "pinctrl-abx500",
1091 .pctlops = &abx500_pinctrl_ops,
1092 .pmxops = &abx500_pinmux_ops,
1093 .confops = &abx500_pinconf_ops,
1094 .owner = THIS_MODULE,
1095 };
1096
1097 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
1098 {
1099 unsigned int lowest = 0;
1100 unsigned int highest = 0;
1101 unsigned int npins = 0;
1102 int i;
1103
1104 /*
1105 * Compute number of GPIOs from the last SoC gpio range descriptors
1106 * These ranges may include "holes" but the GPIO number space shall
1107 * still be homogeneous, so we need to detect and account for any
1108 * such holes so that these are included in the number of GPIO pins.
1109 */
1110 for (i = 0; i < soc->gpio_num_ranges; i++) {
1111 unsigned gstart;
1112 unsigned gend;
1113 const struct abx500_pinrange *p;
1114
1115 p = &soc->gpio_ranges[i];
1116 gstart = p->offset;
1117 gend = p->offset + p->npins - 1;
1118
1119 if (i == 0) {
1120 /* First iteration, set start values */
1121 lowest = gstart;
1122 highest = gend;
1123 } else {
1124 if (gstart < lowest)
1125 lowest = gstart;
1126 if (gend > highest)
1127 highest = gend;
1128 }
1129 }
1130 /* this gives the absolute number of pins */
1131 npins = highest - lowest + 1;
1132 return npins;
1133 }
1134
1135 static const struct of_device_id abx500_gpio_match[] = {
1136 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
1137 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
1138 { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, },
1139 { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, },
1140 { }
1141 };
1142
1143 static int abx500_gpio_probe(struct platform_device *pdev)
1144 {
1145 struct device_node *np = pdev->dev.of_node;
1146 const struct of_device_id *match;
1147 struct abx500_pinctrl *pct;
1148 unsigned int id = -1;
1149 int ret;
1150 int i;
1151
1152 if (!np) {
1153 dev_err(&pdev->dev, "gpio dt node missing\n");
1154 return -ENODEV;
1155 }
1156
1157 pct = devm_kzalloc(&pdev->dev, sizeof(struct abx500_pinctrl),
1158 GFP_KERNEL);
1159 if (pct == NULL) {
1160 dev_err(&pdev->dev,
1161 "failed to allocate memory for pct\n");
1162 return -ENOMEM;
1163 }
1164
1165 pct->dev = &pdev->dev;
1166 pct->parent = dev_get_drvdata(pdev->dev.parent);
1167 pct->chip = abx500gpio_chip;
1168 pct->chip.parent = &pdev->dev;
1169 pct->chip.base = -1; /* Dynamic allocation */
1170
1171 match = of_match_device(abx500_gpio_match, &pdev->dev);
1172 if (!match) {
1173 dev_err(&pdev->dev, "gpio dt not matching\n");
1174 return -ENODEV;
1175 }
1176 id = (unsigned long)match->data;
1177
1178 /* Poke in other ASIC variants here */
1179 switch (id) {
1180 case PINCTRL_AB8500:
1181 abx500_pinctrl_ab8500_init(&pct->soc);
1182 break;
1183 case PINCTRL_AB8540:
1184 abx500_pinctrl_ab8540_init(&pct->soc);
1185 break;
1186 case PINCTRL_AB9540:
1187 abx500_pinctrl_ab9540_init(&pct->soc);
1188 break;
1189 case PINCTRL_AB8505:
1190 abx500_pinctrl_ab8505_init(&pct->soc);
1191 break;
1192 default:
1193 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1194 return -EINVAL;
1195 }
1196
1197 if (!pct->soc) {
1198 dev_err(&pdev->dev, "Invalid SOC data\n");
1199 return -EINVAL;
1200 }
1201
1202 pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1203 pct->irq_cluster = pct->soc->gpio_irq_cluster;
1204 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1205
1206 ret = gpiochip_add_data(&pct->chip, pct);
1207 if (ret) {
1208 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1209 return ret;
1210 }
1211 dev_info(&pdev->dev, "added gpiochip\n");
1212
1213 abx500_pinctrl_desc.pins = pct->soc->pins;
1214 abx500_pinctrl_desc.npins = pct->soc->npins;
1215 pct->pctldev = pinctrl_register(&abx500_pinctrl_desc, &pdev->dev, pct);
1216 if (IS_ERR(pct->pctldev)) {
1217 dev_err(&pdev->dev,
1218 "could not register abx500 pinctrl driver\n");
1219 ret = PTR_ERR(pct->pctldev);
1220 goto out_rem_chip;
1221 }
1222 dev_info(&pdev->dev, "registered pin controller\n");
1223
1224 /* We will handle a range of GPIO pins */
1225 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1226 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1227
1228 ret = gpiochip_add_pin_range(&pct->chip,
1229 dev_name(&pdev->dev),
1230 p->offset - 1, p->offset, p->npins);
1231 if (ret < 0)
1232 goto out_rem_chip;
1233 }
1234
1235 platform_set_drvdata(pdev, pct);
1236 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1237
1238 return 0;
1239
1240 out_rem_chip:
1241 gpiochip_remove(&pct->chip);
1242 return ret;
1243 }
1244
1245 /**
1246 * abx500_gpio_remove() - remove Ab8500-gpio driver
1247 * @pdev: Platform device registered
1248 */
1249 static int abx500_gpio_remove(struct platform_device *pdev)
1250 {
1251 struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1252
1253 gpiochip_remove(&pct->chip);
1254 return 0;
1255 }
1256
1257 static struct platform_driver abx500_gpio_driver = {
1258 .driver = {
1259 .name = "abx500-gpio",
1260 .of_match_table = abx500_gpio_match,
1261 },
1262 .probe = abx500_gpio_probe,
1263 .remove = abx500_gpio_remove,
1264 };
1265
1266 static int __init abx500_gpio_init(void)
1267 {
1268 return platform_driver_register(&abx500_gpio_driver);
1269 }
1270 core_initcall(abx500_gpio_init);
1271
1272 MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>");
1273 MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO");
1274 MODULE_ALIAS("platform:abx500-gpio");
1275 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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