projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge tag 'asoc-v4.7' into asoc-linus
[deliverable/linux.git] / drivers / pinctrl / nomadik / pinctrl-nomadik-db8500.c
1 #include <linux/kernel.h>
2 #include <linux/pinctrl/pinctrl.h>
3 #include "pinctrl-nomadik.h"
4
5 /* All the pins that can be used for GPIO and some other functions */
6 #define _GPIO(offset) (offset)
7
8 #define DB8500_PIN_AJ5 _GPIO(0)
9 #define DB8500_PIN_AJ3 _GPIO(1)
10 #define DB8500_PIN_AH4 _GPIO(2)
11 #define DB8500_PIN_AH3 _GPIO(3)
12 #define DB8500_PIN_AH6 _GPIO(4)
13 #define DB8500_PIN_AG6 _GPIO(5)
14 #define DB8500_PIN_AF6 _GPIO(6)
15 #define DB8500_PIN_AG5 _GPIO(7)
16 #define DB8500_PIN_AD5 _GPIO(8)
17 #define DB8500_PIN_AE4 _GPIO(9)
18 #define DB8500_PIN_AF5 _GPIO(10)
19 #define DB8500_PIN_AG4 _GPIO(11)
20 #define DB8500_PIN_AC4 _GPIO(12)
21 #define DB8500_PIN_AF3 _GPIO(13)
22 #define DB8500_PIN_AE3 _GPIO(14)
23 #define DB8500_PIN_AC3 _GPIO(15)
24 #define DB8500_PIN_AD3 _GPIO(16)
25 #define DB8500_PIN_AD4 _GPIO(17)
26 #define DB8500_PIN_AC2 _GPIO(18)
27 #define DB8500_PIN_AC1 _GPIO(19)
28 #define DB8500_PIN_AB4 _GPIO(20)
29 #define DB8500_PIN_AB3 _GPIO(21)
30 #define DB8500_PIN_AA3 _GPIO(22)
31 #define DB8500_PIN_AA4 _GPIO(23)
32 #define DB8500_PIN_AB2 _GPIO(24)
33 #define DB8500_PIN_Y4 _GPIO(25)
34 #define DB8500_PIN_Y2 _GPIO(26)
35 #define DB8500_PIN_AA2 _GPIO(27)
36 #define DB8500_PIN_AA1 _GPIO(28)
37 #define DB8500_PIN_W2 _GPIO(29)
38 #define DB8500_PIN_W3 _GPIO(30)
39 #define DB8500_PIN_V3 _GPIO(31)
40 #define DB8500_PIN_V2 _GPIO(32)
41 #define DB8500_PIN_AF2 _GPIO(33)
42 #define DB8500_PIN_AE1 _GPIO(34)
43 #define DB8500_PIN_AE2 _GPIO(35)
44 #define DB8500_PIN_AG2 _GPIO(36)
45 /* Hole */
46 #define DB8500_PIN_F3 _GPIO(64)
47 #define DB8500_PIN_F1 _GPIO(65)
48 #define DB8500_PIN_G3 _GPIO(66)
49 #define DB8500_PIN_G2 _GPIO(67)
50 #define DB8500_PIN_E1 _GPIO(68)
51 #define DB8500_PIN_E2 _GPIO(69)
52 #define DB8500_PIN_G5 _GPIO(70)
53 #define DB8500_PIN_G4 _GPIO(71)
54 #define DB8500_PIN_H4 _GPIO(72)
55 #define DB8500_PIN_H3 _GPIO(73)
56 #define DB8500_PIN_J3 _GPIO(74)
57 #define DB8500_PIN_H2 _GPIO(75)
58 #define DB8500_PIN_J2 _GPIO(76)
59 #define DB8500_PIN_H1 _GPIO(77)
60 #define DB8500_PIN_F4 _GPIO(78)
61 #define DB8500_PIN_E3 _GPIO(79)
62 #define DB8500_PIN_E4 _GPIO(80)
63 #define DB8500_PIN_D2 _GPIO(81)
64 #define DB8500_PIN_C1 _GPIO(82)
65 #define DB8500_PIN_D3 _GPIO(83)
66 #define DB8500_PIN_C2 _GPIO(84)
67 #define DB8500_PIN_D5 _GPIO(85)
68 #define DB8500_PIN_C6 _GPIO(86)
69 #define DB8500_PIN_B3 _GPIO(87)
70 #define DB8500_PIN_C4 _GPIO(88)
71 #define DB8500_PIN_E6 _GPIO(89)
72 #define DB8500_PIN_A3 _GPIO(90)
73 #define DB8500_PIN_B6 _GPIO(91)
74 #define DB8500_PIN_D6 _GPIO(92)
75 #define DB8500_PIN_B7 _GPIO(93)
76 #define DB8500_PIN_D7 _GPIO(94)
77 #define DB8500_PIN_E8 _GPIO(95)
78 #define DB8500_PIN_D8 _GPIO(96)
79 #define DB8500_PIN_D9 _GPIO(97)
80 /* Hole */
81 #define DB8500_PIN_A5 _GPIO(128)
82 #define DB8500_PIN_B4 _GPIO(129)
83 #define DB8500_PIN_C8 _GPIO(130)
84 #define DB8500_PIN_A12 _GPIO(131)
85 #define DB8500_PIN_C10 _GPIO(132)
86 #define DB8500_PIN_B10 _GPIO(133)
87 #define DB8500_PIN_B9 _GPIO(134)
88 #define DB8500_PIN_A9 _GPIO(135)
89 #define DB8500_PIN_C7 _GPIO(136)
90 #define DB8500_PIN_A7 _GPIO(137)
91 #define DB8500_PIN_C5 _GPIO(138)
92 #define DB8500_PIN_C9 _GPIO(139)
93 #define DB8500_PIN_B11 _GPIO(140)
94 #define DB8500_PIN_C12 _GPIO(141)
95 #define DB8500_PIN_C11 _GPIO(142)
96 #define DB8500_PIN_D12 _GPIO(143)
97 #define DB8500_PIN_B13 _GPIO(144)
98 #define DB8500_PIN_C13 _GPIO(145)
99 #define DB8500_PIN_D13 _GPIO(146)
100 #define DB8500_PIN_C15 _GPIO(147)
101 #define DB8500_PIN_B16 _GPIO(148)
102 #define DB8500_PIN_B14 _GPIO(149)
103 #define DB8500_PIN_C14 _GPIO(150)
104 #define DB8500_PIN_D17 _GPIO(151)
105 #define DB8500_PIN_D16 _GPIO(152)
106 #define DB8500_PIN_B17 _GPIO(153)
107 #define DB8500_PIN_C16 _GPIO(154)
108 #define DB8500_PIN_C19 _GPIO(155)
109 #define DB8500_PIN_C17 _GPIO(156)
110 #define DB8500_PIN_A18 _GPIO(157)
111 #define DB8500_PIN_C18 _GPIO(158)
112 #define DB8500_PIN_B19 _GPIO(159)
113 #define DB8500_PIN_B20 _GPIO(160)
114 #define DB8500_PIN_D21 _GPIO(161)
115 #define DB8500_PIN_D20 _GPIO(162)
116 #define DB8500_PIN_C20 _GPIO(163)
117 #define DB8500_PIN_B21 _GPIO(164)
118 #define DB8500_PIN_C21 _GPIO(165)
119 #define DB8500_PIN_A22 _GPIO(166)
120 #define DB8500_PIN_B24 _GPIO(167)
121 #define DB8500_PIN_C22 _GPIO(168)
122 #define DB8500_PIN_D22 _GPIO(169)
123 #define DB8500_PIN_C23 _GPIO(170)
124 #define DB8500_PIN_D23 _GPIO(171)
125 /* Hole */
126 #define DB8500_PIN_AJ27 _GPIO(192)
127 #define DB8500_PIN_AH27 _GPIO(193)
128 #define DB8500_PIN_AF27 _GPIO(194)
129 #define DB8500_PIN_AG28 _GPIO(195)
130 #define DB8500_PIN_AG26 _GPIO(196)
131 #define DB8500_PIN_AH24 _GPIO(197)
132 #define DB8500_PIN_AG25 _GPIO(198)
133 #define DB8500_PIN_AH23 _GPIO(199)
134 #define DB8500_PIN_AH26 _GPIO(200)
135 #define DB8500_PIN_AF24 _GPIO(201)
136 #define DB8500_PIN_AF25 _GPIO(202)
137 #define DB8500_PIN_AE23 _GPIO(203)
138 #define DB8500_PIN_AF23 _GPIO(204)
139 #define DB8500_PIN_AG23 _GPIO(205)
140 #define DB8500_PIN_AG24 _GPIO(206)
141 #define DB8500_PIN_AJ23 _GPIO(207)
142 #define DB8500_PIN_AH16 _GPIO(208)
143 #define DB8500_PIN_AG15 _GPIO(209)
144 #define DB8500_PIN_AJ15 _GPIO(210)
145 #define DB8500_PIN_AG14 _GPIO(211)
146 #define DB8500_PIN_AF13 _GPIO(212)
147 #define DB8500_PIN_AG13 _GPIO(213)
148 #define DB8500_PIN_AH15 _GPIO(214)
149 #define DB8500_PIN_AH13 _GPIO(215)
150 #define DB8500_PIN_AG12 _GPIO(216)
151 #define DB8500_PIN_AH12 _GPIO(217)
152 #define DB8500_PIN_AH11 _GPIO(218)
153 #define DB8500_PIN_AG10 _GPIO(219)
154 #define DB8500_PIN_AH10 _GPIO(220)
155 #define DB8500_PIN_AJ11 _GPIO(221)
156 #define DB8500_PIN_AJ9 _GPIO(222)
157 #define DB8500_PIN_AH9 _GPIO(223)
158 #define DB8500_PIN_AG9 _GPIO(224)
159 #define DB8500_PIN_AG8 _GPIO(225)
160 #define DB8500_PIN_AF8 _GPIO(226)
161 #define DB8500_PIN_AH7 _GPIO(227)
162 #define DB8500_PIN_AJ6 _GPIO(228)
163 #define DB8500_PIN_AG7 _GPIO(229)
164 #define DB8500_PIN_AF7 _GPIO(230)
165 /* Hole */
166 #define DB8500_PIN_AF28 _GPIO(256)
167 #define DB8500_PIN_AE29 _GPIO(257)
168 #define DB8500_PIN_AD29 _GPIO(258)
169 #define DB8500_PIN_AC29 _GPIO(259)
170 #define DB8500_PIN_AD28 _GPIO(260)
171 #define DB8500_PIN_AD26 _GPIO(261)
172 #define DB8500_PIN_AE26 _GPIO(262)
173 #define DB8500_PIN_AG29 _GPIO(263)
174 #define DB8500_PIN_AE27 _GPIO(264)
175 #define DB8500_PIN_AD27 _GPIO(265)
176 #define DB8500_PIN_AC28 _GPIO(266)
177 #define DB8500_PIN_AC27 _GPIO(267)
178
179 /*
180 * The names of the pins are denoted by GPIO number and ball name, even
181 * though they can be used for other things than GPIO, this is the first
182 * column in the table of the data sheet and often used on schematics and
183 * such.
184 */
185 static const struct pinctrl_pin_desc nmk_db8500_pins[] = {
186 PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5"),
187 PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3"),
188 PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4"),
189 PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3"),
190 PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6"),
191 PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6"),
192 PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6"),
193 PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5"),
194 PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5"),
195 PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4"),
196 PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5"),
197 PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4"),
198 PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4"),
199 PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3"),
200 PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3"),
201 PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3"),
202 PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3"),
203 PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4"),
204 PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2"),
205 PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1"),
206 PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4"),
207 PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3"),
208 PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3"),
209 PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4"),
210 PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2"),
211 PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4"),
212 PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2"),
213 PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2"),
214 PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1"),
215 PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2"),
216 PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3"),
217 PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3"),
218 PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2"),
219 PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2"),
220 PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1"),
221 PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2"),
222 PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2"),
223 /* Hole */
224 PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3"),
225 PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1"),
226 PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3"),
227 PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2"),
228 PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1"),
229 PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2"),
230 PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5"),
231 PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4"),
232 PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4"),
233 PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3"),
234 PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3"),
235 PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2"),
236 PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2"),
237 PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1"),
238 PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4"),
239 PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3"),
240 PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4"),
241 PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2"),
242 PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1"),
243 PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3"),
244 PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2"),
245 PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5"),
246 PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6"),
247 PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3"),
248 PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4"),
249 PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6"),
250 PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3"),
251 PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6"),
252 PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6"),
253 PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7"),
254 PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7"),
255 PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8"),
256 PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8"),
257 PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9"),
258 /* Hole */
259 PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5"),
260 PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4"),
261 PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8"),
262 PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12"),
263 PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10"),
264 PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10"),
265 PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9"),
266 PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9"),
267 PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7"),
268 PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7"),
269 PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5"),
270 PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9"),
271 PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11"),
272 PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12"),
273 PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11"),
274 PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12"),
275 PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13"),
276 PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13"),
277 PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13"),
278 PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15"),
279 PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16"),
280 PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14"),
281 PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14"),
282 PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17"),
283 PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16"),
284 PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17"),
285 PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16"),
286 PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19"),
287 PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17"),
288 PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18"),
289 PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18"),
290 PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19"),
291 PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20"),
292 PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21"),
293 PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20"),
294 PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20"),
295 PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21"),
296 PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21"),
297 PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22"),
298 PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24"),
299 PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22"),
300 PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22"),
301 PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23"),
302 PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23"),
303 /* Hole */
304 PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27"),
305 PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27"),
306 PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27"),
307 PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28"),
308 PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26"),
309 PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24"),
310 PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25"),
311 PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23"),
312 PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26"),
313 PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24"),
314 PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25"),
315 PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23"),
316 PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23"),
317 PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23"),
318 PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24"),
319 PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23"),
320 PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16"),
321 PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15"),
322 PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15"),
323 PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14"),
324 PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13"),
325 PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13"),
326 PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15"),
327 PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13"),
328 PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12"),
329 PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12"),
330 PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11"),
331 PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10"),
332 PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10"),
333 PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11"),
334 PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9"),
335 PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9"),
336 PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9"),
337 PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8"),
338 PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8"),
339 PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7"),
340 PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6"),
341 PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7"),
342 PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7"),
343 /* Hole */
344 PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28"),
345 PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29"),
346 PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29"),
347 PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29"),
348 PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28"),
349 PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26"),
350 PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26"),
351 PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29"),
352 PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27"),
353 PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27"),
354 PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28"),
355 PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),
356 };
357
358 /*
359 * Read the pin group names like this:
360 * u0_a_1 = first groups of pins for uart0 on alt function a
361 * i2c2_b_2 = second group of pins for i2c2 on alt function b
362 *
363 * The groups are arranged as sets per altfunction column, so we can
364 * mux in one group at a time by selecting the same altfunction for them
365 * all. When functions require pins on different altfunctions, you need
366 * to combine several groups.
367 */
368
369 /* Altfunction A column */
370 static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
371 DB8500_PIN_AH4, DB8500_PIN_AH3 };
372 static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
373 static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
374 /* Image processor I2C line, this is driven by image processor firmware */
375 static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
376 static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
377 /* MSP0 can only be on these pins, but TXD and RXD can be flipped */
378 static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
379 static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };
380 static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
381 /* Basic pins of the MMC/SD card 0 interface */
382 static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
383 DB8500_PIN_AB4, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
384 DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
385 /* Often only 4 bits are used, then these are not needed (only used for MMC) */
386 static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
387 DB8500_PIN_V3, DB8500_PIN_V2};
388 static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 };
389 /* MSP1 can only be on these pins, but TXD and RXD can be flipped */
390 static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
391 static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };
392 /* LCD interface */
393 static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
394 DB8500_PIN_G3, DB8500_PIN_G2 };
395 static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };
396 static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };
397 static const unsigned lcd_d0_d7_a_1_pins[] = {
398 DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
399 DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 };
400 /* D8 thru D11 often used as TVOUT lines */
401 static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,
402 DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 };
403 static const unsigned lcd_d12_d23_a_1_pins[] = {
404 DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5,
405 DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6,
406 DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 };
407 static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,
408 DB8500_PIN_D8, DB8500_PIN_D9 };
409 static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };
410 static const unsigned kp_a_2_pins[] = {
411 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
412 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
413 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
414 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
415 /* MC2 has 8 data lines and no direction control, so only for (e)MMC */
416 static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
417 DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10,
418 DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7,
419 DB8500_PIN_C5 };
420 static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
421 DB8500_PIN_C12, DB8500_PIN_C11 };
422 static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,
423 DB8500_PIN_C13, DB8500_PIN_D13 };
424 static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };
425 /*
426 * Image processor GPIO pins are named "ipgpio" and have their own
427 * numberspace
428 */
429 static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };
430 static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };
431 /* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */
432 static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,
433 DB8500_PIN_D23 };
434 /*
435 * This MSP cannot switch RX and TX, SCK in a separate group since this
436 * seems to be optional.
437 */
438 static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };
439 static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,
440 DB8500_PIN_AG28, DB8500_PIN_AG26 };
441 static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,
442 DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25,
443 DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24,
444 DB8500_PIN_AJ23 };
445 /* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
446 static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
447 DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,
448 DB8500_PIN_AH15 };
449 static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15,
450 DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13, DB8500_PIN_AH15 };
451 static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
452 DB8500_PIN_AH12, DB8500_PIN_AH11 };
453 static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,
454 DB8500_PIN_AJ11 };
455 static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
456 DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
457 static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
458 DB8500_PIN_AG9, DB8500_PIN_AG8 };
459 static const unsigned clkout1_a_1_pins[] = { DB8500_PIN_AH7 };
460 static const unsigned clkout1_a_2_pins[] = { DB8500_PIN_AG7 };
461 static const unsigned clkout2_a_1_pins[] = { DB8500_PIN_AJ6 };
462 static const unsigned clkout2_a_2_pins[] = { DB8500_PIN_AF7 };
463 static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,
464 DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26,
465 DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27,
466 DB8500_PIN_AC28, DB8500_PIN_AC27 };
467
468 /* Altfunction B column */
469 static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };
470 static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
471 static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
472 static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
473 static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
474 static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
475 static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
476 /* Just RX and TX for UART2 */
477 static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };
478 static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };
479 static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };
480 static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };
481 static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
482 DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
483 static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };
484 static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
485 DB8500_PIN_V3, DB8500_PIN_V2 };
486 static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
487 static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
488 DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2,
489 DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
490 DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1,
491 DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2,
492 DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
493 static const unsigned kp_b_2_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
494 DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_F4, DB8500_PIN_E3};
495 static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
496 DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
497 DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
498 DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,
499 DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
500 DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,
501 DB8500_PIN_C9 };
502 /* This chip select pin can be "ps0" in alt C so have it separately */
503 static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };
504 /* This chip select pin can be "ps1" in alt C so have it separately */
505 static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 };
506 static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };
507 static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };
508 static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };
509 static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };
510 static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,
511 DB8500_PIN_C23, DB8500_PIN_D23 };
512 static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
513 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
514 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
515 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
516 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
517 static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };
518 static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };
519 static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,
520 DB8500_PIN_AG13, DB8500_PIN_AH15 };
521 static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
522 DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10,
523 DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9,
524 DB8500_PIN_AG8 };
525 static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };
526 static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };
527 static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };
528
529 /* Altfunction C column */
530 static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
531 DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 };
532 static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };
533 static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };
534 static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };
535 static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };
536 static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };
537 static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
538 /* Optional 4-bit Memory Stick interface */
539 static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
540 DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
541 DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
542 static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };
543 static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };
544 static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };
545 static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,
546 DB8500_PIN_AE2, DB8500_PIN_AG2 };
547 static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };
548 static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };
549 static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
550 static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };
551 static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };
552 static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
553 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
554 static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };
555 static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };
556 static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };
557 static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };
558 static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };
559 static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
560 DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
561 DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
562 DB8500_PIN_D9 };
563 static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };
564 static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
565 DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,
566 DB8500_PIN_C23, DB8500_PIN_D23 };
567 static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 };
568 static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };
569 static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };
570 static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
571 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
572 static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };
573 static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };
574 static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,
575 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 };
576 static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };
577 static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };
578 static const unsigned clkout1_c_1_pins[] = { DB8500_PIN_AH13 };
579 static const unsigned clkout2_c_1_pins[] = { DB8500_PIN_AH12 };
580 static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };
581 static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,
582 DB8500_PIN_AG9, DB8500_PIN_AG8 };
583 static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };
584 static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
585
586 /* Other C1 column */
587 static const unsigned u2rx_oc1_1_pins[] = { DB8500_PIN_AB2 };
588 static const unsigned stmape_oc1_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
589 DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
590 static const unsigned remap0_oc1_1_pins[] = { DB8500_PIN_E1 };
591 static const unsigned remap1_oc1_1_pins[] = { DB8500_PIN_E2 };
592 static const unsigned ptma9_oc1_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
593 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
594 DB8500_PIN_J2, DB8500_PIN_H1 };
595 static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
596 DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
597 DB8500_PIN_D6, DB8500_PIN_B7 };
598 static const unsigned rf_oc1_1_pins[] = { DB8500_PIN_D8, DB8500_PIN_D9 };
599 static const unsigned hxclk_oc1_1_pins[] = { DB8500_PIN_D16 };
600 static const unsigned uartmodrx_oc1_1_pins[] = { DB8500_PIN_B17 };
601 static const unsigned uartmodtx_oc1_1_pins[] = { DB8500_PIN_C16 };
602 static const unsigned stmmod_oc1_1_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
603 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
604 static const unsigned hxgpio_oc1_1_pins[] = { DB8500_PIN_D21, DB8500_PIN_D20,
605 DB8500_PIN_C20, DB8500_PIN_B21, DB8500_PIN_C21, DB8500_PIN_A22,
606 DB8500_PIN_B24, DB8500_PIN_C22 };
607 static const unsigned rf_oc1_2_pins[] = { DB8500_PIN_C23, DB8500_PIN_D23 };
608 static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
609 DB8500_PIN_AH12, DB8500_PIN_AH11 };
610 static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12,
611 DB8500_PIN_AH11 };
612
613 /* Other C2 column */
614 static const unsigned sbag_oc2_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_AB2,
615 DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
616 static const unsigned etmr4_oc2_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
617 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
618 DB8500_PIN_J2, DB8500_PIN_H1 };
619 static const unsigned ptma9_oc2_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
620 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
621 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
622 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
623 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
624
625 /* Other C3 column */
626 static const unsigned stmmod_oc3_1_pins[] = { DB8500_PIN_AB2, DB8500_PIN_W2,
627 DB8500_PIN_W3, DB8500_PIN_V3, DB8500_PIN_V2 };
628 static const unsigned stmmod_oc3_2_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
629 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
630 static const unsigned uartmodrx_oc3_1_pins[] = { DB8500_PIN_H2 };
631 static const unsigned uartmodtx_oc3_1_pins[] = { DB8500_PIN_J2 };
632 static const unsigned etmr4_oc3_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
633 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
634 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
635 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
636 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
637
638 /* Other C4 column */
639 static const unsigned sbag_oc4_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
640 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H1 };
641 static const unsigned hwobs_oc4_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
642 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
643 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
644 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
645 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
646
647 #define DB8500_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
648 .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
649
650 static const struct nmk_pingroup nmk_db8500_groups[] = {
651 /* Altfunction A column */
652 DB8500_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
653 DB8500_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),
654 DB8500_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),
655 DB8500_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),
656 DB8500_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),
657 DB8500_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),
658 DB8500_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
659 DB8500_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
660 DB8500_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
661 DB8500_PIN_GROUP(mc0_dat47_a_1, NMK_GPIO_ALT_A),
662 DB8500_PIN_GROUP(mc0dat31dir_a_1, NMK_GPIO_ALT_A),
663 DB8500_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
664 DB8500_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
665 DB8500_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
666 DB8500_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),
667 DB8500_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),
668 DB8500_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),
669 DB8500_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),
670 DB8500_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),
671 DB8500_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),
672 DB8500_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),
673 DB8500_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),
674 DB8500_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),
675 DB8500_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
676 DB8500_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),
677 DB8500_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),
678 DB8500_PIN_GROUP(kp_a_2, NMK_GPIO_ALT_A),
679 DB8500_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),
680 DB8500_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),
681 DB8500_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
682 DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
683 DB8500_PIN_GROUP(mc1_a_2, NMK_GPIO_ALT_A),
684 DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
685 DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
686 DB8500_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
687 DB8500_PIN_GROUP(clkout1_a_1, NMK_GPIO_ALT_A),
688 DB8500_PIN_GROUP(clkout1_a_2, NMK_GPIO_ALT_A),
689 DB8500_PIN_GROUP(clkout2_a_1, NMK_GPIO_ALT_A),
690 DB8500_PIN_GROUP(clkout2_a_2, NMK_GPIO_ALT_A),
691 DB8500_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
692 /* Altfunction B column */
693 DB8500_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B),
694 DB8500_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),
695 DB8500_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),
696 DB8500_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),
697 DB8500_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),
698 DB8500_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),
699 DB8500_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),
700 DB8500_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B),
701 DB8500_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B),
702 DB8500_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B),
703 DB8500_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B),
704 DB8500_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),
705 DB8500_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B),
706 DB8500_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B),
707 DB8500_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),
708 DB8500_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
709 DB8500_PIN_GROUP(kp_b_2, NMK_GPIO_ALT_B),
710 DB8500_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
711 DB8500_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
712 DB8500_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B),
713 DB8500_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
714 DB8500_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
715 DB8500_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
716 DB8500_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B),
717 DB8500_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B),
718 DB8500_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B),
719 DB8500_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),
720 DB8500_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),
721 DB8500_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),
722 DB8500_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),
723 DB8500_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),
724 DB8500_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),
725 DB8500_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),
726 /* Altfunction C column */
727 DB8500_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C),
728 DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
729 DB8500_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),
730 DB8500_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),
731 DB8500_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),
732 DB8500_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),
733 DB8500_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C),
734 DB8500_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C),
735 DB8500_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C),
736 DB8500_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),
737 DB8500_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C),
738 DB8500_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),
739 DB8500_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),
740 DB8500_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),
741 DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
742 DB8500_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),
743 DB8500_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),
744 DB8500_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),
745 DB8500_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C),
746 DB8500_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),
747 DB8500_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),
748 DB8500_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),
749 DB8500_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),
750 DB8500_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
751 DB8500_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
752 DB8500_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
753 DB8500_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C),
754 DB8500_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
755 DB8500_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),
756 DB8500_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),
757 DB8500_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C),
758 DB8500_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C),
759 DB8500_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C),
760 DB8500_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C),
761 DB8500_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),
762 DB8500_PIN_GROUP(clkout1_c_1, NMK_GPIO_ALT_C),
763 DB8500_PIN_GROUP(clkout2_c_1, NMK_GPIO_ALT_C),
764 DB8500_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),
765 DB8500_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),
766 DB8500_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C),
767 DB8500_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C),
768 /* Other alt C1 column */
769 DB8500_PIN_GROUP(u2rx_oc1_1, NMK_GPIO_ALT_C1),
770 DB8500_PIN_GROUP(stmape_oc1_1, NMK_GPIO_ALT_C1),
771 DB8500_PIN_GROUP(remap0_oc1_1, NMK_GPIO_ALT_C1),
772 DB8500_PIN_GROUP(remap1_oc1_1, NMK_GPIO_ALT_C1),
773 DB8500_PIN_GROUP(ptma9_oc1_1, NMK_GPIO_ALT_C1),
774 DB8500_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C1),
775 DB8500_PIN_GROUP(rf_oc1_1, NMK_GPIO_ALT_C1),
776 DB8500_PIN_GROUP(hxclk_oc1_1, NMK_GPIO_ALT_C1),
777 DB8500_PIN_GROUP(uartmodrx_oc1_1, NMK_GPIO_ALT_C1),
778 DB8500_PIN_GROUP(uartmodtx_oc1_1, NMK_GPIO_ALT_C1),
779 DB8500_PIN_GROUP(stmmod_oc1_1, NMK_GPIO_ALT_C1),
780 DB8500_PIN_GROUP(hxgpio_oc1_1, NMK_GPIO_ALT_C1),
781 DB8500_PIN_GROUP(rf_oc1_2, NMK_GPIO_ALT_C1),
782 DB8500_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C1),
783 DB8500_PIN_GROUP(spi2_oc1_2, NMK_GPIO_ALT_C1),
784 /* Other alt C2 column */
785 DB8500_PIN_GROUP(sbag_oc2_1, NMK_GPIO_ALT_C2),
786 DB8500_PIN_GROUP(etmr4_oc2_1, NMK_GPIO_ALT_C2),
787 DB8500_PIN_GROUP(ptma9_oc2_1, NMK_GPIO_ALT_C2),
788 /* Other alt C3 column */
789 DB8500_PIN_GROUP(stmmod_oc3_1, NMK_GPIO_ALT_C3),
790 DB8500_PIN_GROUP(stmmod_oc3_2, NMK_GPIO_ALT_C3),
791 DB8500_PIN_GROUP(uartmodrx_oc3_1, NMK_GPIO_ALT_C3),
792 DB8500_PIN_GROUP(uartmodtx_oc3_1, NMK_GPIO_ALT_C3),
793 DB8500_PIN_GROUP(etmr4_oc3_1, NMK_GPIO_ALT_C3),
794 /* Other alt C4 column */
795 DB8500_PIN_GROUP(sbag_oc4_1, NMK_GPIO_ALT_C4),
796 DB8500_PIN_GROUP(hwobs_oc4_1, NMK_GPIO_ALT_C4),
797 };
798
799 /* We use this macro to define the groups applicable to a function */
800 #define DB8500_FUNC_GROUPS(a, b...) \
801 static const char * const a##_groups[] = { b };
802
803 DB8500_FUNC_GROUPS(u0, "u0_a_1", "u0_c_1");
804 DB8500_FUNC_GROUPS(u1, "u1rxtx_a_1", "u1ctsrts_a_1");
805 /*
806 * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however
807 * only available on two pins in alternative function C
808 */
809 DB8500_FUNC_GROUPS(u2, "u2rxtx_b_1", "u2rxtx_c_1", "u2ctsrts_c_1",
810 "u2rxtx_c_2", "u2rxtx_c_3", "u2rx_oc1_1");
811 DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");
812 /*
813 * MSP0 can only be on a certain set of pins, but the TX/RX pins can be
814 * switched around by selecting the altfunction A or B. The SCK pin is
815 * only available on the altfunction B.
816 */
817 DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1", "msp0tfstck_a_1", "msp0rfstck_a_1",
818 "msp0txrx_b_1", "msp0sck_b_1");
819 DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_dat47_a_1", "mc0dat31dir_a_1");
820 /* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */
821 DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1", "msp1_a_1", "msp1txrx_b_1");
822 DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1");
823 DB8500_FUNC_GROUPS(lcd, "lcdvsi0_a_1", "lcdvsi1_a_1", "lcd_d0_d7_a_1",
824 "lcd_d8_d11_a_1", "lcd_d12_d23_a_1", "lcd_b_1");
825 DB8500_FUNC_GROUPS(kp, "kp_a_1", "kp_a_2", "kp_b_1", "kp_b_2", "kp_c_1", "kp_oc1_1");
826 DB8500_FUNC_GROUPS(mc2, "mc2_a_1", "mc2rstn_c_1");
827 DB8500_FUNC_GROUPS(ssp1, "ssp1_a_1");
828 DB8500_FUNC_GROUPS(ssp0, "ssp0_a_1");
829 DB8500_FUNC_GROUPS(i2c0, "i2c0_a_1");
830 /* The image processor has 8 GPIO pins that can be muxed out */
831 DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",
832 "ipgpio2_b_1", "ipgpio3_b_1", "ipgpio6_c_1", "ipgpio0_c_1",
833 "ipgpio1_c_1", "ipgpio3_c_1", "ipgpio2_c_1", "ipgpio4_c_1",
834 "ipgpio5_c_1", "ipgpio6_c_2", "ipgpio7_c_1", "ipgpio2_c_2",
835 "ipgpio3_c_2", "ipgpio4_c_2", "ipgpio5_c_2");
836 /* MSP2 can not invert the RX/TX pins but has the optional SCK pin */
837 DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");
838 DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
839 DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
840 DB8500_FUNC_GROUPS(hsi, "hsir_a_1", "hsit_a_1", "hsit_a_2");
841 DB8500_FUNC_GROUPS(clkout, "clkout1_a_1", "clkout1_a_2", "clkout1_c_1",
842 "clkout2_a_1", "clkout2_a_2", "clkout2_c_1");
843 DB8500_FUNC_GROUPS(usb, "usb_a_1");
844 DB8500_FUNC_GROUPS(trig, "trig_b_1");
845 DB8500_FUNC_GROUPS(i2c4, "i2c4_b_1");
846 DB8500_FUNC_GROUPS(i2c1, "i2c1_b_1", "i2c1_b_2");
847 DB8500_FUNC_GROUPS(i2c2, "i2c2_b_1", "i2c2_b_2");
848 /*
849 * The modem UART can output its RX and TX pins in some different places,
850 * so select one of each.
851 */
852 DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1", "uartmodrx_b_1", "uartmodrx_b_2",
853 "uartmodrx_c_1", "uartmod_tx_c_1", "uartmodrx_oc1_1",
854 "uartmodtx_oc1_1", "uartmodrx_oc3_1", "uartmodtx_oc3_1");
855 DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_c_1", "stmmod_oc1_1",
856 "stmmod_oc3_1", "stmmod_oc3_2");
857 DB8500_FUNC_GROUPS(spi3, "spi3_b_1");
858 /* Select between CS0 on alt B or PS1 on alt C */
859 DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcs1_b_1", "smcleale_c_1",
860 "smps0_c_1", "smps1_c_1");
861 DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1", "lcda_b_1");
862 DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");
863 DB8500_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");
864 DB8500_FUNC_GROUPS(spi1, "spi1_b_1");
865 DB8500_FUNC_GROUPS(mc3, "mc3_b_1");
866 DB8500_FUNC_GROUPS(ipjtag, "ipjtag_c_1");
867 DB8500_FUNC_GROUPS(slim0, "slim0_c_1");
868 DB8500_FUNC_GROUPS(ms, "ms_c_1");
869 DB8500_FUNC_GROUPS(iptrigout, "iptrigout_c_1");
870 DB8500_FUNC_GROUPS(stmape, "stmape_c_1", "stmape_c_2", "stmape_oc1_1");
871 DB8500_FUNC_GROUPS(mc5, "mc5_c_1");
872 DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1", "usbsim_c_2");
873 DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c3_c_2");
874 DB8500_FUNC_GROUPS(spi0, "spi0_c_1");
875 DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1", "spi2_oc1_2");
876 DB8500_FUNC_GROUPS(remap, "remap0_oc1_1", "remap1_oc1_1");
877 DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc4_1");
878 DB8500_FUNC_GROUPS(ptm, "ptma9_oc1_1", "ptma9_oc2_1");
879 DB8500_FUNC_GROUPS(rf, "rf_oc1_1", "rf_oc1_2");
880 DB8500_FUNC_GROUPS(hx, "hxclk_oc1_1", "hxgpio_oc1_1");
881 DB8500_FUNC_GROUPS(etm, "etmr4_oc2_1", "etmr4_oc3_1");
882 DB8500_FUNC_GROUPS(hwobs, "hwobs_oc4_1");
883 #define FUNCTION(fname) \
884 { \
885 .name = #fname, \
886 .groups = fname##_groups, \
887 .ngroups = ARRAY_SIZE(fname##_groups), \
888 }
889
890 static const struct nmk_function nmk_db8500_functions[] = {
891 FUNCTION(u0),
892 FUNCTION(u1),
893 FUNCTION(u2),
894 FUNCTION(ipi2c),
895 FUNCTION(msp0),
896 FUNCTION(mc0),
897 FUNCTION(msp1),
898 FUNCTION(lcdb),
899 FUNCTION(lcd),
900 FUNCTION(kp),
901 FUNCTION(mc2),
902 FUNCTION(ssp1),
903 FUNCTION(ssp0),
904 FUNCTION(i2c0),
905 FUNCTION(ipgpio),
906 FUNCTION(msp2),
907 FUNCTION(mc4),
908 FUNCTION(mc1),
909 FUNCTION(hsi),
910 FUNCTION(clkout),
911 FUNCTION(usb),
912 FUNCTION(trig),
913 FUNCTION(i2c4),
914 FUNCTION(i2c1),
915 FUNCTION(i2c2),
916 FUNCTION(uartmod),
917 FUNCTION(stmmod),
918 FUNCTION(spi3),
919 FUNCTION(sm),
920 FUNCTION(lcda),
921 FUNCTION(ddrtrig),
922 FUNCTION(pwl),
923 FUNCTION(spi1),
924 FUNCTION(mc3),
925 FUNCTION(ipjtag),
926 FUNCTION(slim0),
927 FUNCTION(ms),
928 FUNCTION(iptrigout),
929 FUNCTION(stmape),
930 FUNCTION(mc5),
931 FUNCTION(usbsim),
932 FUNCTION(i2c3),
933 FUNCTION(spi0),
934 FUNCTION(spi2),
935 FUNCTION(remap),
936 FUNCTION(ptm),
937 FUNCTION(rf),
938 FUNCTION(hx),
939 FUNCTION(etm),
940 FUNCTION(hwobs),
941 };
942
943 static const struct prcm_gpiocr_altcx_pin_desc db8500_altcx_pins[] = {
944 PRCM_GPIOCR_ALTCX(23, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_CLK_a */
945 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_CLK_a */
946 false, 0, 0,
947 false, 0, 0
948 ),
949 PRCM_GPIOCR_ALTCX(24, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE or U2_RXD ??? */
950 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_VAL_a */
951 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
952 false, 0, 0
953 ),
954 PRCM_GPIOCR_ALTCX(25, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[0] */
955 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[0] */
956 false, 0, 0,
957 false, 0, 0
958 ),
959 PRCM_GPIOCR_ALTCX(26, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[1] */
960 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[1] */
961 false, 0, 0,
962 false, 0, 0
963 ),
964 PRCM_GPIOCR_ALTCX(27, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[2] */
965 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[2] */
966 false, 0, 0,
967 false, 0, 0
968 ),
969 PRCM_GPIOCR_ALTCX(28, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[3] */
970 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[3] */
971 false, 0, 0,
972 false, 0, 0
973 ),
974 PRCM_GPIOCR_ALTCX(29, false, 0, 0,
975 false, 0, 0,
976 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
977 false, 0, 0
978 ),
979 PRCM_GPIOCR_ALTCX(30, false, 0, 0,
980 false, 0, 0,
981 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
982 false, 0, 0
983 ),
984 PRCM_GPIOCR_ALTCX(31, false, 0, 0,
985 false, 0, 0,
986 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
987 false, 0, 0
988 ),
989 PRCM_GPIOCR_ALTCX(32, false, 0, 0,
990 false, 0, 0,
991 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
992 false, 0, 0
993 ),
994 PRCM_GPIOCR_ALTCX(68, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
995 false, 0, 0,
996 false, 0, 0,
997 false, 0, 0
998 ),
999 PRCM_GPIOCR_ALTCX(69, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
1000 false, 0, 0,
1001 false, 0, 0,
1002 false, 0, 0
1003 ),
1004 PRCM_GPIOCR_ALTCX(70, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D23 */
1005 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1006 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1007 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_CLK */
1008 ),
1009 PRCM_GPIOCR_ALTCX(71, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D22 */
1010 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1011 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1012 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D3 */
1013 ),
1014 PRCM_GPIOCR_ALTCX(72, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D21 */
1015 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1016 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1017 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D2 */
1018 ),
1019 PRCM_GPIOCR_ALTCX(73, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D20 */
1020 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1021 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1022 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D1 */
1023 ),
1024 PRCM_GPIOCR_ALTCX(74, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D19 */
1025 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1026 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1027 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D0 */
1028 ),
1029 PRCM_GPIOCR_ALTCX(75, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D18 */
1030 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1031 true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
1032 false, 0, 0
1033 ),
1034 PRCM_GPIOCR_ALTCX(76, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D17 */
1035 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1036 true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
1037 false, 0, 0
1038 ),
1039 PRCM_GPIOCR_ALTCX(77, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D16 */
1040 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1041 false, 0, 0,
1042 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_VAL */
1043 ),
1044 PRCM_GPIOCR_ALTCX(86, true, PRCM_IDX_GPIOCR1, 12, /* KP_O3 */
1045 false, 0, 0,
1046 false, 0, 0,
1047 false, 0, 0
1048 ),
1049 PRCM_GPIOCR_ALTCX(87, true, PRCM_IDX_GPIOCR1, 12, /* KP_O2 */
1050 false, 0, 0,
1051 false, 0, 0,
1052 false, 0, 0
1053 ),
1054 PRCM_GPIOCR_ALTCX(88, true, PRCM_IDX_GPIOCR1, 12, /* KP_I3 */
1055 false, 0, 0,
1056 false, 0, 0,
1057 false, 0, 0
1058 ),
1059 PRCM_GPIOCR_ALTCX(89, true, PRCM_IDX_GPIOCR1, 12, /* KP_I2 */
1060 false, 0, 0,
1061 false, 0, 0,
1062 false, 0, 0
1063 ),
1064 PRCM_GPIOCR_ALTCX(90, true, PRCM_IDX_GPIOCR1, 12, /* KP_O1 */
1065 false, 0, 0,
1066 false, 0, 0,
1067 false, 0, 0
1068 ),
1069 PRCM_GPIOCR_ALTCX(91, true, PRCM_IDX_GPIOCR1, 12, /* KP_O0 */
1070 false, 0, 0,
1071 false, 0, 0,
1072 false, 0, 0
1073 ),
1074 PRCM_GPIOCR_ALTCX(92, true, PRCM_IDX_GPIOCR1, 12, /* KP_I1 */
1075 false, 0, 0,
1076 false, 0, 0,
1077 false, 0, 0
1078 ),
1079 PRCM_GPIOCR_ALTCX(93, true, PRCM_IDX_GPIOCR1, 12, /* KP_I0 */
1080 false, 0, 0,
1081 false, 0, 0,
1082 false, 0, 0
1083 ),
1084 PRCM_GPIOCR_ALTCX(96, true, PRCM_IDX_GPIOCR2, 3, /* RF_INT */
1085 false, 0, 0,
1086 false, 0, 0,
1087 false, 0, 0
1088 ),
1089 PRCM_GPIOCR_ALTCX(97, true, PRCM_IDX_GPIOCR2, 1, /* RF_CTRL */
1090 false, 0, 0,
1091 false, 0, 0,
1092 false, 0, 0
1093 ),
1094 PRCM_GPIOCR_ALTCX(151, false, 0, 0,
1095 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CTL */
1096 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1097 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS17 */
1098 ),
1099 PRCM_GPIOCR_ALTCX(152, true, PRCM_IDX_GPIOCR1, 4, /* Hx_CLK */
1100 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CLK */
1101 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1102 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS16 */
1103 ),
1104 PRCM_GPIOCR_ALTCX(153, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
1105 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D15 */
1106 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1107 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS15 */
1108 ),
1109 PRCM_GPIOCR_ALTCX(154, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
1110 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D14 */
1111 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1112 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS14 */
1113 ),
1114 PRCM_GPIOCR_ALTCX(155, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1115 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D13 */
1116 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1117 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS13 */
1118 ),
1119 PRCM_GPIOCR_ALTCX(156, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1120 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D12 */
1121 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1122 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS12 */
1123 ),
1124 PRCM_GPIOCR_ALTCX(157, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1125 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D11 */
1126 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1127 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS11 */
1128 ),
1129 PRCM_GPIOCR_ALTCX(158, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1130 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D10 */
1131 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1132 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS10 */
1133 ),
1134 PRCM_GPIOCR_ALTCX(159, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1135 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D9 */
1136 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1137 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS9 */
1138 ),
1139 PRCM_GPIOCR_ALTCX(160, false, 0, 0,
1140 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D8 */
1141 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1142 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS8 */
1143 ),
1144 PRCM_GPIOCR_ALTCX(161, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO7 */
1145 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D7 */
1146 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1147 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS7 */
1148 ),
1149 PRCM_GPIOCR_ALTCX(162, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO6 */
1150 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D6 */
1151 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1152 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS6 */
1153 ),
1154 PRCM_GPIOCR_ALTCX(163, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO5 */
1155 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D5 */
1156 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1157 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS5 */
1158 ),
1159 PRCM_GPIOCR_ALTCX(164, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO4 */
1160 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D4 */
1161 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1162 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS4 */
1163 ),
1164 PRCM_GPIOCR_ALTCX(165, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO3 */
1165 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D3 */
1166 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1167 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS3 */
1168 ),
1169 PRCM_GPIOCR_ALTCX(166, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO2 */
1170 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D2 */
1171 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1172 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS2 */
1173 ),
1174 PRCM_GPIOCR_ALTCX(167, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO1 */
1175 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D1 */
1176 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1177 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS1 */
1178 ),
1179 PRCM_GPIOCR_ALTCX(168, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO0 */
1180 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D0 */
1181 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1182 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS0 */
1183 ),
1184 PRCM_GPIOCR_ALTCX(170, true, PRCM_IDX_GPIOCR2, 2, /* RF_INT */
1185 false, 0, 0,
1186 false, 0, 0,
1187 false, 0, 0
1188 ),
1189 PRCM_GPIOCR_ALTCX(171, true, PRCM_IDX_GPIOCR2, 0, /* RF_CTRL */
1190 false, 0, 0,
1191 false, 0, 0,
1192 false, 0, 0
1193 ),
1194 PRCM_GPIOCR_ALTCX(215, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_TXD */
1195 false, 0, 0,
1196 false, 0, 0,
1197 false, 0, 0
1198 ),
1199 PRCM_GPIOCR_ALTCX(216, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_FRM */
1200 false, 0, 0,
1201 false, 0, 0,
1202 false, 0, 0
1203 ),
1204 PRCM_GPIOCR_ALTCX(217, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_CLK */
1205 false, 0, 0,
1206 false, 0, 0,
1207 false, 0, 0
1208 ),
1209 PRCM_GPIOCR_ALTCX(218, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_RXD */
1210 false, 0, 0,
1211 false, 0, 0,
1212 false, 0, 0
1213 ),
1214 };
1215
1216 static const u16 db8500_prcm_gpiocr_regs[] = {
1217 [PRCM_IDX_GPIOCR1] = 0x138,
1218 [PRCM_IDX_GPIOCR2] = 0x574,
1219 };
1220
1221 static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {
1222 .pins = nmk_db8500_pins,
1223 .npins = ARRAY_SIZE(nmk_db8500_pins),
1224 .functions = nmk_db8500_functions,
1225 .nfunctions = ARRAY_SIZE(nmk_db8500_functions),
1226 .groups = nmk_db8500_groups,
1227 .ngroups = ARRAY_SIZE(nmk_db8500_groups),
1228 .altcx_pins = db8500_altcx_pins,
1229 .npins_altcx = ARRAY_SIZE(db8500_altcx_pins),
1230 .prcm_gpiocr_registers = db8500_prcm_gpiocr_regs,
1231 };
1232
1233 void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
1234 {
1235 *soc = &nmk_db8500_soc;
1236 }
Linux kernel - Deliverables
This page took 0.090601 seconds and 5 git commands to generate.