2 * Core driver for the imx pin controller
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Copyright (C) 2012 Linaro Ltd.
7 * Author: Dong Aisheng <dong.aisheng@linaro.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
15 #include <linux/err.h>
16 #include <linux/init.h>
18 #include <linux/module.h>
20 #include <linux/of_device.h>
21 #include <linux/pinctrl/machine.h>
22 #include <linux/pinctrl/pinconf.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
25 #include <linux/slab.h>
28 #include "pinctrl-imx.h"
30 #define IMX_PMX_DUMP(info, p, m, c, n) \
33 printk(KERN_DEBUG "Format: Pin Mux Config\n"); \
34 for (i = 0; i < n; i++) { \
36 printk(KERN_DEBUG "%s %d 0x%lx\n", \
42 /* The bits in CONFIG cell defined in binding doc*/
43 #define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
44 #define IMX_PAD_SION 0x40000000 /* set SION */
47 * @dev: a pointer back to containing device
48 * @base: the offset to the controller in virtual memory
52 struct pinctrl_dev
*pctl
;
54 const struct imx_pinctrl_soc_info
*info
;
57 static const inline struct imx_pin_group
*imx_pinctrl_find_group_by_name(
58 const struct imx_pinctrl_soc_info
*info
,
61 const struct imx_pin_group
*grp
= NULL
;
64 for (i
= 0; i
< info
->ngroups
; i
++) {
65 if (!strcmp(info
->groups
[i
].name
, name
)) {
66 grp
= &info
->groups
[i
];
74 static int imx_get_groups_count(struct pinctrl_dev
*pctldev
)
76 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
77 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
82 static const char *imx_get_group_name(struct pinctrl_dev
*pctldev
,
85 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
86 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
88 return info
->groups
[selector
].name
;
91 static int imx_get_group_pins(struct pinctrl_dev
*pctldev
, unsigned selector
,
92 const unsigned **pins
,
95 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
96 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
98 if (selector
>= info
->ngroups
)
101 *pins
= info
->groups
[selector
].pins
;
102 *npins
= info
->groups
[selector
].npins
;
107 static void imx_pin_dbg_show(struct pinctrl_dev
*pctldev
, struct seq_file
*s
,
110 seq_printf(s
, "%s", dev_name(pctldev
->dev
));
113 static int imx_dt_node_to_map(struct pinctrl_dev
*pctldev
,
114 struct device_node
*np
,
115 struct pinctrl_map
**map
, unsigned *num_maps
)
117 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
118 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
119 const struct imx_pin_group
*grp
;
120 struct pinctrl_map
*new_map
;
121 struct device_node
*parent
;
126 * first find the group of this node and check if we need create
127 * config maps for pins
129 grp
= imx_pinctrl_find_group_by_name(info
, np
->name
);
131 dev_err(info
->dev
, "unable to find group for node %s\n",
136 for (i
= 0; i
< grp
->npins
; i
++) {
137 if (!(grp
->configs
[i
] & IMX_NO_PAD_CTL
))
141 new_map
= kmalloc(sizeof(struct pinctrl_map
) * map_num
, GFP_KERNEL
);
149 parent
= of_get_parent(np
);
154 new_map
[0].type
= PIN_MAP_TYPE_MUX_GROUP
;
155 new_map
[0].data
.mux
.function
= parent
->name
;
156 new_map
[0].data
.mux
.group
= np
->name
;
159 /* create config map */
161 for (i
= j
= 0; i
< grp
->npins
; i
++) {
162 if (!(grp
->configs
[i
] & IMX_NO_PAD_CTL
)) {
163 new_map
[j
].type
= PIN_MAP_TYPE_CONFIGS_PIN
;
164 new_map
[j
].data
.configs
.group_or_pin
=
165 pin_get_name(pctldev
, grp
->pins
[i
]);
166 new_map
[j
].data
.configs
.configs
= &grp
->configs
[i
];
167 new_map
[j
].data
.configs
.num_configs
= 1;
172 dev_dbg(pctldev
->dev
, "maps: function %s group %s num %d\n",
173 (*map
)->data
.mux
.function
, (*map
)->data
.mux
.group
, map_num
);
178 static void imx_dt_free_map(struct pinctrl_dev
*pctldev
,
179 struct pinctrl_map
*map
, unsigned num_maps
)
184 static const struct pinctrl_ops imx_pctrl_ops
= {
185 .get_groups_count
= imx_get_groups_count
,
186 .get_group_name
= imx_get_group_name
,
187 .get_group_pins
= imx_get_group_pins
,
188 .pin_dbg_show
= imx_pin_dbg_show
,
189 .dt_node_to_map
= imx_dt_node_to_map
,
190 .dt_free_map
= imx_dt_free_map
,
194 static int imx_pmx_enable(struct pinctrl_dev
*pctldev
, unsigned selector
,
197 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
198 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
199 const struct imx_pin_reg
*pin_reg
;
200 const unsigned *pins
, *mux
, *input_val
;
202 unsigned int npins
, pin_id
;
206 * Configure the mux mode for each pin in the group for a specific
209 pins
= info
->groups
[group
].pins
;
210 npins
= info
->groups
[group
].npins
;
211 mux
= info
->groups
[group
].mux_mode
;
212 input_val
= info
->groups
[group
].input_val
;
213 input_reg
= info
->groups
[group
].input_reg
;
215 WARN_ON(!pins
|| !npins
|| !mux
|| !input_val
|| !input_reg
);
217 dev_dbg(ipctl
->dev
, "enable function %s group %s\n",
218 info
->functions
[selector
].name
, info
->groups
[group
].name
);
220 for (i
= 0; i
< npins
; i
++) {
222 pin_reg
= &info
->pin_regs
[pin_id
];
224 if (!(info
->flags
& ZERO_OFFSET_VALID
) && !pin_reg
->mux_reg
) {
225 dev_err(ipctl
->dev
, "Pin(%s) does not support mux function\n",
226 info
->pins
[pin_id
].name
);
230 if (info
->flags
& SHARE_MUX_CONF_REG
) {
232 reg
= readl(ipctl
->base
+ pin_reg
->mux_reg
);
234 reg
|= (mux
[i
] << 20);
235 writel(reg
, ipctl
->base
+ pin_reg
->mux_reg
);
237 writel(mux
[i
], ipctl
->base
+ pin_reg
->mux_reg
);
239 dev_dbg(ipctl
->dev
, "write: offset 0x%x val 0x%x\n",
240 pin_reg
->mux_reg
, mux
[i
]);
243 * If the select input value begins with 0xff, it's a quirky
244 * select input and the value should be interpreted as below.
246 * | 0xff | shift | width | select |
247 * It's used to work around the problem that the select
248 * input for some pin is not implemented in the select
249 * input register but in some general purpose register.
250 * We encode the select input value, width and shift of
251 * the bit field into input_val cell of pin function ID
252 * in device tree, and then decode them here for setting
253 * up the select input bits in general purpose register.
255 if (input_val
[i
] >> 24 == 0xff) {
256 u32 val
= input_val
[i
];
257 u8 select
= val
& 0xff;
258 u8 width
= (val
>> 8) & 0xff;
259 u8 shift
= (val
>> 16) & 0xff;
260 u32 mask
= ((1 << width
) - 1) << shift
;
262 * The input_reg[i] here is actually some IOMUXC general
263 * purpose register, not regular select input register.
265 val
= readl(ipctl
->base
+ input_reg
[i
]);
267 val
|= select
<< shift
;
268 writel(val
, ipctl
->base
+ input_reg
[i
]);
269 } else if (input_reg
[i
]) {
271 * Regular select input register can never be at offset
272 * 0, and we only print register value for regular case.
274 writel(input_val
[i
], ipctl
->base
+ input_reg
[i
]);
276 "==>select_input: offset 0x%x val 0x%x\n",
277 input_reg
[i
], input_val
[i
]);
284 static int imx_pmx_get_funcs_count(struct pinctrl_dev
*pctldev
)
286 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
287 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
289 return info
->nfunctions
;
292 static const char *imx_pmx_get_func_name(struct pinctrl_dev
*pctldev
,
295 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
296 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
298 return info
->functions
[selector
].name
;
301 static int imx_pmx_get_groups(struct pinctrl_dev
*pctldev
, unsigned selector
,
302 const char * const **groups
,
303 unsigned * const num_groups
)
305 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
306 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
308 *groups
= info
->functions
[selector
].groups
;
309 *num_groups
= info
->functions
[selector
].num_groups
;
314 static const struct pinmux_ops imx_pmx_ops
= {
315 .get_functions_count
= imx_pmx_get_funcs_count
,
316 .get_function_name
= imx_pmx_get_func_name
,
317 .get_function_groups
= imx_pmx_get_groups
,
318 .enable
= imx_pmx_enable
,
321 static int imx_pinconf_get(struct pinctrl_dev
*pctldev
,
322 unsigned pin_id
, unsigned long *config
)
324 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
325 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
326 const struct imx_pin_reg
*pin_reg
= &info
->pin_regs
[pin_id
];
328 if (!(info
->flags
& ZERO_OFFSET_VALID
) && !pin_reg
->conf_reg
) {
329 dev_err(info
->dev
, "Pin(%s) does not support config function\n",
330 info
->pins
[pin_id
].name
);
334 *config
= readl(ipctl
->base
+ pin_reg
->conf_reg
);
336 if (info
->flags
& SHARE_MUX_CONF_REG
)
342 static int imx_pinconf_set(struct pinctrl_dev
*pctldev
,
343 unsigned pin_id
, unsigned long config
)
345 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
346 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
347 const struct imx_pin_reg
*pin_reg
= &info
->pin_regs
[pin_id
];
349 if (!(info
->flags
& ZERO_OFFSET_VALID
) && !pin_reg
->conf_reg
) {
350 dev_err(info
->dev
, "Pin(%s) does not support config function\n",
351 info
->pins
[pin_id
].name
);
355 dev_dbg(ipctl
->dev
, "pinconf set pin %s\n",
356 info
->pins
[pin_id
].name
);
358 if (info
->flags
& SHARE_MUX_CONF_REG
) {
360 reg
= readl(ipctl
->base
+ pin_reg
->conf_reg
);
363 writel(reg
, ipctl
->base
+ pin_reg
->conf_reg
);
365 writel(config
, ipctl
->base
+ pin_reg
->conf_reg
);
367 dev_dbg(ipctl
->dev
, "write: offset 0x%x val 0x%lx\n",
368 pin_reg
->conf_reg
, config
);
373 static void imx_pinconf_dbg_show(struct pinctrl_dev
*pctldev
,
374 struct seq_file
*s
, unsigned pin_id
)
376 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
377 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
378 const struct imx_pin_reg
*pin_reg
= &info
->pin_regs
[pin_id
];
379 unsigned long config
;
381 if (!pin_reg
|| !pin_reg
->conf_reg
) {
382 seq_printf(s
, "N/A");
386 config
= readl(ipctl
->base
+ pin_reg
->conf_reg
);
387 seq_printf(s
, "0x%lx", config
);
390 static void imx_pinconf_group_dbg_show(struct pinctrl_dev
*pctldev
,
391 struct seq_file
*s
, unsigned group
)
393 struct imx_pinctrl
*ipctl
= pinctrl_dev_get_drvdata(pctldev
);
394 const struct imx_pinctrl_soc_info
*info
= ipctl
->info
;
395 struct imx_pin_group
*grp
;
396 unsigned long config
;
400 if (group
> info
->ngroups
)
404 grp
= &info
->groups
[group
];
405 for (i
= 0; i
< grp
->npins
; i
++) {
406 name
= pin_get_name(pctldev
, grp
->pins
[i
]);
407 ret
= imx_pinconf_get(pctldev
, grp
->pins
[i
], &config
);
410 seq_printf(s
, "%s: 0x%lx", name
, config
);
414 static const struct pinconf_ops imx_pinconf_ops
= {
415 .pin_config_get
= imx_pinconf_get
,
416 .pin_config_set
= imx_pinconf_set
,
417 .pin_config_dbg_show
= imx_pinconf_dbg_show
,
418 .pin_config_group_dbg_show
= imx_pinconf_group_dbg_show
,
421 static struct pinctrl_desc imx_pinctrl_desc
= {
422 .pctlops
= &imx_pctrl_ops
,
423 .pmxops
= &imx_pmx_ops
,
424 .confops
= &imx_pinconf_ops
,
425 .owner
= THIS_MODULE
,
429 * Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and
430 * 1 u32 CONFIG, so 24 types in total for each pin.
432 #define FSL_PIN_SIZE 24
433 #define SHARE_FSL_PIN_SIZE 20
435 static int imx_pinctrl_parse_groups(struct device_node
*np
,
436 struct imx_pin_group
*grp
,
437 struct imx_pinctrl_soc_info
*info
,
445 dev_dbg(info
->dev
, "group(%d): %s\n", index
, np
->name
);
447 if (info
->flags
& SHARE_MUX_CONF_REG
)
448 pin_size
= SHARE_FSL_PIN_SIZE
;
450 pin_size
= FSL_PIN_SIZE
;
451 /* Initialise group */
452 grp
->name
= np
->name
;
455 * the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>,
456 * do sanity check and calculate pins number
458 list
= of_get_property(np
, "fsl,pins", &size
);
460 dev_err(info
->dev
, "no fsl,pins property in node %s\n", np
->full_name
);
464 /* we do not check return since it's safe node passed down */
465 if (!size
|| size
% pin_size
) {
466 dev_err(info
->dev
, "Invalid fsl,pins property in node %s\n", np
->full_name
);
470 grp
->npins
= size
/ pin_size
;
471 grp
->pins
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(unsigned int),
473 grp
->mux_mode
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(unsigned int),
475 grp
->input_reg
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(u16
),
477 grp
->input_val
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(unsigned int),
479 grp
->configs
= devm_kzalloc(info
->dev
, grp
->npins
* sizeof(unsigned long),
481 for (i
= 0; i
< grp
->npins
; i
++) {
482 u32 mux_reg
= be32_to_cpu(*list
++);
485 struct imx_pin_reg
*pin_reg
;
487 if (info
->flags
& SHARE_MUX_CONF_REG
)
490 conf_reg
= be32_to_cpu(*list
++);
492 pin_id
= mux_reg
? mux_reg
/ 4 : conf_reg
/ 4;
493 pin_reg
= &info
->pin_regs
[pin_id
];
494 grp
->pins
[i
] = pin_id
;
495 pin_reg
->mux_reg
= mux_reg
;
496 pin_reg
->conf_reg
= conf_reg
;
497 grp
->input_reg
[i
] = be32_to_cpu(*list
++);
498 grp
->mux_mode
[i
] = be32_to_cpu(*list
++);
499 grp
->input_val
[i
] = be32_to_cpu(*list
++);
501 /* SION bit is in mux register */
502 config
= be32_to_cpu(*list
++);
503 if (config
& IMX_PAD_SION
)
504 grp
->mux_mode
[i
] |= IOMUXC_CONFIG_SION
;
505 grp
->configs
[i
] = config
& ~IMX_PAD_SION
;
509 IMX_PMX_DUMP(info
, grp
->pins
, grp
->mux_mode
, grp
->configs
, grp
->npins
);
515 static int imx_pinctrl_parse_functions(struct device_node
*np
,
516 struct imx_pinctrl_soc_info
*info
,
519 struct device_node
*child
;
520 struct imx_pmx_func
*func
;
521 struct imx_pin_group
*grp
;
523 static u32 grp_index
;
526 dev_dbg(info
->dev
, "parse function(%d): %s\n", index
, np
->name
);
528 func
= &info
->functions
[index
];
530 /* Initialise function */
531 func
->name
= np
->name
;
532 func
->num_groups
= of_get_child_count(np
);
533 if (func
->num_groups
<= 0) {
534 dev_err(info
->dev
, "no groups defined in %s\n", np
->full_name
);
537 func
->groups
= devm_kzalloc(info
->dev
,
538 func
->num_groups
* sizeof(char *), GFP_KERNEL
);
540 for_each_child_of_node(np
, child
) {
541 func
->groups
[i
] = child
->name
;
542 grp
= &info
->groups
[grp_index
++];
543 ret
= imx_pinctrl_parse_groups(child
, grp
, info
, i
++);
551 static int imx_pinctrl_probe_dt(struct platform_device
*pdev
,
552 struct imx_pinctrl_soc_info
*info
)
554 struct device_node
*np
= pdev
->dev
.of_node
;
555 struct device_node
*child
;
563 nfuncs
= of_get_child_count(np
);
565 dev_err(&pdev
->dev
, "no functions defined\n");
569 info
->nfunctions
= nfuncs
;
570 info
->functions
= devm_kzalloc(&pdev
->dev
, nfuncs
* sizeof(struct imx_pmx_func
),
572 if (!info
->functions
)
576 for_each_child_of_node(np
, child
)
577 info
->ngroups
+= of_get_child_count(child
);
578 info
->groups
= devm_kzalloc(&pdev
->dev
, info
->ngroups
* sizeof(struct imx_pin_group
),
583 for_each_child_of_node(np
, child
) {
584 ret
= imx_pinctrl_parse_functions(child
, info
, i
++);
586 dev_err(&pdev
->dev
, "failed to parse function\n");
594 int imx_pinctrl_probe(struct platform_device
*pdev
,
595 struct imx_pinctrl_soc_info
*info
)
597 struct imx_pinctrl
*ipctl
;
598 struct resource
*res
;
601 if (!info
|| !info
->pins
|| !info
->npins
) {
602 dev_err(&pdev
->dev
, "wrong pinctrl info\n");
605 info
->dev
= &pdev
->dev
;
607 /* Create state holders etc for this driver */
608 ipctl
= devm_kzalloc(&pdev
->dev
, sizeof(*ipctl
), GFP_KERNEL
);
612 info
->pin_regs
= devm_kzalloc(&pdev
->dev
, sizeof(*info
->pin_regs
) *
613 info
->npins
, GFP_KERNEL
);
617 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
618 ipctl
->base
= devm_ioremap_resource(&pdev
->dev
, res
);
619 if (IS_ERR(ipctl
->base
))
620 return PTR_ERR(ipctl
->base
);
622 imx_pinctrl_desc
.name
= dev_name(&pdev
->dev
);
623 imx_pinctrl_desc
.pins
= info
->pins
;
624 imx_pinctrl_desc
.npins
= info
->npins
;
626 ret
= imx_pinctrl_probe_dt(pdev
, info
);
628 dev_err(&pdev
->dev
, "fail to probe dt properties\n");
633 ipctl
->dev
= info
->dev
;
634 platform_set_drvdata(pdev
, ipctl
);
635 ipctl
->pctl
= pinctrl_register(&imx_pinctrl_desc
, &pdev
->dev
, ipctl
);
637 dev_err(&pdev
->dev
, "could not register IMX pinctrl driver\n");
641 dev_info(&pdev
->dev
, "initialized IMX pinctrl driver\n");
646 int imx_pinctrl_remove(struct platform_device
*pdev
)
648 struct imx_pinctrl
*ipctl
= platform_get_drvdata(pdev
);
650 pinctrl_unregister(ipctl
->pctl
);