Merge git://git.infradead.org/users/eparis/selinux
[deliverable/linux.git] / drivers / pinctrl / pinctrl-imx.h
1 /*
2 * IMX pinmux core definitions
3 *
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Copyright (C) 2012 Linaro Ltd.
6 *
7 * Author: Dong Aisheng <dong.aisheng@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15 #ifndef __DRIVERS_PINCTRL_IMX_H
16 #define __DRIVERS_PINCTRL_IMX_H
17
18 struct platform_device;
19
20 /**
21 * struct imx_pin_group - describes an IMX pin group
22 * @name: the name of this specific pin group
23 * @pins: an array of discrete physical pins used in this group, taken
24 * from the driver-local pin enumeration space
25 * @npins: the number of pins in this group array, i.e. the number of
26 * elements in .pins so we can iterate over that array
27 * @mux_mode: the mux mode for each pin in this group. The size of this
28 * array is the same as pins.
29 * @input_reg: select input register offset for this mux if any
30 * 0 if no select input setting needed.
31 * @input_val: the select input value for each pin in this group. The size of
32 * this array is the same as pins.
33 * @configs: the config for each pin in this group. The size of this
34 * array is the same as pins.
35 */
36 struct imx_pin_group {
37 const char *name;
38 unsigned int *pins;
39 unsigned npins;
40 unsigned int *mux_mode;
41 u16 *input_reg;
42 unsigned int *input_val;
43 unsigned long *configs;
44 };
45
46 /**
47 * struct imx_pmx_func - describes IMX pinmux functions
48 * @name: the name of this specific function
49 * @groups: corresponding pin groups
50 * @num_groups: the number of groups
51 */
52 struct imx_pmx_func {
53 const char *name;
54 const char **groups;
55 unsigned num_groups;
56 };
57
58 /**
59 * struct imx_pin_reg - describe a pin reg map
60 * @mux_reg: mux register offset
61 * @conf_reg: config register offset
62 */
63 struct imx_pin_reg {
64 u16 mux_reg;
65 u16 conf_reg;
66 };
67
68 struct imx_pinctrl_soc_info {
69 struct device *dev;
70 const struct pinctrl_pin_desc *pins;
71 unsigned int npins;
72 struct imx_pin_reg *pin_regs;
73 struct imx_pin_group *groups;
74 unsigned int ngroups;
75 struct imx_pmx_func *functions;
76 unsigned int nfunctions;
77 unsigned int flags;
78 };
79
80 #define ZERO_OFFSET_VALID 0x1
81 #define SHARE_MUX_CONF_REG 0x2
82
83 #define NO_MUX 0x0
84 #define NO_PAD 0x0
85
86 #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
87
88 #define PAD_CTL_MASK(len) ((1 << len) - 1)
89 #define IMX_MUX_MASK 0x7
90 #define IOMUXC_CONFIG_SION (0x1 << 4)
91
92 int imx_pinctrl_probe(struct platform_device *pdev,
93 struct imx_pinctrl_soc_info *info);
94 int imx_pinctrl_remove(struct platform_device *pdev);
95 #endif /* __DRIVERS_PINCTRL_IMX_H */
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