2 * SuperH Pin Function Controller support.
4 * Copyright (C) 2008 Magnus Damm
5 * Copyright (C) 2009 - 2012 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
12 #define DRV_NAME "sh-pfc"
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/bitops.h>
16 #include <linux/err.h>
17 #include <linux/errno.h>
19 #include <linux/ioport.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/pinctrl/machine.h>
23 #include <linux/platform_device.h>
24 #include <linux/slab.h>
28 static int sh_pfc_ioremap(struct sh_pfc
*pfc
, struct platform_device
*pdev
)
33 if (pdev
->num_resources
== 0)
36 pfc
->window
= devm_kzalloc(pfc
->dev
, pdev
->num_resources
*
37 sizeof(*pfc
->window
), GFP_NOWAIT
);
41 pfc
->num_windows
= pdev
->num_resources
;
43 for (k
= 0, res
= pdev
->resource
; k
< pdev
->num_resources
; k
++, res
++) {
44 WARN_ON(resource_type(res
) != IORESOURCE_MEM
);
45 pfc
->window
[k
].phys
= res
->start
;
46 pfc
->window
[k
].size
= resource_size(res
);
47 pfc
->window
[k
].virt
= devm_ioremap_nocache(pfc
->dev
, res
->start
,
49 if (!pfc
->window
[k
].virt
)
56 static void __iomem
*sh_pfc_phys_to_virt(struct sh_pfc
*pfc
,
57 unsigned long address
)
59 struct sh_pfc_window
*window
;
62 /* scan through physical windows and convert address */
63 for (i
= 0; i
< pfc
->num_windows
; i
++) {
64 window
= pfc
->window
+ i
;
66 if (address
< window
->phys
)
69 if (address
>= (window
->phys
+ window
->size
))
72 return window
->virt
+ (address
- window
->phys
);
78 int sh_pfc_get_pin_index(struct sh_pfc
*pfc
, unsigned int pin
)
83 if (pfc
->info
->ranges
== NULL
)
86 for (i
= 0, offset
= 0; i
< pfc
->info
->nr_ranges
; ++i
) {
87 const struct pinmux_range
*range
= &pfc
->info
->ranges
[i
];
89 if (pin
<= range
->end
)
90 return pin
>= range
->begin
91 ? offset
+ pin
- range
->begin
: -1;
93 offset
+= range
->end
- range
->begin
+ 1;
99 static int sh_pfc_enum_in_range(pinmux_enum_t enum_id
,
100 const struct pinmux_range
*r
)
102 if (enum_id
< r
->begin
)
105 if (enum_id
> r
->end
)
111 unsigned long sh_pfc_read_raw_reg(void __iomem
*mapped_reg
,
112 unsigned long reg_width
)
116 return ioread8(mapped_reg
);
118 return ioread16(mapped_reg
);
120 return ioread32(mapped_reg
);
127 void sh_pfc_write_raw_reg(void __iomem
*mapped_reg
, unsigned long reg_width
,
132 iowrite8(data
, mapped_reg
);
135 iowrite16(data
, mapped_reg
);
138 iowrite32(data
, mapped_reg
);
145 static void sh_pfc_config_reg_helper(struct sh_pfc
*pfc
,
146 const struct pinmux_cfg_reg
*crp
,
147 unsigned long in_pos
,
148 void __iomem
**mapped_regp
,
149 unsigned long *maskp
,
154 *mapped_regp
= sh_pfc_phys_to_virt(pfc
, crp
->reg
);
156 if (crp
->field_width
) {
157 *maskp
= (1 << crp
->field_width
) - 1;
158 *posp
= crp
->reg_width
- ((in_pos
+ 1) * crp
->field_width
);
160 *maskp
= (1 << crp
->var_field_width
[in_pos
]) - 1;
161 *posp
= crp
->reg_width
;
162 for (k
= 0; k
<= in_pos
; k
++)
163 *posp
-= crp
->var_field_width
[k
];
167 static void sh_pfc_write_config_reg(struct sh_pfc
*pfc
,
168 const struct pinmux_cfg_reg
*crp
,
169 unsigned long field
, unsigned long value
)
171 void __iomem
*mapped_reg
;
172 unsigned long mask
, pos
, data
;
174 sh_pfc_config_reg_helper(pfc
, crp
, field
, &mapped_reg
, &mask
, &pos
);
176 pr_debug("write_reg addr = %lx, value = %ld, field = %ld, "
177 "r_width = %ld, f_width = %ld\n",
178 crp
->reg
, value
, field
, crp
->reg_width
, crp
->field_width
);
180 mask
= ~(mask
<< pos
);
181 value
= value
<< pos
;
183 data
= sh_pfc_read_raw_reg(mapped_reg
, crp
->reg_width
);
187 if (pfc
->info
->unlock_reg
)
188 sh_pfc_write_raw_reg(
189 sh_pfc_phys_to_virt(pfc
, pfc
->info
->unlock_reg
), 32,
192 sh_pfc_write_raw_reg(mapped_reg
, crp
->reg_width
, data
);
195 static int sh_pfc_get_config_reg(struct sh_pfc
*pfc
, pinmux_enum_t enum_id
,
196 const struct pinmux_cfg_reg
**crp
, int *fieldp
,
199 const struct pinmux_cfg_reg
*config_reg
;
200 unsigned long r_width
, f_width
, curr_width
, ncomb
;
201 int k
, m
, n
, pos
, bit_pos
;
205 config_reg
= pfc
->info
->cfg_regs
+ k
;
207 r_width
= config_reg
->reg_width
;
208 f_width
= config_reg
->field_width
;
215 for (bit_pos
= 0; bit_pos
< r_width
; bit_pos
+= curr_width
) {
217 curr_width
= f_width
;
219 curr_width
= config_reg
->var_field_width
[m
];
221 ncomb
= 1 << curr_width
;
222 for (n
= 0; n
< ncomb
; n
++) {
223 if (config_reg
->enum_ids
[pos
+ n
] == enum_id
) {
239 static int sh_pfc_mark_to_enum(struct sh_pfc
*pfc
, pinmux_enum_t mark
, int pos
,
240 pinmux_enum_t
*enum_idp
)
242 const pinmux_enum_t
*data
= pfc
->info
->gpio_data
;
246 *enum_idp
= data
[pos
+ 1];
250 for (k
= 0; k
< pfc
->info
->gpio_data_size
; k
++) {
251 if (data
[k
] == mark
) {
252 *enum_idp
= data
[k
+ 1];
257 pr_err("cannot locate data/mark enum_id for mark %d\n", mark
);
261 int sh_pfc_config_mux(struct sh_pfc
*pfc
, unsigned mark
, int pinmux_type
)
263 const struct pinmux_cfg_reg
*cr
= NULL
;
264 pinmux_enum_t enum_id
;
265 const struct pinmux_range
*range
;
266 int in_range
, pos
, field
, value
;
268 switch (pinmux_type
) {
270 case PINMUX_TYPE_FUNCTION
:
274 case PINMUX_TYPE_OUTPUT
:
275 range
= &pfc
->info
->output
;
278 case PINMUX_TYPE_INPUT
:
279 range
= &pfc
->info
->input
;
282 case PINMUX_TYPE_INPUT_PULLUP
:
283 range
= &pfc
->info
->input_pu
;
286 case PINMUX_TYPE_INPUT_PULLDOWN
:
287 range
= &pfc
->info
->input_pd
;
299 pos
= sh_pfc_mark_to_enum(pfc
, mark
, pos
, &enum_id
);
306 /* first check if this is a function enum */
307 in_range
= sh_pfc_enum_in_range(enum_id
, &pfc
->info
->function
);
309 /* not a function enum */
312 * other range exists, so this pin is
313 * a regular GPIO pin that now is being
314 * bound to a specific direction.
316 * for this case we only allow function enums
317 * and the enums that match the other range.
319 in_range
= sh_pfc_enum_in_range(enum_id
, range
);
322 * special case pass through for fixed
323 * input-only or output-only pins without
324 * function enum register association.
326 if (in_range
&& enum_id
== range
->force
)
330 * no other range exists, so this pin
331 * must then be of the function type.
333 * allow function type pins to select
334 * any combination of function/in/out
335 * in their MARK lists.
344 if (sh_pfc_get_config_reg(pfc
, enum_id
, &cr
,
345 &field
, &value
) != 0)
348 sh_pfc_write_config_reg(pfc
, cr
, field
, value
);
354 static int sh_pfc_probe(struct platform_device
*pdev
)
356 const struct sh_pfc_soc_info
*info
;
360 info
= pdev
->id_entry
->driver_data
361 ? (void *)pdev
->id_entry
->driver_data
: pdev
->dev
.platform_data
;
365 pfc
= devm_kzalloc(&pdev
->dev
, sizeof(*pfc
), GFP_KERNEL
);
370 pfc
->dev
= &pdev
->dev
;
372 ret
= sh_pfc_ioremap(pfc
, pdev
);
373 if (unlikely(ret
< 0))
376 spin_lock_init(&pfc
->lock
);
378 pinctrl_provide_dummies();
381 * Initialize pinctrl bindings first
383 ret
= sh_pfc_register_pinctrl(pfc
);
384 if (unlikely(ret
!= 0))
387 #ifdef CONFIG_GPIO_SH_PFC
391 ret
= sh_pfc_register_gpiochip(pfc
);
392 if (unlikely(ret
!= 0)) {
394 * If the GPIO chip fails to come up we still leave the
395 * PFC state as it is, given that there are already
396 * extant users of it that have succeeded by this point.
398 pr_notice("failed to init GPIO chip, ignoring...\n");
402 platform_set_drvdata(pdev
, pfc
);
404 pr_info("%s support registered\n", info
->name
);
409 static int sh_pfc_remove(struct platform_device
*pdev
)
411 struct sh_pfc
*pfc
= platform_get_drvdata(pdev
);
413 #ifdef CONFIG_GPIO_SH_PFC
414 sh_pfc_unregister_gpiochip(pfc
);
416 sh_pfc_unregister_pinctrl(pfc
);
418 platform_set_drvdata(pdev
, NULL
);
423 static const struct platform_device_id sh_pfc_id_table
[] = {
424 #ifdef CONFIG_PINCTRL_PFC_R8A7740
425 { "pfc-r8a7740", (kernel_ulong_t
)&r8a7740_pinmux_info
},
427 #ifdef CONFIG_PINCTRL_PFC_R8A7779
428 { "pfc-r8a7779", (kernel_ulong_t
)&r8a7779_pinmux_info
},
430 #ifdef CONFIG_PINCTRL_PFC_SH7203
431 { "pfc-sh7203", (kernel_ulong_t
)&sh7203_pinmux_info
},
433 #ifdef CONFIG_PINCTRL_PFC_SH7264
434 { "pfc-sh7264", (kernel_ulong_t
)&sh7264_pinmux_info
},
436 #ifdef CONFIG_PINCTRL_PFC_SH7269
437 { "pfc-sh7269", (kernel_ulong_t
)&sh7269_pinmux_info
},
439 #ifdef CONFIG_PINCTRL_PFC_SH7372
440 { "pfc-sh7372", (kernel_ulong_t
)&sh7372_pinmux_info
},
442 #ifdef CONFIG_PINCTRL_PFC_SH73A0
443 { "pfc-sh73a0", (kernel_ulong_t
)&sh73a0_pinmux_info
},
445 #ifdef CONFIG_PINCTRL_PFC_SH7720
446 { "pfc-sh7720", (kernel_ulong_t
)&sh7720_pinmux_info
},
448 #ifdef CONFIG_PINCTRL_PFC_SH7722
449 { "pfc-sh7722", (kernel_ulong_t
)&sh7722_pinmux_info
},
451 #ifdef CONFIG_PINCTRL_PFC_SH7723
452 { "pfc-sh7723", (kernel_ulong_t
)&sh7723_pinmux_info
},
454 #ifdef CONFIG_PINCTRL_PFC_SH7724
455 { "pfc-sh7724", (kernel_ulong_t
)&sh7724_pinmux_info
},
457 #ifdef CONFIG_PINCTRL_PFC_SH7734
458 { "pfc-sh7734", (kernel_ulong_t
)&sh7734_pinmux_info
},
460 #ifdef CONFIG_PINCTRL_PFC_SH7757
461 { "pfc-sh7757", (kernel_ulong_t
)&sh7757_pinmux_info
},
463 #ifdef CONFIG_PINCTRL_PFC_SH7785
464 { "pfc-sh7785", (kernel_ulong_t
)&sh7785_pinmux_info
},
466 #ifdef CONFIG_PINCTRL_PFC_SH7786
467 { "pfc-sh7786", (kernel_ulong_t
)&sh7786_pinmux_info
},
469 #ifdef CONFIG_PINCTRL_PFC_SHX3
470 { "pfc-shx3", (kernel_ulong_t
)&shx3_pinmux_info
},
475 MODULE_DEVICE_TABLE(platform
, sh_pfc_id_table
);
477 static struct platform_driver sh_pfc_driver
= {
478 .probe
= sh_pfc_probe
,
479 .remove
= sh_pfc_remove
,
480 .id_table
= sh_pfc_id_table
,
483 .owner
= THIS_MODULE
,
487 static int __init
sh_pfc_init(void)
489 return platform_driver_register(&sh_pfc_driver
);
491 postcore_initcall(sh_pfc_init
);
493 static void __exit
sh_pfc_exit(void)
495 platform_driver_unregister(&sh_pfc_driver
);
497 module_exit(sh_pfc_exit
);
499 MODULE_AUTHOR("Magnus Damm, Paul Mundt, Laurent Pinchart");
500 MODULE_DESCRIPTION("Pin Control and GPIO driver for SuperH pin function controller");
501 MODULE_LICENSE("GPL v2");