drivers/pinctrl/sh-pfc/gpio.c

   1 /*
   2  * SuperH Pin Function Controller GPIO driver.
   3  *
   4  * Copyright (C) 2008 Magnus Damm
   5  * Copyright (C) 2009 - 2012 Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11
  12 #include <linux/device.h>
  13 #include <linux/gpio.h>
  14 #include <linux/init.h>
  15 #include <linux/module.h>
  16 #include <linux/pinctrl/consumer.h>
  17 #include <linux/slab.h>
  18 #include <linux/spinlock.h>
  19
  20 #include "core.h"
  21
  22 struct sh_pfc_gpio_data_reg {
  23         const struct pinmux_data_reg *info;
  24         unsigned long shadow;
  25 };
  26
  27 struct sh_pfc_gpio_pin {
  28         u8 dbit;
  29         u8 dreg;
  30 };
  31
  32 struct sh_pfc_chip {
  33         struct sh_pfc                   *pfc;
  34         struct gpio_chip                gpio_chip;
  35
  36         struct sh_pfc_window            *mem;
  37         struct sh_pfc_gpio_data_reg     *regs;
  38         struct sh_pfc_gpio_pin          *pins;
  39 };
  40
  41 static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
  42 {
  43         return container_of(gc, struct sh_pfc_chip, gpio_chip);
  44 }
  45
  46 static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
  47 {
  48         return gpio_to_pfc_chip(gc)->pfc;
  49 }
  50
  51 static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset,
  52                               struct sh_pfc_gpio_data_reg **reg,
  53                               unsigned int *bit)
  54 {
  55         int idx = sh_pfc_get_pin_index(chip->pfc, offset);
  56         struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
  57
  58         *reg = &chip->regs[gpio_pin->dreg];
  59         *bit = gpio_pin->dbit;
  60 }
  61
  62 static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
  63                                         const struct pinmux_data_reg *dreg)
  64 {
  65         void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
  66
  67         return sh_pfc_read_raw_reg(mem, dreg->reg_width);
  68 }
  69
  70 static void gpio_write_data_reg(struct sh_pfc_chip *chip,
  71                                 const struct pinmux_data_reg *dreg,
  72                                 unsigned long value)
  73 {
  74         void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
  75
  76         sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
  77 }
  78
  79 static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned idx)
  80 {
  81         struct sh_pfc *pfc = chip->pfc;
  82         struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
  83         const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
  84         const struct pinmux_data_reg *dreg;
  85         unsigned int bit;
  86         unsigned int i;
  87
  88         for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
  89                 for (bit = 0; bit < dreg->reg_width; bit++) {
  90                         if (dreg->enum_ids[bit] == pin->enum_id) {
  91                                 gpio_pin->dreg = i;
  92                                 gpio_pin->dbit = bit;
  93                                 return;
  94                         }
  95                 }
  96         }
  97
  98         BUG();
  99 }
 100
 101 static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
 102 {
 103         struct sh_pfc *pfc = chip->pfc;
 104         const struct pinmux_data_reg *dreg;
 105         unsigned int i;
 106
 107         /* Count the number of data registers, allocate memory and initialize
 108          * them.
 109          */
 110         for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
 111                 ;
 112
 113         chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs),
 114                                   GFP_KERNEL);
 115         if (chip->regs == NULL)
 116                 return -ENOMEM;
 117
 118         for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
 119                 chip->regs[i].info = dreg;
 120                 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
 121         }
 122
 123         for (i = 0; i < pfc->info->nr_pins; i++) {
 124                 if (pfc->info->pins[i].enum_id == 0)
 125                         continue;
 126
 127                 gpio_setup_data_reg(chip, i);
 128         }
 129
 130         return 0;
 131 }
 132
 133 /* -----------------------------------------------------------------------------
 134  * Pin GPIOs
 135  */
 136
 137 static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
 138 {
 139         struct sh_pfc *pfc = gpio_to_pfc(gc);
 140         int idx = sh_pfc_get_pin_index(pfc, offset);
 141
 142         if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
 143                 return -EINVAL;
 144
 145         return pinctrl_request_gpio(offset);
 146 }
 147
 148 static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
 149 {
 150         return pinctrl_free_gpio(offset);
 151 }
 152
 153 static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
 154                                int value)
 155 {
 156         struct sh_pfc_gpio_data_reg *reg;
 157         unsigned long pos;
 158         unsigned int bit;
 159
 160         gpio_get_data_reg(chip, offset, &reg, &bit);
 161
 162         pos = reg->info->reg_width - (bit + 1);
 163
 164         if (value)
 165                 set_bit(pos, &reg->shadow);
 166         else
 167                 clear_bit(pos, &reg->shadow);
 168
 169         gpio_write_data_reg(chip, reg->info, reg->shadow);
 170 }
 171
 172 static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
 173 {
 174         return pinctrl_gpio_direction_input(offset);
 175 }
 176
 177 static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
 178                                     int value)
 179 {
 180         gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
 181
 182         return pinctrl_gpio_direction_output(offset);
 183 }
 184
 185 static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
 186 {
 187         struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
 188         struct sh_pfc_gpio_data_reg *reg;
 189         unsigned long pos;
 190         unsigned int bit;
 191
 192         gpio_get_data_reg(chip, offset, &reg, &bit);
 193
 194         pos = reg->info->reg_width - (bit + 1);
 195
 196         return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
 197 }
 198
 199 static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
 200 {
 201         gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
 202 }
 203
 204 static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 205 {
 206         struct sh_pfc *pfc = gpio_to_pfc(gc);
 207         unsigned int i, k;
 208
 209         for (i = 0; i < pfc->info->gpio_irq_size; i++) {
 210                 const short *gpios = pfc->info->gpio_irq[i].gpios;
 211
 212                 for (k = 0; gpios[k] >= 0; k++) {
 213                         if (gpios[k] == offset)
 214                                 goto found;
 215                 }
 216         }
 217
 218         return -ENOSYS;
 219
 220 found:
 221         if (pfc->num_irqs)
 222                 return pfc->irqs[i];
 223         else
 224                 return pfc->info->gpio_irq[i].irq;
 225 }
 226
 227 static int gpio_pin_setup(struct sh_pfc_chip *chip)
 228 {
 229         struct sh_pfc *pfc = chip->pfc;
 230         struct gpio_chip *gc = &chip->gpio_chip;
 231         int ret;
 232
 233         chip->pins = devm_kzalloc(pfc->dev, pfc->info->nr_pins *
 234                                   sizeof(*chip->pins), GFP_KERNEL);
 235         if (chip->pins == NULL)
 236                 return -ENOMEM;
 237
 238         ret = gpio_setup_data_regs(chip);
 239         if (ret < 0)
 240                 return ret;
 241
 242         gc->request = gpio_pin_request;
 243         gc->free = gpio_pin_free;
 244         gc->direction_input = gpio_pin_direction_input;
 245         gc->get = gpio_pin_get;
 246         gc->direction_output = gpio_pin_direction_output;
 247         gc->set = gpio_pin_set;
 248         gc->to_irq = gpio_pin_to_irq;
 249
 250         gc->label = pfc->info->name;
 251         gc->dev = pfc->dev;
 252         gc->owner = THIS_MODULE;
 253         gc->base = 0;
 254         gc->ngpio = pfc->nr_gpio_pins;
 255
 256         return 0;
 257 }
 258
 259 /* -----------------------------------------------------------------------------
 260  * Function GPIOs
 261  */
 262
 263 static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
 264 {
 265         static bool __print_once;
 266         struct sh_pfc *pfc = gpio_to_pfc(gc);
 267         unsigned int mark = pfc->info->func_gpios[offset].enum_id;
 268         unsigned long flags;
 269         int ret;
 270
 271         if (!__print_once) {
 272                 dev_notice(pfc->dev,
 273                            "Use of GPIO API for function requests is deprecated."
 274                            " Convert to pinctrl\n");
 275                 __print_once = true;
 276         }
 277
 278         if (mark == 0)
 279                 return -EINVAL;
 280
 281         spin_lock_irqsave(&pfc->lock, flags);
 282         ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION);
 283         spin_unlock_irqrestore(&pfc->lock, flags);
 284
 285         return ret;
 286 }
 287
 288 static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
 289 {
 290 }
 291
 292 static int gpio_function_setup(struct sh_pfc_chip *chip)
 293 {
 294         struct sh_pfc *pfc = chip->pfc;
 295         struct gpio_chip *gc = &chip->gpio_chip;
 296
 297         gc->request = gpio_function_request;
 298         gc->free = gpio_function_free;
 299
 300         gc->label = pfc->info->name;
 301         gc->owner = THIS_MODULE;
 302         gc->base = pfc->nr_gpio_pins;
 303         gc->ngpio = pfc->info->nr_func_gpios;
 304
 305         return 0;
 306 }
 307
 308 /* -----------------------------------------------------------------------------
 309  * Register/unregister
 310  */
 311
 312 static struct sh_pfc_chip *
 313 sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *),
 314                     struct sh_pfc_window *mem)
 315 {
 316         struct sh_pfc_chip *chip;
 317         int ret;
 318
 319         chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
 320         if (unlikely(!chip))
 321                 return ERR_PTR(-ENOMEM);
 322
 323         chip->mem = mem;
 324         chip->pfc = pfc;
 325
 326         ret = setup(chip);
 327         if (ret < 0)
 328                 return ERR_PTR(ret);
 329
 330         ret = gpiochip_add(&chip->gpio_chip);
 331         if (unlikely(ret < 0))
 332                 return ERR_PTR(ret);
 333
 334         dev_info(pfc->dev, "%s handling gpio %u -> %u\n",
 335                  chip->gpio_chip.label, chip->gpio_chip.base,
 336                  chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
 337
 338         return chip;
 339 }
 340
 341 int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 342 {
 343         struct sh_pfc_chip *chip;
 344         unsigned int i;
 345         int ret;
 346
 347         if (pfc->info->data_regs == NULL)
 348                 return 0;
 349
 350         /* Find the memory window that contain the GPIO registers. Boards that
 351          * register a separate GPIO device will not supply a memory resource
 352          * that covers the data registers. In that case don't try to handle
 353          * GPIOs.
 354          */
 355         for (i = 0; i < pfc->num_windows; ++i) {
 356                 struct sh_pfc_window *window = &pfc->windows[i];
 357
 358                 if (pfc->info->data_regs[0].reg >= window->phys &&
 359                     pfc->info->data_regs[0].reg < window->phys + window->size)
 360                         break;
 361         }
 362
 363         if (i == pfc->num_windows)
 364                 return 0;
 365
 366         /* If we have IRQ resources make sure their number is correct. */
 367         if (pfc->num_irqs && pfc->num_irqs != pfc->info->gpio_irq_size) {
 368                 dev_err(pfc->dev, "invalid number of IRQ resources\n");
 369                 return -EINVAL;
 370         }
 371
 372         /* Register the real GPIOs chip. */
 373         chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]);
 374         if (IS_ERR(chip))
 375                 return PTR_ERR(chip);
 376
 377         pfc->gpio = chip;
 378
 379         /* Register the GPIO to pin mappings. As pins with GPIO ports must come
 380          * first in the ranges, skip the pins without GPIO ports by stopping at
 381          * the first range that contains such a pin.
 382          */
 383         for (i = 0; i < pfc->nr_ranges; ++i) {
 384                 const struct sh_pfc_pin_range *range = &pfc->ranges[i];
 385
 386                 if (range->start >= pfc->nr_gpio_pins)
 387                         break;
 388
 389                 ret = gpiochip_add_pin_range(&chip->gpio_chip,
 390                                              dev_name(pfc->dev),
 391                                              range->start, range->start,
 392                                              range->end - range->start + 1);
 393                 if (ret < 0)
 394                         return ret;
 395         }
 396
 397         /* Register the function GPIOs chip. */
 398         if (pfc->info->nr_func_gpios == 0)
 399                 return 0;
 400
 401         chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL);
 402         if (IS_ERR(chip))
 403                 return PTR_ERR(chip);
 404
 405         pfc->func = chip;
 406
 407         return 0;
 408 }
 409
 410 int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
 411 {
 412         gpiochip_remove(&pfc->gpio->gpio_chip);
 413         gpiochip_remove(&pfc->func->gpio_chip);
 414
 415         return 0;
 416 }