2 * SuperH Pin Function Controller GPIO driver.
4 * Copyright (C) 2008 Magnus Damm
5 * Copyright (C) 2009 - 2012 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
12 #define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt
14 #include <linux/device.h>
15 #include <linux/gpio.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/slab.h>
20 #include <linux/spinlock.h>
26 struct gpio_chip gpio_chip
;
29 static struct sh_pfc_chip
*gpio_to_pfc_chip(struct gpio_chip
*gc
)
31 return container_of(gc
, struct sh_pfc_chip
, gpio_chip
);
34 static struct sh_pfc
*gpio_to_pfc(struct gpio_chip
*gc
)
36 return gpio_to_pfc_chip(gc
)->pfc
;
39 static void gpio_get_data_reg(struct sh_pfc
*pfc
, unsigned int gpio
,
40 struct pinmux_data_reg
**dr
, unsigned int *bit
)
42 struct sh_pfc_pin
*gpiop
= sh_pfc_get_pin(pfc
, gpio
);
44 *dr
= pfc
->info
->data_regs
45 + ((gpiop
->flags
& PINMUX_FLAG_DREG
) >> PINMUX_FLAG_DREG_SHIFT
);
46 *bit
= (gpiop
->flags
& PINMUX_FLAG_DBIT
) >> PINMUX_FLAG_DBIT_SHIFT
;
49 static void gpio_setup_data_reg(struct sh_pfc
*pfc
, unsigned gpio
)
51 struct sh_pfc_pin
*gpiop
= &pfc
->info
->pins
[gpio
];
52 struct pinmux_data_reg
*data_reg
;
57 data_reg
= pfc
->info
->data_regs
+ k
;
59 if (!data_reg
->reg_width
)
62 data_reg
->mapped_reg
= sh_pfc_phys_to_virt(pfc
, data_reg
->reg
);
64 for (n
= 0; n
< data_reg
->reg_width
; n
++) {
65 if (data_reg
->enum_ids
[n
] == gpiop
->enum_id
) {
66 gpiop
->flags
&= ~PINMUX_FLAG_DREG
;
67 gpiop
->flags
|= (k
<< PINMUX_FLAG_DREG_SHIFT
);
68 gpiop
->flags
&= ~PINMUX_FLAG_DBIT
;
69 gpiop
->flags
|= (n
<< PINMUX_FLAG_DBIT_SHIFT
);
79 static void gpio_setup_data_regs(struct sh_pfc
*pfc
)
81 struct pinmux_data_reg
*drp
;
84 for (k
= 0; k
< pfc
->info
->nr_pins
; k
++) {
85 if (pfc
->info
->pins
[k
].enum_id
== 0)
88 gpio_setup_data_reg(pfc
, k
);
93 drp
= pfc
->info
->data_regs
+ k
;
98 drp
->reg_shadow
= sh_pfc_read_raw_reg(drp
->mapped_reg
,
104 /* -----------------------------------------------------------------------------
108 static int gpio_pin_request(struct gpio_chip
*gc
, unsigned offset
)
110 struct sh_pfc
*pfc
= gpio_to_pfc(gc
);
111 struct sh_pfc_pin
*pin
= sh_pfc_get_pin(pfc
, offset
);
113 if (pin
== NULL
|| pin
->enum_id
== 0)
116 return pinctrl_request_gpio(offset
);
119 static void gpio_pin_free(struct gpio_chip
*gc
, unsigned offset
)
121 return pinctrl_free_gpio(offset
);
124 static void gpio_pin_set_value(struct sh_pfc
*pfc
, unsigned offset
, int value
)
126 struct pinmux_data_reg
*dr
;
130 gpio_get_data_reg(pfc
, offset
, &dr
, &bit
);
132 pos
= dr
->reg_width
- (bit
+ 1);
135 set_bit(pos
, &dr
->reg_shadow
);
137 clear_bit(pos
, &dr
->reg_shadow
);
139 sh_pfc_write_raw_reg(dr
->mapped_reg
, dr
->reg_width
, dr
->reg_shadow
);
142 static int gpio_pin_direction_input(struct gpio_chip
*gc
, unsigned offset
)
144 return pinctrl_gpio_direction_input(offset
);
147 static int gpio_pin_direction_output(struct gpio_chip
*gc
, unsigned offset
,
150 gpio_pin_set_value(gpio_to_pfc(gc
), offset
, value
);
152 return pinctrl_gpio_direction_output(offset
);
155 static int gpio_pin_get(struct gpio_chip
*gc
, unsigned offset
)
157 struct sh_pfc
*pfc
= gpio_to_pfc(gc
);
158 struct pinmux_data_reg
*dr
;
162 gpio_get_data_reg(pfc
, offset
, &dr
, &bit
);
164 pos
= dr
->reg_width
- (bit
+ 1);
166 return (sh_pfc_read_raw_reg(dr
->mapped_reg
, dr
->reg_width
) >> pos
) & 1;
169 static void gpio_pin_set(struct gpio_chip
*gc
, unsigned offset
, int value
)
171 gpio_pin_set_value(gpio_to_pfc(gc
), offset
, value
);
174 static int gpio_pin_to_irq(struct gpio_chip
*gc
, unsigned offset
)
176 struct sh_pfc
*pfc
= gpio_to_pfc(gc
);
179 for (i
= 0; i
< pfc
->info
->gpio_irq_size
; i
++) {
180 unsigned short *gpios
= pfc
->info
->gpio_irq
[i
].gpios
;
182 for (k
= 0; gpios
[k
]; k
++) {
183 if (gpios
[k
] == offset
)
184 return pfc
->info
->gpio_irq
[i
].irq
;
191 static void gpio_pin_setup(struct sh_pfc_chip
*chip
)
193 struct sh_pfc
*pfc
= chip
->pfc
;
194 struct gpio_chip
*gc
= &chip
->gpio_chip
;
196 gc
->request
= gpio_pin_request
;
197 gc
->free
= gpio_pin_free
;
198 gc
->direction_input
= gpio_pin_direction_input
;
199 gc
->get
= gpio_pin_get
;
200 gc
->direction_output
= gpio_pin_direction_output
;
201 gc
->set
= gpio_pin_set
;
202 gc
->to_irq
= gpio_pin_to_irq
;
204 gc
->label
= pfc
->info
->name
;
206 gc
->owner
= THIS_MODULE
;
208 gc
->ngpio
= pfc
->nr_pins
;
211 /* -----------------------------------------------------------------------------
215 static int gpio_function_request(struct gpio_chip
*gc
, unsigned offset
)
217 struct sh_pfc
*pfc
= gpio_to_pfc(gc
);
218 unsigned int mark
= pfc
->info
->func_gpios
[offset
].enum_id
;
222 pr_notice_once("Use of GPIO API for function requests is deprecated, convert to pinctrl\n");
227 spin_lock_irqsave(&pfc
->lock
, flags
);
229 if (sh_pfc_config_mux(pfc
, mark
, PINMUX_TYPE_FUNCTION
, GPIO_CFG_DRYRUN
))
232 if (sh_pfc_config_mux(pfc
, mark
, PINMUX_TYPE_FUNCTION
, GPIO_CFG_REQ
))
238 spin_unlock_irqrestore(&pfc
->lock
, flags
);
242 static void gpio_function_free(struct gpio_chip
*gc
, unsigned offset
)
244 struct sh_pfc
*pfc
= gpio_to_pfc(gc
);
245 unsigned int mark
= pfc
->info
->func_gpios
[offset
].enum_id
;
248 spin_lock_irqsave(&pfc
->lock
, flags
);
250 sh_pfc_config_mux(pfc
, mark
, PINMUX_TYPE_FUNCTION
, GPIO_CFG_FREE
);
252 spin_unlock_irqrestore(&pfc
->lock
, flags
);
255 static void gpio_function_setup(struct sh_pfc_chip
*chip
)
257 struct sh_pfc
*pfc
= chip
->pfc
;
258 struct gpio_chip
*gc
= &chip
->gpio_chip
;
260 gc
->request
= gpio_function_request
;
261 gc
->free
= gpio_function_free
;
263 gc
->label
= pfc
->info
->name
;
264 gc
->owner
= THIS_MODULE
;
265 gc
->base
= pfc
->nr_pins
;
266 gc
->ngpio
= pfc
->info
->nr_func_gpios
;
269 /* -----------------------------------------------------------------------------
270 * Register/unregister
273 static struct sh_pfc_chip
*
274 sh_pfc_add_gpiochip(struct sh_pfc
*pfc
, void(*setup
)(struct sh_pfc_chip
*))
276 struct sh_pfc_chip
*chip
;
279 chip
= devm_kzalloc(pfc
->dev
, sizeof(*chip
), GFP_KERNEL
);
281 return ERR_PTR(-ENOMEM
);
287 ret
= gpiochip_add(&chip
->gpio_chip
);
288 if (unlikely(ret
< 0))
291 pr_info("%s handling gpio %u -> %u\n",
292 chip
->gpio_chip
.label
, chip
->gpio_chip
.base
,
293 chip
->gpio_chip
.base
+ chip
->gpio_chip
.ngpio
- 1);
298 int sh_pfc_register_gpiochip(struct sh_pfc
*pfc
)
300 const struct pinmux_range
*ranges
;
301 struct pinmux_range def_range
;
302 struct sh_pfc_chip
*chip
;
303 unsigned int nr_ranges
;
307 gpio_setup_data_regs(pfc
);
309 /* Register the real GPIOs chip. */
310 chip
= sh_pfc_add_gpiochip(pfc
, gpio_pin_setup
);
312 return PTR_ERR(chip
);
316 /* Register the GPIO to pin mappings. */
317 if (pfc
->info
->ranges
== NULL
) {
319 def_range
.end
= pfc
->info
->nr_pins
- 1;
323 ranges
= pfc
->info
->ranges
;
324 nr_ranges
= pfc
->info
->nr_ranges
;
327 for (i
= 0; i
< nr_ranges
; ++i
) {
328 const struct pinmux_range
*range
= &ranges
[i
];
330 ret
= gpiochip_add_pin_range(&chip
->gpio_chip
,
332 range
->begin
, range
->begin
,
333 range
->end
- range
->begin
+ 1);
338 /* Register the function GPIOs chip. */
339 chip
= sh_pfc_add_gpiochip(pfc
, gpio_function_setup
);
341 return PTR_ERR(chip
);
348 int sh_pfc_unregister_gpiochip(struct sh_pfc
*pfc
)
353 ret
= gpiochip_remove(&pfc
->gpio
->gpio_chip
);
354 err
= gpiochip_remove(&pfc
->func
->gpio_chip
);
356 return ret
< 0 ? ret
: err
;