drivers/pinctrl/sh-pfc/sh_pfc.h

   1 /*
   2  * SuperH Pin Function Controller Support
   3  *
   4  * Copyright (c) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef __SH_PFC_H
  12 #define __SH_PFC_H
  13
  14 #include <linux/bug.h>
  15 #include <linux/stringify.h>
  16
  17 enum {
  18         PINMUX_TYPE_NONE,
  19         PINMUX_TYPE_FUNCTION,
  20         PINMUX_TYPE_GPIO,
  21         PINMUX_TYPE_OUTPUT,
  22         PINMUX_TYPE_INPUT,
  23 };
  24
  25 #define SH_PFC_PIN_CFG_INPUT            (1 << 0)
  26 #define SH_PFC_PIN_CFG_OUTPUT           (1 << 1)
  27 #define SH_PFC_PIN_CFG_PULL_UP          (1 << 2)
  28 #define SH_PFC_PIN_CFG_PULL_DOWN        (1 << 3)
  29
  30 struct sh_pfc_pin {
  31         u16 enum_id;
  32         const char *name;
  33         unsigned int configs;
  34 };
  35
  36 #define SH_PFC_PIN_GROUP(n)                             \
  37         {                                               \
  38                 .name = #n,                             \
  39                 .pins = n##_pins,                       \
  40                 .mux = n##_mux,                         \
  41                 .nr_pins = ARRAY_SIZE(n##_pins),        \
  42         }
  43
  44 struct sh_pfc_pin_group {
  45         const char *name;
  46         const unsigned int *pins;
  47         const unsigned int *mux;
  48         unsigned int nr_pins;
  49 };
  50
  51 #define SH_PFC_FUNCTION(n)                              \
  52         {                                               \
  53                 .name = #n,                             \
  54                 .groups = n##_groups,                   \
  55                 .nr_groups = ARRAY_SIZE(n##_groups),    \
  56         }
  57
  58 struct sh_pfc_function {
  59         const char *name;
  60         const char * const *groups;
  61         unsigned int nr_groups;
  62 };
  63
  64 struct pinmux_func {
  65         u16 enum_id;
  66         const char *name;
  67 };
  68
  69 #define PINMUX_GPIO(gpio, data_or_mark)                 \
  70         [gpio] = {                                      \
  71                 .name = __stringify(gpio),              \
  72                 .enum_id = data_or_mark,                \
  73         }
  74 #define PINMUX_GPIO_FN(gpio, base, data_or_mark)        \
  75         [gpio - (base)] = {                             \
  76                 .name = __stringify(gpio),              \
  77                 .enum_id = data_or_mark,                \
  78         }
  79
  80 #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
  81
  82 struct pinmux_cfg_reg {
  83         unsigned long reg, reg_width, field_width;
  84         const u16 *enum_ids;
  85         const unsigned long *var_field_width;
  86 };
  87
  88 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  89         .reg = r, .reg_width = r_width, .field_width = f_width,         \
  90         .enum_ids = (u16 [(r_width / f_width) * (1 << f_width)])
  91
  92 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  93         .reg = r, .reg_width = r_width, \
  94         .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
  95         .enum_ids = (u16 [])
  96
  97 struct pinmux_data_reg {
  98         unsigned long reg, reg_width;
  99         const u16 *enum_ids;
 100 };
 101
 102 #define PINMUX_DATA_REG(name, r, r_width) \
 103         .reg = r, .reg_width = r_width, \
 104         .enum_ids = (u16 [r_width]) \
 105
 106 struct pinmux_irq {
 107         int irq;
 108         unsigned short *gpios;
 109 };
 110
 111 #define PINMUX_IRQ(irq_nr, ids...)                         \
 112         { .irq = irq_nr, .gpios = (unsigned short []) { ids, 0 } }      \
 113
 114 struct pinmux_range {
 115         u16 begin;
 116         u16 end;
 117         u16 force;
 118 };
 119
 120 struct sh_pfc;
 121
 122 struct sh_pfc_soc_operations {
 123         int (*init)(struct sh_pfc *pfc);
 124         void (*exit)(struct sh_pfc *pfc);
 125         unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin);
 126         void (*set_bias)(struct sh_pfc *pfc, unsigned int pin,
 127                          unsigned int bias);
 128 };
 129
 130 struct sh_pfc_soc_info {
 131         const char *name;
 132         const struct sh_pfc_soc_operations *ops;
 133
 134         struct pinmux_range input;
 135         struct pinmux_range output;
 136         struct pinmux_range function;
 137
 138         const struct sh_pfc_pin *pins;
 139         unsigned int nr_pins;
 140         const struct pinmux_range *ranges;
 141         unsigned int nr_ranges;
 142         const struct sh_pfc_pin_group *groups;
 143         unsigned int nr_groups;
 144         const struct sh_pfc_function *functions;
 145         unsigned int nr_functions;
 146
 147         const struct pinmux_func *func_gpios;
 148         unsigned int nr_func_gpios;
 149
 150         const struct pinmux_cfg_reg *cfg_regs;
 151         const struct pinmux_data_reg *data_regs;
 152
 153         const u16 *gpio_data;
 154         unsigned int gpio_data_size;
 155
 156         const struct pinmux_irq *gpio_irq;
 157         unsigned int gpio_irq_size;
 158
 159         unsigned long unlock_reg;
 160 };
 161
 162 /* helper macro for port */
 163 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
 164
 165 #define PORT_10(fn, pfx, sfx) \
 166         PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),       \
 167         PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),       \
 168         PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),       \
 169         PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),       \
 170         PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
 171
 172 #define PORT_10_REV(fn, pfx, sfx)       \
 173         PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx),       \
 174         PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx),       \
 175         PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx),       \
 176         PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx),       \
 177         PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
 178
 179 #define PORT_32(fn, pfx, sfx)                                   \
 180         PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),        \
 181         PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),     \
 182         PORT_1(fn, pfx##31, sfx)
 183
 184 #define PORT_32_REV(fn, pfx, sfx)                                       \
 185         PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx),             \
 186         PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx),     \
 187         PORT_10_REV(fn, pfx, sfx)
 188
 189 #define PORT_90(fn, pfx, sfx) \
 190         PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),     \
 191         PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),     \
 192         PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx),     \
 193         PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx),     \
 194         PORT_10(fn, pfx##9, sfx)
 195
 196 #define _PORT_ALL(pfx, sfx) pfx##_##sfx
 197 #define PORT_ALL(str)   CPU_ALL_PORT(_PORT_ALL, PORT, str)
 198 #define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
 199
 200 /* helper macro for pinmux data arrays */
 201 #define PORT_DATA_IO(nr)        \
 202         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 203                     PORT##nr##_IN)
 204
 205 /* helper macro for top 4 bits in PORTnCR */
 206 #define _PCRH(in, in_pd, in_pu, out)    \
 207         0, (out), (in), 0,              \
 208         0, 0, 0, 0,                     \
 209         0, 0, (in_pd), 0,               \
 210         0, 0, (in_pu), 0
 211
 212 #define PORTCR(nr, reg)                                                 \
 213         {                                                               \
 214                 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {             \
 215                         _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,          \
 216                               PORT##nr##_IN_PU, PORT##nr##_OUT),        \
 217                                 PORT##nr##_FN0, PORT##nr##_FN1,         \
 218                                 PORT##nr##_FN2, PORT##nr##_FN3,         \
 219                                 PORT##nr##_FN4, PORT##nr##_FN5,         \
 220                                 PORT##nr##_FN6, PORT##nr##_FN7 }        \
 221         }
 222
 223 #endif /* __SH_PFC_H */