drivers/pinctrl/sh-pfc/sh_pfc.h

   1 /*
   2  * SuperH Pin Function Controller Support
   3  *
   4  * Copyright (c) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef __SH_PFC_H
  12 #define __SH_PFC_H
  13
  14 #include <linux/stringify.h>
  15 #include <asm-generic/gpio.h>
  16
  17 typedef unsigned short pinmux_enum_t;
  18 typedef unsigned short pinmux_flag_t;
  19
  20 enum {
  21         PINMUX_TYPE_NONE,
  22
  23         PINMUX_TYPE_FUNCTION,
  24         PINMUX_TYPE_GPIO,
  25         PINMUX_TYPE_OUTPUT,
  26         PINMUX_TYPE_INPUT,
  27         PINMUX_TYPE_INPUT_PULLUP,
  28         PINMUX_TYPE_INPUT_PULLDOWN,
  29
  30         PINMUX_FLAG_TYPE,       /* must be last */
  31 };
  32
  33 #define PINMUX_FLAG_DBIT_SHIFT      5
  34 #define PINMUX_FLAG_DBIT            (0x1f << PINMUX_FLAG_DBIT_SHIFT)
  35 #define PINMUX_FLAG_DREG_SHIFT      10
  36 #define PINMUX_FLAG_DREG            (0x3f << PINMUX_FLAG_DREG_SHIFT)
  37
  38 struct pinmux_pin {
  39         const pinmux_enum_t enum_id;
  40         pinmux_flag_t flags;
  41         const char *name;
  42 };
  43
  44 struct pinmux_func {
  45         const pinmux_enum_t enum_id;
  46         const char *name;
  47 };
  48
  49 #define PINMUX_GPIO(gpio, data_or_mark)                 \
  50         [gpio] = {                                      \
  51                 .name = __stringify(gpio),              \
  52                 .enum_id = data_or_mark,                \
  53                 .flags = PINMUX_TYPE_GPIO               \
  54         }
  55 #define PINMUX_GPIO_FN(gpio, base, data_or_mark)        \
  56         [gpio - (base)] = {                             \
  57                 .name = __stringify(gpio),              \
  58                 .enum_id = data_or_mark,                \
  59         }
  60
  61 #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
  62
  63 struct pinmux_cfg_reg {
  64         unsigned long reg, reg_width, field_width;
  65         unsigned long *cnt;
  66         pinmux_enum_t *enum_ids;
  67         unsigned long *var_field_width;
  68 };
  69
  70 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  71         .reg = r, .reg_width = r_width, .field_width = f_width,         \
  72         .cnt = (unsigned long [r_width / f_width]) {}, \
  73         .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
  74
  75 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  76         .reg = r, .reg_width = r_width, \
  77         .cnt = (unsigned long [r_width]) {}, \
  78         .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
  79         .enum_ids = (pinmux_enum_t [])
  80
  81 struct pinmux_data_reg {
  82         unsigned long reg, reg_width, reg_shadow;
  83         pinmux_enum_t *enum_ids;
  84         void __iomem *mapped_reg;
  85 };
  86
  87 #define PINMUX_DATA_REG(name, r, r_width) \
  88         .reg = r, .reg_width = r_width, \
  89         .enum_ids = (pinmux_enum_t [r_width]) \
  90
  91 struct pinmux_irq {
  92         int irq;
  93         pinmux_enum_t *enum_ids;
  94 };
  95
  96 #define PINMUX_IRQ(irq_nr, ids...)                         \
  97         { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } }    \
  98
  99 struct pinmux_range {
 100         pinmux_enum_t begin;
 101         pinmux_enum_t end;
 102         pinmux_enum_t force;
 103 };
 104
 105 struct sh_pfc_soc_info {
 106         char *name;
 107         struct pinmux_range input;
 108         struct pinmux_range input_pd;
 109         struct pinmux_range input_pu;
 110         struct pinmux_range output;
 111         struct pinmux_range function;
 112
 113         struct pinmux_pin *pins;
 114         unsigned int nr_pins;
 115         struct pinmux_func *func_gpios;
 116         unsigned int nr_func_gpios;
 117
 118         struct pinmux_cfg_reg *cfg_regs;
 119         struct pinmux_data_reg *data_regs;
 120
 121         pinmux_enum_t *gpio_data;
 122         unsigned int gpio_data_size;
 123
 124         struct pinmux_irq *gpio_irq;
 125         unsigned int gpio_irq_size;
 126
 127         unsigned long unlock_reg;
 128 };
 129
 130 enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
 131
 132 /* helper macro for port */
 133 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
 134
 135 #define PORT_10(fn, pfx, sfx) \
 136         PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),       \
 137         PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),       \
 138         PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),       \
 139         PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),       \
 140         PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
 141
 142 #define PORT_90(fn, pfx, sfx) \
 143         PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),     \
 144         PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),     \
 145         PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx),     \
 146         PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx),     \
 147         PORT_10(fn, pfx##9, sfx)
 148
 149 #define _PORT_ALL(pfx, sfx) pfx##_##sfx
 150 #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
 151 #define PORT_ALL(str)   CPU_ALL_PORT(_PORT_ALL, PORT, str)
 152 #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
 153 #define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
 154
 155 /* helper macro for pinmux_enum_t */
 156 #define PORT_DATA_I(nr) \
 157         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
 158
 159 #define PORT_DATA_I_PD(nr)      \
 160         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
 161                     PORT##nr##_IN, PORT##nr##_IN_PD)
 162
 163 #define PORT_DATA_I_PU(nr)      \
 164         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
 165                     PORT##nr##_IN, PORT##nr##_IN_PU)
 166
 167 #define PORT_DATA_I_PU_PD(nr)   \
 168         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,                    \
 169                     PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
 170
 171 #define PORT_DATA_O(nr)         \
 172         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
 173
 174 #define PORT_DATA_IO(nr)        \
 175         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 176                     PORT##nr##_IN)
 177
 178 #define PORT_DATA_IO_PD(nr)     \
 179         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 180                     PORT##nr##_IN, PORT##nr##_IN_PD)
 181
 182 #define PORT_DATA_IO_PU(nr)     \
 183         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 184                     PORT##nr##_IN, PORT##nr##_IN_PU)
 185
 186 #define PORT_DATA_IO_PU_PD(nr)  \
 187         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 188                     PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
 189
 190 /* helper macro for top 4 bits in PORTnCR */
 191 #define _PCRH(in, in_pd, in_pu, out)    \
 192         0, (out), (in), 0,              \
 193         0, 0, 0, 0,                     \
 194         0, 0, (in_pd), 0,               \
 195         0, 0, (in_pu), 0
 196
 197 #define PORTCR(nr, reg)                                                 \
 198         {                                                               \
 199                 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {             \
 200                         _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,          \
 201                               PORT##nr##_IN_PU, PORT##nr##_OUT),        \
 202                                 PORT##nr##_FN0, PORT##nr##_FN1,         \
 203                                 PORT##nr##_FN2, PORT##nr##_FN3,         \
 204                                 PORT##nr##_FN4, PORT##nr##_FN5,         \
 205                                 PORT##nr##_FN6, PORT##nr##_FN7 }        \
 206         }
 207
 208 #endif /* __SH_PFC_H */