drivers/pinctrl/sh-pfc/sh_pfc.h

   1 /*
   2  * SuperH Pin Function Controller Support
   3  *
   4  * Copyright (c) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef __SH_PFC_H
  12 #define __SH_PFC_H
  13
  14 #include <linux/bug.h>
  15 #include <linux/pinctrl/pinconf-generic.h>
  16 #include <linux/stringify.h>
  17
  18 enum {
  19         PINMUX_TYPE_NONE,
  20         PINMUX_TYPE_FUNCTION,
  21         PINMUX_TYPE_GPIO,
  22         PINMUX_TYPE_OUTPUT,
  23         PINMUX_TYPE_INPUT,
  24 };
  25
  26 #define SH_PFC_PIN_CFG_INPUT            (1 << 0)
  27 #define SH_PFC_PIN_CFG_OUTPUT           (1 << 1)
  28 #define SH_PFC_PIN_CFG_PULL_UP          (1 << 2)
  29 #define SH_PFC_PIN_CFG_PULL_DOWN        (1 << 3)
  30 #define SH_PFC_PIN_CFG_IO_VOLTAGE       (1 << 4)
  31 #define SH_PFC_PIN_CFG_NO_GPIO          (1 << 31)
  32
  33 struct sh_pfc_pin {
  34         u16 pin;
  35         u16 enum_id;
  36         const char *name;
  37         unsigned int configs;
  38 };
  39
  40 #define SH_PFC_PIN_GROUP(n)                             \
  41         {                                               \
  42                 .name = #n,                             \
  43                 .pins = n##_pins,                       \
  44                 .mux = n##_mux,                         \
  45                 .nr_pins = ARRAY_SIZE(n##_pins),        \
  46         }
  47
  48 struct sh_pfc_pin_group {
  49         const char *name;
  50         const unsigned int *pins;
  51         const unsigned int *mux;
  52         unsigned int nr_pins;
  53 };
  54
  55 #define SH_PFC_FUNCTION(n)                              \
  56         {                                               \
  57                 .name = #n,                             \
  58                 .groups = n##_groups,                   \
  59                 .nr_groups = ARRAY_SIZE(n##_groups),    \
  60         }
  61
  62 struct sh_pfc_function {
  63         const char *name;
  64         const char * const *groups;
  65         unsigned int nr_groups;
  66 };
  67
  68 struct pinmux_func {
  69         u16 enum_id;
  70         const char *name;
  71 };
  72
  73 struct pinmux_cfg_reg {
  74         u32 reg;
  75         u8 reg_width, field_width;
  76         const u16 *enum_ids;
  77         const u8 *var_field_width;
  78 };
  79
  80 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  81         .reg = r, .reg_width = r_width, .field_width = f_width,         \
  82         .enum_ids = (const u16 [(r_width / f_width) * (1 << f_width)])
  83
  84 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  85         .reg = r, .reg_width = r_width, \
  86         .var_field_width = (const u8 [r_width]) \
  87                 { var_fw0, var_fwn, 0 }, \
  88         .enum_ids = (const u16 [])
  89
  90 struct pinmux_data_reg {
  91         u32 reg;
  92         u8 reg_width;
  93         const u16 *enum_ids;
  94 };
  95
  96 #define PINMUX_DATA_REG(name, r, r_width) \
  97         .reg = r, .reg_width = r_width, \
  98         .enum_ids = (const u16 [r_width]) \
  99
 100 struct pinmux_irq {
 101         int irq;
 102         const short *gpios;
 103 };
 104
 105 #ifdef CONFIG_ARCH_MULTIPLATFORM
 106 #define PINMUX_IRQ(irq_nr, ids...)                         \
 107         { .gpios = (const short []) { ids, -1 } }
 108 #else
 109 #define PINMUX_IRQ(irq_nr, ids...)                         \
 110         { .irq = irq_nr, .gpios = (const short []) { ids, -1 } }
 111 #endif
 112
 113 struct pinmux_range {
 114         u16 begin;
 115         u16 end;
 116         u16 force;
 117 };
 118
 119 struct sh_pfc;
 120
 121 struct sh_pfc_soc_operations {
 122         int (*init)(struct sh_pfc *pfc);
 123         unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin);
 124         void (*set_bias)(struct sh_pfc *pfc, unsigned int pin,
 125                          unsigned int bias);
 126         int (*get_io_voltage)(struct sh_pfc *pfc, unsigned int pin);
 127         int (*set_io_voltage)(struct sh_pfc *pfc, unsigned int pin,
 128                               u16 voltage_mV);
 129 };
 130
 131 struct sh_pfc_soc_info {
 132         const char *name;
 133         const struct sh_pfc_soc_operations *ops;
 134
 135         struct pinmux_range input;
 136         struct pinmux_range output;
 137         struct pinmux_range function;
 138
 139         const struct sh_pfc_pin *pins;
 140         unsigned int nr_pins;
 141         const struct sh_pfc_pin_group *groups;
 142         unsigned int nr_groups;
 143         const struct sh_pfc_function *functions;
 144         unsigned int nr_functions;
 145
 146 #ifdef CONFIG_SUPERH
 147         const struct pinmux_func *func_gpios;
 148         unsigned int nr_func_gpios;
 149 #endif
 150
 151         const struct pinmux_cfg_reg *cfg_regs;
 152         const struct pinmux_data_reg *data_regs;
 153
 154         const u16 *gpio_data;
 155         unsigned int gpio_data_size;
 156
 157         const struct pinmux_irq *gpio_irq;
 158         unsigned int gpio_irq_size;
 159
 160         u32 unlock_reg;
 161 };
 162
 163 /* -----------------------------------------------------------------------------
 164  * Helper macros to create pin and port lists
 165  */
 166
 167 /*
 168  * sh_pfc_soc_info gpio_data array macros
 169  */
 170
 171 #define PINMUX_DATA(data_or_mark, ids...)       data_or_mark, ids, 0
 172
 173 #define PINMUX_IPSR_NOGP(ispr, fn)                                      \
 174         PINMUX_DATA(fn##_MARK, FN_##fn)
 175 #define PINMUX_IPSR_DATA(ipsr, fn)                                      \
 176         PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr)
 177 #define PINMUX_IPSR_NOGM(ispr, fn, ms)                                  \
 178         PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ms)
 179 #define PINMUX_IPSR_NOFN(ipsr, fn, ms)                                  \
 180         PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##ms)
 181 #define PINMUX_IPSR_MSEL(ipsr, fn, ms)                                  \
 182         PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr, FN_##ms)
 183 #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms)                           \
 184         PINMUX_DATA(fn##_MARK, FN_##ms, FN_##ipsr, FN_##fn)
 185
 186 /*
 187  * GP port style (32 ports banks)
 188  */
 189
 190 #define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
 191
 192 #define PORT_GP_32(bank, fn, sfx)                                       \
 193         PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),     \
 194         PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),     \
 195         PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),     \
 196         PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),     \
 197         PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),     \
 198         PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),     \
 199         PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),     \
 200         PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),     \
 201         PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),     \
 202         PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),     \
 203         PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),     \
 204         PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),     \
 205         PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),     \
 206         PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx),     \
 207         PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx),     \
 208         PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
 209
 210 #define PORT_GP_32_REV(bank, fn, sfx)                                   \
 211         PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx),     \
 212         PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx),     \
 213         PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx),     \
 214         PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx),     \
 215         PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx),     \
 216         PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx),     \
 217         PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx),     \
 218         PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx),     \
 219         PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx),     \
 220         PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx),     \
 221         PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx),     \
 222         PORT_GP_1(bank, 9,  fn, sfx), PORT_GP_1(bank, 8,  fn, sfx),     \
 223         PORT_GP_1(bank, 7,  fn, sfx), PORT_GP_1(bank, 6,  fn, sfx),     \
 224         PORT_GP_1(bank, 5,  fn, sfx), PORT_GP_1(bank, 4,  fn, sfx),     \
 225         PORT_GP_1(bank, 3,  fn, sfx), PORT_GP_1(bank, 2,  fn, sfx),     \
 226         PORT_GP_1(bank, 1,  fn, sfx), PORT_GP_1(bank, 0,  fn, sfx)
 227
 228 /* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */
 229 #define _GP_ALL(bank, pin, name, sfx)   name##_##sfx
 230 #define GP_ALL(str)                     CPU_ALL_PORT(_GP_ALL, str)
 231
 232 /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
 233 #define _GP_GPIO(bank, _pin, _name, sfx)                                \
 234         {                                                               \
 235                 .pin = (bank * 32) + _pin,                              \
 236                 .name = __stringify(_name),                             \
 237                 .enum_id = _name##_DATA,                                \
 238         }
 239 #define PINMUX_GPIO_GP_ALL()            CPU_ALL_PORT(_GP_GPIO, unused)
 240
 241 /* PINMUX_DATA_GP_ALL -  Expand to a list of name_DATA, name_FN marks */
 242 #define _GP_DATA(bank, pin, name, sfx)  PINMUX_DATA(name##_DATA, name##_FN)
 243 #define PINMUX_DATA_GP_ALL()            CPU_ALL_PORT(_GP_DATA, unused)
 244
 245 /*
 246  * PORT style (linear pin space)
 247  */
 248
 249 #define PORT_1(pn, fn, pfx, sfx) fn(pn, pfx, sfx)
 250
 251 #define PORT_10(pn, fn, pfx, sfx)                                         \
 252         PORT_1(pn,   fn, pfx##0, sfx), PORT_1(pn+1, fn, pfx##1, sfx),     \
 253         PORT_1(pn+2, fn, pfx##2, sfx), PORT_1(pn+3, fn, pfx##3, sfx),     \
 254         PORT_1(pn+4, fn, pfx##4, sfx), PORT_1(pn+5, fn, pfx##5, sfx),     \
 255         PORT_1(pn+6, fn, pfx##6, sfx), PORT_1(pn+7, fn, pfx##7, sfx),     \
 256         PORT_1(pn+8, fn, pfx##8, sfx), PORT_1(pn+9, fn, pfx##9, sfx)
 257
 258 #define PORT_90(pn, fn, pfx, sfx)                                         \
 259         PORT_10(pn+10, fn, pfx##1, sfx), PORT_10(pn+20, fn, pfx##2, sfx), \
 260         PORT_10(pn+30, fn, pfx##3, sfx), PORT_10(pn+40, fn, pfx##4, sfx), \
 261         PORT_10(pn+50, fn, pfx##5, sfx), PORT_10(pn+60, fn, pfx##6, sfx), \
 262         PORT_10(pn+70, fn, pfx##7, sfx), PORT_10(pn+80, fn, pfx##8, sfx), \
 263         PORT_10(pn+90, fn, pfx##9, sfx)
 264
 265 /* PORT_ALL(suffix) - Expand to a list of PORT_#_suffix */
 266 #define _PORT_ALL(pn, pfx, sfx)         pfx##_##sfx
 267 #define PORT_ALL(str)                   CPU_ALL_PORT(_PORT_ALL, PORT, str)
 268
 269 /* PINMUX_GPIO - Expand to a sh_pfc_pin entry */
 270 #define PINMUX_GPIO(_pin)                                               \
 271         [GPIO_##_pin] = {                                               \
 272                 .pin = (u16)-1,                                         \
 273                 .name = __stringify(GPIO_##_pin),                       \
 274                 .enum_id = _pin##_DATA,                                 \
 275         }
 276
 277 /* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */
 278 #define SH_PFC_PIN_CFG(_pin, cfgs)                                      \
 279         {                                                               \
 280                 .pin = _pin,                                            \
 281                 .name = __stringify(PORT##_pin),                        \
 282                 .enum_id = PORT##_pin##_DATA,                           \
 283                 .configs = cfgs,                                        \
 284         }
 285
 286 /* SH_PFC_PIN_NAMED - Expand to a sh_pfc_pin entry with the given name */
 287 #define SH_PFC_PIN_NAMED(row, col, _name)                               \
 288         {                                                               \
 289                 .pin = PIN_NUMBER(row, col),                            \
 290                 .name = __stringify(PIN_##_name),                       \
 291                 .configs = SH_PFC_PIN_CFG_NO_GPIO,                      \
 292         }
 293
 294 /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
 295  *                   PORT_name_OUT, PORT_name_IN marks
 296  */
 297 #define _PORT_DATA(pn, pfx, sfx)                                        \
 298         PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN0,                  \
 299                     PORT##pfx##_OUT, PORT##pfx##_IN)
 300 #define PINMUX_DATA_ALL()               CPU_ALL_PORT(_PORT_DATA, , unused)
 301
 302 /* GPIO_FN(name) - Expand to a sh_pfc_pin entry for a function GPIO */
 303 #define PINMUX_GPIO_FN(gpio, base, data_or_mark)                        \
 304         [gpio - (base)] = {                                             \
 305                 .name = __stringify(gpio),                              \
 306                 .enum_id = data_or_mark,                                \
 307         }
 308 #define GPIO_FN(str)                                                    \
 309         PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
 310
 311 /*
 312  * PORTnCR macro
 313  */
 314 #define PORTCR(nr, reg)                                                 \
 315         {                                                               \
 316                 PINMUX_CFG_REG_VAR("PORT" nr "CR", reg, 8, 2, 2, 1, 3) {\
 317                         /* PULMD[1:0], handled by .set_bias() */        \
 318                         0, 0, 0, 0,                                     \
 319                         /* IE and OE */                                 \
 320                         0, PORT##nr##_OUT, PORT##nr##_IN, 0,            \
 321                         /* SEC, not supported */                        \
 322                         0, 0,                                           \
 323                         /* PTMD[2:0] */                                 \
 324                         PORT##nr##_FN0, PORT##nr##_FN1,                 \
 325                         PORT##nr##_FN2, PORT##nr##_FN3,                 \
 326                         PORT##nr##_FN4, PORT##nr##_FN5,                 \
 327                         PORT##nr##_FN6, PORT##nr##_FN7                  \
 328                 }                                                       \
 329         }
 330
 331 #endif /* __SH_PFC_H */