drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c

   1 /*
   2  * Allwinner A20 SoCs pinctrl driver.
   3  *
   4  * Copyright (C) 2014 Maxime Ripard
   5  *
   6  * Maxime Ripard <maxime.ripard@free-electrons.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/of.h>
  16 #include <linux/of_device.h>
  17 #include <linux/pinctrl/pinctrl.h>
  18
  19 #include "pinctrl-sunxi.h"
  20
  21 static const struct sunxi_desc_pin sun7i_a20_pins[] = {
  22         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
  23                   SUNXI_FUNCTION(0x0, "gpio_in"),
  24                   SUNXI_FUNCTION(0x1, "gpio_out"),
  25                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXD3 */
  26                   SUNXI_FUNCTION(0x3, "spi1"),          /* CS0 */
  27                   SUNXI_FUNCTION(0x4, "uart2"),         /* RTS */
  28                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXD3 */
  29         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
  30                   SUNXI_FUNCTION(0x0, "gpio_in"),
  31                   SUNXI_FUNCTION(0x1, "gpio_out"),
  32                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXD2 */
  33                   SUNXI_FUNCTION(0x3, "spi1"),          /* CLK */
  34                   SUNXI_FUNCTION(0x4, "uart2"),         /* CTS */
  35                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXD2 */
  36         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
  37                   SUNXI_FUNCTION(0x0, "gpio_in"),
  38                   SUNXI_FUNCTION(0x1, "gpio_out"),
  39                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXD1 */
  40                   SUNXI_FUNCTION(0x3, "spi1"),          /* MOSI */
  41                   SUNXI_FUNCTION(0x4, "uart2"),         /* TX */
  42                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXD1 */
  43         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
  44                   SUNXI_FUNCTION(0x0, "gpio_in"),
  45                   SUNXI_FUNCTION(0x1, "gpio_out"),
  46                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXD0 */
  47                   SUNXI_FUNCTION(0x3, "spi1"),          /* MISO */
  48                   SUNXI_FUNCTION(0x4, "uart2"),         /* RX */
  49                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXD0 */
  50         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
  51                   SUNXI_FUNCTION(0x0, "gpio_in"),
  52                   SUNXI_FUNCTION(0x1, "gpio_out"),
  53                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXD3 */
  54                   SUNXI_FUNCTION(0x3, "spi1"),          /* CS1 */
  55                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXD3 */
  56         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
  57                   SUNXI_FUNCTION(0x0, "gpio_in"),
  58                   SUNXI_FUNCTION(0x1, "gpio_out"),
  59                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXD2 */
  60                   SUNXI_FUNCTION(0x3, "spi3"),          /* CS0 */
  61                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXD2 */
  62         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
  63                   SUNXI_FUNCTION(0x0, "gpio_in"),
  64                   SUNXI_FUNCTION(0x1, "gpio_out"),
  65                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXD1 */
  66                   SUNXI_FUNCTION(0x3, "spi3"),          /* CLK */
  67                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXD1 */
  68         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
  69                   SUNXI_FUNCTION(0x0, "gpio_in"),
  70                   SUNXI_FUNCTION(0x1, "gpio_out"),
  71                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXD0 */
  72                   SUNXI_FUNCTION(0x3, "spi3"),          /* MOSI */
  73                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXD0 */
  74         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
  75                   SUNXI_FUNCTION(0x0, "gpio_in"),
  76                   SUNXI_FUNCTION(0x1, "gpio_out"),
  77                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXCK */
  78                   SUNXI_FUNCTION(0x3, "spi3"),          /* MISO */
  79                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXCK */
  80         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
  81                   SUNXI_FUNCTION(0x0, "gpio_in"),
  82                   SUNXI_FUNCTION(0x1, "gpio_out"),
  83                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXERR */
  84                   SUNXI_FUNCTION(0x3, "spi3"),          /* CS1 */
  85                   SUNXI_FUNCTION(0x5, "gmac"),          /* GNULL / ERXERR */
  86                   SUNXI_FUNCTION(0x6, "i2s1")),         /* MCLK */
  87         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
  88                   SUNXI_FUNCTION(0x0, "gpio_in"),
  89                   SUNXI_FUNCTION(0x1, "gpio_out"),
  90                   SUNXI_FUNCTION(0x2, "emac"),          /* ERXDV */
  91                   SUNXI_FUNCTION(0x4, "uart1"),         /* TX */
  92                   SUNXI_FUNCTION(0x5, "gmac")),         /* GRXCTL / ERXDV */
  93         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
  94                   SUNXI_FUNCTION(0x0, "gpio_in"),
  95                   SUNXI_FUNCTION(0x1, "gpio_out"),
  96                   SUNXI_FUNCTION(0x2, "emac"),          /* EMDC */
  97                   SUNXI_FUNCTION(0x4, "uart1"),         /* RX */
  98                   SUNXI_FUNCTION(0x5, "gmac")),         /* EMDC */
  99         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
 100                   SUNXI_FUNCTION(0x0, "gpio_in"),
 101                   SUNXI_FUNCTION(0x1, "gpio_out"),
 102                   SUNXI_FUNCTION(0x2, "emac"),          /* EMDIO */
 103                   SUNXI_FUNCTION(0x3, "uart6"),         /* TX */
 104                   SUNXI_FUNCTION(0x4, "uart1"),         /* RTS */
 105                   SUNXI_FUNCTION(0x5, "gmac")),         /* EMDIO */
 106         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
 107                   SUNXI_FUNCTION(0x0, "gpio_in"),
 108                   SUNXI_FUNCTION(0x1, "gpio_out"),
 109                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXEN */
 110                   SUNXI_FUNCTION(0x3, "uart6"),         /* RX */
 111                   SUNXI_FUNCTION(0x4, "uart1"),         /* CTS */
 112                   SUNXI_FUNCTION(0x5, "gmac")),         /* GTXCTL / ETXEN */
 113         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
 114                   SUNXI_FUNCTION(0x0, "gpio_in"),
 115                   SUNXI_FUNCTION(0x1, "gpio_out"),
 116                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXCK */
 117                   SUNXI_FUNCTION(0x3, "uart7"),         /* TX */
 118                   SUNXI_FUNCTION(0x4, "uart1"),         /* DTR */
 119                   SUNXI_FUNCTION(0x5, "gmac"),          /* GNULL / ETXCK */
 120                   SUNXI_FUNCTION(0x6, "i2s1")),         /* BCLK */
 121         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
 122                   SUNXI_FUNCTION(0x0, "gpio_in"),
 123                   SUNXI_FUNCTION(0x1, "gpio_out"),
 124                   SUNXI_FUNCTION(0x2, "emac"),          /* ECRS */
 125                   SUNXI_FUNCTION(0x3, "uart7"),         /* RX */
 126                   SUNXI_FUNCTION(0x4, "uart1"),         /* DSR */
 127                   SUNXI_FUNCTION(0x5, "gmac"),          /* GTXCK / ECRS */
 128                   SUNXI_FUNCTION(0x6, "i2s1")),         /* LRCK */
 129         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
 130                   SUNXI_FUNCTION(0x0, "gpio_in"),
 131                   SUNXI_FUNCTION(0x1, "gpio_out"),
 132                   SUNXI_FUNCTION(0x2, "emac"),          /* ECOL */
 133                   SUNXI_FUNCTION(0x3, "can"),           /* TX */
 134                   SUNXI_FUNCTION(0x4, "uart1"),         /* DCD */
 135                   SUNXI_FUNCTION(0x5, "gmac"),          /* GCLKIN / ECOL */
 136                   SUNXI_FUNCTION(0x6, "i2s1")),         /* DO */
 137         SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
 138                   SUNXI_FUNCTION(0x0, "gpio_in"),
 139                   SUNXI_FUNCTION(0x1, "gpio_out"),
 140                   SUNXI_FUNCTION(0x2, "emac"),          /* ETXERR */
 141                   SUNXI_FUNCTION(0x3, "can"),           /* RX */
 142                   SUNXI_FUNCTION(0x4, "uart1"),         /* RING */
 143                   SUNXI_FUNCTION(0x5, "gmac"),          /* GNULL / ETXERR */
 144                   SUNXI_FUNCTION(0x6, "i2s1")),         /* LRCK */
 145         /* Hole */
 146         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
 147                   SUNXI_FUNCTION(0x0, "gpio_in"),
 148                   SUNXI_FUNCTION(0x1, "gpio_out"),
 149                   SUNXI_FUNCTION(0x2, "i2c0")),         /* SCK */
 150         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
 151                   SUNXI_FUNCTION(0x0, "gpio_in"),
 152                   SUNXI_FUNCTION(0x1, "gpio_out"),
 153                   SUNXI_FUNCTION(0x2, "i2c0")),         /* SDA */
 154         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
 155                   SUNXI_FUNCTION(0x0, "gpio_in"),
 156                   SUNXI_FUNCTION(0x1, "gpio_out"),
 157                   SUNXI_FUNCTION(0x2, "pwm")),          /* PWM0 */
 158         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
 159                   SUNXI_FUNCTION(0x0, "gpio_in"),
 160                   SUNXI_FUNCTION(0x1, "gpio_out"),
 161                   SUNXI_FUNCTION(0x2, "ir0"),           /* TX */
 162                   SUNXI_FUNCTION(0x4, "spdif")),        /* MCLK */
 163         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
 164                   SUNXI_FUNCTION(0x0, "gpio_in"),
 165                   SUNXI_FUNCTION(0x1, "gpio_out"),
 166                   SUNXI_FUNCTION(0x2, "ir0")),          /* RX */
 167         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
 168                   SUNXI_FUNCTION(0x0, "gpio_in"),
 169                   SUNXI_FUNCTION(0x1, "gpio_out"),
 170                   SUNXI_FUNCTION(0x2, "i2s0"),          /* MCLK */
 171                   SUNXI_FUNCTION(0x3, "ac97")),         /* MCLK */
 172         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
 173                   SUNXI_FUNCTION(0x0, "gpio_in"),
 174                   SUNXI_FUNCTION(0x1, "gpio_out"),
 175                   SUNXI_FUNCTION(0x2, "i2s0"),          /* BCLK */
 176                   SUNXI_FUNCTION(0x3, "ac97")),         /* BCLK */
 177         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
 178                   SUNXI_FUNCTION(0x0, "gpio_in"),
 179                   SUNXI_FUNCTION(0x1, "gpio_out"),
 180                   SUNXI_FUNCTION(0x2, "i2s0"),          /* LRCK */
 181                   SUNXI_FUNCTION(0x3, "ac97")),         /* SYNC */
 182         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
 183                   SUNXI_FUNCTION(0x0, "gpio_in"),
 184                   SUNXI_FUNCTION(0x1, "gpio_out"),
 185                   SUNXI_FUNCTION(0x2, "i2s0"),          /* DO0 */
 186                   SUNXI_FUNCTION(0x3, "ac97")),         /* DO */
 187         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
 188                   SUNXI_FUNCTION(0x0, "gpio_in"),
 189                   SUNXI_FUNCTION(0x1, "gpio_out"),
 190                   SUNXI_FUNCTION(0x2, "i2s0")),         /* DO1 */
 191         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
 192                   SUNXI_FUNCTION(0x0, "gpio_in"),
 193                   SUNXI_FUNCTION(0x1, "gpio_out"),
 194                   SUNXI_FUNCTION(0x2, "i2s0")),         /* DO2 */
 195         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
 196                   SUNXI_FUNCTION(0x0, "gpio_in"),
 197                   SUNXI_FUNCTION(0x1, "gpio_out"),
 198                   SUNXI_FUNCTION(0x2, "i2s0")),         /* DO3 */
 199         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
 200                   SUNXI_FUNCTION(0x0, "gpio_in"),
 201                   SUNXI_FUNCTION(0x1, "gpio_out"),
 202                   SUNXI_FUNCTION(0x2, "i2s0"),          /* DI */
 203                   SUNXI_FUNCTION(0x3, "ac97"),          /* DI */
 204                   SUNXI_FUNCTION(0x4, "spdif")),        /* DI */
 205         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
 206                   SUNXI_FUNCTION(0x0, "gpio_in"),
 207                   SUNXI_FUNCTION(0x1, "gpio_out"),
 208                   SUNXI_FUNCTION(0x2, "spi2"),          /* CS1 */
 209                   SUNXI_FUNCTION(0x4, "spdif")),        /* DO */
 210         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
 211                   SUNXI_FUNCTION(0x0, "gpio_in"),
 212                   SUNXI_FUNCTION(0x1, "gpio_out"),
 213                   SUNXI_FUNCTION(0x2, "spi2"),          /* CS0 */
 214                   SUNXI_FUNCTION(0x3, "jtag")),         /* MS0 */
 215         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
 216                   SUNXI_FUNCTION(0x0, "gpio_in"),
 217                   SUNXI_FUNCTION(0x1, "gpio_out"),
 218                   SUNXI_FUNCTION(0x2, "spi2"),          /* CLK */
 219                   SUNXI_FUNCTION(0x3, "jtag")),         /* CK0 */
 220         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
 221                   SUNXI_FUNCTION(0x0, "gpio_in"),
 222                   SUNXI_FUNCTION(0x1, "gpio_out"),
 223                   SUNXI_FUNCTION(0x2, "spi2"),          /* MOSI */
 224                   SUNXI_FUNCTION(0x3, "jtag")),         /* DO0 */
 225         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
 226                   SUNXI_FUNCTION(0x0, "gpio_in"),
 227                   SUNXI_FUNCTION(0x1, "gpio_out"),
 228                   SUNXI_FUNCTION(0x2, "spi2"),          /* MISO */
 229                   SUNXI_FUNCTION(0x3, "jtag")),         /* DI0 */
 230         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
 231                   SUNXI_FUNCTION(0x0, "gpio_in"),
 232                   SUNXI_FUNCTION(0x1, "gpio_out"),
 233                   SUNXI_FUNCTION(0x2, "i2c1")),         /* SCK */
 234         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
 235                   SUNXI_FUNCTION(0x0, "gpio_in"),
 236                   SUNXI_FUNCTION(0x1, "gpio_out"),
 237                   SUNXI_FUNCTION(0x2, "i2c1")),         /* SDA */
 238         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
 239                   SUNXI_FUNCTION(0x0, "gpio_in"),
 240                   SUNXI_FUNCTION(0x1, "gpio_out"),
 241                   SUNXI_FUNCTION(0x2, "i2c2")),         /* SCK */
 242         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
 243                   SUNXI_FUNCTION(0x0, "gpio_in"),
 244                   SUNXI_FUNCTION(0x1, "gpio_out"),
 245                   SUNXI_FUNCTION(0x2, "i2c2")),         /* SDA */
 246         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
 247                   SUNXI_FUNCTION(0x0, "gpio_in"),
 248                   SUNXI_FUNCTION(0x1, "gpio_out"),
 249                   SUNXI_FUNCTION(0x2, "uart0"),         /* TX */
 250                   SUNXI_FUNCTION(0x3, "ir1")),          /* TX */
 251         SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
 252                   SUNXI_FUNCTION(0x0, "gpio_in"),
 253                   SUNXI_FUNCTION(0x1, "gpio_out"),
 254                   SUNXI_FUNCTION(0x2, "uart0"),         /* RX */
 255                   SUNXI_FUNCTION(0x3, "ir1")),          /* RX */
 256         /* Hole */
 257         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
 258                   SUNXI_FUNCTION(0x0, "gpio_in"),
 259                   SUNXI_FUNCTION(0x1, "gpio_out"),
 260                   SUNXI_FUNCTION(0x2, "nand0"),         /* NWE */
 261                   SUNXI_FUNCTION(0x3, "spi0")),         /* MOSI */
 262         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
 263                   SUNXI_FUNCTION(0x0, "gpio_in"),
 264                   SUNXI_FUNCTION(0x1, "gpio_out"),
 265                   SUNXI_FUNCTION(0x2, "nand0"),         /* NALE */
 266                   SUNXI_FUNCTION(0x3, "spi0")),         /* MISO */
 267         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
 268                   SUNXI_FUNCTION(0x0, "gpio_in"),
 269                   SUNXI_FUNCTION(0x1, "gpio_out"),
 270                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCLE */
 271                   SUNXI_FUNCTION(0x3, "spi0")),         /* SCK */
 272         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
 273                   SUNXI_FUNCTION(0x0, "gpio_in"),
 274                   SUNXI_FUNCTION(0x1, "gpio_out"),
 275                   SUNXI_FUNCTION(0x2, "nand0")),        /* NCE1 */
 276         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
 277                   SUNXI_FUNCTION(0x0, "gpio_in"),
 278                   SUNXI_FUNCTION(0x1, "gpio_out"),
 279                   SUNXI_FUNCTION(0x2, "nand0")),        /* NCE0 */
 280         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
 281                   SUNXI_FUNCTION(0x0, "gpio_in"),
 282                   SUNXI_FUNCTION(0x1, "gpio_out"),
 283                   SUNXI_FUNCTION(0x2, "nand0")),        /* NRE# */
 284         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
 285                   SUNXI_FUNCTION(0x0, "gpio_in"),
 286                   SUNXI_FUNCTION(0x1, "gpio_out"),
 287                   SUNXI_FUNCTION(0x2, "nand0"),         /* NRB0 */
 288                   SUNXI_FUNCTION(0x3, "mmc2")),         /* CMD */
 289         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
 290                   SUNXI_FUNCTION(0x0, "gpio_in"),
 291                   SUNXI_FUNCTION(0x1, "gpio_out"),
 292                   SUNXI_FUNCTION(0x2, "nand0"),         /* NRB1 */
 293                   SUNXI_FUNCTION(0x3, "mmc2")),         /* CLK */
 294         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
 295                   SUNXI_FUNCTION(0x0, "gpio_in"),
 296                   SUNXI_FUNCTION(0x1, "gpio_out"),
 297                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ0 */
 298                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D0 */
 299         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
 300                   SUNXI_FUNCTION(0x0, "gpio_in"),
 301                   SUNXI_FUNCTION(0x1, "gpio_out"),
 302                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ1 */
 303                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D1 */
 304         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
 305                   SUNXI_FUNCTION(0x0, "gpio_in"),
 306                   SUNXI_FUNCTION(0x1, "gpio_out"),
 307                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ2 */
 308                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D2 */
 309         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
 310                   SUNXI_FUNCTION(0x0, "gpio_in"),
 311                   SUNXI_FUNCTION(0x1, "gpio_out"),
 312                   SUNXI_FUNCTION(0x2, "nand0"),         /* NDQ3 */
 313                   SUNXI_FUNCTION(0x3, "mmc2")),         /* D3 */
 314         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
 315                   SUNXI_FUNCTION(0x0, "gpio_in"),
 316                   SUNXI_FUNCTION(0x1, "gpio_out"),
 317                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQ4 */
 318         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
 319                   SUNXI_FUNCTION(0x0, "gpio_in"),
 320                   SUNXI_FUNCTION(0x1, "gpio_out"),
 321                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQ5 */
 322         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
 323                   SUNXI_FUNCTION(0x0, "gpio_in"),
 324                   SUNXI_FUNCTION(0x1, "gpio_out"),
 325                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQ6 */
 326         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
 327                   SUNXI_FUNCTION(0x0, "gpio_in"),
 328                   SUNXI_FUNCTION(0x1, "gpio_out"),
 329                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQ7 */
 330         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
 331                   SUNXI_FUNCTION(0x0, "gpio_in"),
 332                   SUNXI_FUNCTION(0x1, "gpio_out"),
 333                   SUNXI_FUNCTION(0x2, "nand0")),        /* NWP */
 334         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
 335                   SUNXI_FUNCTION(0x0, "gpio_in"),
 336                   SUNXI_FUNCTION(0x1, "gpio_out"),
 337                   SUNXI_FUNCTION(0x2, "nand0")),        /* NCE2 */
 338         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
 339                   SUNXI_FUNCTION(0x0, "gpio_in"),
 340                   SUNXI_FUNCTION(0x1, "gpio_out"),
 341                   SUNXI_FUNCTION(0x2, "nand0")),        /* NCE3 */
 342         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
 343                   SUNXI_FUNCTION(0x0, "gpio_in"),
 344                   SUNXI_FUNCTION(0x1, "gpio_out"),
 345                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCE4 */
 346                   SUNXI_FUNCTION(0x3, "spi2")),         /* CS0 */
 347         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
 348                   SUNXI_FUNCTION(0x0, "gpio_in"),
 349                   SUNXI_FUNCTION(0x1, "gpio_out"),
 350                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCE5 */
 351                   SUNXI_FUNCTION(0x3, "spi2")),         /* CLK */
 352         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
 353                   SUNXI_FUNCTION(0x0, "gpio_in"),
 354                   SUNXI_FUNCTION(0x1, "gpio_out"),
 355                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCE6 */
 356                   SUNXI_FUNCTION(0x3, "spi2")),         /* MOSI */
 357         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
 358                   SUNXI_FUNCTION(0x0, "gpio_in"),
 359                   SUNXI_FUNCTION(0x1, "gpio_out"),
 360                   SUNXI_FUNCTION(0x2, "nand0"),         /* NCE7 */
 361                   SUNXI_FUNCTION(0x3, "spi2")),         /* MISO */
 362         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
 363                   SUNXI_FUNCTION(0x0, "gpio_in"),
 364                   SUNXI_FUNCTION(0x1, "gpio_out"),
 365                   SUNXI_FUNCTION(0x3, "spi0")),         /* CS0 */
 366         SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
 367                   SUNXI_FUNCTION(0x0, "gpio_in"),
 368                   SUNXI_FUNCTION(0x1, "gpio_out"),
 369                   SUNXI_FUNCTION(0x2, "nand0")),        /* NDQS */
 370         /* Hole */
 371         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
 372                   SUNXI_FUNCTION(0x0, "gpio_in"),
 373                   SUNXI_FUNCTION(0x1, "gpio_out"),
 374                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D0 */
 375                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP0 */
 376         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
 377                   SUNXI_FUNCTION(0x0, "gpio_in"),
 378                   SUNXI_FUNCTION(0x1, "gpio_out"),
 379                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D1 */
 380                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN0 */
 381         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
 382                   SUNXI_FUNCTION(0x0, "gpio_in"),
 383                   SUNXI_FUNCTION(0x1, "gpio_out"),
 384                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D2 */
 385                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP1 */
 386         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
 387                   SUNXI_FUNCTION(0x0, "gpio_in"),
 388                   SUNXI_FUNCTION(0x1, "gpio_out"),
 389                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D3 */
 390                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN1 */
 391         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
 392                   SUNXI_FUNCTION(0x0, "gpio_in"),
 393                   SUNXI_FUNCTION(0x1, "gpio_out"),
 394                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D4 */
 395                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP2 */
 396         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
 397                   SUNXI_FUNCTION(0x0, "gpio_in"),
 398                   SUNXI_FUNCTION(0x1, "gpio_out"),
 399                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D5 */
 400                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VN2 */
 401         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
 402                   SUNXI_FUNCTION(0x0, "gpio_in"),
 403                   SUNXI_FUNCTION(0x1, "gpio_out"),
 404                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D6 */
 405                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VPC */
 406         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
 407                   SUNXI_FUNCTION(0x0, "gpio_in"),
 408                   SUNXI_FUNCTION(0x1, "gpio_out"),
 409                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D7 */
 410                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VNC */
 411         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
 412                   SUNXI_FUNCTION(0x0, "gpio_in"),
 413                   SUNXI_FUNCTION(0x1, "gpio_out"),
 414                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D8 */
 415                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VP3 */
 416         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
 417                   SUNXI_FUNCTION(0x0, "gpio_in"),
 418                   SUNXI_FUNCTION(0x1, "gpio_out"),
 419                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D9 */
 420                   SUNXI_FUNCTION(0x3, "lvds0")),        /* VM3 */
 421         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
 422                   SUNXI_FUNCTION(0x0, "gpio_in"),
 423                   SUNXI_FUNCTION(0x1, "gpio_out"),
 424                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D10 */
 425                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP0 */
 426         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
 427                   SUNXI_FUNCTION(0x0, "gpio_in"),
 428                   SUNXI_FUNCTION(0x1, "gpio_out"),
 429                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D11 */
 430                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN0 */
 431         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
 432                   SUNXI_FUNCTION(0x0, "gpio_in"),
 433                   SUNXI_FUNCTION(0x1, "gpio_out"),
 434                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D12 */
 435                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP1 */
 436         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
 437                   SUNXI_FUNCTION(0x0, "gpio_in"),
 438                   SUNXI_FUNCTION(0x1, "gpio_out"),
 439                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D13 */
 440                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN1 */
 441         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
 442                   SUNXI_FUNCTION(0x0, "gpio_in"),
 443                   SUNXI_FUNCTION(0x1, "gpio_out"),
 444                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D14 */
 445                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP2 */
 446         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
 447                   SUNXI_FUNCTION(0x0, "gpio_in"),
 448                   SUNXI_FUNCTION(0x1, "gpio_out"),
 449                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D15 */
 450                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN2 */
 451         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
 452                   SUNXI_FUNCTION(0x0, "gpio_in"),
 453                   SUNXI_FUNCTION(0x1, "gpio_out"),
 454                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D16 */
 455                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VPC */
 456         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
 457                   SUNXI_FUNCTION(0x0, "gpio_in"),
 458                   SUNXI_FUNCTION(0x1, "gpio_out"),
 459                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D17 */
 460                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VNC */
 461         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
 462                   SUNXI_FUNCTION(0x0, "gpio_in"),
 463                   SUNXI_FUNCTION(0x1, "gpio_out"),
 464                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D18 */
 465                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VP3 */
 466         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
 467                   SUNXI_FUNCTION(0x0, "gpio_in"),
 468                   SUNXI_FUNCTION(0x1, "gpio_out"),
 469                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D19 */
 470                   SUNXI_FUNCTION(0x3, "lvds1")),        /* VN3 */
 471         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
 472                   SUNXI_FUNCTION(0x0, "gpio_in"),
 473                   SUNXI_FUNCTION(0x1, "gpio_out"),
 474                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D20 */
 475                   SUNXI_FUNCTION(0x3, "csi1")),         /* MCLK */
 476         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
 477                   SUNXI_FUNCTION(0x0, "gpio_in"),
 478                   SUNXI_FUNCTION(0x1, "gpio_out"),
 479                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D21 */
 480                   SUNXI_FUNCTION(0x3, "sim")),          /* VPPEN */
 481         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
 482                   SUNXI_FUNCTION(0x0, "gpio_in"),
 483                   SUNXI_FUNCTION(0x1, "gpio_out"),
 484                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D22 */
 485                   SUNXI_FUNCTION(0x3, "sim")),          /* VPPPP */
 486         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
 487                   SUNXI_FUNCTION(0x0, "gpio_in"),
 488                   SUNXI_FUNCTION(0x1, "gpio_out"),
 489                   SUNXI_FUNCTION(0x2, "lcd0"),          /* D23 */
 490                   SUNXI_FUNCTION(0x3, "sim")),          /* DET */
 491         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
 492                   SUNXI_FUNCTION(0x0, "gpio_in"),
 493                   SUNXI_FUNCTION(0x1, "gpio_out"),
 494                   SUNXI_FUNCTION(0x2, "lcd0"),          /* CLK */
 495                   SUNXI_FUNCTION(0x3, "sim")),          /* VCCEN */
 496         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
 497                   SUNXI_FUNCTION(0x0, "gpio_in"),
 498                   SUNXI_FUNCTION(0x1, "gpio_out"),
 499                   SUNXI_FUNCTION(0x2, "lcd0"),          /* DE */
 500                   SUNXI_FUNCTION(0x3, "sim")),          /* RST */
 501         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
 502                   SUNXI_FUNCTION(0x0, "gpio_in"),
 503                   SUNXI_FUNCTION(0x1, "gpio_out"),
 504                   SUNXI_FUNCTION(0x2, "lcd0"),          /* HSYNC */
 505                   SUNXI_FUNCTION(0x3, "sim")),          /* SCK */
 506         SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
 507                   SUNXI_FUNCTION(0x0, "gpio_in"),
 508                   SUNXI_FUNCTION(0x1, "gpio_out"),
 509                   SUNXI_FUNCTION(0x2, "lcd0"),          /* VSYNC */
 510                   SUNXI_FUNCTION(0x3, "sim")),          /* SDA */
 511         /* Hole */
 512         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
 513                   SUNXI_FUNCTION(0x0, "gpio_in"),
 514                   SUNXI_FUNCTION(0x1, "gpio_out"),
 515                   SUNXI_FUNCTION(0x2, "ts0"),           /* CLK */
 516                   SUNXI_FUNCTION(0x3, "csi0")),         /* PCK */
 517         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
 518                   SUNXI_FUNCTION(0x0, "gpio_in"),
 519                   SUNXI_FUNCTION(0x1, "gpio_out"),
 520                   SUNXI_FUNCTION(0x2, "ts0"),           /* ERR */
 521                   SUNXI_FUNCTION(0x3, "csi0")),         /* CK */
 522         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
 523                   SUNXI_FUNCTION(0x0, "gpio_in"),
 524                   SUNXI_FUNCTION(0x1, "gpio_out"),
 525                   SUNXI_FUNCTION(0x2, "ts0"),           /* SYNC */
 526                   SUNXI_FUNCTION(0x3, "csi0")),         /* HSYNC */
 527         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
 528                   SUNXI_FUNCTION(0x0, "gpio_in"),
 529                   SUNXI_FUNCTION(0x1, "gpio_out"),
 530                   SUNXI_FUNCTION(0x2, "ts0"),           /* DVLD */
 531                   SUNXI_FUNCTION(0x3, "csi0")),         /* VSYNC */
 532         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
 533                   SUNXI_FUNCTION(0x0, "gpio_in"),
 534                   SUNXI_FUNCTION(0x1, "gpio_out"),
 535                   SUNXI_FUNCTION(0x2, "ts0"),           /* D0 */
 536                   SUNXI_FUNCTION(0x3, "csi0")),         /* D0 */
 537         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
 538                   SUNXI_FUNCTION(0x0, "gpio_in"),
 539                   SUNXI_FUNCTION(0x1, "gpio_out"),
 540                   SUNXI_FUNCTION(0x2, "ts0"),           /* D1 */
 541                   SUNXI_FUNCTION(0x3, "csi0"),          /* D1 */
 542                   SUNXI_FUNCTION(0x4, "sim")),          /* VPPEN */
 543         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
 544                   SUNXI_FUNCTION(0x0, "gpio_in"),
 545                   SUNXI_FUNCTION(0x1, "gpio_out"),
 546                   SUNXI_FUNCTION(0x2, "ts0"),           /* D2 */
 547                   SUNXI_FUNCTION(0x3, "csi0")),         /* D2 */
 548         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
 549                   SUNXI_FUNCTION(0x0, "gpio_in"),
 550                   SUNXI_FUNCTION(0x1, "gpio_out"),
 551                   SUNXI_FUNCTION(0x2, "ts0"),           /* D3 */
 552                   SUNXI_FUNCTION(0x3, "csi0")),         /* D3 */
 553         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
 554                   SUNXI_FUNCTION(0x0, "gpio_in"),
 555                   SUNXI_FUNCTION(0x1, "gpio_out"),
 556                   SUNXI_FUNCTION(0x2, "ts0"),           /* D4 */
 557                   SUNXI_FUNCTION(0x3, "csi0")),         /* D4 */
 558         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
 559                   SUNXI_FUNCTION(0x0, "gpio_in"),
 560                   SUNXI_FUNCTION(0x1, "gpio_out"),
 561                   SUNXI_FUNCTION(0x2, "ts0"),           /* D5 */
 562                   SUNXI_FUNCTION(0x3, "csi0")),         /* D5 */
 563         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
 564                   SUNXI_FUNCTION(0x0, "gpio_in"),
 565                   SUNXI_FUNCTION(0x1, "gpio_out"),
 566                   SUNXI_FUNCTION(0x2, "ts0"),           /* D6 */
 567                   SUNXI_FUNCTION(0x3, "csi0")),         /* D6 */
 568         SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
 569                   SUNXI_FUNCTION(0x0, "gpio_in"),
 570                   SUNXI_FUNCTION(0x1, "gpio_out"),
 571                   SUNXI_FUNCTION(0x2, "ts0"),           /* D7 */
 572                   SUNXI_FUNCTION(0x3, "csi0")),         /* D7 */
 573         /* Hole */
 574         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
 575                   SUNXI_FUNCTION(0x0, "gpio_in"),
 576                   SUNXI_FUNCTION(0x1, "gpio_out"),
 577                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D1 */
 578                   SUNXI_FUNCTION(0x4, "jtag")),         /* MSI */
 579         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
 580                   SUNXI_FUNCTION(0x0, "gpio_in"),
 581                   SUNXI_FUNCTION(0x1, "gpio_out"),
 582                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D0 */
 583                   SUNXI_FUNCTION(0x4, "jtag")),         /* DI1 */
 584         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
 585                   SUNXI_FUNCTION(0x0, "gpio_in"),
 586                   SUNXI_FUNCTION(0x1, "gpio_out"),
 587                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CLK */
 588                   SUNXI_FUNCTION(0x4, "uart0")),        /* TX */
 589         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
 590                   SUNXI_FUNCTION(0x0, "gpio_in"),
 591                   SUNXI_FUNCTION(0x1, "gpio_out"),
 592                   SUNXI_FUNCTION(0x2, "mmc0"),          /* CMD */
 593                   SUNXI_FUNCTION(0x4, "jtag")),         /* DO1 */
 594         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
 595                   SUNXI_FUNCTION(0x0, "gpio_in"),
 596                   SUNXI_FUNCTION(0x1, "gpio_out"),
 597                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D3 */
 598                   SUNXI_FUNCTION(0x4, "uart0")),        /* RX */
 599         SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
 600                   SUNXI_FUNCTION(0x0, "gpio_in"),
 601                   SUNXI_FUNCTION(0x1, "gpio_out"),
 602                   SUNXI_FUNCTION(0x2, "mmc0"),          /* D2 */
 603                   SUNXI_FUNCTION(0x4, "jtag")),         /* CK1 */
 604         /* Hole */
 605         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
 606                   SUNXI_FUNCTION(0x0, "gpio_in"),
 607                   SUNXI_FUNCTION(0x1, "gpio_out"),
 608                   SUNXI_FUNCTION(0x2, "ts1"),           /* CLK */
 609                   SUNXI_FUNCTION(0x3, "csi1"),          /* PCK */
 610                   SUNXI_FUNCTION(0x4, "mmc1")),         /* CMD */
 611         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
 612                   SUNXI_FUNCTION(0x0, "gpio_in"),
 613                   SUNXI_FUNCTION(0x1, "gpio_out"),
 614                   SUNXI_FUNCTION(0x2, "ts1"),           /* ERR */
 615                   SUNXI_FUNCTION(0x3, "csi1"),          /* CK */
 616                   SUNXI_FUNCTION(0x4, "mmc1")),         /* CLK */
 617         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
 618                   SUNXI_FUNCTION(0x0, "gpio_in"),
 619                   SUNXI_FUNCTION(0x1, "gpio_out"),
 620                   SUNXI_FUNCTION(0x2, "ts1"),           /* SYNC */
 621                   SUNXI_FUNCTION(0x3, "csi1"),          /* HSYNC */
 622                   SUNXI_FUNCTION(0x4, "mmc1")),         /* D0 */
 623         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
 624                   SUNXI_FUNCTION(0x0, "gpio_in"),
 625                   SUNXI_FUNCTION(0x1, "gpio_out"),
 626                   SUNXI_FUNCTION(0x2, "ts1"),           /* DVLD */
 627                   SUNXI_FUNCTION(0x3, "csi1"),          /* VSYNC */
 628                   SUNXI_FUNCTION(0x4, "mmc1")),         /* D1 */
 629         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
 630                   SUNXI_FUNCTION(0x0, "gpio_in"),
 631                   SUNXI_FUNCTION(0x1, "gpio_out"),
 632                   SUNXI_FUNCTION(0x2, "ts1"),           /* D0 */
 633                   SUNXI_FUNCTION(0x3, "csi1"),          /* D0 */
 634                   SUNXI_FUNCTION(0x4, "mmc1"),          /* D2 */
 635                   SUNXI_FUNCTION(0x5, "csi0")),         /* D8 */
 636         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
 637                   SUNXI_FUNCTION(0x0, "gpio_in"),
 638                   SUNXI_FUNCTION(0x1, "gpio_out"),
 639                   SUNXI_FUNCTION(0x2, "ts1"),           /* D1 */
 640                   SUNXI_FUNCTION(0x3, "csi1"),          /* D1 */
 641                   SUNXI_FUNCTION(0x4, "mmc1"),          /* D3 */
 642                   SUNXI_FUNCTION(0x5, "csi0")),         /* D9 */
 643         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
 644                   SUNXI_FUNCTION(0x0, "gpio_in"),
 645                   SUNXI_FUNCTION(0x1, "gpio_out"),
 646                   SUNXI_FUNCTION(0x2, "ts1"),           /* D2 */
 647                   SUNXI_FUNCTION(0x3, "csi1"),          /* D2 */
 648                   SUNXI_FUNCTION(0x4, "uart3"),         /* TX */
 649                   SUNXI_FUNCTION(0x5, "csi0")),         /* D10 */
 650         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
 651                   SUNXI_FUNCTION(0x0, "gpio_in"),
 652                   SUNXI_FUNCTION(0x1, "gpio_out"),
 653                   SUNXI_FUNCTION(0x2, "ts1"),           /* D3 */
 654                   SUNXI_FUNCTION(0x3, "csi1"),          /* D3 */
 655                   SUNXI_FUNCTION(0x4, "uart3"),         /* RX */
 656                   SUNXI_FUNCTION(0x5, "csi0")),         /* D11 */
 657         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
 658                   SUNXI_FUNCTION(0x0, "gpio_in"),
 659                   SUNXI_FUNCTION(0x1, "gpio_out"),
 660                   SUNXI_FUNCTION(0x2, "ts1"),           /* D4 */
 661                   SUNXI_FUNCTION(0x3, "csi1"),          /* D4 */
 662                   SUNXI_FUNCTION(0x4, "uart3"),         /* RTS */
 663                   SUNXI_FUNCTION(0x5, "csi0")),         /* D12 */
 664         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
 665                   SUNXI_FUNCTION(0x0, "gpio_in"),
 666                   SUNXI_FUNCTION(0x1, "gpio_out"),
 667                   SUNXI_FUNCTION(0x2, "ts1"),           /* D5 */
 668                   SUNXI_FUNCTION(0x3, "csi1"),          /* D5 */
 669                   SUNXI_FUNCTION(0x4, "uart3"),         /* CTS */
 670                   SUNXI_FUNCTION(0x5, "csi0")),         /* D13 */
 671         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
 672                   SUNXI_FUNCTION(0x0, "gpio_in"),
 673                   SUNXI_FUNCTION(0x1, "gpio_out"),
 674                   SUNXI_FUNCTION(0x2, "ts1"),           /* D6 */
 675                   SUNXI_FUNCTION(0x3, "csi1"),          /* D6 */
 676                   SUNXI_FUNCTION(0x4, "uart4"),         /* TX */
 677                   SUNXI_FUNCTION(0x5, "csi0")),         /* D14 */
 678         SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
 679                   SUNXI_FUNCTION(0x0, "gpio_in"),
 680                   SUNXI_FUNCTION(0x1, "gpio_out"),
 681                   SUNXI_FUNCTION(0x2, "ts1"),           /* D7 */
 682                   SUNXI_FUNCTION(0x3, "csi1"),          /* D7 */
 683                   SUNXI_FUNCTION(0x4, "uart4"),         /* RX */
 684                   SUNXI_FUNCTION(0x5, "csi0")),         /* D15 */
 685         /* Hole */
 686         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
 687                   SUNXI_FUNCTION(0x0, "gpio_in"),
 688                   SUNXI_FUNCTION(0x1, "gpio_out"),
 689                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D0 */
 690                   SUNXI_FUNCTION(0x4, "uart3"),         /* TX */
 691                   SUNXI_FUNCTION_IRQ(0x6, 0),           /* EINT0 */
 692                   SUNXI_FUNCTION(0x7, "csi1")),         /* D0 */
 693         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
 694                   SUNXI_FUNCTION(0x0, "gpio_in"),
 695                   SUNXI_FUNCTION(0x1, "gpio_out"),
 696                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D1 */
 697                   SUNXI_FUNCTION(0x4, "uart3"),         /* RX */
 698                   SUNXI_FUNCTION_IRQ(0x6, 1),           /* EINT1 */
 699                   SUNXI_FUNCTION(0x7, "csi1")),         /* D1 */
 700         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
 701                   SUNXI_FUNCTION(0x0, "gpio_in"),
 702                   SUNXI_FUNCTION(0x1, "gpio_out"),
 703                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D2 */
 704                   SUNXI_FUNCTION(0x4, "uart3"),         /* RTS */
 705                   SUNXI_FUNCTION_IRQ(0x6, 2),           /* EINT2 */
 706                   SUNXI_FUNCTION(0x7, "csi1")),         /* D2 */
 707         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
 708                   SUNXI_FUNCTION(0x0, "gpio_in"),
 709                   SUNXI_FUNCTION(0x1, "gpio_out"),
 710                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D3 */
 711                   SUNXI_FUNCTION(0x4, "uart3"),         /* CTS */
 712                   SUNXI_FUNCTION_IRQ(0x6, 3),           /* EINT3 */
 713                   SUNXI_FUNCTION(0x7, "csi1")),         /* D3 */
 714         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
 715                   SUNXI_FUNCTION(0x0, "gpio_in"),
 716                   SUNXI_FUNCTION(0x1, "gpio_out"),
 717                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D4 */
 718                   SUNXI_FUNCTION(0x4, "uart4"),         /* TX */
 719                   SUNXI_FUNCTION_IRQ(0x6, 4),           /* EINT4 */
 720                   SUNXI_FUNCTION(0x7, "csi1")),         /* D4 */
 721         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
 722                   SUNXI_FUNCTION(0x0, "gpio_in"),
 723                   SUNXI_FUNCTION(0x1, "gpio_out"),
 724                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D5 */
 725                   SUNXI_FUNCTION(0x4, "uart4"),         /* RX */
 726                   SUNXI_FUNCTION_IRQ(0x6, 5),           /* EINT5 */
 727                   SUNXI_FUNCTION(0x7, "csi1")),         /* D5 */
 728         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
 729                   SUNXI_FUNCTION(0x0, "gpio_in"),
 730                   SUNXI_FUNCTION(0x1, "gpio_out"),
 731                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D6 */
 732                   SUNXI_FUNCTION(0x4, "uart5"),         /* TX */
 733                   SUNXI_FUNCTION(0x5, "ms"),            /* BS */
 734                   SUNXI_FUNCTION_IRQ(0x6, 6),           /* EINT6 */
 735                   SUNXI_FUNCTION(0x7, "csi1")),         /* D6 */
 736         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
 737                   SUNXI_FUNCTION(0x0, "gpio_in"),
 738                   SUNXI_FUNCTION(0x1, "gpio_out"),
 739                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D7 */
 740                   SUNXI_FUNCTION(0x4, "uart5"),         /* RX */
 741                   SUNXI_FUNCTION(0x5, "ms"),            /* CLK */
 742                   SUNXI_FUNCTION_IRQ(0x6, 7),           /* EINT7 */
 743                   SUNXI_FUNCTION(0x7, "csi1")),         /* D7 */
 744         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
 745                   SUNXI_FUNCTION(0x0, "gpio_in"),
 746                   SUNXI_FUNCTION(0x1, "gpio_out"),
 747                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D8 */
 748                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXD3 */
 749                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN0 */
 750                   SUNXI_FUNCTION(0x5, "ms"),            /* D0 */
 751                   SUNXI_FUNCTION_IRQ(0x6, 8),           /* EINT8 */
 752                   SUNXI_FUNCTION(0x7, "csi1")),         /* D8 */
 753         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
 754                   SUNXI_FUNCTION(0x0, "gpio_in"),
 755                   SUNXI_FUNCTION(0x1, "gpio_out"),
 756                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D9 */
 757                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXD2 */
 758                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN1 */
 759                   SUNXI_FUNCTION(0x5, "ms"),            /* D1 */
 760                   SUNXI_FUNCTION_IRQ(0x6, 9),           /* EINT9 */
 761                   SUNXI_FUNCTION(0x7, "csi1")),         /* D9 */
 762         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
 763                   SUNXI_FUNCTION(0x0, "gpio_in"),
 764                   SUNXI_FUNCTION(0x1, "gpio_out"),
 765                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D10 */
 766                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXD1 */
 767                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN2 */
 768                   SUNXI_FUNCTION(0x5, "ms"),            /* D2 */
 769                   SUNXI_FUNCTION_IRQ(0x6, 10),          /* EINT10 */
 770                   SUNXI_FUNCTION(0x7, "csi1")),         /* D10 */
 771         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
 772                   SUNXI_FUNCTION(0x0, "gpio_in"),
 773                   SUNXI_FUNCTION(0x1, "gpio_out"),
 774                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D11 */
 775                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXD0 */
 776                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN3 */
 777                   SUNXI_FUNCTION(0x5, "ms"),            /* D3 */
 778                   SUNXI_FUNCTION_IRQ(0x6, 11),          /* EINT11 */
 779                   SUNXI_FUNCTION(0x7, "csi1")),         /* D11 */
 780         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
 781                   SUNXI_FUNCTION(0x0, "gpio_in"),
 782                   SUNXI_FUNCTION(0x1, "gpio_out"),
 783                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D12 */
 784                   SUNXI_FUNCTION(0x4, "ps2"),           /* SCK1 */
 785                   SUNXI_FUNCTION_IRQ(0x6, 12),          /* EINT12 */
 786                   SUNXI_FUNCTION(0x7, "csi1")),         /* D12 */
 787         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
 788                   SUNXI_FUNCTION(0x0, "gpio_in"),
 789                   SUNXI_FUNCTION(0x1, "gpio_out"),
 790                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D13 */
 791                   SUNXI_FUNCTION(0x4, "ps2"),           /* SDA1 */
 792                   SUNXI_FUNCTION(0x5, "sim"),           /* RST */
 793                   SUNXI_FUNCTION_IRQ(0x6, 13),          /* EINT13 */
 794                   SUNXI_FUNCTION(0x7, "csi1")),         /* D13 */
 795         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
 796                   SUNXI_FUNCTION(0x0, "gpio_in"),
 797                   SUNXI_FUNCTION(0x1, "gpio_out"),
 798                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D14 */
 799                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD3 */
 800                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN4 */
 801                   SUNXI_FUNCTION(0x5, "sim"),           /* VPPEN */
 802                   SUNXI_FUNCTION_IRQ(0x6, 14),          /* EINT14 */
 803                   SUNXI_FUNCTION(0x7, "csi1")),         /* D14 */
 804         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
 805                   SUNXI_FUNCTION(0x0, "gpio_in"),
 806                   SUNXI_FUNCTION(0x1, "gpio_out"),
 807                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D15 */
 808                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD3 */
 809                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN5 */
 810                   SUNXI_FUNCTION(0x5, "sim"),           /* VPPPP */
 811                   SUNXI_FUNCTION_IRQ(0x6, 15),          /* EINT15 */
 812                   SUNXI_FUNCTION(0x7, "csi1")),         /* D15 */
 813         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
 814                   SUNXI_FUNCTION(0x0, "gpio_in"),
 815                   SUNXI_FUNCTION(0x1, "gpio_out"),
 816                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D16 */
 817                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD2 */
 818                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN6 */
 819                   SUNXI_FUNCTION_IRQ(0x6, 16),          /* EINT16 */
 820                   SUNXI_FUNCTION(0x7, "csi1")),         /* D16 */
 821         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
 822                   SUNXI_FUNCTION(0x0, "gpio_in"),
 823                   SUNXI_FUNCTION(0x1, "gpio_out"),
 824                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D17 */
 825                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD1 */
 826                   SUNXI_FUNCTION(0x4, "keypad"),        /* IN7 */
 827                   SUNXI_FUNCTION(0x5, "sim"),           /* VCCEN */
 828                   SUNXI_FUNCTION_IRQ(0x6, 17),          /* EINT17 */
 829                   SUNXI_FUNCTION(0x7, "csi1")),         /* D17 */
 830         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
 831                   SUNXI_FUNCTION(0x0, "gpio_in"),
 832                   SUNXI_FUNCTION(0x1, "gpio_out"),
 833                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D18 */
 834                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXD0 */
 835                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT0 */
 836                   SUNXI_FUNCTION(0x5, "sim"),           /* SCK */
 837                   SUNXI_FUNCTION_IRQ(0x6, 18),          /* EINT18 */
 838                   SUNXI_FUNCTION(0x7, "csi1")),         /* D18 */
 839         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
 840                   SUNXI_FUNCTION(0x0, "gpio_in"),
 841                   SUNXI_FUNCTION(0x1, "gpio_out"),
 842                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D19 */
 843                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXERR */
 844                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT1 */
 845                   SUNXI_FUNCTION(0x5, "sim"),           /* SDA */
 846                   SUNXI_FUNCTION_IRQ(0x6, 19),          /* EINT19 */
 847                   SUNXI_FUNCTION(0x7, "csi1")),         /* D19 */
 848         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
 849                   SUNXI_FUNCTION(0x0, "gpio_in"),
 850                   SUNXI_FUNCTION(0x1, "gpio_out"),
 851                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D20 */
 852                   SUNXI_FUNCTION(0x3, "emac"),          /* ERXDV */
 853                   SUNXI_FUNCTION(0x4, "can"),           /* TX */
 854                   SUNXI_FUNCTION_IRQ(0x6, 20),          /* EINT20 */
 855                   SUNXI_FUNCTION(0x7, "csi1")),         /* D20 */
 856         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
 857                   SUNXI_FUNCTION(0x0, "gpio_in"),
 858                   SUNXI_FUNCTION(0x1, "gpio_out"),
 859                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D21 */
 860                   SUNXI_FUNCTION(0x3, "emac"),          /* EMDC */
 861                   SUNXI_FUNCTION(0x4, "can"),           /* RX */
 862                   SUNXI_FUNCTION_IRQ(0x6, 21),          /* EINT21 */
 863                   SUNXI_FUNCTION(0x7, "csi1")),         /* D21 */
 864         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
 865                   SUNXI_FUNCTION(0x0, "gpio_in"),
 866                   SUNXI_FUNCTION(0x1, "gpio_out"),
 867                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D22 */
 868                   SUNXI_FUNCTION(0x3, "emac"),          /* EMDIO */
 869                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT2 */
 870                   SUNXI_FUNCTION(0x5, "mmc1"),          /* CMD */
 871                   SUNXI_FUNCTION(0x7, "csi1")),         /* D22 */
 872         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
 873                   SUNXI_FUNCTION(0x0, "gpio_in"),
 874                   SUNXI_FUNCTION(0x1, "gpio_out"),
 875                   SUNXI_FUNCTION(0x2, "lcd1"),          /* D23 */
 876                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXEN */
 877                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT3 */
 878                   SUNXI_FUNCTION(0x5, "mmc1"),          /* CLK */
 879                   SUNXI_FUNCTION(0x7, "csi1")),         /* D23 */
 880         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
 881                   SUNXI_FUNCTION(0x0, "gpio_in"),
 882                   SUNXI_FUNCTION(0x1, "gpio_out"),
 883                   SUNXI_FUNCTION(0x2, "lcd1"),          /* CLK */
 884                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXCK */
 885                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT4 */
 886                   SUNXI_FUNCTION(0x5, "mmc1"),          /* D0 */
 887                   SUNXI_FUNCTION(0x7, "csi1")),         /* PCLK */
 888         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
 889                   SUNXI_FUNCTION(0x0, "gpio_in"),
 890                   SUNXI_FUNCTION(0x1, "gpio_out"),
 891                   SUNXI_FUNCTION(0x2, "lcd1"),          /* DE */
 892                   SUNXI_FUNCTION(0x3, "emac"),          /* ECRS */
 893                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT5 */
 894                   SUNXI_FUNCTION(0x5, "mmc1"),          /* D1 */
 895                   SUNXI_FUNCTION(0x7, "csi1")),         /* FIELD */
 896         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
 897                   SUNXI_FUNCTION(0x0, "gpio_in"),
 898                   SUNXI_FUNCTION(0x1, "gpio_out"),
 899                   SUNXI_FUNCTION(0x2, "lcd1"),          /* HSYNC */
 900                   SUNXI_FUNCTION(0x3, "emac"),          /* ECOL */
 901                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT6 */
 902                   SUNXI_FUNCTION(0x5, "mmc1"),          /* D2 */
 903                   SUNXI_FUNCTION(0x7, "csi1")),         /* HSYNC */
 904         SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
 905                   SUNXI_FUNCTION(0x0, "gpio_in"),
 906                   SUNXI_FUNCTION(0x1, "gpio_out"),
 907                   SUNXI_FUNCTION(0x2, "lcd1"),          /* VSYNC */
 908                   SUNXI_FUNCTION(0x3, "emac"),          /* ETXERR */
 909                   SUNXI_FUNCTION(0x4, "keypad"),        /* OUT7 */
 910                   SUNXI_FUNCTION(0x5, "mmc1"),          /* D3 */
 911                   SUNXI_FUNCTION(0x7, "csi1")),         /* VSYNC */
 912         /* Hole */
 913         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
 914                   SUNXI_FUNCTION(0x0, "gpio_in"),
 915                   SUNXI_FUNCTION(0x1, "gpio_out"),
 916                   SUNXI_FUNCTION(0x3, "i2c3")),         /* SCK */
 917         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
 918                   SUNXI_FUNCTION(0x0, "gpio_in"),
 919                   SUNXI_FUNCTION(0x1, "gpio_out"),
 920                   SUNXI_FUNCTION(0x3, "i2c3")),         /* SDA */
 921         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
 922                   SUNXI_FUNCTION(0x0, "gpio_in"),
 923                   SUNXI_FUNCTION(0x1, "gpio_out"),
 924                   SUNXI_FUNCTION(0x3, "i2c4")),         /* SCK */
 925         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
 926                   SUNXI_FUNCTION(0x0, "gpio_in"),
 927                   SUNXI_FUNCTION(0x1, "gpio_out"),
 928                   SUNXI_FUNCTION(0x2, "pwm"),           /* PWM1 */
 929                   SUNXI_FUNCTION(0x3, "i2c4")),         /* SDA */
 930         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
 931                   SUNXI_FUNCTION(0x0, "gpio_in"),
 932                   SUNXI_FUNCTION(0x1, "gpio_out"),
 933                   SUNXI_FUNCTION(0x2, "mmc3")),         /* CMD */
 934         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
 935                   SUNXI_FUNCTION(0x0, "gpio_in"),
 936                   SUNXI_FUNCTION(0x1, "gpio_out"),
 937                   SUNXI_FUNCTION(0x2, "mmc3")),         /* CLK */
 938         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
 939                   SUNXI_FUNCTION(0x0, "gpio_in"),
 940                   SUNXI_FUNCTION(0x1, "gpio_out"),
 941                   SUNXI_FUNCTION(0x2, "mmc3")),         /* D0 */
 942         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
 943                   SUNXI_FUNCTION(0x0, "gpio_in"),
 944                   SUNXI_FUNCTION(0x1, "gpio_out"),
 945                   SUNXI_FUNCTION(0x2, "mmc3")),         /* D1 */
 946         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
 947                   SUNXI_FUNCTION(0x0, "gpio_in"),
 948                   SUNXI_FUNCTION(0x1, "gpio_out"),
 949                   SUNXI_FUNCTION(0x2, "mmc3")),         /* D2 */
 950         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
 951                   SUNXI_FUNCTION(0x0, "gpio_in"),
 952                   SUNXI_FUNCTION(0x1, "gpio_out"),
 953                   SUNXI_FUNCTION(0x2, "mmc3")),         /* D3 */
 954         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
 955                   SUNXI_FUNCTION(0x0, "gpio_in"),
 956                   SUNXI_FUNCTION(0x1, "gpio_out"),
 957                   SUNXI_FUNCTION(0x2, "spi0"),          /* CS0 */
 958                   SUNXI_FUNCTION(0x3, "uart5"),         /* TX */
 959                   SUNXI_FUNCTION_IRQ(0x6, 22)),         /* EINT22 */
 960         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
 961                   SUNXI_FUNCTION(0x0, "gpio_in"),
 962                   SUNXI_FUNCTION(0x1, "gpio_out"),
 963                   SUNXI_FUNCTION(0x2, "spi0"),          /* CLK */
 964                   SUNXI_FUNCTION(0x3, "uart5"),         /* RX */
 965                   SUNXI_FUNCTION_IRQ(0x6, 23)),         /* EINT23 */
 966         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
 967                   SUNXI_FUNCTION(0x0, "gpio_in"),
 968                   SUNXI_FUNCTION(0x1, "gpio_out"),
 969                   SUNXI_FUNCTION(0x2, "spi0"),          /* MOSI */
 970                   SUNXI_FUNCTION(0x3, "uart6"),         /* TX */
 971                   SUNXI_FUNCTION(0x4, "clk_out_a"),     /* CLK_OUT_A */
 972                   SUNXI_FUNCTION_IRQ(0x6, 24)),         /* EINT24 */
 973         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
 974                   SUNXI_FUNCTION(0x0, "gpio_in"),
 975                   SUNXI_FUNCTION(0x1, "gpio_out"),
 976                   SUNXI_FUNCTION(0x2, "spi0"),          /* MISO */
 977                   SUNXI_FUNCTION(0x3, "uart6"),         /* RX */
 978                   SUNXI_FUNCTION(0x4, "clk_out_b"),     /* CLK_OUT_B */
 979                   SUNXI_FUNCTION_IRQ(0x6, 25)),         /* EINT25 */
 980         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
 981                   SUNXI_FUNCTION(0x0, "gpio_in"),
 982                   SUNXI_FUNCTION(0x1, "gpio_out"),
 983                   SUNXI_FUNCTION(0x2, "spi0"),          /* CS1 */
 984                   SUNXI_FUNCTION(0x3, "ps2"),           /* SCK1 */
 985                   SUNXI_FUNCTION(0x4, "timer4"),        /* TCLKIN0 */
 986                   SUNXI_FUNCTION_IRQ(0x6, 26)),         /* EINT26 */
 987         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
 988                   SUNXI_FUNCTION(0x0, "gpio_in"),
 989                   SUNXI_FUNCTION(0x1, "gpio_out"),
 990                   SUNXI_FUNCTION(0x2, "spi1"),          /* CS1 */
 991                   SUNXI_FUNCTION(0x3, "ps2"),           /* SDA1 */
 992                   SUNXI_FUNCTION(0x4, "timer5"),        /* TCLKIN1 */
 993                   SUNXI_FUNCTION_IRQ(0x6, 27)),         /* EINT27 */
 994         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
 995                   SUNXI_FUNCTION(0x0, "gpio_in"),
 996                   SUNXI_FUNCTION(0x1, "gpio_out"),
 997                   SUNXI_FUNCTION(0x2, "spi1"),          /* CS0 */
 998                   SUNXI_FUNCTION(0x3, "uart2"),         /* RTS */
 999                   SUNXI_FUNCTION_IRQ(0x6, 28)),         /* EINT28 */
1000         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
1001                   SUNXI_FUNCTION(0x0, "gpio_in"),
1002                   SUNXI_FUNCTION(0x1, "gpio_out"),
1003                   SUNXI_FUNCTION(0x2, "spi1"),          /* CLK */
1004                   SUNXI_FUNCTION(0x3, "uart2"),         /* CTS */
1005                   SUNXI_FUNCTION_IRQ(0x6, 29)),         /* EINT29 */
1006         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
1007                   SUNXI_FUNCTION(0x0, "gpio_in"),
1008                   SUNXI_FUNCTION(0x1, "gpio_out"),
1009                   SUNXI_FUNCTION(0x2, "spi1"),          /* MOSI */
1010                   SUNXI_FUNCTION(0x3, "uart2"),         /* TX */
1011                   SUNXI_FUNCTION_IRQ(0x6, 30)),         /* EINT30 */
1012         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
1013                   SUNXI_FUNCTION(0x0, "gpio_in"),
1014                   SUNXI_FUNCTION(0x1, "gpio_out"),
1015                   SUNXI_FUNCTION(0x2, "spi1"),          /* MISO */
1016                   SUNXI_FUNCTION(0x3, "uart2"),         /* RX */
1017                   SUNXI_FUNCTION_IRQ(0x6, 31)),         /* EINT31 */
1018         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
1019                   SUNXI_FUNCTION(0x0, "gpio_in"),
1020                   SUNXI_FUNCTION(0x1, "gpio_out"),
1021                   SUNXI_FUNCTION(0x2, "ps2"),           /* SCK0 */
1022                   SUNXI_FUNCTION(0x3, "uart7"),         /* TX */
1023                   SUNXI_FUNCTION(0x4, "hdmi")),         /* HSCL */
1024         SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
1025                   SUNXI_FUNCTION(0x0, "gpio_in"),
1026                   SUNXI_FUNCTION(0x1, "gpio_out"),
1027                   SUNXI_FUNCTION(0x2, "ps2"),           /* SDA0 */
1028                   SUNXI_FUNCTION(0x3, "uart7"),         /* RX */
1029                   SUNXI_FUNCTION(0x4, "hdmi")),         /* HSDA */
1030 };
1031
1032 static const struct sunxi_pinctrl_desc sun7i_a20_pinctrl_data = {
1033         .pins = sun7i_a20_pins,
1034         .npins = ARRAY_SIZE(sun7i_a20_pins),
1035         .irq_banks = 1,
1036 };
1037
1038 static int sun7i_a20_pinctrl_probe(struct platform_device *pdev)
1039 {
1040         return sunxi_pinctrl_init(pdev,
1041                                   &sun7i_a20_pinctrl_data);
1042 }
1043
1044 static const struct of_device_id sun7i_a20_pinctrl_match[] = {
1045         { .compatible = "allwinner,sun7i-a20-pinctrl", },
1046         {}
1047 };
1048 MODULE_DEVICE_TABLE(of, sun7i_a20_pinctrl_match);
1049
1050 static struct platform_driver sun7i_a20_pinctrl_driver = {
1051         .probe  = sun7i_a20_pinctrl_probe,
1052         .driver = {
1053                 .name           = "sun7i-a20-pinctrl",
1054                 .of_match_table = sun7i_a20_pinctrl_match,
1055         },
1056 };
1057 module_platform_driver(sun7i_a20_pinctrl_driver);
1058
1059 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
1060 MODULE_DESCRIPTION("Allwinner A20 pinctrl driver");
1061 MODULE_LICENSE("GPL");