Merge branch 'for-3.6/core' of git://git.kernel.dk/linux-block
[deliverable/linux.git] / drivers / pwm / pwm-pxa.c
1 /*
2 * drivers/pwm/pwm-pxa.c
3 *
4 * simple driver for PWM (Pulse Width Modulator) controller
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * 2008-02-13 initial version
11 * eric miao <eric.miao@marvell.com>
12 */
13
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/slab.h>
18 #include <linux/err.h>
19 #include <linux/clk.h>
20 #include <linux/io.h>
21 #include <linux/pwm.h>
22
23 #include <asm/div64.h>
24
25 #define HAS_SECONDARY_PWM 0x10
26 #define PWM_ID_BASE(d) ((d) & 0xf)
27
28 static const struct platform_device_id pwm_id_table[] = {
29 /* PWM has_secondary_pwm? */
30 { "pxa25x-pwm", 0 },
31 { "pxa27x-pwm", 0 | HAS_SECONDARY_PWM },
32 { "pxa168-pwm", 1 },
33 { "pxa910-pwm", 1 },
34 { },
35 };
36 MODULE_DEVICE_TABLE(platform, pwm_id_table);
37
38 /* PWM registers and bits definitions */
39 #define PWMCR (0x00)
40 #define PWMDCR (0x04)
41 #define PWMPCR (0x08)
42
43 #define PWMCR_SD (1 << 6)
44 #define PWMDCR_FD (1 << 10)
45
46 struct pxa_pwm_chip {
47 struct pwm_chip chip;
48 struct device *dev;
49
50 struct clk *clk;
51 int clk_enabled;
52 void __iomem *mmio_base;
53 };
54
55 static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
56 {
57 return container_of(chip, struct pxa_pwm_chip, chip);
58 }
59
60 /*
61 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
62 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
63 */
64 static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
65 int duty_ns, int period_ns)
66 {
67 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
68 unsigned long long c;
69 unsigned long period_cycles, prescale, pv, dc;
70 unsigned long offset;
71 int rc;
72
73 if (period_ns == 0 || duty_ns > period_ns)
74 return -EINVAL;
75
76 offset = pwm->hwpwm ? 0x10 : 0;
77
78 c = clk_get_rate(pc->clk);
79 c = c * period_ns;
80 do_div(c, 1000000000);
81 period_cycles = c;
82
83 if (period_cycles < 1)
84 period_cycles = 1;
85 prescale = (period_cycles - 1) / 1024;
86 pv = period_cycles / (prescale + 1) - 1;
87
88 if (prescale > 63)
89 return -EINVAL;
90
91 if (duty_ns == period_ns)
92 dc = PWMDCR_FD;
93 else
94 dc = (pv + 1) * duty_ns / period_ns;
95
96 /* NOTE: the clock to PWM has to be enabled first
97 * before writing to the registers
98 */
99 rc = clk_prepare_enable(pc->clk);
100 if (rc < 0)
101 return rc;
102
103 writel(prescale, pc->mmio_base + offset + PWMCR);
104 writel(dc, pc->mmio_base + offset + PWMDCR);
105 writel(pv, pc->mmio_base + offset + PWMPCR);
106
107 clk_disable_unprepare(pc->clk);
108 return 0;
109 }
110
111 static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
112 {
113 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
114 int rc = 0;
115
116 if (!pc->clk_enabled) {
117 rc = clk_prepare_enable(pc->clk);
118 if (!rc)
119 pc->clk_enabled++;
120 }
121 return rc;
122 }
123
124 static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
125 {
126 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
127
128 if (pc->clk_enabled) {
129 clk_disable_unprepare(pc->clk);
130 pc->clk_enabled--;
131 }
132 }
133
134 static struct pwm_ops pxa_pwm_ops = {
135 .config = pxa_pwm_config,
136 .enable = pxa_pwm_enable,
137 .disable = pxa_pwm_disable,
138 .owner = THIS_MODULE,
139 };
140
141 static int __devinit pwm_probe(struct platform_device *pdev)
142 {
143 const struct platform_device_id *id = platform_get_device_id(pdev);
144 struct pxa_pwm_chip *pwm;
145 struct resource *r;
146 int ret = 0;
147
148 pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
149 if (pwm == NULL) {
150 dev_err(&pdev->dev, "failed to allocate memory\n");
151 return -ENOMEM;
152 }
153
154 pwm->clk = devm_clk_get(&pdev->dev, NULL);
155 if (IS_ERR(pwm->clk))
156 return PTR_ERR(pwm->clk);
157
158 pwm->clk_enabled = 0;
159
160 pwm->chip.dev = &pdev->dev;
161 pwm->chip.ops = &pxa_pwm_ops;
162 pwm->chip.base = -1;
163 pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
164
165 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
166 if (r == NULL) {
167 dev_err(&pdev->dev, "no memory resource defined\n");
168 return -ENODEV;
169 }
170
171 pwm->mmio_base = devm_request_and_ioremap(&pdev->dev, r);
172 if (pwm->mmio_base == NULL)
173 return -EADDRNOTAVAIL;
174
175 ret = pwmchip_add(&pwm->chip);
176 if (ret < 0) {
177 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
178 return ret;
179 }
180
181 platform_set_drvdata(pdev, pwm);
182 return 0;
183 }
184
185 static int __devexit pwm_remove(struct platform_device *pdev)
186 {
187 struct pxa_pwm_chip *chip;
188
189 chip = platform_get_drvdata(pdev);
190 if (chip == NULL)
191 return -ENODEV;
192
193 return pwmchip_remove(&chip->chip);
194 }
195
196 static struct platform_driver pwm_driver = {
197 .driver = {
198 .name = "pxa25x-pwm",
199 .owner = THIS_MODULE,
200 },
201 .probe = pwm_probe,
202 .remove = __devexit_p(pwm_remove),
203 .id_table = pwm_id_table,
204 };
205
206 static int __init pwm_init(void)
207 {
208 return platform_driver_register(&pwm_driver);
209 }
210 arch_initcall(pwm_init);
211
212 static void __exit pwm_exit(void)
213 {
214 platform_driver_unregister(&pwm_driver);
215 }
216 module_exit(pwm_exit);
217
218 MODULE_LICENSE("GPL v2");
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