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4d4d9dc33576858c4b6bdb428b91a000a779f474
[deliverable/linux.git] / drivers / regulator / ab8500.c
1 /*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
8 *
9 * AB8500 peripheral regulators
10 *
11 * AB8500 supports the following regulators:
12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
13 */
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/err.h>
18 #include <linux/platform_device.h>
19 #include <linux/mfd/abx500.h>
20 #include <linux/mfd/abx500/ab8500.h>
21 #include <linux/of.h>
22 #include <linux/regulator/of_regulator.h>
23 #include <linux/regulator/driver.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/regulator/ab8500.h>
26 #include <linux/slab.h>
27
28 /**
29 * struct ab8500_regulator_info - ab8500 regulator information
30 * @dev: device pointer
31 * @desc: regulator description
32 * @regulator_dev: regulator device
33 * @is_enabled: status of regulator (on/off)
34 * @load_lp_uA: maximum load in idle (low power) mode
35 * @update_bank: bank to control on/off
36 * @update_reg: register to control on/off
37 * @update_mask: mask to enable/disable and set mode of regulator
38 * @update_val: bits holding the regulator current mode
39 * @update_val_idle: bits to enable the regulator in idle (low power) mode
40 * @update_val_normal: bits to enable the regulator in normal (high power) mode
41 * @voltage_bank: bank to control regulator voltage
42 * @voltage_reg: register to control regulator voltage
43 * @voltage_mask: mask to control regulator voltage
44 * @voltage_shift: shift to control regulator voltage
45 */
46 struct ab8500_regulator_info {
47 struct device *dev;
48 struct regulator_desc desc;
49 struct regulator_dev *regulator;
50 bool is_enabled;
51 int load_lp_uA;
52 u8 update_bank;
53 u8 update_reg;
54 u8 update_mask;
55 u8 update_val;
56 u8 update_val_idle;
57 u8 update_val_normal;
58 u8 voltage_bank;
59 u8 voltage_reg;
60 u8 voltage_mask;
61 u8 voltage_shift;
62 };
63
64 /* voltage tables for the vauxn/vintcore supplies */
65 static const unsigned int ldo_vauxn_voltages[] = {
66 1100000,
67 1200000,
68 1300000,
69 1400000,
70 1500000,
71 1800000,
72 1850000,
73 1900000,
74 2500000,
75 2650000,
76 2700000,
77 2750000,
78 2800000,
79 2900000,
80 3000000,
81 3300000,
82 };
83
84 static const unsigned int ldo_vaux3_voltages[] = {
85 1200000,
86 1500000,
87 1800000,
88 2100000,
89 2500000,
90 2750000,
91 2790000,
92 2910000,
93 };
94
95 static const unsigned int ldo_vintcore_voltages[] = {
96 1200000,
97 1225000,
98 1250000,
99 1275000,
100 1300000,
101 1325000,
102 1350000,
103 };
104
105 static int ab8500_regulator_enable(struct regulator_dev *rdev)
106 {
107 int ret;
108 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
109
110 if (info == NULL) {
111 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
112 return -EINVAL;
113 }
114
115 ret = abx500_mask_and_set_register_interruptible(info->dev,
116 info->update_bank, info->update_reg,
117 info->update_mask, info->update_val);
118 if (ret < 0) {
119 dev_err(rdev_get_dev(rdev),
120 "couldn't set enable bits for regulator\n");
121 return ret;
122 }
123
124 info->is_enabled = true;
125
126 dev_vdbg(rdev_get_dev(rdev),
127 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
128 info->desc.name, info->update_bank, info->update_reg,
129 info->update_mask, info->update_val);
130
131 return ret;
132 }
133
134 static int ab8500_regulator_disable(struct regulator_dev *rdev)
135 {
136 int ret;
137 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
138
139 if (info == NULL) {
140 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
141 return -EINVAL;
142 }
143
144 ret = abx500_mask_and_set_register_interruptible(info->dev,
145 info->update_bank, info->update_reg,
146 info->update_mask, 0x0);
147 if (ret < 0) {
148 dev_err(rdev_get_dev(rdev),
149 "couldn't set disable bits for regulator\n");
150 return ret;
151 }
152
153 info->is_enabled = false;
154
155 dev_vdbg(rdev_get_dev(rdev),
156 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
157 info->desc.name, info->update_bank, info->update_reg,
158 info->update_mask, 0x0);
159
160 return ret;
161 }
162
163 static unsigned int ab8500_regulator_get_optimum_mode(
164 struct regulator_dev *rdev, int input_uV,
165 int output_uV, int load_uA)
166 {
167 unsigned int mode;
168
169 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
170
171 if (info == NULL) {
172 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
173 return -EINVAL;
174 }
175
176 if (load_uA <= info->load_lp_uA)
177 mode = REGULATOR_MODE_IDLE;
178 else
179 mode = REGULATOR_MODE_NORMAL;
180
181 return mode;
182 }
183
184 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
185 unsigned int mode)
186 {
187 int ret;
188 u8 update_val;
189 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
190
191 if (info == NULL) {
192 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
193 return -EINVAL;
194 }
195
196 switch (mode) {
197 case REGULATOR_MODE_NORMAL:
198 update_val = info->update_val_normal;
199 break;
200 case REGULATOR_MODE_IDLE:
201 update_val = info->update_val_idle;
202 break;
203 default:
204 return -EINVAL;
205 }
206
207 /* ab8500 regulators share mode and enable in the same register bits.
208 off = 0b00
209 low power mode= 0b11
210 full powermode = 0b01
211 (HW control mode = 0b10)
212 Thus we don't write to the register when regulator is disabled.
213 */
214 if (info->is_enabled) {
215 ret = abx500_mask_and_set_register_interruptible(info->dev,
216 info->update_bank, info->update_reg,
217 info->update_mask, update_val);
218 if (ret < 0) {
219 dev_err(rdev_get_dev(rdev),
220 "couldn't set regulator mode\n");
221 return ret;
222 }
223
224 dev_vdbg(rdev_get_dev(rdev),
225 "%s-set_mode (bank, reg, mask, value): "
226 "0x%x, 0x%x, 0x%x, 0x%x\n",
227 info->desc.name, info->update_bank, info->update_reg,
228 info->update_mask, update_val);
229 }
230
231 info->update_val = update_val;
232
233 return 0;
234 }
235
236 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
237 {
238 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
239 int ret;
240
241 if (info == NULL) {
242 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
243 return -EINVAL;
244 }
245
246 if (info->update_val == info->update_val_normal)
247 ret = REGULATOR_MODE_NORMAL;
248 else if (info->update_val == info->update_val_idle)
249 ret = REGULATOR_MODE_IDLE;
250 else
251 ret = -EINVAL;
252
253 return ret;
254 }
255
256 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
257 {
258 int ret;
259 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
260 u8 regval;
261
262 if (info == NULL) {
263 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
264 return -EINVAL;
265 }
266
267 ret = abx500_get_register_interruptible(info->dev,
268 info->update_bank, info->update_reg, &regval);
269 if (ret < 0) {
270 dev_err(rdev_get_dev(rdev),
271 "couldn't read 0x%x register\n", info->update_reg);
272 return ret;
273 }
274
275 dev_vdbg(rdev_get_dev(rdev),
276 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
277 " 0x%x\n",
278 info->desc.name, info->update_bank, info->update_reg,
279 info->update_mask, regval);
280
281 if (regval & info->update_mask)
282 info->is_enabled = true;
283 else
284 info->is_enabled = false;
285
286 return info->is_enabled;
287 }
288
289 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
290 {
291 int ret, val;
292 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
293 u8 regval;
294
295 if (info == NULL) {
296 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
297 return -EINVAL;
298 }
299
300 ret = abx500_get_register_interruptible(info->dev,
301 info->voltage_bank, info->voltage_reg, &regval);
302 if (ret < 0) {
303 dev_err(rdev_get_dev(rdev),
304 "couldn't read voltage reg for regulator\n");
305 return ret;
306 }
307
308 dev_vdbg(rdev_get_dev(rdev),
309 "%s-get_voltage (bank, reg, mask, shift, value): "
310 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
311 info->desc.name, info->voltage_bank,
312 info->voltage_reg, info->voltage_mask,
313 info->voltage_shift, regval);
314
315 val = regval & info->voltage_mask;
316 return val >> info->voltage_shift;
317 }
318
319 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
320 unsigned selector)
321 {
322 int ret;
323 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
324 u8 regval;
325
326 if (info == NULL) {
327 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
328 return -EINVAL;
329 }
330
331 /* set the registers for the request */
332 regval = (u8)selector << info->voltage_shift;
333 ret = abx500_mask_and_set_register_interruptible(info->dev,
334 info->voltage_bank, info->voltage_reg,
335 info->voltage_mask, regval);
336 if (ret < 0)
337 dev_err(rdev_get_dev(rdev),
338 "couldn't set voltage reg for regulator\n");
339
340 dev_vdbg(rdev_get_dev(rdev),
341 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
342 " 0x%x\n",
343 info->desc.name, info->voltage_bank, info->voltage_reg,
344 info->voltage_mask, regval);
345
346 return ret;
347 }
348
349 static struct regulator_ops ab8500_regulator_volt_mode_ops = {
350 .enable = ab8500_regulator_enable,
351 .disable = ab8500_regulator_disable,
352 .is_enabled = ab8500_regulator_is_enabled,
353 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
354 .set_mode = ab8500_regulator_set_mode,
355 .get_mode = ab8500_regulator_get_mode,
356 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
357 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
358 .list_voltage = regulator_list_voltage_table,
359 };
360
361 static struct regulator_ops ab8500_regulator_mode_ops = {
362 .enable = ab8500_regulator_enable,
363 .disable = ab8500_regulator_disable,
364 .is_enabled = ab8500_regulator_is_enabled,
365 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
366 .set_mode = ab8500_regulator_set_mode,
367 .get_mode = ab8500_regulator_get_mode,
368 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
369 .list_voltage = regulator_list_voltage_linear,
370 };
371
372 static struct regulator_ops ab8500_regulator_ops = {
373 .enable = ab8500_regulator_enable,
374 .disable = ab8500_regulator_disable,
375 .is_enabled = ab8500_regulator_is_enabled,
376 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
377 .list_voltage = regulator_list_voltage_linear,
378 };
379
380 /* AB8500 regulator information */
381 static struct ab8500_regulator_info
382 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
383 /*
384 * Variable Voltage Regulators
385 * name, min mV, max mV,
386 * update bank, reg, mask, enable val
387 * volt bank, reg, mask
388 */
389 [AB8500_LDO_AUX1] = {
390 .desc = {
391 .name = "LDO-AUX1",
392 .ops = &ab8500_regulator_volt_mode_ops,
393 .type = REGULATOR_VOLTAGE,
394 .id = AB8500_LDO_AUX1,
395 .owner = THIS_MODULE,
396 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
397 .volt_table = ldo_vauxn_voltages,
398 .enable_time = 200,
399 },
400 .load_lp_uA = 5000,
401 .update_bank = 0x04,
402 .update_reg = 0x09,
403 .update_mask = 0x03,
404 .update_val = 0x01,
405 .update_val_idle = 0x03,
406 .update_val_normal = 0x01,
407 .voltage_bank = 0x04,
408 .voltage_reg = 0x1f,
409 .voltage_mask = 0x0f,
410 },
411 [AB8500_LDO_AUX2] = {
412 .desc = {
413 .name = "LDO-AUX2",
414 .ops = &ab8500_regulator_volt_mode_ops,
415 .type = REGULATOR_VOLTAGE,
416 .id = AB8500_LDO_AUX2,
417 .owner = THIS_MODULE,
418 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
419 .volt_table = ldo_vauxn_voltages,
420 .enable_time = 200,
421 },
422 .load_lp_uA = 5000,
423 .update_bank = 0x04,
424 .update_reg = 0x09,
425 .update_mask = 0x0c,
426 .update_val = 0x04,
427 .update_val_idle = 0x0c,
428 .update_val_normal = 0x04,
429 .voltage_bank = 0x04,
430 .voltage_reg = 0x20,
431 .voltage_mask = 0x0f,
432 },
433 [AB8500_LDO_AUX3] = {
434 .desc = {
435 .name = "LDO-AUX3",
436 .ops = &ab8500_regulator_volt_mode_ops,
437 .type = REGULATOR_VOLTAGE,
438 .id = AB8500_LDO_AUX3,
439 .owner = THIS_MODULE,
440 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
441 .volt_table = ldo_vaux3_voltages,
442 .enable_time = 450,
443 },
444 .load_lp_uA = 5000,
445 .update_bank = 0x04,
446 .update_reg = 0x0a,
447 .update_mask = 0x03,
448 .update_val = 0x01,
449 .update_val_idle = 0x03,
450 .update_val_normal = 0x01,
451 .voltage_bank = 0x04,
452 .voltage_reg = 0x21,
453 .voltage_mask = 0x07,
454 },
455 [AB8500_LDO_INTCORE] = {
456 .desc = {
457 .name = "LDO-INTCORE",
458 .ops = &ab8500_regulator_volt_mode_ops,
459 .type = REGULATOR_VOLTAGE,
460 .id = AB8500_LDO_INTCORE,
461 .owner = THIS_MODULE,
462 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
463 .volt_table = ldo_vintcore_voltages,
464 .enable_time = 750,
465 },
466 .load_lp_uA = 5000,
467 .update_bank = 0x03,
468 .update_reg = 0x80,
469 .update_mask = 0x44,
470 .update_val = 0x44,
471 .update_val_idle = 0x44,
472 .update_val_normal = 0x04,
473 .voltage_bank = 0x03,
474 .voltage_reg = 0x80,
475 .voltage_mask = 0x38,
476 .voltage_shift = 3,
477 },
478
479 /*
480 * Fixed Voltage Regulators
481 * name, fixed mV,
482 * update bank, reg, mask, enable val
483 */
484 [AB8500_LDO_TVOUT] = {
485 .desc = {
486 .name = "LDO-TVOUT",
487 .ops = &ab8500_regulator_mode_ops,
488 .type = REGULATOR_VOLTAGE,
489 .id = AB8500_LDO_TVOUT,
490 .owner = THIS_MODULE,
491 .n_voltages = 1,
492 .min_uV = 2000000,
493 .enable_time = 10000,
494 },
495 .load_lp_uA = 1000,
496 .update_bank = 0x03,
497 .update_reg = 0x80,
498 .update_mask = 0x82,
499 .update_val = 0x02,
500 .update_val_idle = 0x82,
501 .update_val_normal = 0x02,
502 },
503 [AB8500_LDO_AUDIO] = {
504 .desc = {
505 .name = "LDO-AUDIO",
506 .ops = &ab8500_regulator_ops,
507 .type = REGULATOR_VOLTAGE,
508 .id = AB8500_LDO_AUDIO,
509 .owner = THIS_MODULE,
510 .n_voltages = 1,
511 .min_uV = 2000000,
512 .enable_time = 140,
513 },
514 .update_bank = 0x03,
515 .update_reg = 0x83,
516 .update_mask = 0x02,
517 .update_val = 0x02,
518 },
519 [AB8500_LDO_ANAMIC1] = {
520 .desc = {
521 .name = "LDO-ANAMIC1",
522 .ops = &ab8500_regulator_ops,
523 .type = REGULATOR_VOLTAGE,
524 .id = AB8500_LDO_ANAMIC1,
525 .owner = THIS_MODULE,
526 .n_voltages = 1,
527 .min_uV = 2050000,
528 .enable_time = 500,
529 },
530 .update_bank = 0x03,
531 .update_reg = 0x83,
532 .update_mask = 0x08,
533 .update_val = 0x08,
534 },
535 [AB8500_LDO_ANAMIC2] = {
536 .desc = {
537 .name = "LDO-ANAMIC2",
538 .ops = &ab8500_regulator_ops,
539 .type = REGULATOR_VOLTAGE,
540 .id = AB8500_LDO_ANAMIC2,
541 .owner = THIS_MODULE,
542 .n_voltages = 1,
543 .min_uV = 2050000,
544 .enable_time = 500,
545 },
546 .update_bank = 0x03,
547 .update_reg = 0x83,
548 .update_mask = 0x10,
549 .update_val = 0x10,
550 },
551 [AB8500_LDO_DMIC] = {
552 .desc = {
553 .name = "LDO-DMIC",
554 .ops = &ab8500_regulator_ops,
555 .type = REGULATOR_VOLTAGE,
556 .id = AB8500_LDO_DMIC,
557 .owner = THIS_MODULE,
558 .n_voltages = 1,
559 .min_uV = 1800000,
560 .enable_time = 420,
561 },
562 .update_bank = 0x03,
563 .update_reg = 0x83,
564 .update_mask = 0x04,
565 .update_val = 0x04,
566 },
567
568 /*
569 * Regulators with fixed voltage and normal/idle modes
570 */
571 [AB8500_LDO_ANA] = {
572 .desc = {
573 .name = "LDO-ANA",
574 .ops = &ab8500_regulator_mode_ops,
575 .type = REGULATOR_VOLTAGE,
576 .id = AB8500_LDO_ANA,
577 .owner = THIS_MODULE,
578 .n_voltages = 1,
579 .min_uV = 1200000,
580 .enable_time = 140,
581 },
582 .load_lp_uA = 1000,
583 .update_bank = 0x04,
584 .update_reg = 0x06,
585 .update_mask = 0x0c,
586 .update_val = 0x04,
587 .update_val_idle = 0x0c,
588 .update_val_normal = 0x04,
589 },
590 };
591
592 /* AB9540 regulator information */
593 static struct ab8500_regulator_info
594 ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
595 /*
596 * Variable Voltage Regulators
597 * name, min mV, max mV,
598 * update bank, reg, mask, enable val
599 * volt bank, reg, mask, table, table length
600 */
601 [AB9540_LDO_AUX1] = {
602 .desc = {
603 .name = "LDO-AUX1",
604 .ops = &ab8500_regulator_volt_mode_ops,
605 .type = REGULATOR_VOLTAGE,
606 .id = AB8500_LDO_AUX1,
607 .owner = THIS_MODULE,
608 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
609 },
610 .min_uV = 1100000,
611 .max_uV = 3300000,
612 .load_lp_uA = 5000,
613 .update_bank = 0x04,
614 .update_reg = 0x09,
615 .update_mask = 0x03,
616 .update_val = 0x01,
617 .update_val_idle = 0x03,
618 .update_val_normal = 0x01,
619 .voltage_bank = 0x04,
620 .voltage_reg = 0x1f,
621 .voltage_mask = 0x0f,
622 .voltages = ldo_vauxn_voltages,
623 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
624 },
625 [AB9540_LDO_AUX2] = {
626 .desc = {
627 .name = "LDO-AUX2",
628 .ops = &ab8500_regulator_volt_mode_ops,
629 .type = REGULATOR_VOLTAGE,
630 .id = AB8500_LDO_AUX2,
631 .owner = THIS_MODULE,
632 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
633 },
634 .min_uV = 1100000,
635 .max_uV = 3300000,
636 .load_lp_uA = 5000,
637 .update_bank = 0x04,
638 .update_reg = 0x09,
639 .update_mask = 0x0c,
640 .update_val = 0x04,
641 .update_val_idle = 0x0c,
642 .update_val_normal = 0x04,
643 .voltage_bank = 0x04,
644 .voltage_reg = 0x20,
645 .voltage_mask = 0x0f,
646 .voltages = ldo_vauxn_voltages,
647 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
648 },
649 [AB9540_LDO_AUX3] = {
650 .desc = {
651 .name = "LDO-AUX3",
652 .ops = &ab8500_regulator_volt_mode_ops,
653 .type = REGULATOR_VOLTAGE,
654 .id = AB8500_LDO_AUX3,
655 .owner = THIS_MODULE,
656 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
657 },
658 .min_uV = 1100000,
659 .max_uV = 3300000,
660 .load_lp_uA = 5000,
661 .update_bank = 0x04,
662 .update_reg = 0x0a,
663 .update_mask = 0x03,
664 .update_val = 0x01,
665 .update_val_idle = 0x03,
666 .update_val_normal = 0x01,
667 .voltage_bank = 0x04,
668 .voltage_reg = 0x21,
669 .voltage_mask = 0x07,
670 .voltages = ldo_vaux3_voltages,
671 .voltages_len = ARRAY_SIZE(ldo_vaux3_voltages),
672 },
673 [AB9540_LDO_AUX4] = {
674 .desc = {
675 .name = "LDO-AUX4",
676 .ops = &ab8500_regulator_volt_mode_ops,
677 .type = REGULATOR_VOLTAGE,
678 .id = AB9540_LDO_AUX4,
679 .owner = THIS_MODULE,
680 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
681 },
682 .min_uV = 1100000,
683 .max_uV = 3300000,
684 .load_lp_uA = 5000,
685 /* values for Vaux4Regu register */
686 .update_bank = 0x04,
687 .update_reg = 0x2e,
688 .update_mask = 0x03,
689 .update_val = 0x01,
690 .update_val_idle = 0x03,
691 .update_val_normal = 0x01,
692 /* values for Vaux4SEL register */
693 .voltage_bank = 0x04,
694 .voltage_reg = 0x2f,
695 .voltage_mask = 0x0f,
696 .voltages = ldo_vauxn_voltages,
697 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
698 },
699 [AB9540_LDO_INTCORE] = {
700 .desc = {
701 .name = "LDO-INTCORE",
702 .ops = &ab8500_regulator_volt_mode_ops,
703 .type = REGULATOR_VOLTAGE,
704 .id = AB8500_LDO_INTCORE,
705 .owner = THIS_MODULE,
706 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
707 },
708 .min_uV = 1100000,
709 .max_uV = 3300000,
710 .load_lp_uA = 5000,
711 .update_bank = 0x03,
712 .update_reg = 0x80,
713 .update_mask = 0x44,
714 .update_val = 0x44,
715 .update_val_idle = 0x44,
716 .update_val_normal = 0x04,
717 .voltage_bank = 0x03,
718 .voltage_reg = 0x80,
719 .voltage_mask = 0x38,
720 .voltages = ldo_vintcore_voltages,
721 .voltages_len = ARRAY_SIZE(ldo_vintcore_voltages),
722 .voltage_shift = 3,
723 },
724
725 /*
726 * Fixed Voltage Regulators
727 * name, fixed mV,
728 * update bank, reg, mask, enable val
729 */
730 [AB9540_LDO_TVOUT] = {
731 .desc = {
732 .name = "LDO-TVOUT",
733 .ops = &ab8500_regulator_mode_ops,
734 .type = REGULATOR_VOLTAGE,
735 .id = AB8500_LDO_TVOUT,
736 .owner = THIS_MODULE,
737 .n_voltages = 1,
738 },
739 .delay = 10000,
740 .fixed_uV = 2000000,
741 .load_lp_uA = 1000,
742 .update_bank = 0x03,
743 .update_reg = 0x80,
744 .update_mask = 0x82,
745 .update_val = 0x02,
746 .update_val_idle = 0x82,
747 .update_val_normal = 0x02,
748 },
749 [AB9540_LDO_USB] = {
750 .desc = {
751 .name = "LDO-USB",
752 .ops = &ab8500_regulator_ops,
753 .type = REGULATOR_VOLTAGE,
754 .id = AB9540_LDO_USB,
755 .owner = THIS_MODULE,
756 .n_voltages = 1,
757 },
758 .fixed_uV = 3300000,
759 .update_bank = 0x03,
760 .update_reg = 0x82,
761 .update_mask = 0x03,
762 .update_val = 0x01,
763 .update_val_idle = 0x03,
764 .update_val_normal = 0x01,
765 },
766 [AB9540_LDO_AUDIO] = {
767 .desc = {
768 .name = "LDO-AUDIO",
769 .ops = &ab8500_regulator_ops,
770 .type = REGULATOR_VOLTAGE,
771 .id = AB8500_LDO_AUDIO,
772 .owner = THIS_MODULE,
773 .n_voltages = 1,
774 },
775 .fixed_uV = 2000000,
776 .update_bank = 0x03,
777 .update_reg = 0x83,
778 .update_mask = 0x02,
779 .update_val = 0x02,
780 },
781 [AB9540_LDO_ANAMIC1] = {
782 .desc = {
783 .name = "LDO-ANAMIC1",
784 .ops = &ab8500_regulator_ops,
785 .type = REGULATOR_VOLTAGE,
786 .id = AB8500_LDO_ANAMIC1,
787 .owner = THIS_MODULE,
788 .n_voltages = 1,
789 },
790 .fixed_uV = 2050000,
791 .update_bank = 0x03,
792 .update_reg = 0x83,
793 .update_mask = 0x08,
794 .update_val = 0x08,
795 },
796 [AB9540_LDO_ANAMIC2] = {
797 .desc = {
798 .name = "LDO-ANAMIC2",
799 .ops = &ab8500_regulator_ops,
800 .type = REGULATOR_VOLTAGE,
801 .id = AB8500_LDO_ANAMIC2,
802 .owner = THIS_MODULE,
803 .n_voltages = 1,
804 },
805 .fixed_uV = 2050000,
806 .update_bank = 0x03,
807 .update_reg = 0x83,
808 .update_mask = 0x10,
809 .update_val = 0x10,
810 },
811 [AB9540_LDO_DMIC] = {
812 .desc = {
813 .name = "LDO-DMIC",
814 .ops = &ab8500_regulator_ops,
815 .type = REGULATOR_VOLTAGE,
816 .id = AB8500_LDO_DMIC,
817 .owner = THIS_MODULE,
818 .n_voltages = 1,
819 },
820 .fixed_uV = 1800000,
821 .update_bank = 0x03,
822 .update_reg = 0x83,
823 .update_mask = 0x04,
824 .update_val = 0x04,
825 },
826
827 /*
828 * Regulators with fixed voltage and normal/idle modes
829 */
830 [AB9540_LDO_ANA] = {
831 .desc = {
832 .name = "LDO-ANA",
833 .ops = &ab8500_regulator_mode_ops,
834 .type = REGULATOR_VOLTAGE,
835 .id = AB8500_LDO_ANA,
836 .owner = THIS_MODULE,
837 .n_voltages = 1,
838 },
839 .fixed_uV = 1200000,
840 .load_lp_uA = 1000,
841 .update_bank = 0x04,
842 .update_reg = 0x06,
843 .update_mask = 0x0c,
844 .update_val = 0x08,
845 .update_val_idle = 0x0c,
846 .update_val_normal = 0x08,
847 },
848 };
849
850 struct ab8500_reg_init {
851 u8 bank;
852 u8 addr;
853 u8 mask;
854 };
855
856 #define REG_INIT(_id, _bank, _addr, _mask) \
857 [_id] = { \
858 .bank = _bank, \
859 .addr = _addr, \
860 .mask = _mask, \
861 }
862
863 /* AB8500 register init */
864 static struct ab8500_reg_init ab8500_reg_init[] = {
865 /*
866 * 0x30, VanaRequestCtrl
867 * 0xc0, VextSupply1RequestCtrl
868 */
869 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xf0),
870 /*
871 * 0x03, VextSupply2RequestCtrl
872 * 0x0c, VextSupply3RequestCtrl
873 * 0x30, Vaux1RequestCtrl
874 * 0xc0, Vaux2RequestCtrl
875 */
876 REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
877 /*
878 * 0x03, Vaux3RequestCtrl
879 * 0x04, SwHPReq
880 */
881 REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
882 /*
883 * 0x08, VanaSysClkReq1HPValid
884 * 0x20, Vaux1SysClkReq1HPValid
885 * 0x40, Vaux2SysClkReq1HPValid
886 * 0x80, Vaux3SysClkReq1HPValid
887 */
888 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
889 /*
890 * 0x10, VextSupply1SysClkReq1HPValid
891 * 0x20, VextSupply2SysClkReq1HPValid
892 * 0x40, VextSupply3SysClkReq1HPValid
893 */
894 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
895 /*
896 * 0x08, VanaHwHPReq1Valid
897 * 0x20, Vaux1HwHPReq1Valid
898 * 0x40, Vaux2HwHPReq1Valid
899 * 0x80, Vaux3HwHPReq1Valid
900 */
901 REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
902 /*
903 * 0x01, VextSupply1HwHPReq1Valid
904 * 0x02, VextSupply2HwHPReq1Valid
905 * 0x04, VextSupply3HwHPReq1Valid
906 */
907 REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
908 /*
909 * 0x08, VanaHwHPReq2Valid
910 * 0x20, Vaux1HwHPReq2Valid
911 * 0x40, Vaux2HwHPReq2Valid
912 * 0x80, Vaux3HwHPReq2Valid
913 */
914 REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
915 /*
916 * 0x01, VextSupply1HwHPReq2Valid
917 * 0x02, VextSupply2HwHPReq2Valid
918 * 0x04, VextSupply3HwHPReq2Valid
919 */
920 REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
921 /*
922 * 0x20, VanaSwHPReqValid
923 * 0x80, Vaux1SwHPReqValid
924 */
925 REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
926 /*
927 * 0x01, Vaux2SwHPReqValid
928 * 0x02, Vaux3SwHPReqValid
929 * 0x04, VextSupply1SwHPReqValid
930 * 0x08, VextSupply2SwHPReqValid
931 * 0x10, VextSupply3SwHPReqValid
932 */
933 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
934 /*
935 * 0x02, SysClkReq2Valid1
936 * 0x04, SysClkReq3Valid1
937 * 0x08, SysClkReq4Valid1
938 * 0x10, SysClkReq5Valid1
939 * 0x20, SysClkReq6Valid1
940 * 0x40, SysClkReq7Valid1
941 * 0x80, SysClkReq8Valid1
942 */
943 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
944 /*
945 * 0x02, SysClkReq2Valid2
946 * 0x04, SysClkReq3Valid2
947 * 0x08, SysClkReq4Valid2
948 * 0x10, SysClkReq5Valid2
949 * 0x20, SysClkReq6Valid2
950 * 0x40, SysClkReq7Valid2
951 * 0x80, SysClkReq8Valid2
952 */
953 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
954 /*
955 * 0x02, VTVoutEna
956 * 0x04, Vintcore12Ena
957 * 0x38, Vintcore12Sel
958 * 0x40, Vintcore12LP
959 * 0x80, VTVoutLP
960 */
961 REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
962 /*
963 * 0x02, VaudioEna
964 * 0x04, VdmicEna
965 * 0x08, Vamic1Ena
966 * 0x10, Vamic2Ena
967 */
968 REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
969 /*
970 * 0x01, Vamic1_dzout
971 * 0x02, Vamic2_dzout
972 */
973 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
974 /*
975 * 0x03, VpllRegu (NOTE! PRCMU register bits)
976 * 0x0c, VanaRegu
977 */
978 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
979 /*
980 * 0x01, VrefDDREna
981 * 0x02, VrefDDRSleepMode
982 */
983 REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
984 /*
985 * 0x03, VextSupply1Regu
986 * 0x0c, VextSupply2Regu
987 * 0x30, VextSupply3Regu
988 * 0x40, ExtSupply2Bypass
989 * 0x80, ExtSupply3Bypass
990 */
991 REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
992 /*
993 * 0x03, Vaux1Regu
994 * 0x0c, Vaux2Regu
995 */
996 REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
997 /*
998 * 0x03, Vaux3Regu
999 */
1000 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
1001 /*
1002 * 0x0f, Vaux1Sel
1003 */
1004 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
1005 /*
1006 * 0x0f, Vaux2Sel
1007 */
1008 REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
1009 /*
1010 * 0x07, Vaux3Sel
1011 */
1012 REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
1013 /*
1014 * 0x01, VextSupply12LP
1015 */
1016 REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
1017 /*
1018 * 0x04, Vaux1Disch
1019 * 0x08, Vaux2Disch
1020 * 0x10, Vaux3Disch
1021 * 0x20, Vintcore12Disch
1022 * 0x40, VTVoutDisch
1023 * 0x80, VaudioDisch
1024 */
1025 REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
1026 /*
1027 * 0x02, VanaDisch
1028 * 0x04, VdmicPullDownEna
1029 * 0x10, VdmicDisch
1030 */
1031 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
1032 };
1033
1034 /* AB9540 register init */
1035 static struct ab8500_reg_init ab9540_reg_init[] = {
1036 /*
1037 * 0x03, VarmRequestCtrl
1038 * 0x0c, VapeRequestCtrl
1039 * 0x30, Vsmps1RequestCtrl
1040 * 0xc0, Vsmps2RequestCtrl
1041 */
1042 REG_INIT(AB9540_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
1043 /*
1044 * 0x03, Vsmps3RequestCtrl
1045 * 0x0c, VpllRequestCtrl
1046 * 0x30, VanaRequestCtrl
1047 * 0xc0, VextSupply1RequestCtrl
1048 */
1049 REG_INIT(AB9540_REGUREQUESTCTRL2, 0x03, 0x04, 0xff),
1050 /*
1051 * 0x03, VextSupply2RequestCtrl
1052 * 0x0c, VextSupply3RequestCtrl
1053 * 0x30, Vaux1RequestCtrl
1054 * 0xc0, Vaux2RequestCtrl
1055 */
1056 REG_INIT(AB9540_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
1057 /*
1058 * 0x03, Vaux3RequestCtrl
1059 * 0x04, SwHPReq
1060 */
1061 REG_INIT(AB9540_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
1062 /*
1063 * 0x01, Vsmps1SysClkReq1HPValid
1064 * 0x02, Vsmps2SysClkReq1HPValid
1065 * 0x04, Vsmps3SysClkReq1HPValid
1066 * 0x08, VanaSysClkReq1HPValid
1067 * 0x10, VpllSysClkReq1HPValid
1068 * 0x20, Vaux1SysClkReq1HPValid
1069 * 0x40, Vaux2SysClkReq1HPValid
1070 * 0x80, Vaux3SysClkReq1HPValid
1071 */
1072 REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1073 /*
1074 * 0x01, VapeSysClkReq1HPValid
1075 * 0x02, VarmSysClkReq1HPValid
1076 * 0x04, VbbSysClkReq1HPValid
1077 * 0x08, VmodSysClkReq1HPValid
1078 * 0x10, VextSupply1SysClkReq1HPValid
1079 * 0x20, VextSupply2SysClkReq1HPValid
1080 * 0x40, VextSupply3SysClkReq1HPValid
1081 */
1082 REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
1083 /*
1084 * 0x01, Vsmps1HwHPReq1Valid
1085 * 0x02, Vsmps2HwHPReq1Valid
1086 * 0x04, Vsmps3HwHPReq1Valid
1087 * 0x08, VanaHwHPReq1Valid
1088 * 0x10, VpllHwHPReq1Valid
1089 * 0x20, Vaux1HwHPReq1Valid
1090 * 0x40, Vaux2HwHPReq1Valid
1091 * 0x80, Vaux3HwHPReq1Valid
1092 */
1093 REG_INIT(AB9540_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
1094 /*
1095 * 0x01, VextSupply1HwHPReq1Valid
1096 * 0x02, VextSupply2HwHPReq1Valid
1097 * 0x04, VextSupply3HwHPReq1Valid
1098 * 0x08, VmodHwHPReq1Valid
1099 */
1100 REG_INIT(AB9540_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x0f),
1101 /*
1102 * 0x01, Vsmps1HwHPReq2Valid
1103 * 0x02, Vsmps2HwHPReq2Valid
1104 * 0x03, Vsmps3HwHPReq2Valid
1105 * 0x08, VanaHwHPReq2Valid
1106 * 0x10, VpllHwHPReq2Valid
1107 * 0x20, Vaux1HwHPReq2Valid
1108 * 0x40, Vaux2HwHPReq2Valid
1109 * 0x80, Vaux3HwHPReq2Valid
1110 */
1111 REG_INIT(AB9540_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
1112 /*
1113 * 0x01, VextSupply1HwHPReq2Valid
1114 * 0x02, VextSupply2HwHPReq2Valid
1115 * 0x04, VextSupply3HwHPReq2Valid
1116 * 0x08, VmodHwHPReq2Valid
1117 */
1118 REG_INIT(AB9540_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x0f),
1119 /*
1120 * 0x01, VapeSwHPReqValid
1121 * 0x02, VarmSwHPReqValid
1122 * 0x04, Vsmps1SwHPReqValid
1123 * 0x08, Vsmps2SwHPReqValid
1124 * 0x10, Vsmps3SwHPReqValid
1125 * 0x20, VanaSwHPReqValid
1126 * 0x40, VpllSwHPReqValid
1127 * 0x80, Vaux1SwHPReqValid
1128 */
1129 REG_INIT(AB9540_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
1130 /*
1131 * 0x01, Vaux2SwHPReqValid
1132 * 0x02, Vaux3SwHPReqValid
1133 * 0x04, VextSupply1SwHPReqValid
1134 * 0x08, VextSupply2SwHPReqValid
1135 * 0x10, VextSupply3SwHPReqValid
1136 * 0x20, VmodSwHPReqValid
1137 */
1138 REG_INIT(AB9540_REGUSWHPREQVALID2, 0x03, 0x0e, 0x3f),
1139 /*
1140 * 0x02, SysClkReq2Valid1
1141 * ...
1142 * 0x80, SysClkReq8Valid1
1143 */
1144 REG_INIT(AB9540_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
1145 /*
1146 * 0x02, SysClkReq2Valid2
1147 * ...
1148 * 0x80, SysClkReq8Valid2
1149 */
1150 REG_INIT(AB9540_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
1151 /*
1152 * 0x01, Vaux4SwHPReqValid
1153 * 0x02, Vaux4HwHPReq2Valid
1154 * 0x04, Vaux4HwHPReq1Valid
1155 * 0x08, Vaux4SysClkReq1HPValid
1156 */
1157 REG_INIT(AB9540_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f),
1158 /*
1159 * 0x02, VTVoutEna
1160 * 0x04, Vintcore12Ena
1161 * 0x38, Vintcore12Sel
1162 * 0x40, Vintcore12LP
1163 * 0x80, VTVoutLP
1164 */
1165 REG_INIT(AB9540_REGUMISC1, 0x03, 0x80, 0xfe),
1166 /*
1167 * 0x02, VaudioEna
1168 * 0x04, VdmicEna
1169 * 0x08, Vamic1Ena
1170 * 0x10, Vamic2Ena
1171 */
1172 REG_INIT(AB9540_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
1173 /*
1174 * 0x01, Vamic1_dzout
1175 * 0x02, Vamic2_dzout
1176 */
1177 REG_INIT(AB9540_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
1178 /*
1179 * 0x03, Vsmps1Regu
1180 * 0x0c, Vsmps1SelCtrl
1181 * 0x10, Vsmps1AutoMode
1182 * 0x20, Vsmps1PWMMode
1183 */
1184 REG_INIT(AB9540_VSMPS1REGU, 0x04, 0x03, 0x3f),
1185 /*
1186 * 0x03, Vsmps2Regu
1187 * 0x0c, Vsmps2SelCtrl
1188 * 0x10, Vsmps2AutoMode
1189 * 0x20, Vsmps2PWMMode
1190 */
1191 REG_INIT(AB9540_VSMPS2REGU, 0x04, 0x04, 0x3f),
1192 /*
1193 * 0x03, Vsmps3Regu
1194 * 0x0c, Vsmps3SelCtrl
1195 * NOTE! PRCMU register
1196 */
1197 REG_INIT(AB9540_VSMPS3REGU, 0x04, 0x05, 0x0f),
1198 /*
1199 * 0x03, VpllRegu
1200 * 0x0c, VanaRegu
1201 */
1202 REG_INIT(AB9540_VPLLVANAREGU, 0x04, 0x06, 0x0f),
1203 /*
1204 * 0x03, VextSupply1Regu
1205 * 0x0c, VextSupply2Regu
1206 * 0x30, VextSupply3Regu
1207 * 0x40, ExtSupply2Bypass
1208 * 0x80, ExtSupply3Bypass
1209 */
1210 REG_INIT(AB9540_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
1211 /*
1212 * 0x03, Vaux1Regu
1213 * 0x0c, Vaux2Regu
1214 */
1215 REG_INIT(AB9540_VAUX12REGU, 0x04, 0x09, 0x0f),
1216 /*
1217 * 0x0c, Vrf1Regu
1218 * 0x03, Vaux3Regu
1219 */
1220 REG_INIT(AB9540_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
1221 /*
1222 * 0x3f, Vsmps1Sel1
1223 */
1224 REG_INIT(AB9540_VSMPS1SEL1, 0x04, 0x13, 0x3f),
1225 /*
1226 * 0x3f, Vsmps1Sel2
1227 */
1228 REG_INIT(AB9540_VSMPS1SEL2, 0x04, 0x14, 0x3f),
1229 /*
1230 * 0x3f, Vsmps1Sel3
1231 */
1232 REG_INIT(AB9540_VSMPS1SEL3, 0x04, 0x15, 0x3f),
1233 /*
1234 * 0x3f, Vsmps2Sel1
1235 */
1236 REG_INIT(AB9540_VSMPS2SEL1, 0x04, 0x17, 0x3f),
1237 /*
1238 * 0x3f, Vsmps2Sel2
1239 */
1240 REG_INIT(AB9540_VSMPS2SEL2, 0x04, 0x18, 0x3f),
1241 /*
1242 * 0x3f, Vsmps2Sel3
1243 */
1244 REG_INIT(AB9540_VSMPS2SEL3, 0x04, 0x19, 0x3f),
1245 /*
1246 * 0x7f, Vsmps3Sel1
1247 * NOTE! PRCMU register
1248 */
1249 REG_INIT(AB9540_VSMPS3SEL1, 0x04, 0x1b, 0x7f),
1250 /*
1251 * 0x7f, Vsmps3Sel2
1252 * NOTE! PRCMU register
1253 */
1254 REG_INIT(AB9540_VSMPS3SEL2, 0x04, 0x1c, 0x7f),
1255 /*
1256 * 0x0f, Vaux1Sel
1257 */
1258 REG_INIT(AB9540_VAUX1SEL, 0x04, 0x1f, 0x0f),
1259 /*
1260 * 0x0f, Vaux2Sel
1261 */
1262 REG_INIT(AB9540_VAUX2SEL, 0x04, 0x20, 0x0f),
1263 /*
1264 * 0x07, Vaux3Sel
1265 * 0x30, Vrf1Sel
1266 */
1267 REG_INIT(AB9540_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
1268 /*
1269 * 0x01, VextSupply12LP
1270 */
1271 REG_INIT(AB9540_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
1272 /*
1273 * 0x03, Vaux4RequestCtrl
1274 */
1275 REG_INIT(AB9540_VAUX4REQCTRL, 0x04, 0x2d, 0x03),
1276 /*
1277 * 0x03, Vaux4Regu
1278 */
1279 REG_INIT(AB9540_VAUX4REGU, 0x04, 0x2e, 0x03),
1280 /*
1281 * 0x08, Vaux4Sel
1282 */
1283 REG_INIT(AB9540_VAUX4SEL, 0x04, 0x2f, 0x0f),
1284 /*
1285 * 0x01, VpllDisch
1286 * 0x02, Vrf1Disch
1287 * 0x04, Vaux1Disch
1288 * 0x08, Vaux2Disch
1289 * 0x10, Vaux3Disch
1290 * 0x20, Vintcore12Disch
1291 * 0x40, VTVoutDisch
1292 * 0x80, VaudioDisch
1293 */
1294 REG_INIT(AB9540_REGUCTRLDISCH, 0x04, 0x43, 0xff),
1295 /*
1296 * 0x01, VsimDisch
1297 * 0x02, VanaDisch
1298 * 0x04, VdmicPullDownEna
1299 * 0x08, VpllPullDownEna
1300 * 0x10, VdmicDisch
1301 */
1302 REG_INIT(AB9540_REGUCTRLDISCH2, 0x04, 0x44, 0x1f),
1303 /*
1304 * 0x01, Vaux4Disch
1305 */
1306 REG_INIT(AB9540_REGUCTRLDISCH3, 0x04, 0x48, 0x01),
1307 };
1308
1309 static int ab8500_regulator_init_registers(struct platform_device *pdev,
1310 struct ab8500_reg_init *reg_init,
1311 int id, int mask, int value)
1312 {
1313 int err;
1314
1315 BUG_ON(value & ~mask);
1316 BUG_ON(mask & ~reg_init[id].mask);
1317
1318 /* initialize register */
1319 err = abx500_mask_and_set_register_interruptible(
1320 &pdev->dev,
1321 reg_init[id].bank,
1322 reg_init[id].addr,
1323 mask, value);
1324 if (err < 0) {
1325 dev_err(&pdev->dev,
1326 "Failed to initialize 0x%02x, 0x%02x.\n",
1327 reg_init[id].bank,
1328 reg_init[id].addr);
1329 return err;
1330 }
1331 dev_vdbg(&pdev->dev,
1332 " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
1333 reg_init[id].bank,
1334 reg_init[id].addr,
1335 mask, value);
1336
1337 return 0;
1338 }
1339
1340 static int ab8500_regulator_register(struct platform_device *pdev,
1341 struct regulator_init_data *init_data,
1342 struct ab8500_regulator_info *regulator_info,
1343 int id, struct device_node *np)
1344 {
1345 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1346 struct ab8500_regulator_info *info = NULL;
1347 struct regulator_config config = { };
1348 int err;
1349
1350 /* assign per-regulator data */
1351 info = &regulator_info[id];
1352 info->dev = &pdev->dev;
1353
1354 config.dev = &pdev->dev;
1355 config.init_data = init_data;
1356 config.driver_data = info;
1357 config.of_node = np;
1358
1359 /* fix for hardware before ab8500v2.0 */
1360 if (is_ab8500_1p1_or_earlier(ab8500)) {
1361 if (info->desc.id == AB8500_LDO_AUX3) {
1362 info->desc.n_voltages =
1363 ARRAY_SIZE(ldo_vauxn_voltages);
1364 info->desc.volt_table = ldo_vauxn_voltages;
1365 info->voltage_mask = 0xf;
1366 }
1367 }
1368
1369 /* register regulator with framework */
1370 info->regulator = regulator_register(&info->desc, &config);
1371 if (IS_ERR(info->regulator)) {
1372 err = PTR_ERR(info->regulator);
1373 dev_err(&pdev->dev, "failed to register regulator %s\n",
1374 info->desc.name);
1375 /* when we fail, un-register all earlier regulators */
1376 while (--id >= 0) {
1377 info = &regulator_info[id];
1378 regulator_unregister(info->regulator);
1379 }
1380 return err;
1381 }
1382
1383 return 0;
1384 }
1385
1386 static struct of_regulator_match ab8500_regulator_match[] = {
1387 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
1388 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
1389 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
1390 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
1391 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
1392 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
1393 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
1394 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
1395 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
1396 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
1397 };
1398
1399 static struct of_regulator_match ab9540_regulator_match[] = {
1400 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB9540_LDO_AUX1, },
1401 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB9540_LDO_AUX2, },
1402 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB9540_LDO_AUX3, },
1403 { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB9540_LDO_AUX4, },
1404 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, },
1405 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB9540_LDO_TVOUT, },
1406 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB9540_LDO_AUDIO, },
1407 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, },
1408 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, },
1409 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB9540_LDO_DMIC, },
1410 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB9540_LDO_ANA, },
1411 };
1412
1413 static int
1414 ab8500_regulator_of_probe(struct platform_device *pdev,
1415 struct ab8500_regulator_info *regulator_info,
1416 int regulator_info_size,
1417 struct of_regulator_match *match,
1418 struct device_node *np)
1419 {
1420 int err, i;
1421
1422 for (i = 0; i < regulator_info_size; i++) {
1423 err = ab8500_regulator_register(
1424 pdev, match[i].init_data, regulator_info,
1425 i, match[i].of_node);
1426 if (err)
1427 return err;
1428 }
1429
1430 return 0;
1431 }
1432
1433 static int ab8500_regulator_probe(struct platform_device *pdev)
1434 {
1435 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1436 struct device_node *np = pdev->dev.of_node;
1437 struct of_regulator_match *match;
1438 struct ab8500_platform_data *ppdata;
1439 struct ab8500_regulator_platform_data *pdata;
1440 int i, err;
1441 struct ab8500_regulator_info *regulator_info;
1442 int regulator_info_size;
1443 struct ab8500_reg_init *reg_init;
1444 int reg_init_size;
1445
1446 if (is_ab9540(ab8500)) {
1447 regulator_info = ab9540_regulator_info;
1448 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
1449 reg_init = ab9540_reg_init;
1450 reg_init_size = AB9540_NUM_REGULATOR_REGISTERS;
1451 match = ab9540_regulator_match;
1452 match_size = ARRAY_SIZE(ab9540_regulator_match)
1453 } else {
1454 regulator_info = ab8500_regulator_info;
1455 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
1456 reg_init = ab8500_reg_init;
1457 reg_init_size = AB8500_NUM_REGULATOR_REGISTERS;
1458 match = ab8500_regulator_match;
1459 match_size = ARRAY_SIZE(ab8500_regulator_match)
1460 }
1461
1462 if (np) {
1463 err = of_regulator_match(&pdev->dev, np, match, match_size);
1464 if (err < 0) {
1465 dev_err(&pdev->dev,
1466 "Error parsing regulator init data: %d\n", err);
1467 return err;
1468 }
1469
1470 err = ab8500_regulator_of_probe(pdev, regulator_info,
1471 regulator_info_size, match, np);
1472 return err;
1473 }
1474
1475 if (!ab8500) {
1476 dev_err(&pdev->dev, "null mfd parent\n");
1477 return -EINVAL;
1478 }
1479
1480 ppdata = dev_get_platdata(ab8500->dev);
1481 if (!ppdata) {
1482 dev_err(&pdev->dev, "null parent pdata\n");
1483 return -EINVAL;
1484 }
1485
1486 pdata = ppdata->regulator;
1487 if (!pdata) {
1488 dev_err(&pdev->dev, "null pdata\n");
1489 return -EINVAL;
1490 }
1491
1492 /* make sure the platform data has the correct size */
1493 if (pdata->num_regulator != regulator_info_size) {
1494 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
1495 return -EINVAL;
1496 }
1497
1498 /* initialize debug (initial state is recorded with this call) */
1499 err = ab8500_regulator_debug_init(pdev);
1500 if (err)
1501 return err;
1502
1503 /* initialize registers */
1504 for (i = 0; i < pdata->num_reg_init; i++) {
1505 int id, mask, value;
1506
1507 id = pdata->reg_init[i].id;
1508 mask = pdata->reg_init[i].mask;
1509 value = pdata->reg_init[i].value;
1510
1511 /* check for configuration errors */
1512 BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
1513
1514 err = ab8500_regulator_init_registers(pdev, reg_init, id, mask, value);
1515 if (err < 0)
1516 return err;
1517 }
1518
1519 /* register external regulators (before Vaux1, 2 and 3) */
1520 err = ab8500_ext_regulator_init(pdev);
1521 if (err)
1522 return err;
1523
1524 /* register all regulators */
1525 for (i = 0; i < regulator_info_size; i++) {
1526 err = ab8500_regulator_register(pdev, &pdata->regulator[i],
1527 regulator_info, i, NULL);
1528 if (err < 0)
1529 return err;
1530 }
1531
1532 return 0;
1533 }
1534
1535 static int ab8500_regulator_remove(struct platform_device *pdev)
1536 {
1537 int i, err;
1538 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1539 struct ab8500_regulator_info *regulator_info;
1540 int regulator_info_size;
1541
1542
1543 if (is_ab9540(ab8500)) {
1544 regulator_info = ab9540_regulator_info;
1545 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
1546 } else {
1547 regulator_info = ab8500_regulator_info;
1548 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
1549 }
1550
1551 for (i = 0; i < regulator_info_size; i++) {
1552 struct ab8500_regulator_info *info = NULL;
1553 info = &regulator_info[i];
1554
1555 dev_vdbg(rdev_get_dev(info->regulator),
1556 "%s-remove\n", info->desc.name);
1557
1558 regulator_unregister(info->regulator);
1559 }
1560
1561 /* remove external regulators (after Vaux1, 2 and 3) */
1562 err = ab8500_ext_regulator_exit(pdev);
1563 if (err)
1564 return err;
1565
1566 /* remove regulator debug */
1567 err = ab8500_regulator_debug_exit(pdev);
1568 if (err)
1569 return err;
1570
1571 return 0;
1572 }
1573
1574 static struct platform_driver ab8500_regulator_driver = {
1575 .probe = ab8500_regulator_probe,
1576 .remove = ab8500_regulator_remove,
1577 .driver = {
1578 .name = "ab8500-regulator",
1579 .owner = THIS_MODULE,
1580 },
1581 };
1582
1583 static int __init ab8500_regulator_init(void)
1584 {
1585 int ret;
1586
1587 ret = platform_driver_register(&ab8500_regulator_driver);
1588 if (ret != 0)
1589 pr_err("Failed to register ab8500 regulator: %d\n", ret);
1590
1591 return ret;
1592 }
1593 subsys_initcall(ab8500_regulator_init);
1594
1595 static void __exit ab8500_regulator_exit(void)
1596 {
1597 platform_driver_unregister(&ab8500_regulator_driver);
1598 }
1599 module_exit(ab8500_regulator_exit);
1600
1601 MODULE_LICENSE("GPL v2");
1602 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
1603 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
1604 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1605 MODULE_ALIAS("platform:ab8500-regulator");
Linux kernel - Deliverables
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