RTC: Cleanup rtc_class_ops->update_irq_enable()
[deliverable/linux.git] / drivers / rtc / rtc-cmos.c
1 /*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
3 *
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 /*
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
20 *
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
26 *
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
30 */
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
38 #include <linux/log2.h>
39 #include <linux/pm.h>
40
41 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
42 #include <asm-generic/rtc.h>
43
44 struct cmos_rtc {
45 struct rtc_device *rtc;
46 struct device *dev;
47 int irq;
48 struct resource *iomem;
49
50 void (*wake_on)(struct device *);
51 void (*wake_off)(struct device *);
52
53 u8 enabled_wake;
54 u8 suspend_ctrl;
55
56 /* newer hardware extends the original register set */
57 u8 day_alrm;
58 u8 mon_alrm;
59 u8 century;
60 };
61
62 /* both platform and pnp busses use negative numbers for invalid irqs */
63 #define is_valid_irq(n) ((n) > 0)
64
65 static const char driver_name[] = "rtc_cmos";
66
67 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
68 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
69 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
70 */
71 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
72
73 static inline int is_intr(u8 rtc_intr)
74 {
75 if (!(rtc_intr & RTC_IRQF))
76 return 0;
77 return rtc_intr & RTC_IRQMASK;
78 }
79
80 /*----------------------------------------------------------------*/
81
82 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
83 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
84 * used in a broken "legacy replacement" mode. The breakage includes
85 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
86 * other (better) use.
87 *
88 * When that broken mode is in use, platform glue provides a partial
89 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
90 * want to use HPET for anything except those IRQs though...
91 */
92 #ifdef CONFIG_HPET_EMULATE_RTC
93 #include <asm/hpet.h>
94 #else
95
96 static inline int is_hpet_enabled(void)
97 {
98 return 0;
99 }
100
101 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
102 {
103 return 0;
104 }
105
106 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
107 {
108 return 0;
109 }
110
111 static inline int
112 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
113 {
114 return 0;
115 }
116
117 static inline int hpet_set_periodic_freq(unsigned long freq)
118 {
119 return 0;
120 }
121
122 static inline int hpet_rtc_dropped_irq(void)
123 {
124 return 0;
125 }
126
127 static inline int hpet_rtc_timer_init(void)
128 {
129 return 0;
130 }
131
132 extern irq_handler_t hpet_rtc_interrupt;
133
134 static inline int hpet_register_irq_handler(irq_handler_t handler)
135 {
136 return 0;
137 }
138
139 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
140 {
141 return 0;
142 }
143
144 #endif
145
146 /*----------------------------------------------------------------*/
147
148 #ifdef RTC_PORT
149
150 /* Most newer x86 systems have two register banks, the first used
151 * for RTC and NVRAM and the second only for NVRAM. Caller must
152 * own rtc_lock ... and we won't worry about access during NMI.
153 */
154 #define can_bank2 true
155
156 static inline unsigned char cmos_read_bank2(unsigned char addr)
157 {
158 outb(addr, RTC_PORT(2));
159 return inb(RTC_PORT(3));
160 }
161
162 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
163 {
164 outb(addr, RTC_PORT(2));
165 outb(val, RTC_PORT(2));
166 }
167
168 #else
169
170 #define can_bank2 false
171
172 static inline unsigned char cmos_read_bank2(unsigned char addr)
173 {
174 return 0;
175 }
176
177 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
178 {
179 }
180
181 #endif
182
183 /*----------------------------------------------------------------*/
184
185 static int cmos_read_time(struct device *dev, struct rtc_time *t)
186 {
187 /* REVISIT: if the clock has a "century" register, use
188 * that instead of the heuristic in get_rtc_time().
189 * That'll make Y3K compatility (year > 2070) easy!
190 */
191 get_rtc_time(t);
192 return 0;
193 }
194
195 static int cmos_set_time(struct device *dev, struct rtc_time *t)
196 {
197 /* REVISIT: set the "century" register if available
198 *
199 * NOTE: this ignores the issue whereby updating the seconds
200 * takes effect exactly 500ms after we write the register.
201 * (Also queueing and other delays before we get this far.)
202 */
203 return set_rtc_time(t);
204 }
205
206 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
207 {
208 struct cmos_rtc *cmos = dev_get_drvdata(dev);
209 unsigned char rtc_control;
210
211 if (!is_valid_irq(cmos->irq))
212 return -EIO;
213
214 /* Basic alarms only support hour, minute, and seconds fields.
215 * Some also support day and month, for alarms up to a year in
216 * the future.
217 */
218 t->time.tm_mday = -1;
219 t->time.tm_mon = -1;
220
221 spin_lock_irq(&rtc_lock);
222 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
223 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
224 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
225
226 if (cmos->day_alrm) {
227 /* ignore upper bits on readback per ACPI spec */
228 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
229 if (!t->time.tm_mday)
230 t->time.tm_mday = -1;
231
232 if (cmos->mon_alrm) {
233 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
234 if (!t->time.tm_mon)
235 t->time.tm_mon = -1;
236 }
237 }
238
239 rtc_control = CMOS_READ(RTC_CONTROL);
240 spin_unlock_irq(&rtc_lock);
241
242 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
243 if (((unsigned)t->time.tm_sec) < 0x60)
244 t->time.tm_sec = bcd2bin(t->time.tm_sec);
245 else
246 t->time.tm_sec = -1;
247 if (((unsigned)t->time.tm_min) < 0x60)
248 t->time.tm_min = bcd2bin(t->time.tm_min);
249 else
250 t->time.tm_min = -1;
251 if (((unsigned)t->time.tm_hour) < 0x24)
252 t->time.tm_hour = bcd2bin(t->time.tm_hour);
253 else
254 t->time.tm_hour = -1;
255
256 if (cmos->day_alrm) {
257 if (((unsigned)t->time.tm_mday) <= 0x31)
258 t->time.tm_mday = bcd2bin(t->time.tm_mday);
259 else
260 t->time.tm_mday = -1;
261
262 if (cmos->mon_alrm) {
263 if (((unsigned)t->time.tm_mon) <= 0x12)
264 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
265 else
266 t->time.tm_mon = -1;
267 }
268 }
269 }
270 t->time.tm_year = -1;
271
272 t->enabled = !!(rtc_control & RTC_AIE);
273 t->pending = 0;
274
275 return 0;
276 }
277
278 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
279 {
280 unsigned char rtc_intr;
281
282 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
283 * allegedly some older rtcs need that to handle irqs properly
284 */
285 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
286
287 if (is_hpet_enabled())
288 return;
289
290 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
291 if (is_intr(rtc_intr))
292 rtc_update_irq(cmos->rtc, 1, rtc_intr);
293 }
294
295 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
296 {
297 unsigned char rtc_control;
298
299 /* flush any pending IRQ status, notably for update irqs,
300 * before we enable new IRQs
301 */
302 rtc_control = CMOS_READ(RTC_CONTROL);
303 cmos_checkintr(cmos, rtc_control);
304
305 rtc_control |= mask;
306 CMOS_WRITE(rtc_control, RTC_CONTROL);
307 hpet_set_rtc_irq_bit(mask);
308
309 cmos_checkintr(cmos, rtc_control);
310 }
311
312 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
313 {
314 unsigned char rtc_control;
315
316 rtc_control = CMOS_READ(RTC_CONTROL);
317 rtc_control &= ~mask;
318 CMOS_WRITE(rtc_control, RTC_CONTROL);
319 hpet_mask_rtc_irq_bit(mask);
320
321 cmos_checkintr(cmos, rtc_control);
322 }
323
324 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
325 {
326 struct cmos_rtc *cmos = dev_get_drvdata(dev);
327 unsigned char mon, mday, hrs, min, sec, rtc_control;
328
329 if (!is_valid_irq(cmos->irq))
330 return -EIO;
331
332 mon = t->time.tm_mon + 1;
333 mday = t->time.tm_mday;
334 hrs = t->time.tm_hour;
335 min = t->time.tm_min;
336 sec = t->time.tm_sec;
337
338 rtc_control = CMOS_READ(RTC_CONTROL);
339 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
340 /* Writing 0xff means "don't care" or "match all". */
341 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
342 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
343 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
344 min = (min < 60) ? bin2bcd(min) : 0xff;
345 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
346 }
347
348 spin_lock_irq(&rtc_lock);
349
350 /* next rtc irq must not be from previous alarm setting */
351 cmos_irq_disable(cmos, RTC_AIE);
352
353 /* update alarm */
354 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
355 CMOS_WRITE(min, RTC_MINUTES_ALARM);
356 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
357
358 /* the system may support an "enhanced" alarm */
359 if (cmos->day_alrm) {
360 CMOS_WRITE(mday, cmos->day_alrm);
361 if (cmos->mon_alrm)
362 CMOS_WRITE(mon, cmos->mon_alrm);
363 }
364
365 /* FIXME the HPET alarm glue currently ignores day_alrm
366 * and mon_alrm ...
367 */
368 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
369
370 if (t->enabled)
371 cmos_irq_enable(cmos, RTC_AIE);
372
373 spin_unlock_irq(&rtc_lock);
374
375 return 0;
376 }
377
378 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
379 {
380 struct cmos_rtc *cmos = dev_get_drvdata(dev);
381 unsigned long flags;
382
383 if (!is_valid_irq(cmos->irq))
384 return -EINVAL;
385
386 spin_lock_irqsave(&rtc_lock, flags);
387
388 if (enabled)
389 cmos_irq_enable(cmos, RTC_AIE);
390 else
391 cmos_irq_disable(cmos, RTC_AIE);
392
393 spin_unlock_irqrestore(&rtc_lock, flags);
394 return 0;
395 }
396
397 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
398
399 static int cmos_procfs(struct device *dev, struct seq_file *seq)
400 {
401 struct cmos_rtc *cmos = dev_get_drvdata(dev);
402 unsigned char rtc_control, valid;
403
404 spin_lock_irq(&rtc_lock);
405 rtc_control = CMOS_READ(RTC_CONTROL);
406 valid = CMOS_READ(RTC_VALID);
407 spin_unlock_irq(&rtc_lock);
408
409 /* NOTE: at least ICH6 reports battery status using a different
410 * (non-RTC) bit; and SQWE is ignored on many current systems.
411 */
412 return seq_printf(seq,
413 "periodic_IRQ\t: %s\n"
414 "update_IRQ\t: %s\n"
415 "HPET_emulated\t: %s\n"
416 // "square_wave\t: %s\n"
417 "BCD\t\t: %s\n"
418 "DST_enable\t: %s\n"
419 "periodic_freq\t: %d\n"
420 "batt_status\t: %s\n",
421 (rtc_control & RTC_PIE) ? "yes" : "no",
422 (rtc_control & RTC_UIE) ? "yes" : "no",
423 is_hpet_enabled() ? "yes" : "no",
424 // (rtc_control & RTC_SQWE) ? "yes" : "no",
425 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
426 (rtc_control & RTC_DST_EN) ? "yes" : "no",
427 cmos->rtc->irq_freq,
428 (valid & RTC_VRT) ? "okay" : "dead");
429 }
430
431 #else
432 #define cmos_procfs NULL
433 #endif
434
435 static const struct rtc_class_ops cmos_rtc_ops = {
436 .read_time = cmos_read_time,
437 .set_time = cmos_set_time,
438 .read_alarm = cmos_read_alarm,
439 .set_alarm = cmos_set_alarm,
440 .proc = cmos_procfs,
441 .alarm_irq_enable = cmos_alarm_irq_enable,
442 };
443
444 /*----------------------------------------------------------------*/
445
446 /*
447 * All these chips have at least 64 bytes of address space, shared by
448 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
449 * by boot firmware. Modern chips have 128 or 256 bytes.
450 */
451
452 #define NVRAM_OFFSET (RTC_REG_D + 1)
453
454 static ssize_t
455 cmos_nvram_read(struct file *filp, struct kobject *kobj,
456 struct bin_attribute *attr,
457 char *buf, loff_t off, size_t count)
458 {
459 int retval;
460
461 if (unlikely(off >= attr->size))
462 return 0;
463 if (unlikely(off < 0))
464 return -EINVAL;
465 if ((off + count) > attr->size)
466 count = attr->size - off;
467
468 off += NVRAM_OFFSET;
469 spin_lock_irq(&rtc_lock);
470 for (retval = 0; count; count--, off++, retval++) {
471 if (off < 128)
472 *buf++ = CMOS_READ(off);
473 else if (can_bank2)
474 *buf++ = cmos_read_bank2(off);
475 else
476 break;
477 }
478 spin_unlock_irq(&rtc_lock);
479
480 return retval;
481 }
482
483 static ssize_t
484 cmos_nvram_write(struct file *filp, struct kobject *kobj,
485 struct bin_attribute *attr,
486 char *buf, loff_t off, size_t count)
487 {
488 struct cmos_rtc *cmos;
489 int retval;
490
491 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
492 if (unlikely(off >= attr->size))
493 return -EFBIG;
494 if (unlikely(off < 0))
495 return -EINVAL;
496 if ((off + count) > attr->size)
497 count = attr->size - off;
498
499 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
500 * checksum on part of the NVRAM data. That's currently ignored
501 * here. If userspace is smart enough to know what fields of
502 * NVRAM to update, updating checksums is also part of its job.
503 */
504 off += NVRAM_OFFSET;
505 spin_lock_irq(&rtc_lock);
506 for (retval = 0; count; count--, off++, retval++) {
507 /* don't trash RTC registers */
508 if (off == cmos->day_alrm
509 || off == cmos->mon_alrm
510 || off == cmos->century)
511 buf++;
512 else if (off < 128)
513 CMOS_WRITE(*buf++, off);
514 else if (can_bank2)
515 cmos_write_bank2(*buf++, off);
516 else
517 break;
518 }
519 spin_unlock_irq(&rtc_lock);
520
521 return retval;
522 }
523
524 static struct bin_attribute nvram = {
525 .attr = {
526 .name = "nvram",
527 .mode = S_IRUGO | S_IWUSR,
528 },
529
530 .read = cmos_nvram_read,
531 .write = cmos_nvram_write,
532 /* size gets set up later */
533 };
534
535 /*----------------------------------------------------------------*/
536
537 static struct cmos_rtc cmos_rtc;
538
539 static irqreturn_t cmos_interrupt(int irq, void *p)
540 {
541 u8 irqstat;
542 u8 rtc_control;
543
544 spin_lock(&rtc_lock);
545
546 /* When the HPET interrupt handler calls us, the interrupt
547 * status is passed as arg1 instead of the irq number. But
548 * always clear irq status, even when HPET is in the way.
549 *
550 * Note that HPET and RTC are almost certainly out of phase,
551 * giving different IRQ status ...
552 */
553 irqstat = CMOS_READ(RTC_INTR_FLAGS);
554 rtc_control = CMOS_READ(RTC_CONTROL);
555 if (is_hpet_enabled())
556 irqstat = (unsigned long)irq & 0xF0;
557 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
558
559 /* All Linux RTC alarms should be treated as if they were oneshot.
560 * Similar code may be needed in system wakeup paths, in case the
561 * alarm woke the system.
562 */
563 if (irqstat & RTC_AIE) {
564 rtc_control &= ~RTC_AIE;
565 CMOS_WRITE(rtc_control, RTC_CONTROL);
566 hpet_mask_rtc_irq_bit(RTC_AIE);
567
568 CMOS_READ(RTC_INTR_FLAGS);
569 }
570 spin_unlock(&rtc_lock);
571
572 if (is_intr(irqstat)) {
573 rtc_update_irq(p, 1, irqstat);
574 return IRQ_HANDLED;
575 } else
576 return IRQ_NONE;
577 }
578
579 #ifdef CONFIG_PNP
580 #define INITSECTION
581
582 #else
583 #define INITSECTION __init
584 #endif
585
586 static int INITSECTION
587 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
588 {
589 struct cmos_rtc_board_info *info = dev->platform_data;
590 int retval = 0;
591 unsigned char rtc_control;
592 unsigned address_space;
593
594 /* there can be only one ... */
595 if (cmos_rtc.dev)
596 return -EBUSY;
597
598 if (!ports)
599 return -ENODEV;
600
601 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
602 *
603 * REVISIT non-x86 systems may instead use memory space resources
604 * (needing ioremap etc), not i/o space resources like this ...
605 */
606 ports = request_region(ports->start,
607 ports->end + 1 - ports->start,
608 driver_name);
609 if (!ports) {
610 dev_dbg(dev, "i/o registers already in use\n");
611 return -EBUSY;
612 }
613
614 cmos_rtc.irq = rtc_irq;
615 cmos_rtc.iomem = ports;
616
617 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
618 * driver did, but don't reject unknown configs. Old hardware
619 * won't address 128 bytes. Newer chips have multiple banks,
620 * though they may not be listed in one I/O resource.
621 */
622 #if defined(CONFIG_ATARI)
623 address_space = 64;
624 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
625 || defined(__sparc__) || defined(__mips__) \
626 || defined(__powerpc__)
627 address_space = 128;
628 #else
629 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
630 address_space = 128;
631 #endif
632 if (can_bank2 && ports->end > (ports->start + 1))
633 address_space = 256;
634
635 /* For ACPI systems extension info comes from the FADT. On others,
636 * board specific setup provides it as appropriate. Systems where
637 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
638 * some almost-clones) can provide hooks to make that behave.
639 *
640 * Note that ACPI doesn't preclude putting these registers into
641 * "extended" areas of the chip, including some that we won't yet
642 * expect CMOS_READ and friends to handle.
643 */
644 if (info) {
645 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
646 cmos_rtc.day_alrm = info->rtc_day_alarm;
647 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
648 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
649 if (info->rtc_century && info->rtc_century < 128)
650 cmos_rtc.century = info->rtc_century;
651
652 if (info->wake_on && info->wake_off) {
653 cmos_rtc.wake_on = info->wake_on;
654 cmos_rtc.wake_off = info->wake_off;
655 }
656 }
657
658 cmos_rtc.dev = dev;
659 dev_set_drvdata(dev, &cmos_rtc);
660
661 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
662 &cmos_rtc_ops, THIS_MODULE);
663 if (IS_ERR(cmos_rtc.rtc)) {
664 retval = PTR_ERR(cmos_rtc.rtc);
665 goto cleanup0;
666 }
667
668 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
669
670 spin_lock_irq(&rtc_lock);
671
672 /* force periodic irq to CMOS reset default of 1024Hz;
673 *
674 * REVISIT it's been reported that at least one x86_64 ALI mobo
675 * doesn't use 32KHz here ... for portability we might need to
676 * do something about other clock frequencies.
677 */
678 cmos_rtc.rtc->irq_freq = 1024;
679 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
680 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
681
682 /* disable irqs */
683 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
684
685 rtc_control = CMOS_READ(RTC_CONTROL);
686
687 spin_unlock_irq(&rtc_lock);
688
689 /* FIXME:
690 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
691 */
692 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
693 dev_warn(dev, "only 24-hr supported\n");
694 retval = -ENXIO;
695 goto cleanup1;
696 }
697
698 if (is_valid_irq(rtc_irq)) {
699 irq_handler_t rtc_cmos_int_handler;
700
701 if (is_hpet_enabled()) {
702 int err;
703
704 rtc_cmos_int_handler = hpet_rtc_interrupt;
705 err = hpet_register_irq_handler(cmos_interrupt);
706 if (err != 0) {
707 printk(KERN_WARNING "hpet_register_irq_handler "
708 " failed in rtc_init().");
709 goto cleanup1;
710 }
711 } else
712 rtc_cmos_int_handler = cmos_interrupt;
713
714 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
715 IRQF_DISABLED, dev_name(&cmos_rtc.rtc->dev),
716 cmos_rtc.rtc);
717 if (retval < 0) {
718 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
719 goto cleanup1;
720 }
721 }
722 hpet_rtc_timer_init();
723
724 /* export at least the first block of NVRAM */
725 nvram.size = address_space - NVRAM_OFFSET;
726 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
727 if (retval < 0) {
728 dev_dbg(dev, "can't create nvram file? %d\n", retval);
729 goto cleanup2;
730 }
731
732 pr_info("%s: %s%s, %zd bytes nvram%s\n",
733 dev_name(&cmos_rtc.rtc->dev),
734 !is_valid_irq(rtc_irq) ? "no alarms" :
735 cmos_rtc.mon_alrm ? "alarms up to one year" :
736 cmos_rtc.day_alrm ? "alarms up to one month" :
737 "alarms up to one day",
738 cmos_rtc.century ? ", y3k" : "",
739 nvram.size,
740 is_hpet_enabled() ? ", hpet irqs" : "");
741
742 return 0;
743
744 cleanup2:
745 if (is_valid_irq(rtc_irq))
746 free_irq(rtc_irq, cmos_rtc.rtc);
747 cleanup1:
748 cmos_rtc.dev = NULL;
749 rtc_device_unregister(cmos_rtc.rtc);
750 cleanup0:
751 release_region(ports->start, ports->end + 1 - ports->start);
752 return retval;
753 }
754
755 static void cmos_do_shutdown(void)
756 {
757 spin_lock_irq(&rtc_lock);
758 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
759 spin_unlock_irq(&rtc_lock);
760 }
761
762 static void __exit cmos_do_remove(struct device *dev)
763 {
764 struct cmos_rtc *cmos = dev_get_drvdata(dev);
765 struct resource *ports;
766
767 cmos_do_shutdown();
768
769 sysfs_remove_bin_file(&dev->kobj, &nvram);
770
771 if (is_valid_irq(cmos->irq)) {
772 free_irq(cmos->irq, cmos->rtc);
773 hpet_unregister_irq_handler(cmos_interrupt);
774 }
775
776 rtc_device_unregister(cmos->rtc);
777 cmos->rtc = NULL;
778
779 ports = cmos->iomem;
780 release_region(ports->start, ports->end + 1 - ports->start);
781 cmos->iomem = NULL;
782
783 cmos->dev = NULL;
784 dev_set_drvdata(dev, NULL);
785 }
786
787 #ifdef CONFIG_PM
788
789 static int cmos_suspend(struct device *dev)
790 {
791 struct cmos_rtc *cmos = dev_get_drvdata(dev);
792 unsigned char tmp;
793
794 /* only the alarm might be a wakeup event source */
795 spin_lock_irq(&rtc_lock);
796 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
797 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
798 unsigned char mask;
799
800 if (device_may_wakeup(dev))
801 mask = RTC_IRQMASK & ~RTC_AIE;
802 else
803 mask = RTC_IRQMASK;
804 tmp &= ~mask;
805 CMOS_WRITE(tmp, RTC_CONTROL);
806
807 /* shut down hpet emulation - we don't need it for alarm */
808 hpet_mask_rtc_irq_bit(RTC_PIE|RTC_AIE|RTC_UIE);
809 cmos_checkintr(cmos, tmp);
810 }
811 spin_unlock_irq(&rtc_lock);
812
813 if (tmp & RTC_AIE) {
814 cmos->enabled_wake = 1;
815 if (cmos->wake_on)
816 cmos->wake_on(dev);
817 else
818 enable_irq_wake(cmos->irq);
819 }
820
821 pr_debug("%s: suspend%s, ctrl %02x\n",
822 dev_name(&cmos_rtc.rtc->dev),
823 (tmp & RTC_AIE) ? ", alarm may wake" : "",
824 tmp);
825
826 return 0;
827 }
828
829 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
830 * after a detour through G3 "mechanical off", although the ACPI spec
831 * says wakeup should only work from G1/S4 "hibernate". To most users,
832 * distinctions between S4 and S5 are pointless. So when the hardware
833 * allows, don't draw that distinction.
834 */
835 static inline int cmos_poweroff(struct device *dev)
836 {
837 return cmos_suspend(dev);
838 }
839
840 static int cmos_resume(struct device *dev)
841 {
842 struct cmos_rtc *cmos = dev_get_drvdata(dev);
843 unsigned char tmp = cmos->suspend_ctrl;
844
845 /* re-enable any irqs previously active */
846 if (tmp & RTC_IRQMASK) {
847 unsigned char mask;
848
849 if (cmos->enabled_wake) {
850 if (cmos->wake_off)
851 cmos->wake_off(dev);
852 else
853 disable_irq_wake(cmos->irq);
854 cmos->enabled_wake = 0;
855 }
856
857 spin_lock_irq(&rtc_lock);
858 do {
859 CMOS_WRITE(tmp, RTC_CONTROL);
860 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
861
862 mask = CMOS_READ(RTC_INTR_FLAGS);
863 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
864 if (!is_hpet_enabled() || !is_intr(mask))
865 break;
866
867 /* force one-shot behavior if HPET blocked
868 * the wake alarm's irq
869 */
870 rtc_update_irq(cmos->rtc, 1, mask);
871 tmp &= ~RTC_AIE;
872 hpet_mask_rtc_irq_bit(RTC_AIE);
873 } while (mask & RTC_AIE);
874 spin_unlock_irq(&rtc_lock);
875 }
876
877 pr_debug("%s: resume, ctrl %02x\n",
878 dev_name(&cmos_rtc.rtc->dev),
879 tmp);
880
881 return 0;
882 }
883
884 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
885
886 #else
887
888 static inline int cmos_poweroff(struct device *dev)
889 {
890 return -ENOSYS;
891 }
892
893 #endif
894
895 /*----------------------------------------------------------------*/
896
897 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
898 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
899 * probably list them in similar PNPBIOS tables; so PNP is more common.
900 *
901 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
902 * predate even PNPBIOS should set up platform_bus devices.
903 */
904
905 #ifdef CONFIG_ACPI
906
907 #include <linux/acpi.h>
908
909 static u32 rtc_handler(void *context)
910 {
911 acpi_clear_event(ACPI_EVENT_RTC);
912 acpi_disable_event(ACPI_EVENT_RTC, 0);
913 return ACPI_INTERRUPT_HANDLED;
914 }
915
916 static inline void rtc_wake_setup(void)
917 {
918 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);
919 /*
920 * After the RTC handler is installed, the Fixed_RTC event should
921 * be disabled. Only when the RTC alarm is set will it be enabled.
922 */
923 acpi_clear_event(ACPI_EVENT_RTC);
924 acpi_disable_event(ACPI_EVENT_RTC, 0);
925 }
926
927 static void rtc_wake_on(struct device *dev)
928 {
929 acpi_clear_event(ACPI_EVENT_RTC);
930 acpi_enable_event(ACPI_EVENT_RTC, 0);
931 }
932
933 static void rtc_wake_off(struct device *dev)
934 {
935 acpi_disable_event(ACPI_EVENT_RTC, 0);
936 }
937
938 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
939 * its device node and pass extra config data. This helps its driver use
940 * capabilities that the now-obsolete mc146818 didn't have, and informs it
941 * that this board's RTC is wakeup-capable (per ACPI spec).
942 */
943 static struct cmos_rtc_board_info acpi_rtc_info;
944
945 static void __devinit
946 cmos_wake_setup(struct device *dev)
947 {
948 if (acpi_disabled)
949 return;
950
951 rtc_wake_setup();
952 acpi_rtc_info.wake_on = rtc_wake_on;
953 acpi_rtc_info.wake_off = rtc_wake_off;
954
955 /* workaround bug in some ACPI tables */
956 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
957 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
958 acpi_gbl_FADT.month_alarm);
959 acpi_gbl_FADT.month_alarm = 0;
960 }
961
962 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
963 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
964 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
965
966 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
967 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
968 dev_info(dev, "RTC can wake from S4\n");
969
970 dev->platform_data = &acpi_rtc_info;
971
972 /* RTC always wakes from S1/S2/S3, and often S4/STD */
973 device_init_wakeup(dev, 1);
974 }
975
976 #else
977
978 static void __devinit
979 cmos_wake_setup(struct device *dev)
980 {
981 }
982
983 #endif
984
985 #ifdef CONFIG_PNP
986
987 #include <linux/pnp.h>
988
989 static int __devinit
990 cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
991 {
992 cmos_wake_setup(&pnp->dev);
993
994 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
995 /* Some machines contain a PNP entry for the RTC, but
996 * don't define the IRQ. It should always be safe to
997 * hardcode it in these cases
998 */
999 return cmos_do_probe(&pnp->dev,
1000 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1001 else
1002 return cmos_do_probe(&pnp->dev,
1003 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1004 pnp_irq(pnp, 0));
1005 }
1006
1007 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1008 {
1009 cmos_do_remove(&pnp->dev);
1010 }
1011
1012 #ifdef CONFIG_PM
1013
1014 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1015 {
1016 return cmos_suspend(&pnp->dev);
1017 }
1018
1019 static int cmos_pnp_resume(struct pnp_dev *pnp)
1020 {
1021 return cmos_resume(&pnp->dev);
1022 }
1023
1024 #else
1025 #define cmos_pnp_suspend NULL
1026 #define cmos_pnp_resume NULL
1027 #endif
1028
1029 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1030 {
1031 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1032 return;
1033
1034 cmos_do_shutdown();
1035 }
1036
1037 static const struct pnp_device_id rtc_ids[] = {
1038 { .id = "PNP0b00", },
1039 { .id = "PNP0b01", },
1040 { .id = "PNP0b02", },
1041 { },
1042 };
1043 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1044
1045 static struct pnp_driver cmos_pnp_driver = {
1046 .name = (char *) driver_name,
1047 .id_table = rtc_ids,
1048 .probe = cmos_pnp_probe,
1049 .remove = __exit_p(cmos_pnp_remove),
1050 .shutdown = cmos_pnp_shutdown,
1051
1052 /* flag ensures resume() gets called, and stops syslog spam */
1053 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1054 .suspend = cmos_pnp_suspend,
1055 .resume = cmos_pnp_resume,
1056 };
1057
1058 #endif /* CONFIG_PNP */
1059
1060 /*----------------------------------------------------------------*/
1061
1062 /* Platform setup should have set up an RTC device, when PNP is
1063 * unavailable ... this could happen even on (older) PCs.
1064 */
1065
1066 static int __init cmos_platform_probe(struct platform_device *pdev)
1067 {
1068 cmos_wake_setup(&pdev->dev);
1069 return cmos_do_probe(&pdev->dev,
1070 platform_get_resource(pdev, IORESOURCE_IO, 0),
1071 platform_get_irq(pdev, 0));
1072 }
1073
1074 static int __exit cmos_platform_remove(struct platform_device *pdev)
1075 {
1076 cmos_do_remove(&pdev->dev);
1077 return 0;
1078 }
1079
1080 static void cmos_platform_shutdown(struct platform_device *pdev)
1081 {
1082 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1083 return;
1084
1085 cmos_do_shutdown();
1086 }
1087
1088 /* work with hotplug and coldplug */
1089 MODULE_ALIAS("platform:rtc_cmos");
1090
1091 static struct platform_driver cmos_platform_driver = {
1092 .remove = __exit_p(cmos_platform_remove),
1093 .shutdown = cmos_platform_shutdown,
1094 .driver = {
1095 .name = (char *) driver_name,
1096 #ifdef CONFIG_PM
1097 .pm = &cmos_pm_ops,
1098 #endif
1099 }
1100 };
1101
1102 #ifdef CONFIG_PNP
1103 static bool pnp_driver_registered;
1104 #endif
1105 static bool platform_driver_registered;
1106
1107 static int __init cmos_init(void)
1108 {
1109 int retval = 0;
1110
1111 #ifdef CONFIG_PNP
1112 retval = pnp_register_driver(&cmos_pnp_driver);
1113 if (retval == 0)
1114 pnp_driver_registered = true;
1115 #endif
1116
1117 if (!cmos_rtc.dev) {
1118 retval = platform_driver_probe(&cmos_platform_driver,
1119 cmos_platform_probe);
1120 if (retval == 0)
1121 platform_driver_registered = true;
1122 }
1123
1124 if (retval == 0)
1125 return 0;
1126
1127 #ifdef CONFIG_PNP
1128 if (pnp_driver_registered)
1129 pnp_unregister_driver(&cmos_pnp_driver);
1130 #endif
1131 return retval;
1132 }
1133 module_init(cmos_init);
1134
1135 static void __exit cmos_exit(void)
1136 {
1137 #ifdef CONFIG_PNP
1138 if (pnp_driver_registered)
1139 pnp_unregister_driver(&cmos_pnp_driver);
1140 #endif
1141 if (platform_driver_registered)
1142 platform_driver_unregister(&cmos_platform_driver);
1143 }
1144 module_exit(cmos_exit);
1145
1146
1147 MODULE_AUTHOR("David Brownell");
1148 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1149 MODULE_LICENSE("GPL");
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