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rtc: omap: add structured device-type info
[deliverable/linux.git] / drivers / rtc / rtc-omap.c
1 /*
2 * TI OMAP1 Real Time Clock interface for Linux
3 *
4 * Copyright (C) 2003 MontaVista Software, Inc.
5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
6 *
7 * Copyright (C) 2006 David Brownell (new RTC framework)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/ioport.h>
19 #include <linux/delay.h>
20 #include <linux/rtc.h>
21 #include <linux/bcd.h>
22 #include <linux/platform_device.h>
23 #include <linux/of.h>
24 #include <linux/of_device.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/io.h>
27
28 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
29 * with century-range alarm matching, driven by the 32kHz clock.
30 *
31 * The main user-visible ways it differs from PC RTCs are by omitting
32 * "don't care" alarm fields and sub-second periodic IRQs, and having
33 * an autoadjust mechanism to calibrate to the true oscillator rate.
34 *
35 * Board-specific wiring options include using split power mode with
36 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
37 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
38 * low power modes) for OMAP1 boards (OMAP-L138 has this built into
39 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
40 */
41
42 /* RTC registers */
43 #define OMAP_RTC_SECONDS_REG 0x00
44 #define OMAP_RTC_MINUTES_REG 0x04
45 #define OMAP_RTC_HOURS_REG 0x08
46 #define OMAP_RTC_DAYS_REG 0x0C
47 #define OMAP_RTC_MONTHS_REG 0x10
48 #define OMAP_RTC_YEARS_REG 0x14
49 #define OMAP_RTC_WEEKS_REG 0x18
50
51 #define OMAP_RTC_ALARM_SECONDS_REG 0x20
52 #define OMAP_RTC_ALARM_MINUTES_REG 0x24
53 #define OMAP_RTC_ALARM_HOURS_REG 0x28
54 #define OMAP_RTC_ALARM_DAYS_REG 0x2c
55 #define OMAP_RTC_ALARM_MONTHS_REG 0x30
56 #define OMAP_RTC_ALARM_YEARS_REG 0x34
57
58 #define OMAP_RTC_CTRL_REG 0x40
59 #define OMAP_RTC_STATUS_REG 0x44
60 #define OMAP_RTC_INTERRUPTS_REG 0x48
61
62 #define OMAP_RTC_COMP_LSB_REG 0x4c
63 #define OMAP_RTC_COMP_MSB_REG 0x50
64 #define OMAP_RTC_OSC_REG 0x54
65
66 #define OMAP_RTC_KICK0_REG 0x6c
67 #define OMAP_RTC_KICK1_REG 0x70
68
69 #define OMAP_RTC_IRQWAKEEN 0x7c
70
71 /* OMAP_RTC_CTRL_REG bit fields: */
72 #define OMAP_RTC_CTRL_SPLIT BIT(7)
73 #define OMAP_RTC_CTRL_DISABLE BIT(6)
74 #define OMAP_RTC_CTRL_SET_32_COUNTER BIT(5)
75 #define OMAP_RTC_CTRL_TEST BIT(4)
76 #define OMAP_RTC_CTRL_MODE_12_24 BIT(3)
77 #define OMAP_RTC_CTRL_AUTO_COMP BIT(2)
78 #define OMAP_RTC_CTRL_ROUND_30S BIT(1)
79 #define OMAP_RTC_CTRL_STOP BIT(0)
80
81 /* OMAP_RTC_STATUS_REG bit fields: */
82 #define OMAP_RTC_STATUS_POWER_UP BIT(7)
83 #define OMAP_RTC_STATUS_ALARM BIT(6)
84 #define OMAP_RTC_STATUS_1D_EVENT BIT(5)
85 #define OMAP_RTC_STATUS_1H_EVENT BIT(4)
86 #define OMAP_RTC_STATUS_1M_EVENT BIT(3)
87 #define OMAP_RTC_STATUS_1S_EVENT BIT(2)
88 #define OMAP_RTC_STATUS_RUN BIT(1)
89 #define OMAP_RTC_STATUS_BUSY BIT(0)
90
91 /* OMAP_RTC_INTERRUPTS_REG bit fields: */
92 #define OMAP_RTC_INTERRUPTS_IT_ALARM BIT(3)
93 #define OMAP_RTC_INTERRUPTS_IT_TIMER BIT(2)
94
95 /* OMAP_RTC_OSC_REG bit fields: */
96 #define OMAP_RTC_OSC_32KCLK_EN BIT(6)
97
98 /* OMAP_RTC_IRQWAKEEN bit fields: */
99 #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
100
101 /* OMAP_RTC_KICKER values */
102 #define KICK0_VALUE 0x83e70b13
103 #define KICK1_VALUE 0x95a4f1e0
104
105 struct omap_rtc_device_type {
106 bool has_32kclk_en;
107 bool has_kicker;
108 bool has_irqwakeen;
109 };
110
111 struct omap_rtc {
112 struct rtc_device *rtc;
113 void __iomem *base;
114 int irq_alarm;
115 int irq_timer;
116 u8 interrupts_reg;
117 const struct omap_rtc_device_type *type;
118 };
119
120 static inline u8 rtc_read(struct omap_rtc *rtc, unsigned int reg)
121 {
122 return readb(rtc->base + reg);
123 }
124
125 static inline void rtc_write(struct omap_rtc *rtc, unsigned int reg, u8 val)
126 {
127 writeb(val, rtc->base + reg);
128 }
129
130 static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val)
131 {
132 writel(val, rtc->base + reg);
133 }
134
135 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
136 * so the only other requirement is that register accesses which
137 * require BUSY to be clear are made with IRQs locally disabled
138 */
139 static void rtc_wait_not_busy(struct omap_rtc *rtc)
140 {
141 int count = 0;
142 u8 status;
143
144 /* BUSY may stay active for 1/32768 second (~30 usec) */
145 for (count = 0; count < 50; count++) {
146 status = rtc_read(rtc, OMAP_RTC_STATUS_REG);
147 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
148 break;
149 udelay(1);
150 }
151 /* now we have ~15 usec to read/write various registers */
152 }
153
154 static irqreturn_t rtc_irq(int irq, void *dev_id)
155 {
156 struct omap_rtc *rtc = dev_id;
157 unsigned long events = 0;
158 u8 irq_data;
159
160 irq_data = rtc_read(rtc, OMAP_RTC_STATUS_REG);
161
162 /* alarm irq? */
163 if (irq_data & OMAP_RTC_STATUS_ALARM) {
164 rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
165 events |= RTC_IRQF | RTC_AF;
166 }
167
168 /* 1/sec periodic/update irq? */
169 if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
170 events |= RTC_IRQF | RTC_UF;
171
172 rtc_update_irq(rtc->rtc, 1, events);
173
174 return IRQ_HANDLED;
175 }
176
177 static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
178 {
179 struct omap_rtc *rtc = dev_get_drvdata(dev);
180 u8 reg, irqwake_reg = 0;
181
182 local_irq_disable();
183 rtc_wait_not_busy(rtc);
184 reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
185 if (rtc->type->has_irqwakeen)
186 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
187
188 if (enabled) {
189 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
190 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
191 } else {
192 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
193 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
194 }
195 rtc_wait_not_busy(rtc);
196 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
197 if (rtc->type->has_irqwakeen)
198 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
199 local_irq_enable();
200
201 return 0;
202 }
203
204 /* this hardware doesn't support "don't care" alarm fields */
205 static int tm2bcd(struct rtc_time *tm)
206 {
207 if (rtc_valid_tm(tm) != 0)
208 return -EINVAL;
209
210 tm->tm_sec = bin2bcd(tm->tm_sec);
211 tm->tm_min = bin2bcd(tm->tm_min);
212 tm->tm_hour = bin2bcd(tm->tm_hour);
213 tm->tm_mday = bin2bcd(tm->tm_mday);
214
215 tm->tm_mon = bin2bcd(tm->tm_mon + 1);
216
217 /* epoch == 1900 */
218 if (tm->tm_year < 100 || tm->tm_year > 199)
219 return -EINVAL;
220 tm->tm_year = bin2bcd(tm->tm_year - 100);
221
222 return 0;
223 }
224
225 static void bcd2tm(struct rtc_time *tm)
226 {
227 tm->tm_sec = bcd2bin(tm->tm_sec);
228 tm->tm_min = bcd2bin(tm->tm_min);
229 tm->tm_hour = bcd2bin(tm->tm_hour);
230 tm->tm_mday = bcd2bin(tm->tm_mday);
231 tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
232 /* epoch == 1900 */
233 tm->tm_year = bcd2bin(tm->tm_year) + 100;
234 }
235
236
237 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
238 {
239 struct omap_rtc *rtc = dev_get_drvdata(dev);
240
241 /* we don't report wday/yday/isdst ... */
242 local_irq_disable();
243 rtc_wait_not_busy(rtc);
244
245 tm->tm_sec = rtc_read(rtc, OMAP_RTC_SECONDS_REG);
246 tm->tm_min = rtc_read(rtc, OMAP_RTC_MINUTES_REG);
247 tm->tm_hour = rtc_read(rtc, OMAP_RTC_HOURS_REG);
248 tm->tm_mday = rtc_read(rtc, OMAP_RTC_DAYS_REG);
249 tm->tm_mon = rtc_read(rtc, OMAP_RTC_MONTHS_REG);
250 tm->tm_year = rtc_read(rtc, OMAP_RTC_YEARS_REG);
251
252 local_irq_enable();
253
254 bcd2tm(tm);
255 return 0;
256 }
257
258 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
259 {
260 struct omap_rtc *rtc = dev_get_drvdata(dev);
261
262 if (tm2bcd(tm) < 0)
263 return -EINVAL;
264 local_irq_disable();
265 rtc_wait_not_busy(rtc);
266
267 rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year);
268 rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon);
269 rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday);
270 rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour);
271 rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min);
272 rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec);
273
274 local_irq_enable();
275
276 return 0;
277 }
278
279 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
280 {
281 struct omap_rtc *rtc = dev_get_drvdata(dev);
282
283 local_irq_disable();
284 rtc_wait_not_busy(rtc);
285
286 alm->time.tm_sec = rtc_read(rtc, OMAP_RTC_ALARM_SECONDS_REG);
287 alm->time.tm_min = rtc_read(rtc, OMAP_RTC_ALARM_MINUTES_REG);
288 alm->time.tm_hour = rtc_read(rtc, OMAP_RTC_ALARM_HOURS_REG);
289 alm->time.tm_mday = rtc_read(rtc, OMAP_RTC_ALARM_DAYS_REG);
290 alm->time.tm_mon = rtc_read(rtc, OMAP_RTC_ALARM_MONTHS_REG);
291 alm->time.tm_year = rtc_read(rtc, OMAP_RTC_ALARM_YEARS_REG);
292
293 local_irq_enable();
294
295 bcd2tm(&alm->time);
296 alm->enabled = !!(rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG)
297 & OMAP_RTC_INTERRUPTS_IT_ALARM);
298
299 return 0;
300 }
301
302 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
303 {
304 struct omap_rtc *rtc = dev_get_drvdata(dev);
305 u8 reg, irqwake_reg = 0;
306
307 if (tm2bcd(&alm->time) < 0)
308 return -EINVAL;
309
310 local_irq_disable();
311 rtc_wait_not_busy(rtc);
312
313 rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year);
314 rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon);
315 rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday);
316 rtc_write(rtc, OMAP_RTC_ALARM_HOURS_REG, alm->time.tm_hour);
317 rtc_write(rtc, OMAP_RTC_ALARM_MINUTES_REG, alm->time.tm_min);
318 rtc_write(rtc, OMAP_RTC_ALARM_SECONDS_REG, alm->time.tm_sec);
319
320 reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
321 if (rtc->type->has_irqwakeen)
322 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
323
324 if (alm->enabled) {
325 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
326 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
327 } else {
328 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
329 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
330 }
331 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
332 if (rtc->type->has_irqwakeen)
333 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
334
335 local_irq_enable();
336
337 return 0;
338 }
339
340 static struct rtc_class_ops omap_rtc_ops = {
341 .read_time = omap_rtc_read_time,
342 .set_time = omap_rtc_set_time,
343 .read_alarm = omap_rtc_read_alarm,
344 .set_alarm = omap_rtc_set_alarm,
345 .alarm_irq_enable = omap_rtc_alarm_irq_enable,
346 };
347
348 static const struct omap_rtc_device_type omap_rtc_default_type = {
349 };
350
351 static const struct omap_rtc_device_type omap_rtc_am3352_type = {
352 .has_32kclk_en = true,
353 .has_kicker = true,
354 .has_irqwakeen = true,
355 };
356
357 static const struct omap_rtc_device_type omap_rtc_da830_type = {
358 .has_kicker = true,
359 };
360
361 static const struct platform_device_id omap_rtc_id_table[] = {
362 {
363 .name = "omap_rtc",
364 .driver_data = (kernel_ulong_t)&omap_rtc_default_type,
365 }, {
366 .name = "am3352-rtc",
367 .driver_data = (kernel_ulong_t)&omap_rtc_am3352_type,
368 }, {
369 .name = "da830-rtc",
370 .driver_data = (kernel_ulong_t)&omap_rtc_da830_type,
371 }, {
372 /* sentinel */
373 }
374 };
375 MODULE_DEVICE_TABLE(platform, omap_rtc_id_table);
376
377 static const struct of_device_id omap_rtc_of_match[] = {
378 {
379 .compatible = "ti,am3352-rtc",
380 .data = &omap_rtc_am3352_type,
381 }, {
382 .compatible = "ti,da830-rtc",
383 .data = &omap_rtc_da830_type,
384 }, {
385 /* sentinel */
386 }
387 };
388 MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
389
390 static int __init omap_rtc_probe(struct platform_device *pdev)
391 {
392 struct omap_rtc *rtc;
393 struct resource *res;
394 u8 reg, new_ctrl;
395 const struct platform_device_id *id_entry;
396 const struct of_device_id *of_id;
397 int ret;
398
399 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
400 if (!rtc)
401 return -ENOMEM;
402
403 of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
404 if (of_id) {
405 rtc->type = of_id->data;
406 } else {
407 id_entry = platform_get_device_id(pdev);
408 rtc->type = (void *)id_entry->driver_data;
409 }
410
411 rtc->irq_timer = platform_get_irq(pdev, 0);
412 if (rtc->irq_timer <= 0)
413 return -ENOENT;
414
415 rtc->irq_alarm = platform_get_irq(pdev, 1);
416 if (rtc->irq_alarm <= 0)
417 return -ENOENT;
418
419 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
420 rtc->base = devm_ioremap_resource(&pdev->dev, res);
421 if (IS_ERR(rtc->base))
422 return PTR_ERR(rtc->base);
423
424 platform_set_drvdata(pdev, rtc);
425
426 /* Enable the clock/module so that we can access the registers */
427 pm_runtime_enable(&pdev->dev);
428 pm_runtime_get_sync(&pdev->dev);
429
430 if (rtc->type->has_kicker) {
431 rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
432 rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
433 }
434
435 /*
436 * disable interrupts
437 *
438 * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
439 */
440 rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
441
442 /* enable RTC functional clock */
443 if (rtc->type->has_32kclk_en) {
444 reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
445 rtc_writel(rtc, OMAP_RTC_OSC_REG,
446 reg | OMAP_RTC_OSC_32KCLK_EN);
447 }
448
449 /* clear old status */
450 reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);
451 if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
452 dev_info(&pdev->dev, "RTC power up reset detected\n");
453 rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_POWER_UP);
454 }
455 if (reg & (u8) OMAP_RTC_STATUS_ALARM)
456 rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
457
458 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
459 reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
460 if (reg & (u8) OMAP_RTC_CTRL_STOP)
461 dev_info(&pdev->dev, "already running\n");
462
463 /* force to 24 hour mode */
464 new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
465 new_ctrl |= OMAP_RTC_CTRL_STOP;
466
467 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
468 *
469 * - Device wake-up capability setting should come through chip
470 * init logic. OMAP1 boards should initialize the "wakeup capable"
471 * flag in the platform device if the board is wired right for
472 * being woken up by RTC alarm. For OMAP-L138, this capability
473 * is built into the SoC by the "Deep Sleep" capability.
474 *
475 * - Boards wired so RTC_ON_nOFF is used as the reset signal,
476 * rather than nPWRON_RESET, should forcibly enable split
477 * power mode. (Some chip errata report that RTC_CTRL_SPLIT
478 * is write-only, and always reads as zero...)
479 */
480
481 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
482 dev_info(&pdev->dev, "split power mode\n");
483
484 if (reg != new_ctrl)
485 rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
486
487 device_init_wakeup(&pdev->dev, true);
488
489 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
490 &omap_rtc_ops, THIS_MODULE);
491 if (IS_ERR(rtc->rtc)) {
492 ret = PTR_ERR(rtc->rtc);
493 goto err;
494 }
495
496 /* handle periodic and alarm irqs */
497 ret = devm_request_irq(&pdev->dev, rtc->irq_timer, rtc_irq, 0,
498 dev_name(&rtc->rtc->dev), rtc);
499 if (ret)
500 goto err;
501
502 if (rtc->irq_timer != rtc->irq_alarm) {
503 ret = devm_request_irq(&pdev->dev, rtc->irq_alarm, rtc_irq, 0,
504 dev_name(&rtc->rtc->dev), rtc);
505 if (ret)
506 goto err;
507 }
508
509 return 0;
510
511 err:
512 device_init_wakeup(&pdev->dev, false);
513 if (rtc->type->has_kicker)
514 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
515 pm_runtime_put_sync(&pdev->dev);
516 pm_runtime_disable(&pdev->dev);
517
518 return ret;
519 }
520
521 static int __exit omap_rtc_remove(struct platform_device *pdev)
522 {
523 struct omap_rtc *rtc = platform_get_drvdata(pdev);
524
525 device_init_wakeup(&pdev->dev, 0);
526
527 /* leave rtc running, but disable irqs */
528 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
529
530 if (rtc->type->has_kicker)
531 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
532
533 /* Disable the clock/module */
534 pm_runtime_put_sync(&pdev->dev);
535 pm_runtime_disable(&pdev->dev);
536
537 return 0;
538 }
539
540 #ifdef CONFIG_PM_SLEEP
541 static int omap_rtc_suspend(struct device *dev)
542 {
543 struct omap_rtc *rtc = dev_get_drvdata(dev);
544
545 rtc->interrupts_reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
546
547 /* FIXME the RTC alarm is not currently acting as a wakeup event
548 * source on some platforms, and in fact this enable() call is just
549 * saving a flag that's never used...
550 */
551 if (device_may_wakeup(dev))
552 enable_irq_wake(rtc->irq_alarm);
553 else
554 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
555
556 /* Disable the clock/module */
557 pm_runtime_put_sync(dev);
558
559 return 0;
560 }
561
562 static int omap_rtc_resume(struct device *dev)
563 {
564 struct omap_rtc *rtc = dev_get_drvdata(dev);
565
566 /* Enable the clock/module so that we can access the registers */
567 pm_runtime_get_sync(dev);
568
569 if (device_may_wakeup(dev))
570 disable_irq_wake(rtc->irq_alarm);
571 else
572 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, rtc->interrupts_reg);
573
574 return 0;
575 }
576 #endif
577
578 static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
579
580 static void omap_rtc_shutdown(struct platform_device *pdev)
581 {
582 struct omap_rtc *rtc = platform_get_drvdata(pdev);
583
584 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
585 }
586
587 static struct platform_driver omap_rtc_driver = {
588 .remove = __exit_p(omap_rtc_remove),
589 .shutdown = omap_rtc_shutdown,
590 .driver = {
591 .name = "omap_rtc",
592 .owner = THIS_MODULE,
593 .pm = &omap_rtc_pm_ops,
594 .of_match_table = omap_rtc_of_match,
595 },
596 .id_table = omap_rtc_id_table,
597 };
598
599 module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
600
601 MODULE_ALIAS("platform:omap_rtc");
602 MODULE_AUTHOR("George G. Davis (and others)");
603 MODULE_LICENSE("GPL");
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