cpufreq: governor: Always schedule work on the CPU running update
[deliverable/linux.git] / drivers / rtc / rtc-s3c.c
1 /* drivers/rtc/rtc-s3c.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15 */
16
17 #include <linux/module.h>
18 #include <linux/fs.h>
19 #include <linux/string.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/rtc.h>
24 #include <linux/bcd.h>
25 #include <linux/clk.h>
26 #include <linux/log2.h>
27 #include <linux/slab.h>
28 #include <linux/of.h>
29 #include <linux/uaccess.h>
30 #include <linux/io.h>
31
32 #include <asm/irq.h>
33 #include "rtc-s3c.h"
34
35 struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
41 struct clk *rtc_src_clk;
42 bool clk_disabled;
43
44 struct s3c_rtc_data *data;
45
46 int irq_alarm;
47 int irq_tick;
48
49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
51
52 int ticnt_save, ticnt_en_save;
53 bool wake_en;
54 };
55
56 struct s3c_rtc_data {
57 int max_user_freq;
58 bool needs_src_clk;
59
60 void (*irq_handler) (struct s3c_rtc *info, int mask);
61 void (*set_freq) (struct s3c_rtc *info, int freq);
62 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
63 void (*select_tick_clk) (struct s3c_rtc *info);
64 void (*save_tick_cnt) (struct s3c_rtc *info);
65 void (*restore_tick_cnt) (struct s3c_rtc *info);
66 void (*enable) (struct s3c_rtc *info);
67 void (*disable) (struct s3c_rtc *info);
68 };
69
70 static void s3c_rtc_enable_clk(struct s3c_rtc *info)
71 {
72 unsigned long irq_flags;
73
74 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
75 if (info->clk_disabled) {
76 clk_enable(info->rtc_clk);
77 if (info->data->needs_src_clk)
78 clk_enable(info->rtc_src_clk);
79 info->clk_disabled = false;
80 }
81 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
82 }
83
84 static void s3c_rtc_disable_clk(struct s3c_rtc *info)
85 {
86 unsigned long irq_flags;
87
88 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
89 if (!info->clk_disabled) {
90 if (info->data->needs_src_clk)
91 clk_disable(info->rtc_src_clk);
92 clk_disable(info->rtc_clk);
93 info->clk_disabled = true;
94 }
95 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
96 }
97
98 /* IRQ Handlers */
99 static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
100 {
101 struct s3c_rtc *info = (struct s3c_rtc *)id;
102
103 if (info->data->irq_handler)
104 info->data->irq_handler(info, S3C2410_INTP_TIC);
105
106 return IRQ_HANDLED;
107 }
108
109 static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
110 {
111 struct s3c_rtc *info = (struct s3c_rtc *)id;
112
113 if (info->data->irq_handler)
114 info->data->irq_handler(info, S3C2410_INTP_ALM);
115
116 return IRQ_HANDLED;
117 }
118
119 /* Update control registers */
120 static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
121 {
122 struct s3c_rtc *info = dev_get_drvdata(dev);
123 unsigned int tmp;
124
125 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
126
127 s3c_rtc_enable_clk(info);
128
129 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
130
131 if (enabled)
132 tmp |= S3C2410_RTCALM_ALMEN;
133
134 writeb(tmp, info->base + S3C2410_RTCALM);
135
136 s3c_rtc_disable_clk(info);
137
138 if (enabled)
139 s3c_rtc_enable_clk(info);
140 else
141 s3c_rtc_disable_clk(info);
142
143 return 0;
144 }
145
146 /* Set RTC frequency */
147 static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
148 {
149 if (!is_power_of_2(freq))
150 return -EINVAL;
151
152 spin_lock_irq(&info->pie_lock);
153
154 if (info->data->set_freq)
155 info->data->set_freq(info, freq);
156
157 spin_unlock_irq(&info->pie_lock);
158
159 return 0;
160 }
161
162 /* Time read/write */
163 static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
164 {
165 struct s3c_rtc *info = dev_get_drvdata(dev);
166 unsigned int have_retried = 0;
167
168 s3c_rtc_enable_clk(info);
169
170 retry_get_time:
171 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
172 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
173 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
174 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
175 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
176 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
177
178 /* the only way to work out whether the system was mid-update
179 * when we read it is to check the second counter, and if it
180 * is zero, then we re-try the entire read
181 */
182
183 if (rtc_tm->tm_sec == 0 && !have_retried) {
184 have_retried = 1;
185 goto retry_get_time;
186 }
187
188 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
189 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
190 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
191 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
192 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
193 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
194
195 s3c_rtc_disable_clk(info);
196
197 rtc_tm->tm_year += 100;
198
199 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
200 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
201 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
202
203 rtc_tm->tm_mon -= 1;
204
205 return rtc_valid_tm(rtc_tm);
206 }
207
208 static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
209 {
210 struct s3c_rtc *info = dev_get_drvdata(dev);
211 int year = tm->tm_year - 100;
212
213 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
214 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
215 tm->tm_hour, tm->tm_min, tm->tm_sec);
216
217 /* we get around y2k by simply not supporting it */
218
219 if (year < 0 || year >= 100) {
220 dev_err(dev, "rtc only supports 100 years\n");
221 return -EINVAL;
222 }
223
224 s3c_rtc_enable_clk(info);
225
226 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
227 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
228 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
229 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
230 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
231 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
232
233 s3c_rtc_disable_clk(info);
234
235 return 0;
236 }
237
238 static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
239 {
240 struct s3c_rtc *info = dev_get_drvdata(dev);
241 struct rtc_time *alm_tm = &alrm->time;
242 unsigned int alm_en;
243
244 s3c_rtc_enable_clk(info);
245
246 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
247 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
248 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
249 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
250 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
251 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
252
253 alm_en = readb(info->base + S3C2410_RTCALM);
254
255 s3c_rtc_disable_clk(info);
256
257 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
258
259 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
260 alm_en,
261 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
262 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
263
264 /* decode the alarm enable field */
265 if (alm_en & S3C2410_RTCALM_SECEN)
266 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
267 else
268 alm_tm->tm_sec = -1;
269
270 if (alm_en & S3C2410_RTCALM_MINEN)
271 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
272 else
273 alm_tm->tm_min = -1;
274
275 if (alm_en & S3C2410_RTCALM_HOUREN)
276 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
277 else
278 alm_tm->tm_hour = -1;
279
280 if (alm_en & S3C2410_RTCALM_DAYEN)
281 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
282 else
283 alm_tm->tm_mday = -1;
284
285 if (alm_en & S3C2410_RTCALM_MONEN) {
286 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
287 alm_tm->tm_mon -= 1;
288 } else {
289 alm_tm->tm_mon = -1;
290 }
291
292 if (alm_en & S3C2410_RTCALM_YEAREN)
293 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
294 else
295 alm_tm->tm_year = -1;
296
297 return 0;
298 }
299
300 static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
301 {
302 struct s3c_rtc *info = dev_get_drvdata(dev);
303 struct rtc_time *tm = &alrm->time;
304 unsigned int alrm_en;
305 int year = tm->tm_year - 100;
306
307 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
308 alrm->enabled,
309 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
310 tm->tm_hour, tm->tm_min, tm->tm_sec);
311
312 s3c_rtc_enable_clk(info);
313
314 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
315 writeb(0x00, info->base + S3C2410_RTCALM);
316
317 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
318 alrm_en |= S3C2410_RTCALM_SECEN;
319 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
320 }
321
322 if (tm->tm_min < 60 && tm->tm_min >= 0) {
323 alrm_en |= S3C2410_RTCALM_MINEN;
324 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
325 }
326
327 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
328 alrm_en |= S3C2410_RTCALM_HOUREN;
329 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
330 }
331
332 if (year < 100 && year >= 0) {
333 alrm_en |= S3C2410_RTCALM_YEAREN;
334 writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
335 }
336
337 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
338 alrm_en |= S3C2410_RTCALM_MONEN;
339 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
340 }
341
342 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
343 alrm_en |= S3C2410_RTCALM_DAYEN;
344 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
345 }
346
347 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
348
349 writeb(alrm_en, info->base + S3C2410_RTCALM);
350
351 s3c_rtc_disable_clk(info);
352
353 s3c_rtc_setaie(dev, alrm->enabled);
354
355 return 0;
356 }
357
358 static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
359 {
360 struct s3c_rtc *info = dev_get_drvdata(dev);
361
362 s3c_rtc_enable_clk(info);
363
364 if (info->data->enable_tick)
365 info->data->enable_tick(info, seq);
366
367 s3c_rtc_disable_clk(info);
368
369 return 0;
370 }
371
372 static const struct rtc_class_ops s3c_rtcops = {
373 .read_time = s3c_rtc_gettime,
374 .set_time = s3c_rtc_settime,
375 .read_alarm = s3c_rtc_getalarm,
376 .set_alarm = s3c_rtc_setalarm,
377 .proc = s3c_rtc_proc,
378 .alarm_irq_enable = s3c_rtc_setaie,
379 };
380
381 static void s3c24xx_rtc_enable(struct s3c_rtc *info)
382 {
383 unsigned int con, tmp;
384
385 con = readw(info->base + S3C2410_RTCCON);
386 /* re-enable the device, and check it is ok */
387 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
388 dev_info(info->dev, "rtc disabled, re-enabling\n");
389
390 tmp = readw(info->base + S3C2410_RTCCON);
391 writew(tmp | S3C2410_RTCCON_RTCEN,
392 info->base + S3C2410_RTCCON);
393 }
394
395 if (con & S3C2410_RTCCON_CNTSEL) {
396 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
397
398 tmp = readw(info->base + S3C2410_RTCCON);
399 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
400 info->base + S3C2410_RTCCON);
401 }
402
403 if (con & S3C2410_RTCCON_CLKRST) {
404 dev_info(info->dev, "removing RTCCON_CLKRST\n");
405
406 tmp = readw(info->base + S3C2410_RTCCON);
407 writew(tmp & ~S3C2410_RTCCON_CLKRST,
408 info->base + S3C2410_RTCCON);
409 }
410 }
411
412 static void s3c24xx_rtc_disable(struct s3c_rtc *info)
413 {
414 unsigned int con;
415
416 con = readw(info->base + S3C2410_RTCCON);
417 con &= ~S3C2410_RTCCON_RTCEN;
418 writew(con, info->base + S3C2410_RTCCON);
419
420 con = readb(info->base + S3C2410_TICNT);
421 con &= ~S3C2410_TICNT_ENABLE;
422 writeb(con, info->base + S3C2410_TICNT);
423 }
424
425 static void s3c6410_rtc_disable(struct s3c_rtc *info)
426 {
427 unsigned int con;
428
429 con = readw(info->base + S3C2410_RTCCON);
430 con &= ~S3C64XX_RTCCON_TICEN;
431 con &= ~S3C2410_RTCCON_RTCEN;
432 writew(con, info->base + S3C2410_RTCCON);
433 }
434
435 static int s3c_rtc_remove(struct platform_device *pdev)
436 {
437 struct s3c_rtc *info = platform_get_drvdata(pdev);
438
439 s3c_rtc_setaie(info->dev, 0);
440
441 if (info->data->needs_src_clk)
442 clk_unprepare(info->rtc_src_clk);
443 clk_unprepare(info->rtc_clk);
444
445 return 0;
446 }
447
448 static const struct of_device_id s3c_rtc_dt_match[];
449
450 static struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
451 {
452 const struct of_device_id *match;
453
454 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
455 return (struct s3c_rtc_data *)match->data;
456 }
457
458 static int s3c_rtc_probe(struct platform_device *pdev)
459 {
460 struct s3c_rtc *info = NULL;
461 struct rtc_time rtc_tm;
462 struct resource *res;
463 int ret;
464
465 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
466 if (!info)
467 return -ENOMEM;
468
469 /* find the IRQs */
470 info->irq_tick = platform_get_irq(pdev, 1);
471 if (info->irq_tick < 0) {
472 dev_err(&pdev->dev, "no irq for rtc tick\n");
473 return info->irq_tick;
474 }
475
476 info->dev = &pdev->dev;
477 info->data = s3c_rtc_get_data(pdev);
478 if (!info->data) {
479 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
480 return -EINVAL;
481 }
482 spin_lock_init(&info->pie_lock);
483 spin_lock_init(&info->alarm_clk_lock);
484
485 platform_set_drvdata(pdev, info);
486
487 info->irq_alarm = platform_get_irq(pdev, 0);
488 if (info->irq_alarm < 0) {
489 dev_err(&pdev->dev, "no irq for alarm\n");
490 return info->irq_alarm;
491 }
492
493 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
494 info->irq_tick, info->irq_alarm);
495
496 /* get the memory region */
497 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
498 info->base = devm_ioremap_resource(&pdev->dev, res);
499 if (IS_ERR(info->base))
500 return PTR_ERR(info->base);
501
502 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
503 if (IS_ERR(info->rtc_clk)) {
504 dev_err(&pdev->dev, "failed to find rtc clock\n");
505 return PTR_ERR(info->rtc_clk);
506 }
507 clk_prepare_enable(info->rtc_clk);
508
509 if (info->data->needs_src_clk) {
510 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
511 if (IS_ERR(info->rtc_src_clk)) {
512 dev_err(&pdev->dev,
513 "failed to find rtc source clock\n");
514 clk_disable_unprepare(info->rtc_clk);
515 return PTR_ERR(info->rtc_src_clk);
516 }
517 clk_prepare_enable(info->rtc_src_clk);
518 }
519
520 /* check to see if everything is setup correctly */
521 if (info->data->enable)
522 info->data->enable(info);
523
524 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
525 readw(info->base + S3C2410_RTCCON));
526
527 device_init_wakeup(&pdev->dev, 1);
528
529 /* Check RTC Time */
530 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
531 rtc_tm.tm_year = 100;
532 rtc_tm.tm_mon = 0;
533 rtc_tm.tm_mday = 1;
534 rtc_tm.tm_hour = 0;
535 rtc_tm.tm_min = 0;
536 rtc_tm.tm_sec = 0;
537
538 s3c_rtc_settime(&pdev->dev, &rtc_tm);
539
540 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
541 }
542
543 /* register RTC and exit */
544 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
545 THIS_MODULE);
546 if (IS_ERR(info->rtc)) {
547 dev_err(&pdev->dev, "cannot attach rtc\n");
548 ret = PTR_ERR(info->rtc);
549 goto err_nortc;
550 }
551
552 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
553 0, "s3c2410-rtc alarm", info);
554 if (ret) {
555 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
556 goto err_nortc;
557 }
558
559 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
560 0, "s3c2410-rtc tick", info);
561 if (ret) {
562 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
563 goto err_nortc;
564 }
565
566 if (info->data->select_tick_clk)
567 info->data->select_tick_clk(info);
568
569 s3c_rtc_setfreq(info, 1);
570
571 s3c_rtc_disable_clk(info);
572
573 return 0;
574
575 err_nortc:
576 if (info->data->disable)
577 info->data->disable(info);
578
579 if (info->data->needs_src_clk)
580 clk_disable_unprepare(info->rtc_src_clk);
581 clk_disable_unprepare(info->rtc_clk);
582
583 return ret;
584 }
585
586 #ifdef CONFIG_PM_SLEEP
587
588 static int s3c_rtc_suspend(struct device *dev)
589 {
590 struct s3c_rtc *info = dev_get_drvdata(dev);
591
592 s3c_rtc_enable_clk(info);
593
594 /* save TICNT for anyone using periodic interrupts */
595 if (info->data->save_tick_cnt)
596 info->data->save_tick_cnt(info);
597
598 if (info->data->disable)
599 info->data->disable(info);
600
601 if (device_may_wakeup(dev) && !info->wake_en) {
602 if (enable_irq_wake(info->irq_alarm) == 0)
603 info->wake_en = true;
604 else
605 dev_err(dev, "enable_irq_wake failed\n");
606 }
607
608 return 0;
609 }
610
611 static int s3c_rtc_resume(struct device *dev)
612 {
613 struct s3c_rtc *info = dev_get_drvdata(dev);
614
615 if (info->data->enable)
616 info->data->enable(info);
617
618 if (info->data->restore_tick_cnt)
619 info->data->restore_tick_cnt(info);
620
621 s3c_rtc_disable_clk(info);
622
623 if (device_may_wakeup(dev) && info->wake_en) {
624 disable_irq_wake(info->irq_alarm);
625 info->wake_en = false;
626 }
627
628 return 0;
629 }
630 #endif
631 static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
632
633 static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
634 {
635 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
636 }
637
638 static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
639 {
640 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
641 writeb(mask, info->base + S3C2410_INTP);
642 }
643
644 static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
645 {
646 unsigned int tmp = 0;
647 int val;
648
649 tmp = readb(info->base + S3C2410_TICNT);
650 tmp &= S3C2410_TICNT_ENABLE;
651
652 val = (info->rtc->max_user_freq / freq) - 1;
653 tmp |= val;
654
655 writel(tmp, info->base + S3C2410_TICNT);
656 }
657
658 static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
659 {
660 unsigned int tmp = 0;
661 int val;
662
663 tmp = readb(info->base + S3C2410_TICNT);
664 tmp &= S3C2410_TICNT_ENABLE;
665
666 val = (info->rtc->max_user_freq / freq) - 1;
667
668 tmp |= S3C2443_TICNT_PART(val);
669 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
670
671 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
672
673 writel(tmp, info->base + S3C2410_TICNT);
674 }
675
676 static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
677 {
678 unsigned int tmp = 0;
679 int val;
680
681 tmp = readb(info->base + S3C2410_TICNT);
682 tmp &= S3C2410_TICNT_ENABLE;
683
684 val = (info->rtc->max_user_freq / freq) - 1;
685
686 tmp |= S3C2443_TICNT_PART(val);
687 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
688
689 writel(tmp, info->base + S3C2410_TICNT);
690 }
691
692 static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
693 {
694 int val;
695
696 val = (info->rtc->max_user_freq / freq) - 1;
697 writel(val, info->base + S3C2410_TICNT);
698 }
699
700 static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
701 {
702 unsigned int ticnt;
703
704 ticnt = readb(info->base + S3C2410_TICNT);
705 ticnt &= S3C2410_TICNT_ENABLE;
706
707 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
708 }
709
710 static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
711 {
712 unsigned int con;
713
714 con = readw(info->base + S3C2410_RTCCON);
715 con |= S3C2443_RTCCON_TICSEL;
716 writew(con, info->base + S3C2410_RTCCON);
717 }
718
719 static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
720 {
721 unsigned int ticnt;
722
723 ticnt = readw(info->base + S3C2410_RTCCON);
724 ticnt &= S3C64XX_RTCCON_TICEN;
725
726 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
727 }
728
729 static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
730 {
731 info->ticnt_save = readb(info->base + S3C2410_TICNT);
732 }
733
734 static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
735 {
736 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
737 }
738
739 static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
740 {
741 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
742 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
743 info->ticnt_save = readl(info->base + S3C2410_TICNT);
744 }
745
746 static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
747 {
748 unsigned int con;
749
750 writel(info->ticnt_save, info->base + S3C2410_TICNT);
751 if (info->ticnt_en_save) {
752 con = readw(info->base + S3C2410_RTCCON);
753 writew(con | info->ticnt_en_save,
754 info->base + S3C2410_RTCCON);
755 }
756 }
757
758 static struct s3c_rtc_data const s3c2410_rtc_data = {
759 .max_user_freq = 128,
760 .irq_handler = s3c24xx_rtc_irq,
761 .set_freq = s3c2410_rtc_setfreq,
762 .enable_tick = s3c24xx_rtc_enable_tick,
763 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
764 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
765 .enable = s3c24xx_rtc_enable,
766 .disable = s3c24xx_rtc_disable,
767 };
768
769 static struct s3c_rtc_data const s3c2416_rtc_data = {
770 .max_user_freq = 32768,
771 .irq_handler = s3c24xx_rtc_irq,
772 .set_freq = s3c2416_rtc_setfreq,
773 .enable_tick = s3c24xx_rtc_enable_tick,
774 .select_tick_clk = s3c2416_rtc_select_tick_clk,
775 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
776 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
777 .enable = s3c24xx_rtc_enable,
778 .disable = s3c24xx_rtc_disable,
779 };
780
781 static struct s3c_rtc_data const s3c2443_rtc_data = {
782 .max_user_freq = 32768,
783 .irq_handler = s3c24xx_rtc_irq,
784 .set_freq = s3c2443_rtc_setfreq,
785 .enable_tick = s3c24xx_rtc_enable_tick,
786 .select_tick_clk = s3c2416_rtc_select_tick_clk,
787 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
788 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
789 .enable = s3c24xx_rtc_enable,
790 .disable = s3c24xx_rtc_disable,
791 };
792
793 static struct s3c_rtc_data const s3c6410_rtc_data = {
794 .max_user_freq = 32768,
795 .needs_src_clk = true,
796 .irq_handler = s3c6410_rtc_irq,
797 .set_freq = s3c6410_rtc_setfreq,
798 .enable_tick = s3c6410_rtc_enable_tick,
799 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
800 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
801 .enable = s3c24xx_rtc_enable,
802 .disable = s3c6410_rtc_disable,
803 };
804
805 static const struct of_device_id s3c_rtc_dt_match[] = {
806 {
807 .compatible = "samsung,s3c2410-rtc",
808 .data = (void *)&s3c2410_rtc_data,
809 }, {
810 .compatible = "samsung,s3c2416-rtc",
811 .data = (void *)&s3c2416_rtc_data,
812 }, {
813 .compatible = "samsung,s3c2443-rtc",
814 .data = (void *)&s3c2443_rtc_data,
815 }, {
816 .compatible = "samsung,s3c6410-rtc",
817 .data = (void *)&s3c6410_rtc_data,
818 }, {
819 .compatible = "samsung,exynos3250-rtc",
820 .data = (void *)&s3c6410_rtc_data,
821 },
822 { /* sentinel */ },
823 };
824 MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
825
826 static struct platform_driver s3c_rtc_driver = {
827 .probe = s3c_rtc_probe,
828 .remove = s3c_rtc_remove,
829 .driver = {
830 .name = "s3c-rtc",
831 .pm = &s3c_rtc_pm_ops,
832 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
833 },
834 };
835 module_platform_driver(s3c_rtc_driver);
836
837 MODULE_DESCRIPTION("Samsung S3C RTC Driver");
838 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
839 MODULE_LICENSE("GPL");
840 MODULE_ALIAS("platform:s3c2410-rtc");
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