2 * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
3 * http://www.samsung.com
5 * Copyright (C) 2013 Google, Inc
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/module.h>
21 #include <linux/i2c.h>
22 #include <linux/bcd.h>
23 #include <linux/regmap.h>
24 #include <linux/rtc.h>
25 #include <linux/platform_device.h>
26 #include <linux/mfd/samsung/core.h>
27 #include <linux/mfd/samsung/irq.h>
28 #include <linux/mfd/samsung/rtc.h>
29 #include <linux/mfd/samsung/s2mps14.h>
32 * Maximum number of retries for checking changes in UDR field
33 * of S5M_RTC_UDR_CON register (to limit possible endless loop).
35 * After writing to RTC registers (setting time or alarm) read the UDR field
36 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
39 #define UDR_READ_RETRY_CNT 5
41 /* Registers used by the driver which are different between chipsets. */
42 struct s5m_rtc_reg_config
{
43 /* Number of registers used for setting time/alarm0/alarm1 */
44 unsigned int regs_count
;
45 /* First register for time, seconds */
47 /* RTC control register */
49 /* First register for alarm 0, seconds */
51 /* First register for alarm 1, seconds */
54 * Register for update flag (UDR). Typically setting UDR field to 1
55 * will enable update of time or alarm register. Then it will be
56 * auto-cleared after successful update.
58 unsigned int rtc_udr_update
;
59 /* Mask for UDR field in 'rtc_udr_update' register */
60 unsigned int rtc_udr_mask
;
63 /* Register map for S5M8763 and S5M8767 */
64 static const struct s5m_rtc_reg_config s5m_rtc_regs
= {
67 .ctrl
= S5M_ALARM1_CONF
,
68 .alarm0
= S5M_ALARM0_SEC
,
69 .alarm1
= S5M_ALARM1_SEC
,
70 .rtc_udr_update
= S5M_RTC_UDR_CON
,
71 .rtc_udr_mask
= S5M_RTC_UDR_MASK
,
75 * Register map for S2MPS14.
76 * It may be also suitable for S2MPS11 but this was not tested.
78 static const struct s5m_rtc_reg_config s2mps_rtc_regs
= {
80 .time
= S2MPS_RTC_SEC
,
81 .ctrl
= S2MPS_RTC_CTRL
,
82 .alarm0
= S2MPS_ALARM0_SEC
,
83 .alarm1
= S2MPS_ALARM1_SEC
,
84 .rtc_udr_update
= S2MPS_RTC_UDR_CON
,
85 .rtc_udr_mask
= S2MPS_RTC_WUDR_MASK
,
90 struct i2c_client
*i2c
;
91 struct sec_pmic_dev
*s5m87xx
;
92 struct regmap
*regmap
;
93 struct rtc_device
*rtc_dev
;
95 enum sec_device_type device_type
;
97 const struct s5m_rtc_reg_config
*regs
;
100 static const struct regmap_config s5m_rtc_regmap_config
= {
104 .max_register
= S5M_RTC_REG_MAX
,
107 static const struct regmap_config s2mps14_rtc_regmap_config
= {
111 .max_register
= S2MPS_RTC_REG_MAX
,
114 static void s5m8767_data_to_tm(u8
*data
, struct rtc_time
*tm
,
117 tm
->tm_sec
= data
[RTC_SEC
] & 0x7f;
118 tm
->tm_min
= data
[RTC_MIN
] & 0x7f;
120 tm
->tm_hour
= data
[RTC_HOUR
] & 0x1f;
122 tm
->tm_hour
= data
[RTC_HOUR
] & 0x0f;
123 if (data
[RTC_HOUR
] & HOUR_PM_MASK
)
127 tm
->tm_wday
= ffs(data
[RTC_WEEKDAY
] & 0x7f);
128 tm
->tm_mday
= data
[RTC_DATE
] & 0x1f;
129 tm
->tm_mon
= (data
[RTC_MONTH
] & 0x0f) - 1;
130 tm
->tm_year
= (data
[RTC_YEAR1
] & 0x7f) + 100;
135 static int s5m8767_tm_to_data(struct rtc_time
*tm
, u8
*data
)
137 data
[RTC_SEC
] = tm
->tm_sec
;
138 data
[RTC_MIN
] = tm
->tm_min
;
140 if (tm
->tm_hour
>= 12)
141 data
[RTC_HOUR
] = tm
->tm_hour
| HOUR_PM_MASK
;
143 data
[RTC_HOUR
] = tm
->tm_hour
& ~HOUR_PM_MASK
;
145 data
[RTC_WEEKDAY
] = 1 << tm
->tm_wday
;
146 data
[RTC_DATE
] = tm
->tm_mday
;
147 data
[RTC_MONTH
] = tm
->tm_mon
+ 1;
148 data
[RTC_YEAR1
] = tm
->tm_year
> 100 ? (tm
->tm_year
- 100) : 0;
150 if (tm
->tm_year
< 100) {
151 pr_err("RTC cannot handle the year %d\n",
160 * Read RTC_UDR_CON register and wait till UDR field is cleared.
161 * This indicates that time/alarm update ended.
163 static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info
*info
)
165 int ret
, retry
= UDR_READ_RETRY_CNT
;
169 ret
= regmap_read(info
->regmap
, info
->regs
->rtc_udr_update
,
171 } while (--retry
&& (data
& info
->regs
->rtc_udr_mask
) && !ret
);
174 dev_err(info
->dev
, "waiting for UDR update, reached max number of retries\n");
179 static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info
*info
,
180 struct rtc_wkalrm
*alarm
)
185 switch (info
->device_type
) {
188 ret
= regmap_read(info
->regmap
, S5M_RTC_STATUS
, &val
);
189 val
&= S5M_ALARM0_STATUS
;
194 ret
= regmap_read(info
->s5m87xx
->regmap_pmic
, S2MPS14_REG_ST2
,
196 val
&= S2MPS_ALARM0_STATUS
;
212 static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info
*info
)
217 ret
= regmap_read(info
->regmap
, info
->regs
->rtc_udr_update
, &data
);
219 dev_err(info
->dev
, "failed to read update reg(%d)\n", ret
);
223 switch (info
->device_type
) {
226 data
|= info
->regs
->rtc_udr_mask
| S5M_RTC_TIME_EN_MASK
;
228 /* As per UM, for write time register, set WUDR bit to high */
229 data
|= S2MPS15_RTC_WUDR_MASK
;
233 data
|= info
->regs
->rtc_udr_mask
;
240 ret
= regmap_write(info
->regmap
, info
->regs
->rtc_udr_update
, data
);
242 dev_err(info
->dev
, "failed to write update reg(%d)\n", ret
);
246 ret
= s5m8767_wait_for_udr_update(info
);
251 static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info
*info
)
256 ret
= regmap_read(info
->regmap
, info
->regs
->rtc_udr_update
, &data
);
258 dev_err(info
->dev
, "%s: fail to read update reg(%d)\n",
263 data
|= info
->regs
->rtc_udr_mask
;
264 switch (info
->device_type
) {
267 data
&= ~S5M_RTC_TIME_EN_MASK
;
270 /* As per UM, for write alarm, set A_UDR(bit[4]) to high
271 * rtc_udr_mask above sets bit[4]
275 data
|= S2MPS_RTC_RUDR_MASK
;
278 data
|= S2MPS13_RTC_AUDR_MASK
;
284 ret
= regmap_write(info
->regmap
, info
->regs
->rtc_udr_update
, data
);
286 dev_err(info
->dev
, "%s: fail to write update reg(%d)\n",
291 ret
= s5m8767_wait_for_udr_update(info
);
293 /* On S2MPS13 the AUDR is not auto-cleared */
294 if (info
->device_type
== S2MPS13X
)
295 regmap_update_bits(info
->regmap
, info
->regs
->rtc_udr_update
,
296 S2MPS13_RTC_AUDR_MASK
, 0);
301 static void s5m8763_data_to_tm(u8
*data
, struct rtc_time
*tm
)
303 tm
->tm_sec
= bcd2bin(data
[RTC_SEC
]);
304 tm
->tm_min
= bcd2bin(data
[RTC_MIN
]);
306 if (data
[RTC_HOUR
] & HOUR_12
) {
307 tm
->tm_hour
= bcd2bin(data
[RTC_HOUR
] & 0x1f);
308 if (data
[RTC_HOUR
] & HOUR_PM
)
311 tm
->tm_hour
= bcd2bin(data
[RTC_HOUR
] & 0x3f);
314 tm
->tm_wday
= data
[RTC_WEEKDAY
] & 0x07;
315 tm
->tm_mday
= bcd2bin(data
[RTC_DATE
]);
316 tm
->tm_mon
= bcd2bin(data
[RTC_MONTH
]);
317 tm
->tm_year
= bcd2bin(data
[RTC_YEAR1
]) + bcd2bin(data
[RTC_YEAR2
]) * 100;
321 static void s5m8763_tm_to_data(struct rtc_time
*tm
, u8
*data
)
323 data
[RTC_SEC
] = bin2bcd(tm
->tm_sec
);
324 data
[RTC_MIN
] = bin2bcd(tm
->tm_min
);
325 data
[RTC_HOUR
] = bin2bcd(tm
->tm_hour
);
326 data
[RTC_WEEKDAY
] = tm
->tm_wday
;
327 data
[RTC_DATE
] = bin2bcd(tm
->tm_mday
);
328 data
[RTC_MONTH
] = bin2bcd(tm
->tm_mon
);
329 data
[RTC_YEAR1
] = bin2bcd(tm
->tm_year
% 100);
330 data
[RTC_YEAR2
] = bin2bcd((tm
->tm_year
+ 1900) / 100);
333 static int s5m_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
335 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
336 u8 data
[info
->regs
->regs_count
];
339 if (info
->device_type
== S2MPS15X
|| info
->device_type
== S2MPS14X
||
340 info
->device_type
== S2MPS13X
) {
341 ret
= regmap_update_bits(info
->regmap
,
342 info
->regs
->rtc_udr_update
,
343 S2MPS_RTC_RUDR_MASK
, S2MPS_RTC_RUDR_MASK
);
346 "Failed to prepare registers for time reading: %d\n",
351 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->time
, data
,
352 info
->regs
->regs_count
);
356 switch (info
->device_type
) {
358 s5m8763_data_to_tm(data
, tm
);
365 s5m8767_data_to_tm(data
, tm
, info
->rtc_24hr_mode
);
372 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
373 1900 + tm
->tm_year
, 1 + tm
->tm_mon
, tm
->tm_mday
,
374 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
, tm
->tm_wday
);
376 return rtc_valid_tm(tm
);
379 static int s5m_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
381 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
382 u8 data
[info
->regs
->regs_count
];
385 switch (info
->device_type
) {
387 s5m8763_tm_to_data(tm
, data
);
393 ret
= s5m8767_tm_to_data(tm
, data
);
402 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
403 1900 + tm
->tm_year
, 1 + tm
->tm_mon
, tm
->tm_mday
,
404 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
, tm
->tm_wday
);
406 ret
= regmap_raw_write(info
->regmap
, info
->regs
->time
, data
,
407 info
->regs
->regs_count
);
411 ret
= s5m8767_rtc_set_time_reg(info
);
416 static int s5m_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
418 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
419 u8 data
[info
->regs
->regs_count
];
423 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->alarm0
, data
,
424 info
->regs
->regs_count
);
428 switch (info
->device_type
) {
430 s5m8763_data_to_tm(data
, &alrm
->time
);
431 ret
= regmap_read(info
->regmap
, S5M_ALARM0_CONF
, &val
);
435 alrm
->enabled
= !!val
;
442 s5m8767_data_to_tm(data
, &alrm
->time
, info
->rtc_24hr_mode
);
444 for (i
= 0; i
< info
->regs
->regs_count
; i
++) {
445 if (data
[i
] & ALARM_ENABLE_MASK
) {
456 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
457 1900 + alrm
->time
.tm_year
, 1 + alrm
->time
.tm_mon
,
458 alrm
->time
.tm_mday
, alrm
->time
.tm_hour
,
459 alrm
->time
.tm_min
, alrm
->time
.tm_sec
,
462 ret
= s5m_check_peding_alarm_interrupt(info
, alrm
);
467 static int s5m_rtc_stop_alarm(struct s5m_rtc_info
*info
)
469 u8 data
[info
->regs
->regs_count
];
473 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->alarm0
, data
,
474 info
->regs
->regs_count
);
478 s5m8767_data_to_tm(data
, &tm
, info
->rtc_24hr_mode
);
479 dev_dbg(info
->dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
480 1900 + tm
.tm_year
, 1 + tm
.tm_mon
, tm
.tm_mday
,
481 tm
.tm_hour
, tm
.tm_min
, tm
.tm_sec
, tm
.tm_wday
);
483 switch (info
->device_type
) {
485 ret
= regmap_write(info
->regmap
, S5M_ALARM0_CONF
, 0);
492 for (i
= 0; i
< info
->regs
->regs_count
; i
++)
493 data
[i
] &= ~ALARM_ENABLE_MASK
;
495 ret
= regmap_raw_write(info
->regmap
, info
->regs
->alarm0
, data
,
496 info
->regs
->regs_count
);
500 ret
= s5m8767_rtc_set_alarm_reg(info
);
511 static int s5m_rtc_start_alarm(struct s5m_rtc_info
*info
)
514 u8 data
[info
->regs
->regs_count
];
518 ret
= regmap_bulk_read(info
->regmap
, info
->regs
->alarm0
, data
,
519 info
->regs
->regs_count
);
523 s5m8767_data_to_tm(data
, &tm
, info
->rtc_24hr_mode
);
524 dev_dbg(info
->dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
525 1900 + tm
.tm_year
, 1 + tm
.tm_mon
, tm
.tm_mday
,
526 tm
.tm_hour
, tm
.tm_min
, tm
.tm_sec
, tm
.tm_wday
);
528 switch (info
->device_type
) {
531 ret
= regmap_write(info
->regmap
, S5M_ALARM0_CONF
, alarm0_conf
);
538 data
[RTC_SEC
] |= ALARM_ENABLE_MASK
;
539 data
[RTC_MIN
] |= ALARM_ENABLE_MASK
;
540 data
[RTC_HOUR
] |= ALARM_ENABLE_MASK
;
541 data
[RTC_WEEKDAY
] &= ~ALARM_ENABLE_MASK
;
542 if (data
[RTC_DATE
] & 0x1f)
543 data
[RTC_DATE
] |= ALARM_ENABLE_MASK
;
544 if (data
[RTC_MONTH
] & 0xf)
545 data
[RTC_MONTH
] |= ALARM_ENABLE_MASK
;
546 if (data
[RTC_YEAR1
] & 0x7f)
547 data
[RTC_YEAR1
] |= ALARM_ENABLE_MASK
;
549 ret
= regmap_raw_write(info
->regmap
, info
->regs
->alarm0
, data
,
550 info
->regs
->regs_count
);
553 ret
= s5m8767_rtc_set_alarm_reg(info
);
564 static int s5m_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
566 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
567 u8 data
[info
->regs
->regs_count
];
570 switch (info
->device_type
) {
572 s5m8763_tm_to_data(&alrm
->time
, data
);
579 s5m8767_tm_to_data(&alrm
->time
, data
);
586 dev_dbg(dev
, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__
,
587 1900 + alrm
->time
.tm_year
, 1 + alrm
->time
.tm_mon
,
588 alrm
->time
.tm_mday
, alrm
->time
.tm_hour
, alrm
->time
.tm_min
,
589 alrm
->time
.tm_sec
, alrm
->time
.tm_wday
);
591 ret
= s5m_rtc_stop_alarm(info
);
595 ret
= regmap_raw_write(info
->regmap
, info
->regs
->alarm0
, data
,
596 info
->regs
->regs_count
);
600 ret
= s5m8767_rtc_set_alarm_reg(info
);
605 ret
= s5m_rtc_start_alarm(info
);
610 static int s5m_rtc_alarm_irq_enable(struct device
*dev
,
611 unsigned int enabled
)
613 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
616 return s5m_rtc_start_alarm(info
);
618 return s5m_rtc_stop_alarm(info
);
621 static irqreturn_t
s5m_rtc_alarm_irq(int irq
, void *data
)
623 struct s5m_rtc_info
*info
= data
;
625 rtc_update_irq(info
->rtc_dev
, 1, RTC_IRQF
| RTC_AF
);
630 static const struct rtc_class_ops s5m_rtc_ops
= {
631 .read_time
= s5m_rtc_read_time
,
632 .set_time
= s5m_rtc_set_time
,
633 .read_alarm
= s5m_rtc_read_alarm
,
634 .set_alarm
= s5m_rtc_set_alarm
,
635 .alarm_irq_enable
= s5m_rtc_alarm_irq_enable
,
638 static int s5m8767_rtc_init_reg(struct s5m_rtc_info
*info
)
643 switch (info
->device_type
) {
646 /* UDR update time. Default of 7.32 ms is too long. */
647 ret
= regmap_update_bits(info
->regmap
, S5M_RTC_UDR_CON
,
648 S5M_RTC_UDR_T_MASK
, S5M_RTC_UDR_T_450_US
);
650 dev_err(info
->dev
, "%s: fail to change UDR time: %d\n",
653 /* Set RTC control register : Binary mode, 24hour mode */
654 data
[0] = (1 << BCD_EN_SHIFT
) | (1 << MODEL24_SHIFT
);
655 data
[1] = (0 << BCD_EN_SHIFT
) | (1 << MODEL24_SHIFT
);
657 ret
= regmap_raw_write(info
->regmap
, S5M_ALARM0_CONF
, data
, 2);
663 data
[0] = (0 << BCD_EN_SHIFT
) | (1 << MODEL24_SHIFT
);
664 ret
= regmap_write(info
->regmap
, info
->regs
->ctrl
, data
[0]);
669 * Should set WUDR & (RUDR or AUDR) bits to high after writing
670 * RTC_CTRL register like writing Alarm registers. We can't find
671 * the description from datasheet but vendor code does that
674 ret
= s5m8767_rtc_set_alarm_reg(info
);
681 info
->rtc_24hr_mode
= 1;
683 dev_err(info
->dev
, "%s: fail to write controlm reg(%d)\n",
691 static int s5m_rtc_probe(struct platform_device
*pdev
)
693 struct sec_pmic_dev
*s5m87xx
= dev_get_drvdata(pdev
->dev
.parent
);
694 struct sec_platform_data
*pdata
= s5m87xx
->pdata
;
695 struct s5m_rtc_info
*info
;
696 const struct regmap_config
*regmap_cfg
;
700 dev_err(pdev
->dev
.parent
, "Platform data not supplied\n");
704 info
= devm_kzalloc(&pdev
->dev
, sizeof(*info
), GFP_KERNEL
);
708 switch (platform_get_device_id(pdev
)->driver_data
) {
712 regmap_cfg
= &s2mps14_rtc_regmap_config
;
713 info
->regs
= &s2mps_rtc_regs
;
714 alarm_irq
= S2MPS14_IRQ_RTCA0
;
717 regmap_cfg
= &s5m_rtc_regmap_config
;
718 info
->regs
= &s5m_rtc_regs
;
719 alarm_irq
= S5M8763_IRQ_ALARM0
;
722 regmap_cfg
= &s5m_rtc_regmap_config
;
723 info
->regs
= &s5m_rtc_regs
;
724 alarm_irq
= S5M8767_IRQ_RTCA1
;
728 "Device type %lu is not supported by RTC driver\n",
729 platform_get_device_id(pdev
)->driver_data
);
733 info
->i2c
= i2c_new_dummy(s5m87xx
->i2c
->adapter
, RTC_I2C_ADDR
);
735 dev_err(&pdev
->dev
, "Failed to allocate I2C for RTC\n");
739 info
->regmap
= devm_regmap_init_i2c(info
->i2c
, regmap_cfg
);
740 if (IS_ERR(info
->regmap
)) {
741 ret
= PTR_ERR(info
->regmap
);
742 dev_err(&pdev
->dev
, "Failed to allocate RTC register map: %d\n",
747 info
->dev
= &pdev
->dev
;
748 info
->s5m87xx
= s5m87xx
;
749 info
->device_type
= platform_get_device_id(pdev
)->driver_data
;
751 if (s5m87xx
->irq_data
) {
752 info
->irq
= regmap_irq_get_virq(s5m87xx
->irq_data
, alarm_irq
);
753 if (info
->irq
<= 0) {
755 dev_err(&pdev
->dev
, "Failed to get virtual IRQ %d\n",
761 platform_set_drvdata(pdev
, info
);
763 ret
= s5m8767_rtc_init_reg(info
);
765 device_init_wakeup(&pdev
->dev
, 1);
767 info
->rtc_dev
= devm_rtc_device_register(&pdev
->dev
, "s5m-rtc",
768 &s5m_rtc_ops
, THIS_MODULE
);
770 if (IS_ERR(info
->rtc_dev
)) {
771 ret
= PTR_ERR(info
->rtc_dev
);
776 dev_info(&pdev
->dev
, "Alarm IRQ not available\n");
780 ret
= devm_request_threaded_irq(&pdev
->dev
, info
->irq
, NULL
,
781 s5m_rtc_alarm_irq
, 0, "rtc-alarm0",
784 dev_err(&pdev
->dev
, "Failed to request alarm IRQ: %d: %d\n",
792 i2c_unregister_device(info
->i2c
);
797 static int s5m_rtc_remove(struct platform_device
*pdev
)
799 struct s5m_rtc_info
*info
= platform_get_drvdata(pdev
);
801 i2c_unregister_device(info
->i2c
);
806 #ifdef CONFIG_PM_SLEEP
807 static int s5m_rtc_resume(struct device
*dev
)
809 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
812 if (info
->irq
&& device_may_wakeup(dev
))
813 ret
= disable_irq_wake(info
->irq
);
818 static int s5m_rtc_suspend(struct device
*dev
)
820 struct s5m_rtc_info
*info
= dev_get_drvdata(dev
);
823 if (info
->irq
&& device_may_wakeup(dev
))
824 ret
= enable_irq_wake(info
->irq
);
828 #endif /* CONFIG_PM_SLEEP */
830 static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops
, s5m_rtc_suspend
, s5m_rtc_resume
);
832 static const struct platform_device_id s5m_rtc_id
[] = {
833 { "s5m-rtc", S5M8767X
},
834 { "s2mps13-rtc", S2MPS13X
},
835 { "s2mps14-rtc", S2MPS14X
},
836 { "s2mps15-rtc", S2MPS15X
},
839 MODULE_DEVICE_TABLE(platform
, s5m_rtc_id
);
841 static struct platform_driver s5m_rtc_driver
= {
844 .pm
= &s5m_rtc_pm_ops
,
846 .probe
= s5m_rtc_probe
,
847 .remove
= s5m_rtc_remove
,
848 .id_table
= s5m_rtc_id
,
851 module_platform_driver(s5m_rtc_driver
);
853 /* Module information */
854 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
855 MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
856 MODULE_LICENSE("GPL");
857 MODULE_ALIAS("platform:s5m-rtc");