rtc: rtc-twl: Remove lockdep related local_irq_enable()
[deliverable/linux.git] / drivers / rtc / rtc-twl.c
1 /*
2 * rtc-twl.c -- TWL Real Time Clock interface
3 *
4 * Copyright (C) 2007 MontaVista Software, Inc
5 * Author: Alexandre Rusev <source@mvista.com>
6 *
7 * Based on original TI driver twl4030-rtc.c
8 * Copyright (C) 2006 Texas Instruments, Inc.
9 *
10 * Based on rtc-omap.c
11 * Copyright (C) 2003 MontaVista Software, Inc.
12 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
13 * Copyright (C) 2006 David Brownell
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 */
20
21 #include <linux/kernel.h>
22 #include <linux/errno.h>
23 #include <linux/init.h>
24 #include <linux/module.h>
25 #include <linux/types.h>
26 #include <linux/rtc.h>
27 #include <linux/bcd.h>
28 #include <linux/platform_device.h>
29 #include <linux/interrupt.h>
30
31 #include <linux/i2c/twl.h>
32
33
34 /*
35 * RTC block register offsets (use TWL_MODULE_RTC)
36 */
37 enum {
38 REG_SECONDS_REG = 0,
39 REG_MINUTES_REG,
40 REG_HOURS_REG,
41 REG_DAYS_REG,
42 REG_MONTHS_REG,
43 REG_YEARS_REG,
44 REG_WEEKS_REG,
45
46 REG_ALARM_SECONDS_REG,
47 REG_ALARM_MINUTES_REG,
48 REG_ALARM_HOURS_REG,
49 REG_ALARM_DAYS_REG,
50 REG_ALARM_MONTHS_REG,
51 REG_ALARM_YEARS_REG,
52
53 REG_RTC_CTRL_REG,
54 REG_RTC_STATUS_REG,
55 REG_RTC_INTERRUPTS_REG,
56
57 REG_RTC_COMP_LSB_REG,
58 REG_RTC_COMP_MSB_REG,
59 };
60 static const u8 twl4030_rtc_reg_map[] = {
61 [REG_SECONDS_REG] = 0x00,
62 [REG_MINUTES_REG] = 0x01,
63 [REG_HOURS_REG] = 0x02,
64 [REG_DAYS_REG] = 0x03,
65 [REG_MONTHS_REG] = 0x04,
66 [REG_YEARS_REG] = 0x05,
67 [REG_WEEKS_REG] = 0x06,
68
69 [REG_ALARM_SECONDS_REG] = 0x07,
70 [REG_ALARM_MINUTES_REG] = 0x08,
71 [REG_ALARM_HOURS_REG] = 0x09,
72 [REG_ALARM_DAYS_REG] = 0x0A,
73 [REG_ALARM_MONTHS_REG] = 0x0B,
74 [REG_ALARM_YEARS_REG] = 0x0C,
75
76 [REG_RTC_CTRL_REG] = 0x0D,
77 [REG_RTC_STATUS_REG] = 0x0E,
78 [REG_RTC_INTERRUPTS_REG] = 0x0F,
79
80 [REG_RTC_COMP_LSB_REG] = 0x10,
81 [REG_RTC_COMP_MSB_REG] = 0x11,
82 };
83 static const u8 twl6030_rtc_reg_map[] = {
84 [REG_SECONDS_REG] = 0x00,
85 [REG_MINUTES_REG] = 0x01,
86 [REG_HOURS_REG] = 0x02,
87 [REG_DAYS_REG] = 0x03,
88 [REG_MONTHS_REG] = 0x04,
89 [REG_YEARS_REG] = 0x05,
90 [REG_WEEKS_REG] = 0x06,
91
92 [REG_ALARM_SECONDS_REG] = 0x08,
93 [REG_ALARM_MINUTES_REG] = 0x09,
94 [REG_ALARM_HOURS_REG] = 0x0A,
95 [REG_ALARM_DAYS_REG] = 0x0B,
96 [REG_ALARM_MONTHS_REG] = 0x0C,
97 [REG_ALARM_YEARS_REG] = 0x0D,
98
99 [REG_RTC_CTRL_REG] = 0x10,
100 [REG_RTC_STATUS_REG] = 0x11,
101 [REG_RTC_INTERRUPTS_REG] = 0x12,
102
103 [REG_RTC_COMP_LSB_REG] = 0x13,
104 [REG_RTC_COMP_MSB_REG] = 0x14,
105 };
106
107 /* RTC_CTRL_REG bitfields */
108 #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
109 #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
110 #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
111 #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
112 #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
113 #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
114 #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
115
116 /* RTC_STATUS_REG bitfields */
117 #define BIT_RTC_STATUS_REG_RUN_M 0x02
118 #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
119 #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
120 #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
121 #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
122 #define BIT_RTC_STATUS_REG_ALARM_M 0x40
123 #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
124
125 /* RTC_INTERRUPTS_REG bitfields */
126 #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
127 #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
128 #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
129
130
131 /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
132 #define ALL_TIME_REGS 6
133
134 /*----------------------------------------------------------------------*/
135 static u8 *rtc_reg_map;
136
137 /*
138 * Supports 1 byte read from TWL RTC register.
139 */
140 static int twl_rtc_read_u8(u8 *data, u8 reg)
141 {
142 int ret;
143
144 ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
145 if (ret < 0)
146 pr_err("twl_rtc: Could not read TWL"
147 "register %X - error %d\n", reg, ret);
148 return ret;
149 }
150
151 /*
152 * Supports 1 byte write to TWL RTC registers.
153 */
154 static int twl_rtc_write_u8(u8 data, u8 reg)
155 {
156 int ret;
157
158 ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
159 if (ret < 0)
160 pr_err("twl_rtc: Could not write TWL"
161 "register %X - error %d\n", reg, ret);
162 return ret;
163 }
164
165 /*
166 * Cache the value for timer/alarm interrupts register; this is
167 * only changed by callers holding rtc ops lock (or resume).
168 */
169 static unsigned char rtc_irq_bits;
170
171 /*
172 * Enable 1/second update and/or alarm interrupts.
173 */
174 static int set_rtc_irq_bit(unsigned char bit)
175 {
176 unsigned char val;
177 int ret;
178
179 val = rtc_irq_bits | bit;
180 val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
181 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
182 if (ret == 0)
183 rtc_irq_bits = val;
184
185 return ret;
186 }
187
188 /*
189 * Disable update and/or alarm interrupts.
190 */
191 static int mask_rtc_irq_bit(unsigned char bit)
192 {
193 unsigned char val;
194 int ret;
195
196 val = rtc_irq_bits & ~bit;
197 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
198 if (ret == 0)
199 rtc_irq_bits = val;
200
201 return ret;
202 }
203
204 static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
205 {
206 int ret;
207
208 if (enabled)
209 ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
210 else
211 ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
212
213 return ret;
214 }
215
216 /*
217 * Gets current TWL RTC time and date parameters.
218 *
219 * The RTC's time/alarm representation is not what gmtime(3) requires
220 * Linux to use:
221 *
222 * - Months are 1..12 vs Linux 0-11
223 * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
224 */
225 static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
226 {
227 unsigned char rtc_data[ALL_TIME_REGS + 1];
228 int ret;
229 u8 save_control;
230
231 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
232 if (ret < 0)
233 return ret;
234
235 save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;
236
237 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
238 if (ret < 0)
239 return ret;
240
241 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
242 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
243
244 if (ret < 0) {
245 dev_err(dev, "rtc_read_time error %d\n", ret);
246 return ret;
247 }
248
249 tm->tm_sec = bcd2bin(rtc_data[0]);
250 tm->tm_min = bcd2bin(rtc_data[1]);
251 tm->tm_hour = bcd2bin(rtc_data[2]);
252 tm->tm_mday = bcd2bin(rtc_data[3]);
253 tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
254 tm->tm_year = bcd2bin(rtc_data[5]) + 100;
255
256 return ret;
257 }
258
259 static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
260 {
261 unsigned char save_control;
262 unsigned char rtc_data[ALL_TIME_REGS + 1];
263 int ret;
264
265 rtc_data[1] = bin2bcd(tm->tm_sec);
266 rtc_data[2] = bin2bcd(tm->tm_min);
267 rtc_data[3] = bin2bcd(tm->tm_hour);
268 rtc_data[4] = bin2bcd(tm->tm_mday);
269 rtc_data[5] = bin2bcd(tm->tm_mon + 1);
270 rtc_data[6] = bin2bcd(tm->tm_year - 100);
271
272 /* Stop RTC while updating the TC registers */
273 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
274 if (ret < 0)
275 goto out;
276
277 save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
278 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
279 if (ret < 0)
280 goto out;
281
282 /* update all the time registers in one shot */
283 ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data,
284 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
285 if (ret < 0) {
286 dev_err(dev, "rtc_set_time error %d\n", ret);
287 goto out;
288 }
289
290 /* Start back RTC */
291 save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
292 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
293
294 out:
295 return ret;
296 }
297
298 /*
299 * Gets current TWL RTC alarm time.
300 */
301 static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
302 {
303 unsigned char rtc_data[ALL_TIME_REGS + 1];
304 int ret;
305
306 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
307 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
308 if (ret < 0) {
309 dev_err(dev, "rtc_read_alarm error %d\n", ret);
310 return ret;
311 }
312
313 /* some of these fields may be wildcard/"match all" */
314 alm->time.tm_sec = bcd2bin(rtc_data[0]);
315 alm->time.tm_min = bcd2bin(rtc_data[1]);
316 alm->time.tm_hour = bcd2bin(rtc_data[2]);
317 alm->time.tm_mday = bcd2bin(rtc_data[3]);
318 alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
319 alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
320
321 /* report cached alarm enable state */
322 if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
323 alm->enabled = 1;
324
325 return ret;
326 }
327
328 static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
329 {
330 unsigned char alarm_data[ALL_TIME_REGS + 1];
331 int ret;
332
333 ret = twl_rtc_alarm_irq_enable(dev, 0);
334 if (ret)
335 goto out;
336
337 alarm_data[1] = bin2bcd(alm->time.tm_sec);
338 alarm_data[2] = bin2bcd(alm->time.tm_min);
339 alarm_data[3] = bin2bcd(alm->time.tm_hour);
340 alarm_data[4] = bin2bcd(alm->time.tm_mday);
341 alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
342 alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
343
344 /* update all the alarm registers in one shot */
345 ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,
346 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
347 if (ret) {
348 dev_err(dev, "rtc_set_alarm error %d\n", ret);
349 goto out;
350 }
351
352 if (alm->enabled)
353 ret = twl_rtc_alarm_irq_enable(dev, 1);
354 out:
355 return ret;
356 }
357
358 static irqreturn_t twl_rtc_interrupt(int irq, void *rtc)
359 {
360 unsigned long events = 0;
361 int ret = IRQ_NONE;
362 int res;
363 u8 rd_reg;
364
365 res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
366 if (res)
367 goto out;
368 /*
369 * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
370 * only one (ALARM or RTC) interrupt source may be enabled
371 * at time, we also could check our results
372 * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
373 */
374 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
375 events |= RTC_IRQF | RTC_AF;
376 else
377 events |= RTC_IRQF | RTC_UF;
378
379 res = twl_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M,
380 REG_RTC_STATUS_REG);
381 if (res)
382 goto out;
383
384 if (twl_class_is_4030()) {
385 /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
386 * needs 2 reads to clear the interrupt. One read is done in
387 * do_twl_pwrirq(). Doing the second read, to clear
388 * the bit.
389 *
390 * FIXME the reason PWR_ISR1 needs an extra read is that
391 * RTC_IF retriggered until we cleared REG_ALARM_M above.
392 * But re-reading like this is a bad hack; by doing so we
393 * risk wrongly clearing status for some other IRQ (losing
394 * the interrupt). Be smarter about handling RTC_UF ...
395 */
396 res = twl_i2c_read_u8(TWL4030_MODULE_INT,
397 &rd_reg, TWL4030_INT_PWR_ISR1);
398 if (res)
399 goto out;
400 }
401
402 /* Notify RTC core on event */
403 rtc_update_irq(rtc, 1, events);
404
405 ret = IRQ_HANDLED;
406 out:
407 return ret;
408 }
409
410 static struct rtc_class_ops twl_rtc_ops = {
411 .read_time = twl_rtc_read_time,
412 .set_time = twl_rtc_set_time,
413 .read_alarm = twl_rtc_read_alarm,
414 .set_alarm = twl_rtc_set_alarm,
415 .alarm_irq_enable = twl_rtc_alarm_irq_enable,
416 };
417
418 /*----------------------------------------------------------------------*/
419
420 static int __devinit twl_rtc_probe(struct platform_device *pdev)
421 {
422 struct rtc_device *rtc;
423 int ret = 0;
424 int irq = platform_get_irq(pdev, 0);
425 u8 rd_reg;
426
427 if (irq <= 0)
428 return -EINVAL;
429
430 rtc = rtc_device_register(pdev->name,
431 &pdev->dev, &twl_rtc_ops, THIS_MODULE);
432 if (IS_ERR(rtc)) {
433 ret = PTR_ERR(rtc);
434 dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
435 PTR_ERR(rtc));
436 goto out0;
437
438 }
439
440 platform_set_drvdata(pdev, rtc);
441
442 ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
443 if (ret < 0)
444 goto out1;
445
446 if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
447 dev_warn(&pdev->dev, "Power up reset detected.\n");
448
449 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
450 dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
451
452 /* Clear RTC Power up reset and pending alarm interrupts */
453 ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
454 if (ret < 0)
455 goto out1;
456
457 ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt,
458 IRQF_TRIGGER_RISING,
459 dev_name(&rtc->dev), rtc);
460 if (ret < 0) {
461 dev_err(&pdev->dev, "IRQ is not free.\n");
462 goto out1;
463 }
464
465 if (twl_class_is_6030()) {
466 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
467 REG_INT_MSK_LINE_A);
468 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
469 REG_INT_MSK_STS_A);
470 }
471
472 /* Check RTC module status, Enable if it is off */
473 ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
474 if (ret < 0)
475 goto out2;
476
477 if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
478 dev_info(&pdev->dev, "Enabling TWL-RTC.\n");
479 rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
480 ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
481 if (ret < 0)
482 goto out2;
483 }
484
485 /* init cached IRQ enable bits */
486 ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
487 if (ret < 0)
488 goto out2;
489
490 return ret;
491
492 out2:
493 free_irq(irq, rtc);
494 out1:
495 rtc_device_unregister(rtc);
496 out0:
497 return ret;
498 }
499
500 /*
501 * Disable all TWL RTC module interrupts.
502 * Sets status flag to free.
503 */
504 static int __devexit twl_rtc_remove(struct platform_device *pdev)
505 {
506 /* leave rtc running, but disable irqs */
507 struct rtc_device *rtc = platform_get_drvdata(pdev);
508 int irq = platform_get_irq(pdev, 0);
509
510 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
511 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
512 if (twl_class_is_6030()) {
513 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
514 REG_INT_MSK_LINE_A);
515 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
516 REG_INT_MSK_STS_A);
517 }
518
519
520 free_irq(irq, rtc);
521
522 rtc_device_unregister(rtc);
523 platform_set_drvdata(pdev, NULL);
524 return 0;
525 }
526
527 static void twl_rtc_shutdown(struct platform_device *pdev)
528 {
529 /* mask timer interrupts, but leave alarm interrupts on to enable
530 power-on when alarm is triggered */
531 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
532 }
533
534 #ifdef CONFIG_PM
535
536 static unsigned char irqstat;
537
538 static int twl_rtc_suspend(struct platform_device *pdev, pm_message_t state)
539 {
540 irqstat = rtc_irq_bits;
541
542 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
543 return 0;
544 }
545
546 static int twl_rtc_resume(struct platform_device *pdev)
547 {
548 set_rtc_irq_bit(irqstat);
549 return 0;
550 }
551
552 #else
553 #define twl_rtc_suspend NULL
554 #define twl_rtc_resume NULL
555 #endif
556
557 MODULE_ALIAS("platform:twl_rtc");
558
559 static struct platform_driver twl4030rtc_driver = {
560 .probe = twl_rtc_probe,
561 .remove = __devexit_p(twl_rtc_remove),
562 .shutdown = twl_rtc_shutdown,
563 .suspend = twl_rtc_suspend,
564 .resume = twl_rtc_resume,
565 .driver = {
566 .owner = THIS_MODULE,
567 .name = "twl_rtc",
568 },
569 };
570
571 static int __init twl_rtc_init(void)
572 {
573 if (twl_class_is_4030())
574 rtc_reg_map = (u8 *) twl4030_rtc_reg_map;
575 else
576 rtc_reg_map = (u8 *) twl6030_rtc_reg_map;
577
578 return platform_driver_register(&twl4030rtc_driver);
579 }
580 module_init(twl_rtc_init);
581
582 static void __exit twl_rtc_exit(void)
583 {
584 platform_driver_unregister(&twl4030rtc_driver);
585 }
586 module_exit(twl_rtc_exit);
587
588 MODULE_AUTHOR("Texas Instruments, MontaVista Software");
589 MODULE_LICENSE("GPL");
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