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Merge branch 'next/drivers' into HEAD
[deliverable/linux.git] / drivers / s390 / net / qeth_core_main.c
1 /*
2 * Copyright IBM Corp. 2007, 2009
3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
9 #define KMSG_COMPONENT "qeth"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/string.h>
15 #include <linux/errno.h>
16 #include <linux/kernel.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
21 #include <linux/slab.h>
22 #include <net/iucv/af_iucv.h>
23
24 #include <asm/ebcdic.h>
25 #include <asm/io.h>
26 #include <asm/sysinfo.h>
27 #include <asm/compat.h>
28
29 #include "qeth_core.h"
30
31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 /* N P A M L V H */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40 };
41 EXPORT_SYMBOL_GPL(qeth_dbf);
42
43 struct qeth_card_list_struct qeth_core_card_list;
44 EXPORT_SYMBOL_GPL(qeth_core_card_list);
45 struct kmem_cache *qeth_core_header_cache;
46 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
47 static struct kmem_cache *qeth_qdio_outbuf_cache;
48
49 static struct device *qeth_core_root_dev;
50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
51 static struct lock_class_key qdio_out_skb_queue_key;
52 static struct mutex qeth_mod_mutex;
53
54 static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56 static int qeth_issue_next_read(struct qeth_card *);
57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59 static void qeth_free_buffer_pool(struct qeth_card *);
60 static int qeth_qdio_establish(struct qeth_card *);
61 static void qeth_free_qdio_buffers(struct qeth_card *);
62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
70
71 static inline const char *qeth_get_cardname(struct qeth_card *card)
72 {
73 if (card->info.guestlan) {
74 switch (card->info.type) {
75 case QETH_CARD_TYPE_OSD:
76 return " Guest LAN QDIO";
77 case QETH_CARD_TYPE_IQD:
78 return " Guest LAN Hiper";
79 case QETH_CARD_TYPE_OSM:
80 return " Guest LAN QDIO - OSM";
81 case QETH_CARD_TYPE_OSX:
82 return " Guest LAN QDIO - OSX";
83 default:
84 return " unknown";
85 }
86 } else {
87 switch (card->info.type) {
88 case QETH_CARD_TYPE_OSD:
89 return " OSD Express";
90 case QETH_CARD_TYPE_IQD:
91 return " HiperSockets";
92 case QETH_CARD_TYPE_OSN:
93 return " OSN QDIO";
94 case QETH_CARD_TYPE_OSM:
95 return " OSM QDIO";
96 case QETH_CARD_TYPE_OSX:
97 return " OSX QDIO";
98 default:
99 return " unknown";
100 }
101 }
102 return " n/a";
103 }
104
105 /* max length to be returned: 14 */
106 const char *qeth_get_cardname_short(struct qeth_card *card)
107 {
108 if (card->info.guestlan) {
109 switch (card->info.type) {
110 case QETH_CARD_TYPE_OSD:
111 return "GuestLAN QDIO";
112 case QETH_CARD_TYPE_IQD:
113 return "GuestLAN Hiper";
114 case QETH_CARD_TYPE_OSM:
115 return "GuestLAN OSM";
116 case QETH_CARD_TYPE_OSX:
117 return "GuestLAN OSX";
118 default:
119 return "unknown";
120 }
121 } else {
122 switch (card->info.type) {
123 case QETH_CARD_TYPE_OSD:
124 switch (card->info.link_type) {
125 case QETH_LINK_TYPE_FAST_ETH:
126 return "OSD_100";
127 case QETH_LINK_TYPE_HSTR:
128 return "HSTR";
129 case QETH_LINK_TYPE_GBIT_ETH:
130 return "OSD_1000";
131 case QETH_LINK_TYPE_10GBIT_ETH:
132 return "OSD_10GIG";
133 case QETH_LINK_TYPE_LANE_ETH100:
134 return "OSD_FE_LANE";
135 case QETH_LINK_TYPE_LANE_TR:
136 return "OSD_TR_LANE";
137 case QETH_LINK_TYPE_LANE_ETH1000:
138 return "OSD_GbE_LANE";
139 case QETH_LINK_TYPE_LANE:
140 return "OSD_ATM_LANE";
141 default:
142 return "OSD_Express";
143 }
144 case QETH_CARD_TYPE_IQD:
145 return "HiperSockets";
146 case QETH_CARD_TYPE_OSN:
147 return "OSN";
148 case QETH_CARD_TYPE_OSM:
149 return "OSM_1000";
150 case QETH_CARD_TYPE_OSX:
151 return "OSX_10GIG";
152 default:
153 return "unknown";
154 }
155 }
156 return "n/a";
157 }
158
159 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
160 int clear_start_mask)
161 {
162 unsigned long flags;
163
164 spin_lock_irqsave(&card->thread_mask_lock, flags);
165 card->thread_allowed_mask = threads;
166 if (clear_start_mask)
167 card->thread_start_mask &= threads;
168 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
169 wake_up(&card->wait_q);
170 }
171 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
172
173 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
174 {
175 unsigned long flags;
176 int rc = 0;
177
178 spin_lock_irqsave(&card->thread_mask_lock, flags);
179 rc = (card->thread_running_mask & threads);
180 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
181 return rc;
182 }
183 EXPORT_SYMBOL_GPL(qeth_threads_running);
184
185 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
186 {
187 return wait_event_interruptible(card->wait_q,
188 qeth_threads_running(card, threads) == 0);
189 }
190 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
191
192 void qeth_clear_working_pool_list(struct qeth_card *card)
193 {
194 struct qeth_buffer_pool_entry *pool_entry, *tmp;
195
196 QETH_CARD_TEXT(card, 5, "clwrklst");
197 list_for_each_entry_safe(pool_entry, tmp,
198 &card->qdio.in_buf_pool.entry_list, list){
199 list_del(&pool_entry->list);
200 }
201 }
202 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
203
204 static int qeth_alloc_buffer_pool(struct qeth_card *card)
205 {
206 struct qeth_buffer_pool_entry *pool_entry;
207 void *ptr;
208 int i, j;
209
210 QETH_CARD_TEXT(card, 5, "alocpool");
211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
213 if (!pool_entry) {
214 qeth_free_buffer_pool(card);
215 return -ENOMEM;
216 }
217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
218 ptr = (void *) __get_free_page(GFP_KERNEL);
219 if (!ptr) {
220 while (j > 0)
221 free_page((unsigned long)
222 pool_entry->elements[--j]);
223 kfree(pool_entry);
224 qeth_free_buffer_pool(card);
225 return -ENOMEM;
226 }
227 pool_entry->elements[j] = ptr;
228 }
229 list_add(&pool_entry->init_list,
230 &card->qdio.init_pool.entry_list);
231 }
232 return 0;
233 }
234
235 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
236 {
237 QETH_CARD_TEXT(card, 2, "realcbp");
238
239 if ((card->state != CARD_STATE_DOWN) &&
240 (card->state != CARD_STATE_RECOVER))
241 return -EPERM;
242
243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
244 qeth_clear_working_pool_list(card);
245 qeth_free_buffer_pool(card);
246 card->qdio.in_buf_pool.buf_count = bufcnt;
247 card->qdio.init_pool.buf_count = bufcnt;
248 return qeth_alloc_buffer_pool(card);
249 }
250 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
251
252 static inline int qeth_cq_init(struct qeth_card *card)
253 {
254 int rc;
255
256 if (card->options.cq == QETH_CQ_ENABLED) {
257 QETH_DBF_TEXT(SETUP, 2, "cqinit");
258 memset(card->qdio.c_q->qdio_bufs, 0,
259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
260 card->qdio.c_q->next_buf_to_init = 127;
261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
262 card->qdio.no_in_queues - 1, 0,
263 127);
264 if (rc) {
265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
266 goto out;
267 }
268 }
269 rc = 0;
270 out:
271 return rc;
272 }
273
274 static inline int qeth_alloc_cq(struct qeth_card *card)
275 {
276 int rc;
277
278 if (card->options.cq == QETH_CQ_ENABLED) {
279 int i;
280 struct qdio_outbuf_state *outbuf_states;
281
282 QETH_DBF_TEXT(SETUP, 2, "cqon");
283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
284 GFP_KERNEL);
285 if (!card->qdio.c_q) {
286 rc = -1;
287 goto kmsg_out;
288 }
289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
290
291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
292 card->qdio.c_q->bufs[i].buffer =
293 &card->qdio.c_q->qdio_bufs[i];
294 }
295
296 card->qdio.no_in_queues = 2;
297
298 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
299 kzalloc(card->qdio.no_out_queues *
300 QDIO_MAX_BUFFERS_PER_Q *
301 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
302 outbuf_states = card->qdio.out_bufstates;
303 if (outbuf_states == NULL) {
304 rc = -1;
305 goto free_cq_out;
306 }
307 for (i = 0; i < card->qdio.no_out_queues; ++i) {
308 card->qdio.out_qs[i]->bufstates = outbuf_states;
309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
310 }
311 } else {
312 QETH_DBF_TEXT(SETUP, 2, "nocq");
313 card->qdio.c_q = NULL;
314 card->qdio.no_in_queues = 1;
315 }
316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
317 rc = 0;
318 out:
319 return rc;
320 free_cq_out:
321 kfree(card->qdio.c_q);
322 card->qdio.c_q = NULL;
323 kmsg_out:
324 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
325 goto out;
326 }
327
328 static inline void qeth_free_cq(struct qeth_card *card)
329 {
330 if (card->qdio.c_q) {
331 --card->qdio.no_in_queues;
332 kfree(card->qdio.c_q);
333 card->qdio.c_q = NULL;
334 }
335 kfree(card->qdio.out_bufstates);
336 card->qdio.out_bufstates = NULL;
337 }
338
339 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
340 int delayed) {
341 enum iucv_tx_notify n;
342
343 switch (sbalf15) {
344 case 0:
345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
346 break;
347 case 4:
348 case 16:
349 case 17:
350 case 18:
351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
352 TX_NOTIFY_UNREACHABLE;
353 break;
354 default:
355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
356 TX_NOTIFY_GENERALERROR;
357 break;
358 }
359
360 return n;
361 }
362
363 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
364 int bidx, int forced_cleanup)
365 {
366 if (q->card->options.cq != QETH_CQ_ENABLED)
367 return;
368
369 if (q->bufs[bidx]->next_pending != NULL) {
370 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
371 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
372
373 while (c) {
374 if (forced_cleanup ||
375 atomic_read(&c->state) ==
376 QETH_QDIO_BUF_HANDLED_DELAYED) {
377 struct qeth_qdio_out_buffer *f = c;
378 QETH_CARD_TEXT(f->q->card, 5, "fp");
379 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
380 /* release here to avoid interleaving between
381 outbound tasklet and inbound tasklet
382 regarding notifications and lifecycle */
383 qeth_release_skbs(c);
384
385 c = f->next_pending;
386 BUG_ON(head->next_pending != f);
387 head->next_pending = c;
388 kmem_cache_free(qeth_qdio_outbuf_cache, f);
389 } else {
390 head = c;
391 c = c->next_pending;
392 }
393
394 }
395 }
396 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
397 QETH_QDIO_BUF_HANDLED_DELAYED)) {
398 /* for recovery situations */
399 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
400 qeth_init_qdio_out_buf(q, bidx);
401 QETH_CARD_TEXT(q->card, 2, "clprecov");
402 }
403 }
404
405
406 static inline void qeth_qdio_handle_aob(struct qeth_card *card,
407 unsigned long phys_aob_addr) {
408 struct qaob *aob;
409 struct qeth_qdio_out_buffer *buffer;
410 enum iucv_tx_notify notification;
411
412 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
413 QETH_CARD_TEXT(card, 5, "haob");
414 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
415 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
416 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
417
418 BUG_ON(buffer == NULL);
419
420 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
421 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
422 notification = TX_NOTIFY_OK;
423 } else {
424 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING);
425 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
426 notification = TX_NOTIFY_DELAYED_OK;
427 }
428
429 if (aob->aorc != 0) {
430 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
431 notification = qeth_compute_cq_notification(aob->aorc, 1);
432 }
433 qeth_notify_skbs(buffer->q, buffer, notification);
434
435 buffer->aob = NULL;
436 qeth_clear_output_buffer(buffer->q, buffer,
437 QETH_QDIO_BUF_HANDLED_DELAYED);
438
439 /* from here on: do not touch buffer anymore */
440 qdio_release_aob(aob);
441 }
442
443 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
444 {
445 return card->options.cq == QETH_CQ_ENABLED &&
446 card->qdio.c_q != NULL &&
447 queue != 0 &&
448 queue == card->qdio.no_in_queues - 1;
449 }
450
451
452 static int qeth_issue_next_read(struct qeth_card *card)
453 {
454 int rc;
455 struct qeth_cmd_buffer *iob;
456
457 QETH_CARD_TEXT(card, 5, "issnxrd");
458 if (card->read.state != CH_STATE_UP)
459 return -EIO;
460 iob = qeth_get_buffer(&card->read);
461 if (!iob) {
462 dev_warn(&card->gdev->dev, "The qeth device driver "
463 "failed to recover an error on the device\n");
464 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
465 "available\n", dev_name(&card->gdev->dev));
466 return -ENOMEM;
467 }
468 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
469 QETH_CARD_TEXT(card, 6, "noirqpnd");
470 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
471 (addr_t) iob, 0, 0);
472 if (rc) {
473 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
474 "rc=%i\n", dev_name(&card->gdev->dev), rc);
475 atomic_set(&card->read.irq_pending, 0);
476 card->read_or_write_problem = 1;
477 qeth_schedule_recovery(card);
478 wake_up(&card->wait_q);
479 }
480 return rc;
481 }
482
483 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
484 {
485 struct qeth_reply *reply;
486
487 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
488 if (reply) {
489 atomic_set(&reply->refcnt, 1);
490 atomic_set(&reply->received, 0);
491 reply->card = card;
492 };
493 return reply;
494 }
495
496 static void qeth_get_reply(struct qeth_reply *reply)
497 {
498 WARN_ON(atomic_read(&reply->refcnt) <= 0);
499 atomic_inc(&reply->refcnt);
500 }
501
502 static void qeth_put_reply(struct qeth_reply *reply)
503 {
504 WARN_ON(atomic_read(&reply->refcnt) <= 0);
505 if (atomic_dec_and_test(&reply->refcnt))
506 kfree(reply);
507 }
508
509 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
510 struct qeth_card *card)
511 {
512 char *ipa_name;
513 int com = cmd->hdr.command;
514 ipa_name = qeth_get_ipa_cmd_name(com);
515 if (rc)
516 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
517 "x%X \"%s\"\n",
518 ipa_name, com, dev_name(&card->gdev->dev),
519 QETH_CARD_IFNAME(card), rc,
520 qeth_get_ipa_msg(rc));
521 else
522 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
523 ipa_name, com, dev_name(&card->gdev->dev),
524 QETH_CARD_IFNAME(card));
525 }
526
527 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
528 struct qeth_cmd_buffer *iob)
529 {
530 struct qeth_ipa_cmd *cmd = NULL;
531
532 QETH_CARD_TEXT(card, 5, "chkipad");
533 if (IS_IPA(iob->data)) {
534 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
535 if (IS_IPA_REPLY(cmd)) {
536 if (cmd->hdr.command != IPA_CMD_SETCCID &&
537 cmd->hdr.command != IPA_CMD_DELCCID &&
538 cmd->hdr.command != IPA_CMD_MODCCID &&
539 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
540 qeth_issue_ipa_msg(cmd,
541 cmd->hdr.return_code, card);
542 return cmd;
543 } else {
544 switch (cmd->hdr.command) {
545 case IPA_CMD_STOPLAN:
546 dev_warn(&card->gdev->dev,
547 "The link for interface %s on CHPID"
548 " 0x%X failed\n",
549 QETH_CARD_IFNAME(card),
550 card->info.chpid);
551 card->lan_online = 0;
552 if (card->dev && netif_carrier_ok(card->dev))
553 netif_carrier_off(card->dev);
554 return NULL;
555 case IPA_CMD_STARTLAN:
556 dev_info(&card->gdev->dev,
557 "The link for %s on CHPID 0x%X has"
558 " been restored\n",
559 QETH_CARD_IFNAME(card),
560 card->info.chpid);
561 netif_carrier_on(card->dev);
562 card->lan_online = 1;
563 if (card->info.hwtrap)
564 card->info.hwtrap = 2;
565 qeth_schedule_recovery(card);
566 return NULL;
567 case IPA_CMD_MODCCID:
568 return cmd;
569 case IPA_CMD_REGISTER_LOCAL_ADDR:
570 QETH_CARD_TEXT(card, 3, "irla");
571 break;
572 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
573 QETH_CARD_TEXT(card, 3, "urla");
574 break;
575 default:
576 QETH_DBF_MESSAGE(2, "Received data is IPA "
577 "but not a reply!\n");
578 break;
579 }
580 }
581 }
582 return cmd;
583 }
584
585 void qeth_clear_ipacmd_list(struct qeth_card *card)
586 {
587 struct qeth_reply *reply, *r;
588 unsigned long flags;
589
590 QETH_CARD_TEXT(card, 4, "clipalst");
591
592 spin_lock_irqsave(&card->lock, flags);
593 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
594 qeth_get_reply(reply);
595 reply->rc = -EIO;
596 atomic_inc(&reply->received);
597 list_del_init(&reply->list);
598 wake_up(&reply->wait_q);
599 qeth_put_reply(reply);
600 }
601 spin_unlock_irqrestore(&card->lock, flags);
602 atomic_set(&card->write.irq_pending, 0);
603 }
604 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
605
606 static int qeth_check_idx_response(struct qeth_card *card,
607 unsigned char *buffer)
608 {
609 if (!buffer)
610 return 0;
611
612 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
613 if ((buffer[2] & 0xc0) == 0xc0) {
614 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
615 "with cause code 0x%02x%s\n",
616 buffer[4],
617 ((buffer[4] == 0x22) ?
618 " -- try another portname" : ""));
619 QETH_CARD_TEXT(card, 2, "ckidxres");
620 QETH_CARD_TEXT(card, 2, " idxterm");
621 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
622 if (buffer[4] == 0xf6) {
623 dev_err(&card->gdev->dev,
624 "The qeth device is not configured "
625 "for the OSI layer required by z/VM\n");
626 return -EPERM;
627 }
628 return -EIO;
629 }
630 return 0;
631 }
632
633 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
634 __u32 len)
635 {
636 struct qeth_card *card;
637
638 card = CARD_FROM_CDEV(channel->ccwdev);
639 QETH_CARD_TEXT(card, 4, "setupccw");
640 if (channel == &card->read)
641 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
642 else
643 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
644 channel->ccw.count = len;
645 channel->ccw.cda = (__u32) __pa(iob);
646 }
647
648 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
649 {
650 __u8 index;
651
652 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
653 index = channel->io_buf_no;
654 do {
655 if (channel->iob[index].state == BUF_STATE_FREE) {
656 channel->iob[index].state = BUF_STATE_LOCKED;
657 channel->io_buf_no = (channel->io_buf_no + 1) %
658 QETH_CMD_BUFFER_NO;
659 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
660 return channel->iob + index;
661 }
662 index = (index + 1) % QETH_CMD_BUFFER_NO;
663 } while (index != channel->io_buf_no);
664
665 return NULL;
666 }
667
668 void qeth_release_buffer(struct qeth_channel *channel,
669 struct qeth_cmd_buffer *iob)
670 {
671 unsigned long flags;
672
673 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
674 spin_lock_irqsave(&channel->iob_lock, flags);
675 memset(iob->data, 0, QETH_BUFSIZE);
676 iob->state = BUF_STATE_FREE;
677 iob->callback = qeth_send_control_data_cb;
678 iob->rc = 0;
679 spin_unlock_irqrestore(&channel->iob_lock, flags);
680 wake_up(&channel->wait_q);
681 }
682 EXPORT_SYMBOL_GPL(qeth_release_buffer);
683
684 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
685 {
686 struct qeth_cmd_buffer *buffer = NULL;
687 unsigned long flags;
688
689 spin_lock_irqsave(&channel->iob_lock, flags);
690 buffer = __qeth_get_buffer(channel);
691 spin_unlock_irqrestore(&channel->iob_lock, flags);
692 return buffer;
693 }
694
695 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
696 {
697 struct qeth_cmd_buffer *buffer;
698 wait_event(channel->wait_q,
699 ((buffer = qeth_get_buffer(channel)) != NULL));
700 return buffer;
701 }
702 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
703
704 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
705 {
706 int cnt;
707
708 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
709 qeth_release_buffer(channel, &channel->iob[cnt]);
710 channel->buf_no = 0;
711 channel->io_buf_no = 0;
712 }
713 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
714
715 static void qeth_send_control_data_cb(struct qeth_channel *channel,
716 struct qeth_cmd_buffer *iob)
717 {
718 struct qeth_card *card;
719 struct qeth_reply *reply, *r;
720 struct qeth_ipa_cmd *cmd;
721 unsigned long flags;
722 int keep_reply;
723 int rc = 0;
724
725 card = CARD_FROM_CDEV(channel->ccwdev);
726 QETH_CARD_TEXT(card, 4, "sndctlcb");
727 rc = qeth_check_idx_response(card, iob->data);
728 switch (rc) {
729 case 0:
730 break;
731 case -EIO:
732 qeth_clear_ipacmd_list(card);
733 qeth_schedule_recovery(card);
734 /* fall through */
735 default:
736 goto out;
737 }
738
739 cmd = qeth_check_ipa_data(card, iob);
740 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
741 goto out;
742 /*in case of OSN : check if cmd is set */
743 if (card->info.type == QETH_CARD_TYPE_OSN &&
744 cmd &&
745 cmd->hdr.command != IPA_CMD_STARTLAN &&
746 card->osn_info.assist_cb != NULL) {
747 card->osn_info.assist_cb(card->dev, cmd);
748 goto out;
749 }
750
751 spin_lock_irqsave(&card->lock, flags);
752 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
753 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
754 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
755 qeth_get_reply(reply);
756 list_del_init(&reply->list);
757 spin_unlock_irqrestore(&card->lock, flags);
758 keep_reply = 0;
759 if (reply->callback != NULL) {
760 if (cmd) {
761 reply->offset = (__u16)((char *)cmd -
762 (char *)iob->data);
763 keep_reply = reply->callback(card,
764 reply,
765 (unsigned long)cmd);
766 } else
767 keep_reply = reply->callback(card,
768 reply,
769 (unsigned long)iob);
770 }
771 if (cmd)
772 reply->rc = (u16) cmd->hdr.return_code;
773 else if (iob->rc)
774 reply->rc = iob->rc;
775 if (keep_reply) {
776 spin_lock_irqsave(&card->lock, flags);
777 list_add_tail(&reply->list,
778 &card->cmd_waiter_list);
779 spin_unlock_irqrestore(&card->lock, flags);
780 } else {
781 atomic_inc(&reply->received);
782 wake_up(&reply->wait_q);
783 }
784 qeth_put_reply(reply);
785 goto out;
786 }
787 }
788 spin_unlock_irqrestore(&card->lock, flags);
789 out:
790 memcpy(&card->seqno.pdu_hdr_ack,
791 QETH_PDU_HEADER_SEQ_NO(iob->data),
792 QETH_SEQ_NO_LENGTH);
793 qeth_release_buffer(channel, iob);
794 }
795
796 static int qeth_setup_channel(struct qeth_channel *channel)
797 {
798 int cnt;
799
800 QETH_DBF_TEXT(SETUP, 2, "setupch");
801 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
802 channel->iob[cnt].data =
803 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
804 if (channel->iob[cnt].data == NULL)
805 break;
806 channel->iob[cnt].state = BUF_STATE_FREE;
807 channel->iob[cnt].channel = channel;
808 channel->iob[cnt].callback = qeth_send_control_data_cb;
809 channel->iob[cnt].rc = 0;
810 }
811 if (cnt < QETH_CMD_BUFFER_NO) {
812 while (cnt-- > 0)
813 kfree(channel->iob[cnt].data);
814 return -ENOMEM;
815 }
816 channel->buf_no = 0;
817 channel->io_buf_no = 0;
818 atomic_set(&channel->irq_pending, 0);
819 spin_lock_init(&channel->iob_lock);
820
821 init_waitqueue_head(&channel->wait_q);
822 return 0;
823 }
824
825 static int qeth_set_thread_start_bit(struct qeth_card *card,
826 unsigned long thread)
827 {
828 unsigned long flags;
829
830 spin_lock_irqsave(&card->thread_mask_lock, flags);
831 if (!(card->thread_allowed_mask & thread) ||
832 (card->thread_start_mask & thread)) {
833 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
834 return -EPERM;
835 }
836 card->thread_start_mask |= thread;
837 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
838 return 0;
839 }
840
841 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
842 {
843 unsigned long flags;
844
845 spin_lock_irqsave(&card->thread_mask_lock, flags);
846 card->thread_start_mask &= ~thread;
847 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
848 wake_up(&card->wait_q);
849 }
850 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
851
852 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
853 {
854 unsigned long flags;
855
856 spin_lock_irqsave(&card->thread_mask_lock, flags);
857 card->thread_running_mask &= ~thread;
858 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
859 wake_up(&card->wait_q);
860 }
861 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
862
863 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
864 {
865 unsigned long flags;
866 int rc = 0;
867
868 spin_lock_irqsave(&card->thread_mask_lock, flags);
869 if (card->thread_start_mask & thread) {
870 if ((card->thread_allowed_mask & thread) &&
871 !(card->thread_running_mask & thread)) {
872 rc = 1;
873 card->thread_start_mask &= ~thread;
874 card->thread_running_mask |= thread;
875 } else
876 rc = -EPERM;
877 }
878 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
879 return rc;
880 }
881
882 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
883 {
884 int rc = 0;
885
886 wait_event(card->wait_q,
887 (rc = __qeth_do_run_thread(card, thread)) >= 0);
888 return rc;
889 }
890 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
891
892 void qeth_schedule_recovery(struct qeth_card *card)
893 {
894 QETH_CARD_TEXT(card, 2, "startrec");
895 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
896 schedule_work(&card->kernel_thread_starter);
897 }
898 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
899
900 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
901 {
902 int dstat, cstat;
903 char *sense;
904 struct qeth_card *card;
905
906 sense = (char *) irb->ecw;
907 cstat = irb->scsw.cmd.cstat;
908 dstat = irb->scsw.cmd.dstat;
909 card = CARD_FROM_CDEV(cdev);
910
911 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
912 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
913 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
914 QETH_CARD_TEXT(card, 2, "CGENCHK");
915 dev_warn(&cdev->dev, "The qeth device driver "
916 "failed to recover an error on the device\n");
917 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
918 dev_name(&cdev->dev), dstat, cstat);
919 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
920 16, 1, irb, 64, 1);
921 return 1;
922 }
923
924 if (dstat & DEV_STAT_UNIT_CHECK) {
925 if (sense[SENSE_RESETTING_EVENT_BYTE] &
926 SENSE_RESETTING_EVENT_FLAG) {
927 QETH_CARD_TEXT(card, 2, "REVIND");
928 return 1;
929 }
930 if (sense[SENSE_COMMAND_REJECT_BYTE] &
931 SENSE_COMMAND_REJECT_FLAG) {
932 QETH_CARD_TEXT(card, 2, "CMDREJi");
933 return 1;
934 }
935 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
936 QETH_CARD_TEXT(card, 2, "AFFE");
937 return 1;
938 }
939 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
940 QETH_CARD_TEXT(card, 2, "ZEROSEN");
941 return 0;
942 }
943 QETH_CARD_TEXT(card, 2, "DGENCHK");
944 return 1;
945 }
946 return 0;
947 }
948
949 static long __qeth_check_irb_error(struct ccw_device *cdev,
950 unsigned long intparm, struct irb *irb)
951 {
952 struct qeth_card *card;
953
954 card = CARD_FROM_CDEV(cdev);
955
956 if (!IS_ERR(irb))
957 return 0;
958
959 switch (PTR_ERR(irb)) {
960 case -EIO:
961 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
962 dev_name(&cdev->dev));
963 QETH_CARD_TEXT(card, 2, "ckirberr");
964 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
965 break;
966 case -ETIMEDOUT:
967 dev_warn(&cdev->dev, "A hardware operation timed out"
968 " on the device\n");
969 QETH_CARD_TEXT(card, 2, "ckirberr");
970 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
971 if (intparm == QETH_RCD_PARM) {
972 if (card && (card->data.ccwdev == cdev)) {
973 card->data.state = CH_STATE_DOWN;
974 wake_up(&card->wait_q);
975 }
976 }
977 break;
978 default:
979 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
980 dev_name(&cdev->dev), PTR_ERR(irb));
981 QETH_CARD_TEXT(card, 2, "ckirberr");
982 QETH_CARD_TEXT(card, 2, " rc???");
983 }
984 return PTR_ERR(irb);
985 }
986
987 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
988 struct irb *irb)
989 {
990 int rc;
991 int cstat, dstat;
992 struct qeth_cmd_buffer *buffer;
993 struct qeth_channel *channel;
994 struct qeth_card *card;
995 struct qeth_cmd_buffer *iob;
996 __u8 index;
997
998 if (__qeth_check_irb_error(cdev, intparm, irb))
999 return;
1000 cstat = irb->scsw.cmd.cstat;
1001 dstat = irb->scsw.cmd.dstat;
1002
1003 card = CARD_FROM_CDEV(cdev);
1004 if (!card)
1005 return;
1006
1007 QETH_CARD_TEXT(card, 5, "irq");
1008
1009 if (card->read.ccwdev == cdev) {
1010 channel = &card->read;
1011 QETH_CARD_TEXT(card, 5, "read");
1012 } else if (card->write.ccwdev == cdev) {
1013 channel = &card->write;
1014 QETH_CARD_TEXT(card, 5, "write");
1015 } else {
1016 channel = &card->data;
1017 QETH_CARD_TEXT(card, 5, "data");
1018 }
1019 atomic_set(&channel->irq_pending, 0);
1020
1021 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1022 channel->state = CH_STATE_STOPPED;
1023
1024 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1025 channel->state = CH_STATE_HALTED;
1026
1027 /*let's wake up immediately on data channel*/
1028 if ((channel == &card->data) && (intparm != 0) &&
1029 (intparm != QETH_RCD_PARM))
1030 goto out;
1031
1032 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1033 QETH_CARD_TEXT(card, 6, "clrchpar");
1034 /* we don't have to handle this further */
1035 intparm = 0;
1036 }
1037 if (intparm == QETH_HALT_CHANNEL_PARM) {
1038 QETH_CARD_TEXT(card, 6, "hltchpar");
1039 /* we don't have to handle this further */
1040 intparm = 0;
1041 }
1042 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1043 (dstat & DEV_STAT_UNIT_CHECK) ||
1044 (cstat)) {
1045 if (irb->esw.esw0.erw.cons) {
1046 dev_warn(&channel->ccwdev->dev,
1047 "The qeth device driver failed to recover "
1048 "an error on the device\n");
1049 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1050 "0x%X dstat 0x%X\n",
1051 dev_name(&channel->ccwdev->dev), cstat, dstat);
1052 print_hex_dump(KERN_WARNING, "qeth: irb ",
1053 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1054 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1055 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1056 }
1057 if (intparm == QETH_RCD_PARM) {
1058 channel->state = CH_STATE_DOWN;
1059 goto out;
1060 }
1061 rc = qeth_get_problem(cdev, irb);
1062 if (rc) {
1063 qeth_clear_ipacmd_list(card);
1064 qeth_schedule_recovery(card);
1065 goto out;
1066 }
1067 }
1068
1069 if (intparm == QETH_RCD_PARM) {
1070 channel->state = CH_STATE_RCD_DONE;
1071 goto out;
1072 }
1073 if (intparm) {
1074 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1075 buffer->state = BUF_STATE_PROCESSED;
1076 }
1077 if (channel == &card->data)
1078 return;
1079 if (channel == &card->read &&
1080 channel->state == CH_STATE_UP)
1081 qeth_issue_next_read(card);
1082
1083 iob = channel->iob;
1084 index = channel->buf_no;
1085 while (iob[index].state == BUF_STATE_PROCESSED) {
1086 if (iob[index].callback != NULL)
1087 iob[index].callback(channel, iob + index);
1088
1089 index = (index + 1) % QETH_CMD_BUFFER_NO;
1090 }
1091 channel->buf_no = index;
1092 out:
1093 wake_up(&card->wait_q);
1094 return;
1095 }
1096
1097 static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1098 struct qeth_qdio_out_buffer *buf,
1099 enum iucv_tx_notify notification)
1100 {
1101 struct sk_buff *skb;
1102
1103 if (skb_queue_empty(&buf->skb_list))
1104 goto out;
1105 skb = skb_peek(&buf->skb_list);
1106 while (skb) {
1107 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1108 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1109 if (skb->protocol == ETH_P_AF_IUCV) {
1110 if (skb->sk) {
1111 struct iucv_sock *iucv = iucv_sk(skb->sk);
1112 iucv->sk_txnotify(skb, notification);
1113 }
1114 }
1115 if (skb_queue_is_last(&buf->skb_list, skb))
1116 skb = NULL;
1117 else
1118 skb = skb_queue_next(&buf->skb_list, skb);
1119 }
1120 out:
1121 return;
1122 }
1123
1124 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1125 {
1126 struct sk_buff *skb;
1127 struct iucv_sock *iucv;
1128 int notify_general_error = 0;
1129
1130 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1131 notify_general_error = 1;
1132
1133 /* release may never happen from within CQ tasklet scope */
1134 BUG_ON(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1135
1136 skb = skb_dequeue(&buf->skb_list);
1137 while (skb) {
1138 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1139 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1140 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1141 if (skb->sk) {
1142 iucv = iucv_sk(skb->sk);
1143 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1144 }
1145 }
1146 atomic_dec(&skb->users);
1147 dev_kfree_skb_any(skb);
1148 skb = skb_dequeue(&buf->skb_list);
1149 }
1150 }
1151
1152 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1153 struct qeth_qdio_out_buffer *buf,
1154 enum qeth_qdio_buffer_states newbufstate)
1155 {
1156 int i;
1157
1158 /* is PCI flag set on buffer? */
1159 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1160 atomic_dec(&queue->set_pci_flags_count);
1161
1162 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1163 qeth_release_skbs(buf);
1164 }
1165 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1166 if (buf->buffer->element[i].addr && buf->is_header[i])
1167 kmem_cache_free(qeth_core_header_cache,
1168 buf->buffer->element[i].addr);
1169 buf->is_header[i] = 0;
1170 buf->buffer->element[i].length = 0;
1171 buf->buffer->element[i].addr = NULL;
1172 buf->buffer->element[i].eflags = 0;
1173 buf->buffer->element[i].sflags = 0;
1174 }
1175 buf->buffer->element[15].eflags = 0;
1176 buf->buffer->element[15].sflags = 0;
1177 buf->next_element_to_fill = 0;
1178 atomic_set(&buf->state, newbufstate);
1179 }
1180
1181 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1182 {
1183 int j;
1184
1185 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1186 if (!q->bufs[j])
1187 continue;
1188 qeth_cleanup_handled_pending(q, j, 1);
1189 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1190 if (free) {
1191 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1192 q->bufs[j] = NULL;
1193 }
1194 }
1195 }
1196
1197 void qeth_clear_qdio_buffers(struct qeth_card *card)
1198 {
1199 int i;
1200
1201 QETH_CARD_TEXT(card, 2, "clearqdbf");
1202 /* clear outbound buffers to free skbs */
1203 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1204 if (card->qdio.out_qs[i]) {
1205 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1206 }
1207 }
1208 }
1209 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1210
1211 static void qeth_free_buffer_pool(struct qeth_card *card)
1212 {
1213 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1214 int i = 0;
1215 list_for_each_entry_safe(pool_entry, tmp,
1216 &card->qdio.init_pool.entry_list, init_list){
1217 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1218 free_page((unsigned long)pool_entry->elements[i]);
1219 list_del(&pool_entry->init_list);
1220 kfree(pool_entry);
1221 }
1222 }
1223
1224 static void qeth_free_qdio_buffers(struct qeth_card *card)
1225 {
1226 int i, j;
1227
1228 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1229 QETH_QDIO_UNINITIALIZED)
1230 return;
1231
1232 qeth_free_cq(card);
1233 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1234 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1235 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
1236 kfree(card->qdio.in_q);
1237 card->qdio.in_q = NULL;
1238 /* inbound buffer pool */
1239 qeth_free_buffer_pool(card);
1240 /* free outbound qdio_qs */
1241 if (card->qdio.out_qs) {
1242 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1243 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
1244 kfree(card->qdio.out_qs[i]);
1245 }
1246 kfree(card->qdio.out_qs);
1247 card->qdio.out_qs = NULL;
1248 }
1249 }
1250
1251 static void qeth_clean_channel(struct qeth_channel *channel)
1252 {
1253 int cnt;
1254
1255 QETH_DBF_TEXT(SETUP, 2, "freech");
1256 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1257 kfree(channel->iob[cnt].data);
1258 }
1259
1260 static void qeth_get_channel_path_desc(struct qeth_card *card)
1261 {
1262 struct ccw_device *ccwdev;
1263 struct channelPath_dsc {
1264 u8 flags;
1265 u8 lsn;
1266 u8 desc;
1267 u8 chpid;
1268 u8 swla;
1269 u8 zeroes;
1270 u8 chla;
1271 u8 chpp;
1272 } *chp_dsc;
1273
1274 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1275
1276 ccwdev = card->data.ccwdev;
1277 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1278 if (chp_dsc != NULL) {
1279 if (card->info.type != QETH_CARD_TYPE_IQD) {
1280 /* CHPP field bit 6 == 1 -> single queue */
1281 if ((chp_dsc->chpp & 0x02) == 0x02) {
1282 if ((atomic_read(&card->qdio.state) !=
1283 QETH_QDIO_UNINITIALIZED) &&
1284 (card->qdio.no_out_queues == 4))
1285 /* change from 4 to 1 outbound queues */
1286 qeth_free_qdio_buffers(card);
1287 card->qdio.no_out_queues = 1;
1288 if (card->qdio.default_out_queue != 0)
1289 dev_info(&card->gdev->dev,
1290 "Priority Queueing not supported\n");
1291 card->qdio.default_out_queue = 0;
1292 } else {
1293 if ((atomic_read(&card->qdio.state) !=
1294 QETH_QDIO_UNINITIALIZED) &&
1295 (card->qdio.no_out_queues == 1)) {
1296 /* change from 1 to 4 outbound queues */
1297 qeth_free_qdio_buffers(card);
1298 card->qdio.default_out_queue = 2;
1299 }
1300 card->qdio.no_out_queues = 4;
1301 }
1302 }
1303 card->info.func_level = 0x4100 + chp_dsc->desc;
1304 kfree(chp_dsc);
1305 }
1306 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1307 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1308 return;
1309 }
1310
1311 static void qeth_init_qdio_info(struct qeth_card *card)
1312 {
1313 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1314 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1315 /* inbound */
1316 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1317 if (card->info.type == QETH_CARD_TYPE_IQD)
1318 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1319 else
1320 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1321 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1322 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1323 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1324 }
1325
1326 static void qeth_set_intial_options(struct qeth_card *card)
1327 {
1328 card->options.route4.type = NO_ROUTER;
1329 card->options.route6.type = NO_ROUTER;
1330 card->options.fake_broadcast = 0;
1331 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1332 card->options.performance_stats = 0;
1333 card->options.rx_sg_cb = QETH_RX_SG_CB;
1334 card->options.isolation = ISOLATION_MODE_NONE;
1335 card->options.cq = QETH_CQ_DISABLED;
1336 }
1337
1338 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1339 {
1340 unsigned long flags;
1341 int rc = 0;
1342
1343 spin_lock_irqsave(&card->thread_mask_lock, flags);
1344 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1345 (u8) card->thread_start_mask,
1346 (u8) card->thread_allowed_mask,
1347 (u8) card->thread_running_mask);
1348 rc = (card->thread_start_mask & thread);
1349 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1350 return rc;
1351 }
1352
1353 static void qeth_start_kernel_thread(struct work_struct *work)
1354 {
1355 struct task_struct *ts;
1356 struct qeth_card *card = container_of(work, struct qeth_card,
1357 kernel_thread_starter);
1358 QETH_CARD_TEXT(card , 2, "strthrd");
1359
1360 if (card->read.state != CH_STATE_UP &&
1361 card->write.state != CH_STATE_UP)
1362 return;
1363 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1364 ts = kthread_run(card->discipline->recover, (void *)card,
1365 "qeth_recover");
1366 if (IS_ERR(ts)) {
1367 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1368 qeth_clear_thread_running_bit(card,
1369 QETH_RECOVER_THREAD);
1370 }
1371 }
1372 }
1373
1374 static int qeth_setup_card(struct qeth_card *card)
1375 {
1376
1377 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1378 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1379
1380 card->read.state = CH_STATE_DOWN;
1381 card->write.state = CH_STATE_DOWN;
1382 card->data.state = CH_STATE_DOWN;
1383 card->state = CARD_STATE_DOWN;
1384 card->lan_online = 0;
1385 card->read_or_write_problem = 0;
1386 card->dev = NULL;
1387 spin_lock_init(&card->vlanlock);
1388 spin_lock_init(&card->mclock);
1389 spin_lock_init(&card->lock);
1390 spin_lock_init(&card->ip_lock);
1391 spin_lock_init(&card->thread_mask_lock);
1392 mutex_init(&card->conf_mutex);
1393 mutex_init(&card->discipline_mutex);
1394 card->thread_start_mask = 0;
1395 card->thread_allowed_mask = 0;
1396 card->thread_running_mask = 0;
1397 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1398 INIT_LIST_HEAD(&card->ip_list);
1399 INIT_LIST_HEAD(card->ip_tbd_list);
1400 INIT_LIST_HEAD(&card->cmd_waiter_list);
1401 init_waitqueue_head(&card->wait_q);
1402 /* initial options */
1403 qeth_set_intial_options(card);
1404 /* IP address takeover */
1405 INIT_LIST_HEAD(&card->ipato.entries);
1406 card->ipato.enabled = 0;
1407 card->ipato.invert4 = 0;
1408 card->ipato.invert6 = 0;
1409 /* init QDIO stuff */
1410 qeth_init_qdio_info(card);
1411 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1412 return 0;
1413 }
1414
1415 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1416 {
1417 struct qeth_card *card = container_of(slr, struct qeth_card,
1418 qeth_service_level);
1419 if (card->info.mcl_level[0])
1420 seq_printf(m, "qeth: %s firmware level %s\n",
1421 CARD_BUS_ID(card), card->info.mcl_level);
1422 }
1423
1424 static struct qeth_card *qeth_alloc_card(void)
1425 {
1426 struct qeth_card *card;
1427
1428 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1429 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1430 if (!card)
1431 goto out;
1432 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1433 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
1434 if (!card->ip_tbd_list) {
1435 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1436 goto out_card;
1437 }
1438 if (qeth_setup_channel(&card->read))
1439 goto out_ip;
1440 if (qeth_setup_channel(&card->write))
1441 goto out_channel;
1442 card->options.layer2 = -1;
1443 card->qeth_service_level.seq_print = qeth_core_sl_print;
1444 register_service_level(&card->qeth_service_level);
1445 return card;
1446
1447 out_channel:
1448 qeth_clean_channel(&card->read);
1449 out_ip:
1450 kfree(card->ip_tbd_list);
1451 out_card:
1452 kfree(card);
1453 out:
1454 return NULL;
1455 }
1456
1457 static int qeth_determine_card_type(struct qeth_card *card)
1458 {
1459 int i = 0;
1460
1461 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1462
1463 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1464 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1465 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1466 if ((CARD_RDEV(card)->id.dev_type ==
1467 known_devices[i][QETH_DEV_TYPE_IND]) &&
1468 (CARD_RDEV(card)->id.dev_model ==
1469 known_devices[i][QETH_DEV_MODEL_IND])) {
1470 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1471 card->qdio.no_out_queues =
1472 known_devices[i][QETH_QUEUE_NO_IND];
1473 card->qdio.no_in_queues = 1;
1474 card->info.is_multicast_different =
1475 known_devices[i][QETH_MULTICAST_IND];
1476 qeth_get_channel_path_desc(card);
1477 return 0;
1478 }
1479 i++;
1480 }
1481 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1482 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1483 "unknown type\n");
1484 return -ENOENT;
1485 }
1486
1487 static int qeth_clear_channel(struct qeth_channel *channel)
1488 {
1489 unsigned long flags;
1490 struct qeth_card *card;
1491 int rc;
1492
1493 card = CARD_FROM_CDEV(channel->ccwdev);
1494 QETH_CARD_TEXT(card, 3, "clearch");
1495 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1496 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1497 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1498
1499 if (rc)
1500 return rc;
1501 rc = wait_event_interruptible_timeout(card->wait_q,
1502 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1503 if (rc == -ERESTARTSYS)
1504 return rc;
1505 if (channel->state != CH_STATE_STOPPED)
1506 return -ETIME;
1507 channel->state = CH_STATE_DOWN;
1508 return 0;
1509 }
1510
1511 static int qeth_halt_channel(struct qeth_channel *channel)
1512 {
1513 unsigned long flags;
1514 struct qeth_card *card;
1515 int rc;
1516
1517 card = CARD_FROM_CDEV(channel->ccwdev);
1518 QETH_CARD_TEXT(card, 3, "haltch");
1519 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1520 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1521 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1522
1523 if (rc)
1524 return rc;
1525 rc = wait_event_interruptible_timeout(card->wait_q,
1526 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1527 if (rc == -ERESTARTSYS)
1528 return rc;
1529 if (channel->state != CH_STATE_HALTED)
1530 return -ETIME;
1531 return 0;
1532 }
1533
1534 static int qeth_halt_channels(struct qeth_card *card)
1535 {
1536 int rc1 = 0, rc2 = 0, rc3 = 0;
1537
1538 QETH_CARD_TEXT(card, 3, "haltchs");
1539 rc1 = qeth_halt_channel(&card->read);
1540 rc2 = qeth_halt_channel(&card->write);
1541 rc3 = qeth_halt_channel(&card->data);
1542 if (rc1)
1543 return rc1;
1544 if (rc2)
1545 return rc2;
1546 return rc3;
1547 }
1548
1549 static int qeth_clear_channels(struct qeth_card *card)
1550 {
1551 int rc1 = 0, rc2 = 0, rc3 = 0;
1552
1553 QETH_CARD_TEXT(card, 3, "clearchs");
1554 rc1 = qeth_clear_channel(&card->read);
1555 rc2 = qeth_clear_channel(&card->write);
1556 rc3 = qeth_clear_channel(&card->data);
1557 if (rc1)
1558 return rc1;
1559 if (rc2)
1560 return rc2;
1561 return rc3;
1562 }
1563
1564 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1565 {
1566 int rc = 0;
1567
1568 QETH_CARD_TEXT(card, 3, "clhacrd");
1569
1570 if (halt)
1571 rc = qeth_halt_channels(card);
1572 if (rc)
1573 return rc;
1574 return qeth_clear_channels(card);
1575 }
1576
1577 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1578 {
1579 int rc = 0;
1580
1581 QETH_CARD_TEXT(card, 3, "qdioclr");
1582 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1583 QETH_QDIO_CLEANING)) {
1584 case QETH_QDIO_ESTABLISHED:
1585 if (card->info.type == QETH_CARD_TYPE_IQD)
1586 rc = qdio_shutdown(CARD_DDEV(card),
1587 QDIO_FLAG_CLEANUP_USING_HALT);
1588 else
1589 rc = qdio_shutdown(CARD_DDEV(card),
1590 QDIO_FLAG_CLEANUP_USING_CLEAR);
1591 if (rc)
1592 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1593 qdio_free(CARD_DDEV(card));
1594 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1595 break;
1596 case QETH_QDIO_CLEANING:
1597 return rc;
1598 default:
1599 break;
1600 }
1601 rc = qeth_clear_halt_card(card, use_halt);
1602 if (rc)
1603 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1604 card->state = CARD_STATE_DOWN;
1605 return rc;
1606 }
1607 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1608
1609 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1610 int *length)
1611 {
1612 struct ciw *ciw;
1613 char *rcd_buf;
1614 int ret;
1615 struct qeth_channel *channel = &card->data;
1616 unsigned long flags;
1617
1618 /*
1619 * scan for RCD command in extended SenseID data
1620 */
1621 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1622 if (!ciw || ciw->cmd == 0)
1623 return -EOPNOTSUPP;
1624 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1625 if (!rcd_buf)
1626 return -ENOMEM;
1627
1628 channel->ccw.cmd_code = ciw->cmd;
1629 channel->ccw.cda = (__u32) __pa(rcd_buf);
1630 channel->ccw.count = ciw->count;
1631 channel->ccw.flags = CCW_FLAG_SLI;
1632 channel->state = CH_STATE_RCD;
1633 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1634 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1635 QETH_RCD_PARM, LPM_ANYPATH, 0,
1636 QETH_RCD_TIMEOUT);
1637 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1638 if (!ret)
1639 wait_event(card->wait_q,
1640 (channel->state == CH_STATE_RCD_DONE ||
1641 channel->state == CH_STATE_DOWN));
1642 if (channel->state == CH_STATE_DOWN)
1643 ret = -EIO;
1644 else
1645 channel->state = CH_STATE_DOWN;
1646 if (ret) {
1647 kfree(rcd_buf);
1648 *buffer = NULL;
1649 *length = 0;
1650 } else {
1651 *length = ciw->count;
1652 *buffer = rcd_buf;
1653 }
1654 return ret;
1655 }
1656
1657 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1658 {
1659 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1660 card->info.chpid = prcd[30];
1661 card->info.unit_addr2 = prcd[31];
1662 card->info.cula = prcd[63];
1663 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1664 (prcd[0x11] == _ascebc['M']));
1665 }
1666
1667 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1668 {
1669 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1670
1671 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1672 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
1673 card->info.blkt.time_total = 250;
1674 card->info.blkt.inter_packet = 5;
1675 card->info.blkt.inter_packet_jumbo = 15;
1676 } else {
1677 card->info.blkt.time_total = 0;
1678 card->info.blkt.inter_packet = 0;
1679 card->info.blkt.inter_packet_jumbo = 0;
1680 }
1681 }
1682
1683 static void qeth_init_tokens(struct qeth_card *card)
1684 {
1685 card->token.issuer_rm_w = 0x00010103UL;
1686 card->token.cm_filter_w = 0x00010108UL;
1687 card->token.cm_connection_w = 0x0001010aUL;
1688 card->token.ulp_filter_w = 0x0001010bUL;
1689 card->token.ulp_connection_w = 0x0001010dUL;
1690 }
1691
1692 static void qeth_init_func_level(struct qeth_card *card)
1693 {
1694 switch (card->info.type) {
1695 case QETH_CARD_TYPE_IQD:
1696 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1697 break;
1698 case QETH_CARD_TYPE_OSD:
1699 case QETH_CARD_TYPE_OSN:
1700 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1701 break;
1702 default:
1703 break;
1704 }
1705 }
1706
1707 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1708 void (*idx_reply_cb)(struct qeth_channel *,
1709 struct qeth_cmd_buffer *))
1710 {
1711 struct qeth_cmd_buffer *iob;
1712 unsigned long flags;
1713 int rc;
1714 struct qeth_card *card;
1715
1716 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1717 card = CARD_FROM_CDEV(channel->ccwdev);
1718 iob = qeth_get_buffer(channel);
1719 iob->callback = idx_reply_cb;
1720 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1721 channel->ccw.count = QETH_BUFSIZE;
1722 channel->ccw.cda = (__u32) __pa(iob->data);
1723
1724 wait_event(card->wait_q,
1725 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1726 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1727 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1728 rc = ccw_device_start(channel->ccwdev,
1729 &channel->ccw, (addr_t) iob, 0, 0);
1730 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1731
1732 if (rc) {
1733 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1734 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1735 atomic_set(&channel->irq_pending, 0);
1736 wake_up(&card->wait_q);
1737 return rc;
1738 }
1739 rc = wait_event_interruptible_timeout(card->wait_q,
1740 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1741 if (rc == -ERESTARTSYS)
1742 return rc;
1743 if (channel->state != CH_STATE_UP) {
1744 rc = -ETIME;
1745 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1746 qeth_clear_cmd_buffers(channel);
1747 } else
1748 rc = 0;
1749 return rc;
1750 }
1751
1752 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1753 void (*idx_reply_cb)(struct qeth_channel *,
1754 struct qeth_cmd_buffer *))
1755 {
1756 struct qeth_card *card;
1757 struct qeth_cmd_buffer *iob;
1758 unsigned long flags;
1759 __u16 temp;
1760 __u8 tmp;
1761 int rc;
1762 struct ccw_dev_id temp_devid;
1763
1764 card = CARD_FROM_CDEV(channel->ccwdev);
1765
1766 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1767
1768 iob = qeth_get_buffer(channel);
1769 iob->callback = idx_reply_cb;
1770 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1771 channel->ccw.count = IDX_ACTIVATE_SIZE;
1772 channel->ccw.cda = (__u32) __pa(iob->data);
1773 if (channel == &card->write) {
1774 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1775 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1776 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1777 card->seqno.trans_hdr++;
1778 } else {
1779 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1780 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1781 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1782 }
1783 tmp = ((__u8)card->info.portno) | 0x80;
1784 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1785 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1786 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1787 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1788 &card->info.func_level, sizeof(__u16));
1789 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1790 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1791 temp = (card->info.cula << 8) + card->info.unit_addr2;
1792 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1793
1794 wait_event(card->wait_q,
1795 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1796 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1797 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1798 rc = ccw_device_start(channel->ccwdev,
1799 &channel->ccw, (addr_t) iob, 0, 0);
1800 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1801
1802 if (rc) {
1803 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1804 rc);
1805 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1806 atomic_set(&channel->irq_pending, 0);
1807 wake_up(&card->wait_q);
1808 return rc;
1809 }
1810 rc = wait_event_interruptible_timeout(card->wait_q,
1811 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1812 if (rc == -ERESTARTSYS)
1813 return rc;
1814 if (channel->state != CH_STATE_ACTIVATING) {
1815 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1816 " failed to recover an error on the device\n");
1817 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1818 dev_name(&channel->ccwdev->dev));
1819 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1820 qeth_clear_cmd_buffers(channel);
1821 return -ETIME;
1822 }
1823 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1824 }
1825
1826 static int qeth_peer_func_level(int level)
1827 {
1828 if ((level & 0xff) == 8)
1829 return (level & 0xff) + 0x400;
1830 if (((level >> 8) & 3) == 1)
1831 return (level & 0xff) + 0x200;
1832 return level;
1833 }
1834
1835 static void qeth_idx_write_cb(struct qeth_channel *channel,
1836 struct qeth_cmd_buffer *iob)
1837 {
1838 struct qeth_card *card;
1839 __u16 temp;
1840
1841 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1842
1843 if (channel->state == CH_STATE_DOWN) {
1844 channel->state = CH_STATE_ACTIVATING;
1845 goto out;
1846 }
1847 card = CARD_FROM_CDEV(channel->ccwdev);
1848
1849 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1850 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1851 dev_err(&card->write.ccwdev->dev,
1852 "The adapter is used exclusively by another "
1853 "host\n");
1854 else
1855 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1856 " negative reply\n",
1857 dev_name(&card->write.ccwdev->dev));
1858 goto out;
1859 }
1860 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1861 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1862 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1863 "function level mismatch (sent: 0x%x, received: "
1864 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1865 card->info.func_level, temp);
1866 goto out;
1867 }
1868 channel->state = CH_STATE_UP;
1869 out:
1870 qeth_release_buffer(channel, iob);
1871 }
1872
1873 static void qeth_idx_read_cb(struct qeth_channel *channel,
1874 struct qeth_cmd_buffer *iob)
1875 {
1876 struct qeth_card *card;
1877 __u16 temp;
1878
1879 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1880 if (channel->state == CH_STATE_DOWN) {
1881 channel->state = CH_STATE_ACTIVATING;
1882 goto out;
1883 }
1884
1885 card = CARD_FROM_CDEV(channel->ccwdev);
1886 if (qeth_check_idx_response(card, iob->data))
1887 goto out;
1888
1889 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1890 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1891 case QETH_IDX_ACT_ERR_EXCL:
1892 dev_err(&card->write.ccwdev->dev,
1893 "The adapter is used exclusively by another "
1894 "host\n");
1895 break;
1896 case QETH_IDX_ACT_ERR_AUTH:
1897 case QETH_IDX_ACT_ERR_AUTH_USER:
1898 dev_err(&card->read.ccwdev->dev,
1899 "Setting the device online failed because of "
1900 "insufficient authorization\n");
1901 break;
1902 default:
1903 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1904 " negative reply\n",
1905 dev_name(&card->read.ccwdev->dev));
1906 }
1907 QETH_CARD_TEXT_(card, 2, "idxread%c",
1908 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1909 goto out;
1910 }
1911
1912 /**
1913 * * temporary fix for microcode bug
1914 * * to revert it,replace OR by AND
1915 * */
1916 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1917 (card->info.type == QETH_CARD_TYPE_OSD))
1918 card->info.portname_required = 1;
1919
1920 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1921 if (temp != qeth_peer_func_level(card->info.func_level)) {
1922 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1923 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1924 dev_name(&card->read.ccwdev->dev),
1925 card->info.func_level, temp);
1926 goto out;
1927 }
1928 memcpy(&card->token.issuer_rm_r,
1929 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1930 QETH_MPC_TOKEN_LENGTH);
1931 memcpy(&card->info.mcl_level[0],
1932 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1933 channel->state = CH_STATE_UP;
1934 out:
1935 qeth_release_buffer(channel, iob);
1936 }
1937
1938 void qeth_prepare_control_data(struct qeth_card *card, int len,
1939 struct qeth_cmd_buffer *iob)
1940 {
1941 qeth_setup_ccw(&card->write, iob->data, len);
1942 iob->callback = qeth_release_buffer;
1943
1944 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1945 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1946 card->seqno.trans_hdr++;
1947 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1948 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1949 card->seqno.pdu_hdr++;
1950 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1951 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1952 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1953 }
1954 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1955
1956 int qeth_send_control_data(struct qeth_card *card, int len,
1957 struct qeth_cmd_buffer *iob,
1958 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1959 unsigned long),
1960 void *reply_param)
1961 {
1962 int rc;
1963 unsigned long flags;
1964 struct qeth_reply *reply = NULL;
1965 unsigned long timeout, event_timeout;
1966 struct qeth_ipa_cmd *cmd;
1967
1968 QETH_CARD_TEXT(card, 2, "sendctl");
1969
1970 if (card->read_or_write_problem) {
1971 qeth_release_buffer(iob->channel, iob);
1972 return -EIO;
1973 }
1974 reply = qeth_alloc_reply(card);
1975 if (!reply) {
1976 return -ENOMEM;
1977 }
1978 reply->callback = reply_cb;
1979 reply->param = reply_param;
1980 if (card->state == CARD_STATE_DOWN)
1981 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1982 else
1983 reply->seqno = card->seqno.ipa++;
1984 init_waitqueue_head(&reply->wait_q);
1985 spin_lock_irqsave(&card->lock, flags);
1986 list_add_tail(&reply->list, &card->cmd_waiter_list);
1987 spin_unlock_irqrestore(&card->lock, flags);
1988 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1989
1990 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1991 qeth_prepare_control_data(card, len, iob);
1992
1993 if (IS_IPA(iob->data))
1994 event_timeout = QETH_IPA_TIMEOUT;
1995 else
1996 event_timeout = QETH_TIMEOUT;
1997 timeout = jiffies + event_timeout;
1998
1999 QETH_CARD_TEXT(card, 6, "noirqpnd");
2000 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2001 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2002 (addr_t) iob, 0, 0);
2003 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2004 if (rc) {
2005 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2006 "ccw_device_start rc = %i\n",
2007 dev_name(&card->write.ccwdev->dev), rc);
2008 QETH_CARD_TEXT_(card, 2, " err%d", rc);
2009 spin_lock_irqsave(&card->lock, flags);
2010 list_del_init(&reply->list);
2011 qeth_put_reply(reply);
2012 spin_unlock_irqrestore(&card->lock, flags);
2013 qeth_release_buffer(iob->channel, iob);
2014 atomic_set(&card->write.irq_pending, 0);
2015 wake_up(&card->wait_q);
2016 return rc;
2017 }
2018
2019 /* we have only one long running ipassist, since we can ensure
2020 process context of this command we can sleep */
2021 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2022 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2023 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2024 if (!wait_event_timeout(reply->wait_q,
2025 atomic_read(&reply->received), event_timeout))
2026 goto time_err;
2027 } else {
2028 while (!atomic_read(&reply->received)) {
2029 if (time_after(jiffies, timeout))
2030 goto time_err;
2031 cpu_relax();
2032 };
2033 }
2034
2035 if (reply->rc == -EIO)
2036 goto error;
2037 rc = reply->rc;
2038 qeth_put_reply(reply);
2039 return rc;
2040
2041 time_err:
2042 reply->rc = -ETIME;
2043 spin_lock_irqsave(&reply->card->lock, flags);
2044 list_del_init(&reply->list);
2045 spin_unlock_irqrestore(&reply->card->lock, flags);
2046 atomic_inc(&reply->received);
2047 error:
2048 atomic_set(&card->write.irq_pending, 0);
2049 qeth_release_buffer(iob->channel, iob);
2050 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2051 rc = reply->rc;
2052 qeth_put_reply(reply);
2053 return rc;
2054 }
2055 EXPORT_SYMBOL_GPL(qeth_send_control_data);
2056
2057 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2058 unsigned long data)
2059 {
2060 struct qeth_cmd_buffer *iob;
2061
2062 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2063
2064 iob = (struct qeth_cmd_buffer *) data;
2065 memcpy(&card->token.cm_filter_r,
2066 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2067 QETH_MPC_TOKEN_LENGTH);
2068 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2069 return 0;
2070 }
2071
2072 static int qeth_cm_enable(struct qeth_card *card)
2073 {
2074 int rc;
2075 struct qeth_cmd_buffer *iob;
2076
2077 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2078
2079 iob = qeth_wait_for_buffer(&card->write);
2080 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2081 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2082 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2083 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2084 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2085
2086 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2087 qeth_cm_enable_cb, NULL);
2088 return rc;
2089 }
2090
2091 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2092 unsigned long data)
2093 {
2094
2095 struct qeth_cmd_buffer *iob;
2096
2097 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2098
2099 iob = (struct qeth_cmd_buffer *) data;
2100 memcpy(&card->token.cm_connection_r,
2101 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2102 QETH_MPC_TOKEN_LENGTH);
2103 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2104 return 0;
2105 }
2106
2107 static int qeth_cm_setup(struct qeth_card *card)
2108 {
2109 int rc;
2110 struct qeth_cmd_buffer *iob;
2111
2112 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2113
2114 iob = qeth_wait_for_buffer(&card->write);
2115 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2116 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2117 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2118 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2119 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2120 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2121 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2122 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2123 qeth_cm_setup_cb, NULL);
2124 return rc;
2125
2126 }
2127
2128 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2129 {
2130 switch (card->info.type) {
2131 case QETH_CARD_TYPE_UNKNOWN:
2132 return 1500;
2133 case QETH_CARD_TYPE_IQD:
2134 return card->info.max_mtu;
2135 case QETH_CARD_TYPE_OSD:
2136 switch (card->info.link_type) {
2137 case QETH_LINK_TYPE_HSTR:
2138 case QETH_LINK_TYPE_LANE_TR:
2139 return 2000;
2140 default:
2141 return 1492;
2142 }
2143 case QETH_CARD_TYPE_OSM:
2144 case QETH_CARD_TYPE_OSX:
2145 return 1492;
2146 default:
2147 return 1500;
2148 }
2149 }
2150
2151 static inline int qeth_get_mtu_outof_framesize(int framesize)
2152 {
2153 switch (framesize) {
2154 case 0x4000:
2155 return 8192;
2156 case 0x6000:
2157 return 16384;
2158 case 0xa000:
2159 return 32768;
2160 case 0xffff:
2161 return 57344;
2162 default:
2163 return 0;
2164 }
2165 }
2166
2167 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2168 {
2169 switch (card->info.type) {
2170 case QETH_CARD_TYPE_OSD:
2171 case QETH_CARD_TYPE_OSM:
2172 case QETH_CARD_TYPE_OSX:
2173 case QETH_CARD_TYPE_IQD:
2174 return ((mtu >= 576) &&
2175 (mtu <= card->info.max_mtu));
2176 case QETH_CARD_TYPE_OSN:
2177 case QETH_CARD_TYPE_UNKNOWN:
2178 default:
2179 return 1;
2180 }
2181 }
2182
2183 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2184 unsigned long data)
2185 {
2186
2187 __u16 mtu, framesize;
2188 __u16 len;
2189 __u8 link_type;
2190 struct qeth_cmd_buffer *iob;
2191
2192 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2193
2194 iob = (struct qeth_cmd_buffer *) data;
2195 memcpy(&card->token.ulp_filter_r,
2196 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2197 QETH_MPC_TOKEN_LENGTH);
2198 if (card->info.type == QETH_CARD_TYPE_IQD) {
2199 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2200 mtu = qeth_get_mtu_outof_framesize(framesize);
2201 if (!mtu) {
2202 iob->rc = -EINVAL;
2203 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2204 return 0;
2205 }
2206 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2207 /* frame size has changed */
2208 if (card->dev &&
2209 ((card->dev->mtu == card->info.initial_mtu) ||
2210 (card->dev->mtu > mtu)))
2211 card->dev->mtu = mtu;
2212 qeth_free_qdio_buffers(card);
2213 }
2214 card->info.initial_mtu = mtu;
2215 card->info.max_mtu = mtu;
2216 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2217 } else {
2218 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
2219 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2220 iob->data);
2221 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2222 }
2223
2224 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2225 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2226 memcpy(&link_type,
2227 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2228 card->info.link_type = link_type;
2229 } else
2230 card->info.link_type = 0;
2231 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2232 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2233 return 0;
2234 }
2235
2236 static int qeth_ulp_enable(struct qeth_card *card)
2237 {
2238 int rc;
2239 char prot_type;
2240 struct qeth_cmd_buffer *iob;
2241
2242 /*FIXME: trace view callbacks*/
2243 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2244
2245 iob = qeth_wait_for_buffer(&card->write);
2246 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2247
2248 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2249 (__u8) card->info.portno;
2250 if (card->options.layer2)
2251 if (card->info.type == QETH_CARD_TYPE_OSN)
2252 prot_type = QETH_PROT_OSN2;
2253 else
2254 prot_type = QETH_PROT_LAYER2;
2255 else
2256 prot_type = QETH_PROT_TCPIP;
2257
2258 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2259 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2260 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2261 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2262 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2263 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2264 card->info.portname, 9);
2265 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2266 qeth_ulp_enable_cb, NULL);
2267 return rc;
2268
2269 }
2270
2271 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2272 unsigned long data)
2273 {
2274 struct qeth_cmd_buffer *iob;
2275 int rc = 0;
2276
2277 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2278
2279 iob = (struct qeth_cmd_buffer *) data;
2280 memcpy(&card->token.ulp_connection_r,
2281 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2282 QETH_MPC_TOKEN_LENGTH);
2283 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2284 3)) {
2285 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2286 dev_err(&card->gdev->dev, "A connection could not be "
2287 "established because of an OLM limit\n");
2288 iob->rc = -EMLINK;
2289 }
2290 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2291 return rc;
2292 }
2293
2294 static int qeth_ulp_setup(struct qeth_card *card)
2295 {
2296 int rc;
2297 __u16 temp;
2298 struct qeth_cmd_buffer *iob;
2299 struct ccw_dev_id dev_id;
2300
2301 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2302
2303 iob = qeth_wait_for_buffer(&card->write);
2304 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2305
2306 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2307 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2308 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2309 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2310 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2311 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2312
2313 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2314 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2315 temp = (card->info.cula << 8) + card->info.unit_addr2;
2316 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2317 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2318 qeth_ulp_setup_cb, NULL);
2319 return rc;
2320 }
2321
2322 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2323 {
2324 int rc;
2325 struct qeth_qdio_out_buffer *newbuf;
2326
2327 rc = 0;
2328 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2329 if (!newbuf) {
2330 rc = -ENOMEM;
2331 goto out;
2332 }
2333 newbuf->buffer = &q->qdio_bufs[bidx];
2334 skb_queue_head_init(&newbuf->skb_list);
2335 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2336 newbuf->q = q;
2337 newbuf->aob = NULL;
2338 newbuf->next_pending = q->bufs[bidx];
2339 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2340 q->bufs[bidx] = newbuf;
2341 if (q->bufstates) {
2342 q->bufstates[bidx].user = newbuf;
2343 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2344 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2345 QETH_CARD_TEXT_(q->card, 2, "%lx",
2346 (long) newbuf->next_pending);
2347 }
2348 out:
2349 return rc;
2350 }
2351
2352
2353 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2354 {
2355 int i, j;
2356
2357 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2358
2359 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2360 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2361 return 0;
2362
2363 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
2364 GFP_KERNEL);
2365 if (!card->qdio.in_q)
2366 goto out_nomem;
2367 QETH_DBF_TEXT(SETUP, 2, "inq");
2368 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2369 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2370 /* give inbound qeth_qdio_buffers their qdio_buffers */
2371 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
2372 card->qdio.in_q->bufs[i].buffer =
2373 &card->qdio.in_q->qdio_bufs[i];
2374 card->qdio.in_q->bufs[i].rx_skb = NULL;
2375 }
2376 /* inbound buffer pool */
2377 if (qeth_alloc_buffer_pool(card))
2378 goto out_freeinq;
2379
2380 /* outbound */
2381 card->qdio.out_qs =
2382 kzalloc(card->qdio.no_out_queues *
2383 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2384 if (!card->qdio.out_qs)
2385 goto out_freepool;
2386 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2387 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
2388 GFP_KERNEL);
2389 if (!card->qdio.out_qs[i])
2390 goto out_freeoutq;
2391 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2392 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2393 card->qdio.out_qs[i]->queue_no = i;
2394 /* give outbound qeth_qdio_buffers their qdio_buffers */
2395 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2396 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2397 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2398 goto out_freeoutqbufs;
2399 }
2400 }
2401
2402 /* completion */
2403 if (qeth_alloc_cq(card))
2404 goto out_freeoutq;
2405
2406 return 0;
2407
2408 out_freeoutqbufs:
2409 while (j > 0) {
2410 --j;
2411 kmem_cache_free(qeth_qdio_outbuf_cache,
2412 card->qdio.out_qs[i]->bufs[j]);
2413 card->qdio.out_qs[i]->bufs[j] = NULL;
2414 }
2415 out_freeoutq:
2416 while (i > 0) {
2417 kfree(card->qdio.out_qs[--i]);
2418 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2419 }
2420 kfree(card->qdio.out_qs);
2421 card->qdio.out_qs = NULL;
2422 out_freepool:
2423 qeth_free_buffer_pool(card);
2424 out_freeinq:
2425 kfree(card->qdio.in_q);
2426 card->qdio.in_q = NULL;
2427 out_nomem:
2428 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2429 return -ENOMEM;
2430 }
2431
2432 static void qeth_create_qib_param_field(struct qeth_card *card,
2433 char *param_field)
2434 {
2435
2436 param_field[0] = _ascebc['P'];
2437 param_field[1] = _ascebc['C'];
2438 param_field[2] = _ascebc['I'];
2439 param_field[3] = _ascebc['T'];
2440 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2441 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2442 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2443 }
2444
2445 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2446 char *param_field)
2447 {
2448 param_field[16] = _ascebc['B'];
2449 param_field[17] = _ascebc['L'];
2450 param_field[18] = _ascebc['K'];
2451 param_field[19] = _ascebc['T'];
2452 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2453 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2454 *((unsigned int *) (&param_field[28])) =
2455 card->info.blkt.inter_packet_jumbo;
2456 }
2457
2458 static int qeth_qdio_activate(struct qeth_card *card)
2459 {
2460 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2461 return qdio_activate(CARD_DDEV(card));
2462 }
2463
2464 static int qeth_dm_act(struct qeth_card *card)
2465 {
2466 int rc;
2467 struct qeth_cmd_buffer *iob;
2468
2469 QETH_DBF_TEXT(SETUP, 2, "dmact");
2470
2471 iob = qeth_wait_for_buffer(&card->write);
2472 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2473
2474 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2475 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2476 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2477 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2478 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2479 return rc;
2480 }
2481
2482 static int qeth_mpc_initialize(struct qeth_card *card)
2483 {
2484 int rc;
2485
2486 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2487
2488 rc = qeth_issue_next_read(card);
2489 if (rc) {
2490 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2491 return rc;
2492 }
2493 rc = qeth_cm_enable(card);
2494 if (rc) {
2495 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2496 goto out_qdio;
2497 }
2498 rc = qeth_cm_setup(card);
2499 if (rc) {
2500 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2501 goto out_qdio;
2502 }
2503 rc = qeth_ulp_enable(card);
2504 if (rc) {
2505 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2506 goto out_qdio;
2507 }
2508 rc = qeth_ulp_setup(card);
2509 if (rc) {
2510 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2511 goto out_qdio;
2512 }
2513 rc = qeth_alloc_qdio_buffers(card);
2514 if (rc) {
2515 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2516 goto out_qdio;
2517 }
2518 rc = qeth_qdio_establish(card);
2519 if (rc) {
2520 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2521 qeth_free_qdio_buffers(card);
2522 goto out_qdio;
2523 }
2524 rc = qeth_qdio_activate(card);
2525 if (rc) {
2526 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2527 goto out_qdio;
2528 }
2529 rc = qeth_dm_act(card);
2530 if (rc) {
2531 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2532 goto out_qdio;
2533 }
2534
2535 return 0;
2536 out_qdio:
2537 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2538 return rc;
2539 }
2540
2541 static void qeth_print_status_with_portname(struct qeth_card *card)
2542 {
2543 char dbf_text[15];
2544 int i;
2545
2546 sprintf(dbf_text, "%s", card->info.portname + 1);
2547 for (i = 0; i < 8; i++)
2548 dbf_text[i] =
2549 (char) _ebcasc[(__u8) dbf_text[i]];
2550 dbf_text[8] = 0;
2551 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2552 "with link type %s (portname: %s)\n",
2553 qeth_get_cardname(card),
2554 (card->info.mcl_level[0]) ? " (level: " : "",
2555 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2556 (card->info.mcl_level[0]) ? ")" : "",
2557 qeth_get_cardname_short(card),
2558 dbf_text);
2559
2560 }
2561
2562 static void qeth_print_status_no_portname(struct qeth_card *card)
2563 {
2564 if (card->info.portname[0])
2565 dev_info(&card->gdev->dev, "Device is a%s "
2566 "card%s%s%s\nwith link type %s "
2567 "(no portname needed by interface).\n",
2568 qeth_get_cardname(card),
2569 (card->info.mcl_level[0]) ? " (level: " : "",
2570 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2571 (card->info.mcl_level[0]) ? ")" : "",
2572 qeth_get_cardname_short(card));
2573 else
2574 dev_info(&card->gdev->dev, "Device is a%s "
2575 "card%s%s%s\nwith link type %s.\n",
2576 qeth_get_cardname(card),
2577 (card->info.mcl_level[0]) ? " (level: " : "",
2578 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2579 (card->info.mcl_level[0]) ? ")" : "",
2580 qeth_get_cardname_short(card));
2581 }
2582
2583 void qeth_print_status_message(struct qeth_card *card)
2584 {
2585 switch (card->info.type) {
2586 case QETH_CARD_TYPE_OSD:
2587 case QETH_CARD_TYPE_OSM:
2588 case QETH_CARD_TYPE_OSX:
2589 /* VM will use a non-zero first character
2590 * to indicate a HiperSockets like reporting
2591 * of the level OSA sets the first character to zero
2592 * */
2593 if (!card->info.mcl_level[0]) {
2594 sprintf(card->info.mcl_level, "%02x%02x",
2595 card->info.mcl_level[2],
2596 card->info.mcl_level[3]);
2597
2598 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2599 break;
2600 }
2601 /* fallthrough */
2602 case QETH_CARD_TYPE_IQD:
2603 if ((card->info.guestlan) ||
2604 (card->info.mcl_level[0] & 0x80)) {
2605 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2606 card->info.mcl_level[0]];
2607 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2608 card->info.mcl_level[1]];
2609 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2610 card->info.mcl_level[2]];
2611 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2612 card->info.mcl_level[3]];
2613 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2614 }
2615 break;
2616 default:
2617 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2618 }
2619 if (card->info.portname_required)
2620 qeth_print_status_with_portname(card);
2621 else
2622 qeth_print_status_no_portname(card);
2623 }
2624 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2625
2626 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2627 {
2628 struct qeth_buffer_pool_entry *entry;
2629
2630 QETH_CARD_TEXT(card, 5, "inwrklst");
2631
2632 list_for_each_entry(entry,
2633 &card->qdio.init_pool.entry_list, init_list) {
2634 qeth_put_buffer_pool_entry(card, entry);
2635 }
2636 }
2637
2638 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2639 struct qeth_card *card)
2640 {
2641 struct list_head *plh;
2642 struct qeth_buffer_pool_entry *entry;
2643 int i, free;
2644 struct page *page;
2645
2646 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2647 return NULL;
2648
2649 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2650 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2651 free = 1;
2652 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2653 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2654 free = 0;
2655 break;
2656 }
2657 }
2658 if (free) {
2659 list_del_init(&entry->list);
2660 return entry;
2661 }
2662 }
2663
2664 /* no free buffer in pool so take first one and swap pages */
2665 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2666 struct qeth_buffer_pool_entry, list);
2667 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2668 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2669 page = alloc_page(GFP_ATOMIC);
2670 if (!page) {
2671 return NULL;
2672 } else {
2673 free_page((unsigned long)entry->elements[i]);
2674 entry->elements[i] = page_address(page);
2675 if (card->options.performance_stats)
2676 card->perf_stats.sg_alloc_page_rx++;
2677 }
2678 }
2679 }
2680 list_del_init(&entry->list);
2681 return entry;
2682 }
2683
2684 static int qeth_init_input_buffer(struct qeth_card *card,
2685 struct qeth_qdio_buffer *buf)
2686 {
2687 struct qeth_buffer_pool_entry *pool_entry;
2688 int i;
2689
2690 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2691 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2692 if (!buf->rx_skb)
2693 return 1;
2694 }
2695
2696 pool_entry = qeth_find_free_buffer_pool_entry(card);
2697 if (!pool_entry)
2698 return 1;
2699
2700 /*
2701 * since the buffer is accessed only from the input_tasklet
2702 * there shouldn't be a need to synchronize; also, since we use
2703 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2704 * buffers
2705 */
2706
2707 buf->pool_entry = pool_entry;
2708 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2709 buf->buffer->element[i].length = PAGE_SIZE;
2710 buf->buffer->element[i].addr = pool_entry->elements[i];
2711 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2712 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2713 else
2714 buf->buffer->element[i].eflags = 0;
2715 buf->buffer->element[i].sflags = 0;
2716 }
2717 return 0;
2718 }
2719
2720 int qeth_init_qdio_queues(struct qeth_card *card)
2721 {
2722 int i, j;
2723 int rc;
2724
2725 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2726
2727 /* inbound queue */
2728 memset(card->qdio.in_q->qdio_bufs, 0,
2729 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2730 qeth_initialize_working_pool_list(card);
2731 /*give only as many buffers to hardware as we have buffer pool entries*/
2732 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2733 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2734 card->qdio.in_q->next_buf_to_init =
2735 card->qdio.in_buf_pool.buf_count - 1;
2736 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2737 card->qdio.in_buf_pool.buf_count - 1);
2738 if (rc) {
2739 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2740 return rc;
2741 }
2742
2743 /* completion */
2744 rc = qeth_cq_init(card);
2745 if (rc) {
2746 return rc;
2747 }
2748
2749 /* outbound queue */
2750 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2751 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2752 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2753 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2754 qeth_clear_output_buffer(card->qdio.out_qs[i],
2755 card->qdio.out_qs[i]->bufs[j],
2756 QETH_QDIO_BUF_EMPTY);
2757 }
2758 card->qdio.out_qs[i]->card = card;
2759 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2760 card->qdio.out_qs[i]->do_pack = 0;
2761 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2762 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2763 atomic_set(&card->qdio.out_qs[i]->state,
2764 QETH_OUT_Q_UNLOCKED);
2765 }
2766 return 0;
2767 }
2768 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2769
2770 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2771 {
2772 switch (link_type) {
2773 case QETH_LINK_TYPE_HSTR:
2774 return 2;
2775 default:
2776 return 1;
2777 }
2778 }
2779
2780 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2781 struct qeth_ipa_cmd *cmd, __u8 command,
2782 enum qeth_prot_versions prot)
2783 {
2784 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2785 cmd->hdr.command = command;
2786 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2787 cmd->hdr.seqno = card->seqno.ipa;
2788 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2789 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2790 if (card->options.layer2)
2791 cmd->hdr.prim_version_no = 2;
2792 else
2793 cmd->hdr.prim_version_no = 1;
2794 cmd->hdr.param_count = 1;
2795 cmd->hdr.prot_version = prot;
2796 cmd->hdr.ipa_supported = 0;
2797 cmd->hdr.ipa_enabled = 0;
2798 }
2799
2800 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2801 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2802 {
2803 struct qeth_cmd_buffer *iob;
2804 struct qeth_ipa_cmd *cmd;
2805
2806 iob = qeth_wait_for_buffer(&card->write);
2807 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2808 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2809
2810 return iob;
2811 }
2812 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2813
2814 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2815 char prot_type)
2816 {
2817 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2818 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2819 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2820 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2821 }
2822 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2823
2824 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2825 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2826 unsigned long),
2827 void *reply_param)
2828 {
2829 int rc;
2830 char prot_type;
2831
2832 QETH_CARD_TEXT(card, 4, "sendipa");
2833
2834 if (card->options.layer2)
2835 if (card->info.type == QETH_CARD_TYPE_OSN)
2836 prot_type = QETH_PROT_OSN2;
2837 else
2838 prot_type = QETH_PROT_LAYER2;
2839 else
2840 prot_type = QETH_PROT_TCPIP;
2841 qeth_prepare_ipa_cmd(card, iob, prot_type);
2842 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2843 iob, reply_cb, reply_param);
2844 if (rc == -ETIME) {
2845 qeth_clear_ipacmd_list(card);
2846 qeth_schedule_recovery(card);
2847 }
2848 return rc;
2849 }
2850 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2851
2852 int qeth_send_startlan(struct qeth_card *card)
2853 {
2854 int rc;
2855 struct qeth_cmd_buffer *iob;
2856
2857 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2858
2859 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2860 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2861 return rc;
2862 }
2863 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2864
2865 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2866 struct qeth_reply *reply, unsigned long data)
2867 {
2868 struct qeth_ipa_cmd *cmd;
2869
2870 QETH_CARD_TEXT(card, 4, "defadpcb");
2871
2872 cmd = (struct qeth_ipa_cmd *) data;
2873 if (cmd->hdr.return_code == 0)
2874 cmd->hdr.return_code =
2875 cmd->data.setadapterparms.hdr.return_code;
2876 return 0;
2877 }
2878 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2879
2880 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2881 struct qeth_reply *reply, unsigned long data)
2882 {
2883 struct qeth_ipa_cmd *cmd;
2884
2885 QETH_CARD_TEXT(card, 3, "quyadpcb");
2886
2887 cmd = (struct qeth_ipa_cmd *) data;
2888 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2889 card->info.link_type =
2890 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2891 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2892 }
2893 card->options.adp.supported_funcs =
2894 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2895 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2896 }
2897
2898 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2899 __u32 command, __u32 cmdlen)
2900 {
2901 struct qeth_cmd_buffer *iob;
2902 struct qeth_ipa_cmd *cmd;
2903
2904 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2905 QETH_PROT_IPV4);
2906 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2907 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2908 cmd->data.setadapterparms.hdr.command_code = command;
2909 cmd->data.setadapterparms.hdr.used_total = 1;
2910 cmd->data.setadapterparms.hdr.seq_no = 1;
2911
2912 return iob;
2913 }
2914 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2915
2916 int qeth_query_setadapterparms(struct qeth_card *card)
2917 {
2918 int rc;
2919 struct qeth_cmd_buffer *iob;
2920
2921 QETH_CARD_TEXT(card, 3, "queryadp");
2922 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2923 sizeof(struct qeth_ipacmd_setadpparms));
2924 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2925 return rc;
2926 }
2927 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2928
2929 static int qeth_query_ipassists_cb(struct qeth_card *card,
2930 struct qeth_reply *reply, unsigned long data)
2931 {
2932 struct qeth_ipa_cmd *cmd;
2933
2934 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2935
2936 cmd = (struct qeth_ipa_cmd *) data;
2937 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2938 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2939 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2940 } else {
2941 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2942 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2943 }
2944 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2945 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported);
2946 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled);
2947 return 0;
2948 }
2949
2950 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2951 {
2952 int rc;
2953 struct qeth_cmd_buffer *iob;
2954
2955 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2956 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2957 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2958 return rc;
2959 }
2960 EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2961
2962 static int qeth_query_setdiagass_cb(struct qeth_card *card,
2963 struct qeth_reply *reply, unsigned long data)
2964 {
2965 struct qeth_ipa_cmd *cmd;
2966 __u16 rc;
2967
2968 cmd = (struct qeth_ipa_cmd *)data;
2969 rc = cmd->hdr.return_code;
2970 if (rc)
2971 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2972 else
2973 card->info.diagass_support = cmd->data.diagass.ext;
2974 return 0;
2975 }
2976
2977 static int qeth_query_setdiagass(struct qeth_card *card)
2978 {
2979 struct qeth_cmd_buffer *iob;
2980 struct qeth_ipa_cmd *cmd;
2981
2982 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
2983 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2984 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2985 cmd->data.diagass.subcmd_len = 16;
2986 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
2987 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
2988 }
2989
2990 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
2991 {
2992 unsigned long info = get_zeroed_page(GFP_KERNEL);
2993 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
2994 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
2995 struct ccw_dev_id ccwid;
2996 int level;
2997
2998 tid->chpid = card->info.chpid;
2999 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3000 tid->ssid = ccwid.ssid;
3001 tid->devno = ccwid.devno;
3002 if (!info)
3003 return;
3004 level = stsi(NULL, 0, 0, 0);
3005 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
3006 tid->lparnr = info222->lpar_number;
3007 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
3008 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3009 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3010 }
3011 free_page(info);
3012 return;
3013 }
3014
3015 static int qeth_hw_trap_cb(struct qeth_card *card,
3016 struct qeth_reply *reply, unsigned long data)
3017 {
3018 struct qeth_ipa_cmd *cmd;
3019 __u16 rc;
3020
3021 cmd = (struct qeth_ipa_cmd *)data;
3022 rc = cmd->hdr.return_code;
3023 if (rc)
3024 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3025 return 0;
3026 }
3027
3028 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3029 {
3030 struct qeth_cmd_buffer *iob;
3031 struct qeth_ipa_cmd *cmd;
3032
3033 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3034 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3035 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3036 cmd->data.diagass.subcmd_len = 80;
3037 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3038 cmd->data.diagass.type = 1;
3039 cmd->data.diagass.action = action;
3040 switch (action) {
3041 case QETH_DIAGS_TRAP_ARM:
3042 cmd->data.diagass.options = 0x0003;
3043 cmd->data.diagass.ext = 0x00010000 +
3044 sizeof(struct qeth_trap_id);
3045 qeth_get_trap_id(card,
3046 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3047 break;
3048 case QETH_DIAGS_TRAP_DISARM:
3049 cmd->data.diagass.options = 0x0001;
3050 break;
3051 case QETH_DIAGS_TRAP_CAPTURE:
3052 break;
3053 }
3054 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3055 }
3056 EXPORT_SYMBOL_GPL(qeth_hw_trap);
3057
3058 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3059 unsigned int qdio_error, const char *dbftext)
3060 {
3061 if (qdio_error) {
3062 QETH_CARD_TEXT(card, 2, dbftext);
3063 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3064 buf->element[15].sflags);
3065 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3066 buf->element[14].sflags);
3067 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3068 if ((buf->element[15].sflags) == 0x12) {
3069 card->stats.rx_dropped++;
3070 return 0;
3071 } else
3072 return 1;
3073 }
3074 return 0;
3075 }
3076 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3077
3078 void qeth_buffer_reclaim_work(struct work_struct *work)
3079 {
3080 struct qeth_card *card = container_of(work, struct qeth_card,
3081 buffer_reclaim_work.work);
3082
3083 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3084 qeth_queue_input_buffer(card, card->reclaim_index);
3085 }
3086
3087 void qeth_queue_input_buffer(struct qeth_card *card, int index)
3088 {
3089 struct qeth_qdio_q *queue = card->qdio.in_q;
3090 struct list_head *lh;
3091 int count;
3092 int i;
3093 int rc;
3094 int newcount = 0;
3095
3096 count = (index < queue->next_buf_to_init)?
3097 card->qdio.in_buf_pool.buf_count -
3098 (queue->next_buf_to_init - index) :
3099 card->qdio.in_buf_pool.buf_count -
3100 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3101 /* only requeue at a certain threshold to avoid SIGAs */
3102 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3103 for (i = queue->next_buf_to_init;
3104 i < queue->next_buf_to_init + count; ++i) {
3105 if (qeth_init_input_buffer(card,
3106 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3107 break;
3108 } else {
3109 newcount++;
3110 }
3111 }
3112
3113 if (newcount < count) {
3114 /* we are in memory shortage so we switch back to
3115 traditional skb allocation and drop packages */
3116 atomic_set(&card->force_alloc_skb, 3);
3117 count = newcount;
3118 } else {
3119 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3120 }
3121
3122 if (!count) {
3123 i = 0;
3124 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3125 i++;
3126 if (i == card->qdio.in_buf_pool.buf_count) {
3127 QETH_CARD_TEXT(card, 2, "qsarbw");
3128 card->reclaim_index = index;
3129 schedule_delayed_work(
3130 &card->buffer_reclaim_work,
3131 QETH_RECLAIM_WORK_TIME);
3132 }
3133 return;
3134 }
3135
3136 /*
3137 * according to old code it should be avoided to requeue all
3138 * 128 buffers in order to benefit from PCI avoidance.
3139 * this function keeps at least one buffer (the buffer at
3140 * 'index') un-requeued -> this buffer is the first buffer that
3141 * will be requeued the next time
3142 */
3143 if (card->options.performance_stats) {
3144 card->perf_stats.inbound_do_qdio_cnt++;
3145 card->perf_stats.inbound_do_qdio_start_time =
3146 qeth_get_micros();
3147 }
3148 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3149 queue->next_buf_to_init, count);
3150 if (card->options.performance_stats)
3151 card->perf_stats.inbound_do_qdio_time +=
3152 qeth_get_micros() -
3153 card->perf_stats.inbound_do_qdio_start_time;
3154 if (rc) {
3155 QETH_CARD_TEXT(card, 2, "qinberr");
3156 }
3157 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3158 QDIO_MAX_BUFFERS_PER_Q;
3159 }
3160 }
3161 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3162
3163 static int qeth_handle_send_error(struct qeth_card *card,
3164 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3165 {
3166 int sbalf15 = buffer->buffer->element[15].sflags;
3167
3168 QETH_CARD_TEXT(card, 6, "hdsnderr");
3169 if (card->info.type == QETH_CARD_TYPE_IQD) {
3170 if (sbalf15 == 0) {
3171 qdio_err = 0;
3172 } else {
3173 qdio_err = 1;
3174 }
3175 }
3176 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3177
3178 if (!qdio_err)
3179 return QETH_SEND_ERROR_NONE;
3180
3181 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3182 return QETH_SEND_ERROR_RETRY;
3183
3184 QETH_CARD_TEXT(card, 1, "lnkfail");
3185 QETH_CARD_TEXT_(card, 1, "%04x %02x",
3186 (u16)qdio_err, (u8)sbalf15);
3187 return QETH_SEND_ERROR_LINK_FAILURE;
3188 }
3189
3190 /*
3191 * Switched to packing state if the number of used buffers on a queue
3192 * reaches a certain limit.
3193 */
3194 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3195 {
3196 if (!queue->do_pack) {
3197 if (atomic_read(&queue->used_buffers)
3198 >= QETH_HIGH_WATERMARK_PACK){
3199 /* switch non-PACKING -> PACKING */
3200 QETH_CARD_TEXT(queue->card, 6, "np->pack");
3201 if (queue->card->options.performance_stats)
3202 queue->card->perf_stats.sc_dp_p++;
3203 queue->do_pack = 1;
3204 }
3205 }
3206 }
3207
3208 /*
3209 * Switches from packing to non-packing mode. If there is a packing
3210 * buffer on the queue this buffer will be prepared to be flushed.
3211 * In that case 1 is returned to inform the caller. If no buffer
3212 * has to be flushed, zero is returned.
3213 */
3214 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3215 {
3216 struct qeth_qdio_out_buffer *buffer;
3217 int flush_count = 0;
3218
3219 if (queue->do_pack) {
3220 if (atomic_read(&queue->used_buffers)
3221 <= QETH_LOW_WATERMARK_PACK) {
3222 /* switch PACKING -> non-PACKING */
3223 QETH_CARD_TEXT(queue->card, 6, "pack->np");
3224 if (queue->card->options.performance_stats)
3225 queue->card->perf_stats.sc_p_dp++;
3226 queue->do_pack = 0;
3227 /* flush packing buffers */
3228 buffer = queue->bufs[queue->next_buf_to_fill];
3229 if ((atomic_read(&buffer->state) ==
3230 QETH_QDIO_BUF_EMPTY) &&
3231 (buffer->next_element_to_fill > 0)) {
3232 atomic_set(&buffer->state,
3233 QETH_QDIO_BUF_PRIMED);
3234 flush_count++;
3235 queue->next_buf_to_fill =
3236 (queue->next_buf_to_fill + 1) %
3237 QDIO_MAX_BUFFERS_PER_Q;
3238 }
3239 }
3240 }
3241 return flush_count;
3242 }
3243
3244
3245 /*
3246 * Called to flush a packing buffer if no more pci flags are on the queue.
3247 * Checks if there is a packing buffer and prepares it to be flushed.
3248 * In that case returns 1, otherwise zero.
3249 */
3250 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3251 {
3252 struct qeth_qdio_out_buffer *buffer;
3253
3254 buffer = queue->bufs[queue->next_buf_to_fill];
3255 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3256 (buffer->next_element_to_fill > 0)) {
3257 /* it's a packing buffer */
3258 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3259 queue->next_buf_to_fill =
3260 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3261 return 1;
3262 }
3263 return 0;
3264 }
3265
3266 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3267 int count)
3268 {
3269 struct qeth_qdio_out_buffer *buf;
3270 int rc;
3271 int i;
3272 unsigned int qdio_flags;
3273
3274 for (i = index; i < index + count; ++i) {
3275 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3276 buf = queue->bufs[bidx];
3277 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3278 SBAL_EFLAGS_LAST_ENTRY;
3279
3280 if (queue->bufstates)
3281 queue->bufstates[bidx].user = buf;
3282
3283 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3284 continue;
3285
3286 if (!queue->do_pack) {
3287 if ((atomic_read(&queue->used_buffers) >=
3288 (QETH_HIGH_WATERMARK_PACK -
3289 QETH_WATERMARK_PACK_FUZZ)) &&
3290 !atomic_read(&queue->set_pci_flags_count)) {
3291 /* it's likely that we'll go to packing
3292 * mode soon */
3293 atomic_inc(&queue->set_pci_flags_count);
3294 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3295 }
3296 } else {
3297 if (!atomic_read(&queue->set_pci_flags_count)) {
3298 /*
3299 * there's no outstanding PCI any more, so we
3300 * have to request a PCI to be sure the the PCI
3301 * will wake at some time in the future then we
3302 * can flush packed buffers that might still be
3303 * hanging around, which can happen if no
3304 * further send was requested by the stack
3305 */
3306 atomic_inc(&queue->set_pci_flags_count);
3307 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3308 }
3309 }
3310 }
3311
3312 queue->card->dev->trans_start = jiffies;
3313 if (queue->card->options.performance_stats) {
3314 queue->card->perf_stats.outbound_do_qdio_cnt++;
3315 queue->card->perf_stats.outbound_do_qdio_start_time =
3316 qeth_get_micros();
3317 }
3318 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3319 if (atomic_read(&queue->set_pci_flags_count))
3320 qdio_flags |= QDIO_FLAG_PCI_OUT;
3321 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3322 queue->queue_no, index, count);
3323 if (queue->card->options.performance_stats)
3324 queue->card->perf_stats.outbound_do_qdio_time +=
3325 qeth_get_micros() -
3326 queue->card->perf_stats.outbound_do_qdio_start_time;
3327 atomic_add(count, &queue->used_buffers);
3328 if (rc) {
3329 queue->card->stats.tx_errors += count;
3330 /* ignore temporary SIGA errors without busy condition */
3331 if (rc == -ENOBUFS)
3332 return;
3333 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3334 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3335 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3336 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3337 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3338
3339 /* this must not happen under normal circumstances. if it
3340 * happens something is really wrong -> recover */
3341 qeth_schedule_recovery(queue->card);
3342 return;
3343 }
3344 if (queue->card->options.performance_stats)
3345 queue->card->perf_stats.bufs_sent += count;
3346 }
3347
3348 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3349 {
3350 int index;
3351 int flush_cnt = 0;
3352 int q_was_packing = 0;
3353
3354 /*
3355 * check if weed have to switch to non-packing mode or if
3356 * we have to get a pci flag out on the queue
3357 */
3358 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3359 !atomic_read(&queue->set_pci_flags_count)) {
3360 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3361 QETH_OUT_Q_UNLOCKED) {
3362 /*
3363 * If we get in here, there was no action in
3364 * do_send_packet. So, we check if there is a
3365 * packing buffer to be flushed here.
3366 */
3367 netif_stop_queue(queue->card->dev);
3368 index = queue->next_buf_to_fill;
3369 q_was_packing = queue->do_pack;
3370 /* queue->do_pack may change */
3371 barrier();
3372 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3373 if (!flush_cnt &&
3374 !atomic_read(&queue->set_pci_flags_count))
3375 flush_cnt +=
3376 qeth_flush_buffers_on_no_pci(queue);
3377 if (queue->card->options.performance_stats &&
3378 q_was_packing)
3379 queue->card->perf_stats.bufs_sent_pack +=
3380 flush_cnt;
3381 if (flush_cnt)
3382 qeth_flush_buffers(queue, index, flush_cnt);
3383 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3384 }
3385 }
3386 }
3387
3388 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3389 unsigned long card_ptr)
3390 {
3391 struct qeth_card *card = (struct qeth_card *)card_ptr;
3392
3393 if (card->dev && (card->dev->flags & IFF_UP))
3394 napi_schedule(&card->napi);
3395 }
3396 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3397
3398 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3399 {
3400 int rc;
3401
3402 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3403 rc = -1;
3404 goto out;
3405 } else {
3406 if (card->options.cq == cq) {
3407 rc = 0;
3408 goto out;
3409 }
3410
3411 if (card->state != CARD_STATE_DOWN &&
3412 card->state != CARD_STATE_RECOVER) {
3413 rc = -1;
3414 goto out;
3415 }
3416
3417 qeth_free_qdio_buffers(card);
3418 card->options.cq = cq;
3419 rc = 0;
3420 }
3421 out:
3422 return rc;
3423
3424 }
3425 EXPORT_SYMBOL_GPL(qeth_configure_cq);
3426
3427
3428 static void qeth_qdio_cq_handler(struct qeth_card *card,
3429 unsigned int qdio_err,
3430 unsigned int queue, int first_element, int count) {
3431 struct qeth_qdio_q *cq = card->qdio.c_q;
3432 int i;
3433 int rc;
3434
3435 if (!qeth_is_cq(card, queue))
3436 goto out;
3437
3438 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3439 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3440 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3441
3442 if (qdio_err) {
3443 netif_stop_queue(card->dev);
3444 qeth_schedule_recovery(card);
3445 goto out;
3446 }
3447
3448 if (card->options.performance_stats) {
3449 card->perf_stats.cq_cnt++;
3450 card->perf_stats.cq_start_time = qeth_get_micros();
3451 }
3452
3453 for (i = first_element; i < first_element + count; ++i) {
3454 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3455 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3456 int e;
3457
3458 e = 0;
3459 while (buffer->element[e].addr) {
3460 unsigned long phys_aob_addr;
3461
3462 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3463 qeth_qdio_handle_aob(card, phys_aob_addr);
3464 buffer->element[e].addr = NULL;
3465 buffer->element[e].eflags = 0;
3466 buffer->element[e].sflags = 0;
3467 buffer->element[e].length = 0;
3468
3469 ++e;
3470 }
3471
3472 buffer->element[15].eflags = 0;
3473 buffer->element[15].sflags = 0;
3474 }
3475 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3476 card->qdio.c_q->next_buf_to_init,
3477 count);
3478 if (rc) {
3479 dev_warn(&card->gdev->dev,
3480 "QDIO reported an error, rc=%i\n", rc);
3481 QETH_CARD_TEXT(card, 2, "qcqherr");
3482 }
3483 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3484 + count) % QDIO_MAX_BUFFERS_PER_Q;
3485
3486 netif_wake_queue(card->dev);
3487
3488 if (card->options.performance_stats) {
3489 int delta_t = qeth_get_micros();
3490 delta_t -= card->perf_stats.cq_start_time;
3491 card->perf_stats.cq_time += delta_t;
3492 }
3493 out:
3494 return;
3495 }
3496
3497 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3498 unsigned int queue, int first_elem, int count,
3499 unsigned long card_ptr)
3500 {
3501 struct qeth_card *card = (struct qeth_card *)card_ptr;
3502
3503 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3504 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3505
3506 if (qeth_is_cq(card, queue))
3507 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3508 else if (qdio_err)
3509 qeth_schedule_recovery(card);
3510
3511
3512 }
3513 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3514
3515 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3516 unsigned int qdio_error, int __queue, int first_element,
3517 int count, unsigned long card_ptr)
3518 {
3519 struct qeth_card *card = (struct qeth_card *) card_ptr;
3520 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3521 struct qeth_qdio_out_buffer *buffer;
3522 int i;
3523
3524 QETH_CARD_TEXT(card, 6, "qdouhdl");
3525 if (qdio_error & QDIO_ERROR_FATAL) {
3526 QETH_CARD_TEXT(card, 2, "achkcond");
3527 netif_stop_queue(card->dev);
3528 qeth_schedule_recovery(card);
3529 return;
3530 }
3531 if (card->options.performance_stats) {
3532 card->perf_stats.outbound_handler_cnt++;
3533 card->perf_stats.outbound_handler_start_time =
3534 qeth_get_micros();
3535 }
3536 for (i = first_element; i < (first_element + count); ++i) {
3537 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3538 buffer = queue->bufs[bidx];
3539 qeth_handle_send_error(card, buffer, qdio_error);
3540
3541 if (queue->bufstates &&
3542 (queue->bufstates[bidx].flags &
3543 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3544 BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3545
3546 if (atomic_cmpxchg(&buffer->state,
3547 QETH_QDIO_BUF_PRIMED,
3548 QETH_QDIO_BUF_PENDING) ==
3549 QETH_QDIO_BUF_PRIMED) {
3550 qeth_notify_skbs(queue, buffer,
3551 TX_NOTIFY_PENDING);
3552 }
3553 buffer->aob = queue->bufstates[bidx].aob;
3554 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3555 QETH_CARD_TEXT(queue->card, 5, "aob");
3556 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3557 virt_to_phys(buffer->aob));
3558 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
3559 if (qeth_init_qdio_out_buf(queue, bidx)) {
3560 QETH_CARD_TEXT(card, 2, "outofbuf");
3561 qeth_schedule_recovery(card);
3562 }
3563 } else {
3564 if (card->options.cq == QETH_CQ_ENABLED) {
3565 enum iucv_tx_notify n;
3566
3567 n = qeth_compute_cq_notification(
3568 buffer->buffer->element[15].sflags, 0);
3569 qeth_notify_skbs(queue, buffer, n);
3570 }
3571
3572 qeth_clear_output_buffer(queue, buffer,
3573 QETH_QDIO_BUF_EMPTY);
3574 }
3575 qeth_cleanup_handled_pending(queue, bidx, 0);
3576 }
3577 atomic_sub(count, &queue->used_buffers);
3578 /* check if we need to do something on this outbound queue */
3579 if (card->info.type != QETH_CARD_TYPE_IQD)
3580 qeth_check_outbound_queue(queue);
3581
3582 netif_wake_queue(queue->card->dev);
3583 if (card->options.performance_stats)
3584 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3585 card->perf_stats.outbound_handler_start_time;
3586 }
3587 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3588
3589 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3590 int ipv, int cast_type)
3591 {
3592 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3593 card->info.type == QETH_CARD_TYPE_OSX))
3594 return card->qdio.default_out_queue;
3595 switch (card->qdio.no_out_queues) {
3596 case 4:
3597 if (cast_type && card->info.is_multicast_different)
3598 return card->info.is_multicast_different &
3599 (card->qdio.no_out_queues - 1);
3600 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3601 const u8 tos = ip_hdr(skb)->tos;
3602
3603 if (card->qdio.do_prio_queueing ==
3604 QETH_PRIO_Q_ING_TOS) {
3605 if (tos & IP_TOS_NOTIMPORTANT)
3606 return 3;
3607 if (tos & IP_TOS_HIGHRELIABILITY)
3608 return 2;
3609 if (tos & IP_TOS_HIGHTHROUGHPUT)
3610 return 1;
3611 if (tos & IP_TOS_LOWDELAY)
3612 return 0;
3613 }
3614 if (card->qdio.do_prio_queueing ==
3615 QETH_PRIO_Q_ING_PREC)
3616 return 3 - (tos >> 6);
3617 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3618 /* TODO: IPv6!!! */
3619 }
3620 return card->qdio.default_out_queue;
3621 case 1: /* fallthrough for single-out-queue 1920-device */
3622 default:
3623 return card->qdio.default_out_queue;
3624 }
3625 }
3626 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3627
3628 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3629 struct sk_buff *skb, int elems)
3630 {
3631 int dlen = skb->len - skb->data_len;
3632 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3633 PFN_DOWN((unsigned long)skb->data);
3634
3635 elements_needed += skb_shinfo(skb)->nr_frags;
3636 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3637 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3638 "(Number=%d / Length=%d). Discarded.\n",
3639 (elements_needed+elems), skb->len);
3640 return 0;
3641 }
3642 return elements_needed;
3643 }
3644 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3645
3646 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3647 {
3648 int hroom, inpage, rest;
3649
3650 if (((unsigned long)skb->data & PAGE_MASK) !=
3651 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3652 hroom = skb_headroom(skb);
3653 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3654 rest = len - inpage;
3655 if (rest > hroom)
3656 return 1;
3657 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3658 skb->data -= rest;
3659 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3660 }
3661 return 0;
3662 }
3663 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3664
3665 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3666 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3667 int offset)
3668 {
3669 int length = skb->len - skb->data_len;
3670 int length_here;
3671 int element;
3672 char *data;
3673 int first_lap, cnt;
3674 struct skb_frag_struct *frag;
3675
3676 element = *next_element_to_fill;
3677 data = skb->data;
3678 first_lap = (is_tso == 0 ? 1 : 0);
3679
3680 if (offset >= 0) {
3681 data = skb->data + offset;
3682 length -= offset;
3683 first_lap = 0;
3684 }
3685
3686 while (length > 0) {
3687 /* length_here is the remaining amount of data in this page */
3688 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3689 if (length < length_here)
3690 length_here = length;
3691
3692 buffer->element[element].addr = data;
3693 buffer->element[element].length = length_here;
3694 length -= length_here;
3695 if (!length) {
3696 if (first_lap)
3697 if (skb_shinfo(skb)->nr_frags)
3698 buffer->element[element].eflags =
3699 SBAL_EFLAGS_FIRST_FRAG;
3700 else
3701 buffer->element[element].eflags = 0;
3702 else
3703 buffer->element[element].eflags =
3704 SBAL_EFLAGS_MIDDLE_FRAG;
3705 } else {
3706 if (first_lap)
3707 buffer->element[element].eflags =
3708 SBAL_EFLAGS_FIRST_FRAG;
3709 else
3710 buffer->element[element].eflags =
3711 SBAL_EFLAGS_MIDDLE_FRAG;
3712 }
3713 data += length_here;
3714 element++;
3715 first_lap = 0;
3716 }
3717
3718 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3719 frag = &skb_shinfo(skb)->frags[cnt];
3720 buffer->element[element].addr = (char *)
3721 page_to_phys(skb_frag_page(frag))
3722 + frag->page_offset;
3723 buffer->element[element].length = frag->size;
3724 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
3725 element++;
3726 }
3727
3728 if (buffer->element[element - 1].eflags)
3729 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3730 *next_element_to_fill = element;
3731 }
3732
3733 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3734 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3735 struct qeth_hdr *hdr, int offset, int hd_len)
3736 {
3737 struct qdio_buffer *buffer;
3738 int flush_cnt = 0, hdr_len, large_send = 0;
3739
3740 buffer = buf->buffer;
3741 atomic_inc(&skb->users);
3742 skb_queue_tail(&buf->skb_list, skb);
3743
3744 /*check first on TSO ....*/
3745 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3746 int element = buf->next_element_to_fill;
3747
3748 hdr_len = sizeof(struct qeth_hdr_tso) +
3749 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3750 /*fill first buffer entry only with header information */
3751 buffer->element[element].addr = skb->data;
3752 buffer->element[element].length = hdr_len;
3753 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3754 buf->next_element_to_fill++;
3755 skb->data += hdr_len;
3756 skb->len -= hdr_len;
3757 large_send = 1;
3758 }
3759
3760 if (offset >= 0) {
3761 int element = buf->next_element_to_fill;
3762 buffer->element[element].addr = hdr;
3763 buffer->element[element].length = sizeof(struct qeth_hdr) +
3764 hd_len;
3765 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3766 buf->is_header[element] = 1;
3767 buf->next_element_to_fill++;
3768 }
3769
3770 __qeth_fill_buffer(skb, buffer, large_send,
3771 (int *)&buf->next_element_to_fill, offset);
3772
3773 if (!queue->do_pack) {
3774 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3775 /* set state to PRIMED -> will be flushed */
3776 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3777 flush_cnt = 1;
3778 } else {
3779 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3780 if (queue->card->options.performance_stats)
3781 queue->card->perf_stats.skbs_sent_pack++;
3782 if (buf->next_element_to_fill >=
3783 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3784 /*
3785 * packed buffer if full -> set state PRIMED
3786 * -> will be flushed
3787 */
3788 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3789 flush_cnt = 1;
3790 }
3791 }
3792 return flush_cnt;
3793 }
3794
3795 int qeth_do_send_packet_fast(struct qeth_card *card,
3796 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3797 struct qeth_hdr *hdr, int elements_needed,
3798 int offset, int hd_len)
3799 {
3800 struct qeth_qdio_out_buffer *buffer;
3801 int index;
3802
3803 /* spin until we get the queue ... */
3804 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3805 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3806 /* ... now we've got the queue */
3807 index = queue->next_buf_to_fill;
3808 buffer = queue->bufs[queue->next_buf_to_fill];
3809 /*
3810 * check if buffer is empty to make sure that we do not 'overtake'
3811 * ourselves and try to fill a buffer that is already primed
3812 */
3813 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3814 goto out;
3815 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3816 QDIO_MAX_BUFFERS_PER_Q;
3817 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3818 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3819 qeth_flush_buffers(queue, index, 1);
3820 return 0;
3821 out:
3822 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3823 return -EBUSY;
3824 }
3825 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3826
3827 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3828 struct sk_buff *skb, struct qeth_hdr *hdr,
3829 int elements_needed)
3830 {
3831 struct qeth_qdio_out_buffer *buffer;
3832 int start_index;
3833 int flush_count = 0;
3834 int do_pack = 0;
3835 int tmp;
3836 int rc = 0;
3837
3838 /* spin until we get the queue ... */
3839 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3840 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3841 start_index = queue->next_buf_to_fill;
3842 buffer = queue->bufs[queue->next_buf_to_fill];
3843 /*
3844 * check if buffer is empty to make sure that we do not 'overtake'
3845 * ourselves and try to fill a buffer that is already primed
3846 */
3847 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3848 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3849 return -EBUSY;
3850 }
3851 /* check if we need to switch packing state of this queue */
3852 qeth_switch_to_packing_if_needed(queue);
3853 if (queue->do_pack) {
3854 do_pack = 1;
3855 /* does packet fit in current buffer? */
3856 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3857 buffer->next_element_to_fill) < elements_needed) {
3858 /* ... no -> set state PRIMED */
3859 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3860 flush_count++;
3861 queue->next_buf_to_fill =
3862 (queue->next_buf_to_fill + 1) %
3863 QDIO_MAX_BUFFERS_PER_Q;
3864 buffer = queue->bufs[queue->next_buf_to_fill];
3865 /* we did a step forward, so check buffer state
3866 * again */
3867 if (atomic_read(&buffer->state) !=
3868 QETH_QDIO_BUF_EMPTY) {
3869 qeth_flush_buffers(queue, start_index,
3870 flush_count);
3871 atomic_set(&queue->state,
3872 QETH_OUT_Q_UNLOCKED);
3873 return -EBUSY;
3874 }
3875 }
3876 }
3877 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3878 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3879 QDIO_MAX_BUFFERS_PER_Q;
3880 flush_count += tmp;
3881 if (flush_count)
3882 qeth_flush_buffers(queue, start_index, flush_count);
3883 else if (!atomic_read(&queue->set_pci_flags_count))
3884 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3885 /*
3886 * queue->state will go from LOCKED -> UNLOCKED or from
3887 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3888 * (switch packing state or flush buffer to get another pci flag out).
3889 * In that case we will enter this loop
3890 */
3891 while (atomic_dec_return(&queue->state)) {
3892 flush_count = 0;
3893 start_index = queue->next_buf_to_fill;
3894 /* check if we can go back to non-packing state */
3895 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3896 /*
3897 * check if we need to flush a packing buffer to get a pci
3898 * flag out on the queue
3899 */
3900 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3901 flush_count += qeth_flush_buffers_on_no_pci(queue);
3902 if (flush_count)
3903 qeth_flush_buffers(queue, start_index, flush_count);
3904 }
3905 /* at this point the queue is UNLOCKED again */
3906 if (queue->card->options.performance_stats && do_pack)
3907 queue->card->perf_stats.bufs_sent_pack += flush_count;
3908
3909 return rc;
3910 }
3911 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3912
3913 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3914 struct qeth_reply *reply, unsigned long data)
3915 {
3916 struct qeth_ipa_cmd *cmd;
3917 struct qeth_ipacmd_setadpparms *setparms;
3918
3919 QETH_CARD_TEXT(card, 4, "prmadpcb");
3920
3921 cmd = (struct qeth_ipa_cmd *) data;
3922 setparms = &(cmd->data.setadapterparms);
3923
3924 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3925 if (cmd->hdr.return_code) {
3926 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3927 setparms->data.mode = SET_PROMISC_MODE_OFF;
3928 }
3929 card->info.promisc_mode = setparms->data.mode;
3930 return 0;
3931 }
3932
3933 void qeth_setadp_promisc_mode(struct qeth_card *card)
3934 {
3935 enum qeth_ipa_promisc_modes mode;
3936 struct net_device *dev = card->dev;
3937 struct qeth_cmd_buffer *iob;
3938 struct qeth_ipa_cmd *cmd;
3939
3940 QETH_CARD_TEXT(card, 4, "setprom");
3941
3942 if (((dev->flags & IFF_PROMISC) &&
3943 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3944 (!(dev->flags & IFF_PROMISC) &&
3945 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3946 return;
3947 mode = SET_PROMISC_MODE_OFF;
3948 if (dev->flags & IFF_PROMISC)
3949 mode = SET_PROMISC_MODE_ON;
3950 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3951
3952 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3953 sizeof(struct qeth_ipacmd_setadpparms));
3954 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3955 cmd->data.setadapterparms.data.mode = mode;
3956 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3957 }
3958 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3959
3960 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3961 {
3962 struct qeth_card *card;
3963 char dbf_text[15];
3964
3965 card = dev->ml_priv;
3966
3967 QETH_CARD_TEXT(card, 4, "chgmtu");
3968 sprintf(dbf_text, "%8x", new_mtu);
3969 QETH_CARD_TEXT(card, 4, dbf_text);
3970
3971 if (new_mtu < 64)
3972 return -EINVAL;
3973 if (new_mtu > 65535)
3974 return -EINVAL;
3975 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3976 (!qeth_mtu_is_valid(card, new_mtu)))
3977 return -EINVAL;
3978 dev->mtu = new_mtu;
3979 return 0;
3980 }
3981 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3982
3983 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3984 {
3985 struct qeth_card *card;
3986
3987 card = dev->ml_priv;
3988
3989 QETH_CARD_TEXT(card, 5, "getstat");
3990
3991 return &card->stats;
3992 }
3993 EXPORT_SYMBOL_GPL(qeth_get_stats);
3994
3995 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3996 struct qeth_reply *reply, unsigned long data)
3997 {
3998 struct qeth_ipa_cmd *cmd;
3999
4000 QETH_CARD_TEXT(card, 4, "chgmaccb");
4001
4002 cmd = (struct qeth_ipa_cmd *) data;
4003 if (!card->options.layer2 ||
4004 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4005 memcpy(card->dev->dev_addr,
4006 &cmd->data.setadapterparms.data.change_addr.addr,
4007 OSA_ADDR_LEN);
4008 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4009 }
4010 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4011 return 0;
4012 }
4013
4014 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4015 {
4016 int rc;
4017 struct qeth_cmd_buffer *iob;
4018 struct qeth_ipa_cmd *cmd;
4019
4020 QETH_CARD_TEXT(card, 4, "chgmac");
4021
4022 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4023 sizeof(struct qeth_ipacmd_setadpparms));
4024 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4025 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4026 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4027 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4028 card->dev->dev_addr, OSA_ADDR_LEN);
4029 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4030 NULL);
4031 return rc;
4032 }
4033 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4034
4035 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4036 struct qeth_reply *reply, unsigned long data)
4037 {
4038 struct qeth_ipa_cmd *cmd;
4039 struct qeth_set_access_ctrl *access_ctrl_req;
4040
4041 QETH_CARD_TEXT(card, 4, "setaccb");
4042
4043 cmd = (struct qeth_ipa_cmd *) data;
4044 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4045 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4046 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4047 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4048 cmd->data.setadapterparms.hdr.return_code);
4049 switch (cmd->data.setadapterparms.hdr.return_code) {
4050 case SET_ACCESS_CTRL_RC_SUCCESS:
4051 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4052 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4053 {
4054 card->options.isolation = access_ctrl_req->subcmd_code;
4055 if (card->options.isolation == ISOLATION_MODE_NONE) {
4056 dev_info(&card->gdev->dev,
4057 "QDIO data connection isolation is deactivated\n");
4058 } else {
4059 dev_info(&card->gdev->dev,
4060 "QDIO data connection isolation is activated\n");
4061 }
4062 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4063 card->gdev->dev.kobj.name,
4064 access_ctrl_req->subcmd_code,
4065 cmd->data.setadapterparms.hdr.return_code);
4066 break;
4067 }
4068 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4069 {
4070 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4071 card->gdev->dev.kobj.name,
4072 access_ctrl_req->subcmd_code,
4073 cmd->data.setadapterparms.hdr.return_code);
4074 dev_err(&card->gdev->dev, "Adapter does not "
4075 "support QDIO data connection isolation\n");
4076
4077 /* ensure isolation mode is "none" */
4078 card->options.isolation = ISOLATION_MODE_NONE;
4079 break;
4080 }
4081 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4082 {
4083 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4084 card->gdev->dev.kobj.name,
4085 access_ctrl_req->subcmd_code,
4086 cmd->data.setadapterparms.hdr.return_code);
4087 dev_err(&card->gdev->dev,
4088 "Adapter is dedicated. "
4089 "QDIO data connection isolation not supported\n");
4090
4091 /* ensure isolation mode is "none" */
4092 card->options.isolation = ISOLATION_MODE_NONE;
4093 break;
4094 }
4095 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4096 {
4097 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4098 card->gdev->dev.kobj.name,
4099 access_ctrl_req->subcmd_code,
4100 cmd->data.setadapterparms.hdr.return_code);
4101 dev_err(&card->gdev->dev,
4102 "TSO does not permit QDIO data connection isolation\n");
4103
4104 /* ensure isolation mode is "none" */
4105 card->options.isolation = ISOLATION_MODE_NONE;
4106 break;
4107 }
4108 default:
4109 {
4110 /* this should never happen */
4111 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4112 "==UNKNOWN\n",
4113 card->gdev->dev.kobj.name,
4114 access_ctrl_req->subcmd_code,
4115 cmd->data.setadapterparms.hdr.return_code);
4116
4117 /* ensure isolation mode is "none" */
4118 card->options.isolation = ISOLATION_MODE_NONE;
4119 break;
4120 }
4121 }
4122 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4123 return 0;
4124 }
4125
4126 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4127 enum qeth_ipa_isolation_modes isolation)
4128 {
4129 int rc;
4130 struct qeth_cmd_buffer *iob;
4131 struct qeth_ipa_cmd *cmd;
4132 struct qeth_set_access_ctrl *access_ctrl_req;
4133
4134 QETH_CARD_TEXT(card, 4, "setacctl");
4135
4136 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4137 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4138
4139 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4140 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4141 sizeof(struct qeth_set_access_ctrl));
4142 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4143 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4144 access_ctrl_req->subcmd_code = isolation;
4145
4146 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4147 NULL);
4148 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4149 return rc;
4150 }
4151
4152 int qeth_set_access_ctrl_online(struct qeth_card *card)
4153 {
4154 int rc = 0;
4155
4156 QETH_CARD_TEXT(card, 4, "setactlo");
4157
4158 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4159 card->info.type == QETH_CARD_TYPE_OSX) &&
4160 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
4161 rc = qeth_setadpparms_set_access_ctrl(card,
4162 card->options.isolation);
4163 if (rc) {
4164 QETH_DBF_MESSAGE(3,
4165 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4166 card->gdev->dev.kobj.name,
4167 rc);
4168 }
4169 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4170 card->options.isolation = ISOLATION_MODE_NONE;
4171
4172 dev_err(&card->gdev->dev, "Adapter does not "
4173 "support QDIO data connection isolation\n");
4174 rc = -EOPNOTSUPP;
4175 }
4176 return rc;
4177 }
4178 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4179
4180 void qeth_tx_timeout(struct net_device *dev)
4181 {
4182 struct qeth_card *card;
4183
4184 card = dev->ml_priv;
4185 QETH_CARD_TEXT(card, 4, "txtimeo");
4186 card->stats.tx_errors++;
4187 qeth_schedule_recovery(card);
4188 }
4189 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4190
4191 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4192 {
4193 struct qeth_card *card = dev->ml_priv;
4194 int rc = 0;
4195
4196 switch (regnum) {
4197 case MII_BMCR: /* Basic mode control register */
4198 rc = BMCR_FULLDPLX;
4199 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4200 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4201 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4202 rc |= BMCR_SPEED100;
4203 break;
4204 case MII_BMSR: /* Basic mode status register */
4205 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4206 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4207 BMSR_100BASE4;
4208 break;
4209 case MII_PHYSID1: /* PHYS ID 1 */
4210 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4211 dev->dev_addr[2];
4212 rc = (rc >> 5) & 0xFFFF;
4213 break;
4214 case MII_PHYSID2: /* PHYS ID 2 */
4215 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4216 break;
4217 case MII_ADVERTISE: /* Advertisement control reg */
4218 rc = ADVERTISE_ALL;
4219 break;
4220 case MII_LPA: /* Link partner ability reg */
4221 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4222 LPA_100BASE4 | LPA_LPACK;
4223 break;
4224 case MII_EXPANSION: /* Expansion register */
4225 break;
4226 case MII_DCOUNTER: /* disconnect counter */
4227 break;
4228 case MII_FCSCOUNTER: /* false carrier counter */
4229 break;
4230 case MII_NWAYTEST: /* N-way auto-neg test register */
4231 break;
4232 case MII_RERRCOUNTER: /* rx error counter */
4233 rc = card->stats.rx_errors;
4234 break;
4235 case MII_SREVISION: /* silicon revision */
4236 break;
4237 case MII_RESV1: /* reserved 1 */
4238 break;
4239 case MII_LBRERROR: /* loopback, rx, bypass error */
4240 break;
4241 case MII_PHYADDR: /* physical address */
4242 break;
4243 case MII_RESV2: /* reserved 2 */
4244 break;
4245 case MII_TPISTATUS: /* TPI status for 10mbps */
4246 break;
4247 case MII_NCONFIG: /* network interface config */
4248 break;
4249 default:
4250 break;
4251 }
4252 return rc;
4253 }
4254 EXPORT_SYMBOL_GPL(qeth_mdio_read);
4255
4256 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4257 struct qeth_cmd_buffer *iob, int len,
4258 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4259 unsigned long),
4260 void *reply_param)
4261 {
4262 u16 s1, s2;
4263
4264 QETH_CARD_TEXT(card, 4, "sendsnmp");
4265
4266 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4267 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4268 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4269 /* adjust PDU length fields in IPA_PDU_HEADER */
4270 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4271 s2 = (u32) len;
4272 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4273 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4274 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4275 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4276 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4277 reply_cb, reply_param);
4278 }
4279
4280 static int qeth_snmp_command_cb(struct qeth_card *card,
4281 struct qeth_reply *reply, unsigned long sdata)
4282 {
4283 struct qeth_ipa_cmd *cmd;
4284 struct qeth_arp_query_info *qinfo;
4285 struct qeth_snmp_cmd *snmp;
4286 unsigned char *data;
4287 __u16 data_len;
4288
4289 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4290
4291 cmd = (struct qeth_ipa_cmd *) sdata;
4292 data = (unsigned char *)((char *)cmd - reply->offset);
4293 qinfo = (struct qeth_arp_query_info *) reply->param;
4294 snmp = &cmd->data.setadapterparms.data.snmp;
4295
4296 if (cmd->hdr.return_code) {
4297 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4298 return 0;
4299 }
4300 if (cmd->data.setadapterparms.hdr.return_code) {
4301 cmd->hdr.return_code =
4302 cmd->data.setadapterparms.hdr.return_code;
4303 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4304 return 0;
4305 }
4306 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4307 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4308 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4309 else
4310 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4311
4312 /* check if there is enough room in userspace */
4313 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4314 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4315 cmd->hdr.return_code = IPA_RC_ENOMEM;
4316 return 0;
4317 }
4318 QETH_CARD_TEXT_(card, 4, "snore%i",
4319 cmd->data.setadapterparms.hdr.used_total);
4320 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4321 cmd->data.setadapterparms.hdr.seq_no);
4322 /*copy entries to user buffer*/
4323 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4324 memcpy(qinfo->udata + qinfo->udata_offset,
4325 (char *)snmp,
4326 data_len + offsetof(struct qeth_snmp_cmd, data));
4327 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4328 } else {
4329 memcpy(qinfo->udata + qinfo->udata_offset,
4330 (char *)&snmp->request, data_len);
4331 }
4332 qinfo->udata_offset += data_len;
4333 /* check if all replies received ... */
4334 QETH_CARD_TEXT_(card, 4, "srtot%i",
4335 cmd->data.setadapterparms.hdr.used_total);
4336 QETH_CARD_TEXT_(card, 4, "srseq%i",
4337 cmd->data.setadapterparms.hdr.seq_no);
4338 if (cmd->data.setadapterparms.hdr.seq_no <
4339 cmd->data.setadapterparms.hdr.used_total)
4340 return 1;
4341 return 0;
4342 }
4343
4344 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4345 {
4346 struct qeth_cmd_buffer *iob;
4347 struct qeth_ipa_cmd *cmd;
4348 struct qeth_snmp_ureq *ureq;
4349 int req_len;
4350 struct qeth_arp_query_info qinfo = {0, };
4351 int rc = 0;
4352
4353 QETH_CARD_TEXT(card, 3, "snmpcmd");
4354
4355 if (card->info.guestlan)
4356 return -EOPNOTSUPP;
4357
4358 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4359 (!card->options.layer2)) {
4360 return -EOPNOTSUPP;
4361 }
4362 /* skip 4 bytes (data_len struct member) to get req_len */
4363 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4364 return -EFAULT;
4365 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4366 if (IS_ERR(ureq)) {
4367 QETH_CARD_TEXT(card, 2, "snmpnome");
4368 return PTR_ERR(ureq);
4369 }
4370 qinfo.udata_len = ureq->hdr.data_len;
4371 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4372 if (!qinfo.udata) {
4373 kfree(ureq);
4374 return -ENOMEM;
4375 }
4376 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4377
4378 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4379 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4380 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4381 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4382 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4383 qeth_snmp_command_cb, (void *)&qinfo);
4384 if (rc)
4385 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4386 QETH_CARD_IFNAME(card), rc);
4387 else {
4388 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4389 rc = -EFAULT;
4390 }
4391
4392 kfree(ureq);
4393 kfree(qinfo.udata);
4394 return rc;
4395 }
4396 EXPORT_SYMBOL_GPL(qeth_snmp_command);
4397
4398 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4399 struct qeth_reply *reply, unsigned long data)
4400 {
4401 struct qeth_ipa_cmd *cmd;
4402 struct qeth_qoat_priv *priv;
4403 char *resdata;
4404 int resdatalen;
4405
4406 QETH_CARD_TEXT(card, 3, "qoatcb");
4407
4408 cmd = (struct qeth_ipa_cmd *)data;
4409 priv = (struct qeth_qoat_priv *)reply->param;
4410 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4411 resdata = (char *)data + 28;
4412
4413 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4414 cmd->hdr.return_code = IPA_RC_FFFF;
4415 return 0;
4416 }
4417
4418 memcpy((priv->buffer + priv->response_len), resdata,
4419 resdatalen);
4420 priv->response_len += resdatalen;
4421
4422 if (cmd->data.setadapterparms.hdr.seq_no <
4423 cmd->data.setadapterparms.hdr.used_total)
4424 return 1;
4425 return 0;
4426 }
4427
4428 int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4429 {
4430 int rc = 0;
4431 struct qeth_cmd_buffer *iob;
4432 struct qeth_ipa_cmd *cmd;
4433 struct qeth_query_oat *oat_req;
4434 struct qeth_query_oat_data oat_data;
4435 struct qeth_qoat_priv priv;
4436 void __user *tmp;
4437
4438 QETH_CARD_TEXT(card, 3, "qoatcmd");
4439
4440 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4441 rc = -EOPNOTSUPP;
4442 goto out;
4443 }
4444
4445 if (copy_from_user(&oat_data, udata,
4446 sizeof(struct qeth_query_oat_data))) {
4447 rc = -EFAULT;
4448 goto out;
4449 }
4450
4451 priv.buffer_len = oat_data.buffer_len;
4452 priv.response_len = 0;
4453 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4454 if (!priv.buffer) {
4455 rc = -ENOMEM;
4456 goto out;
4457 }
4458
4459 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4460 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4461 sizeof(struct qeth_query_oat));
4462 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4463 oat_req = &cmd->data.setadapterparms.data.query_oat;
4464 oat_req->subcmd_code = oat_data.command;
4465
4466 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4467 &priv);
4468 if (!rc) {
4469 if (is_compat_task())
4470 tmp = compat_ptr(oat_data.ptr);
4471 else
4472 tmp = (void __user *)(unsigned long)oat_data.ptr;
4473
4474 if (copy_to_user(tmp, priv.buffer,
4475 priv.response_len)) {
4476 rc = -EFAULT;
4477 goto out_free;
4478 }
4479
4480 oat_data.response_len = priv.response_len;
4481
4482 if (copy_to_user(udata, &oat_data,
4483 sizeof(struct qeth_query_oat_data)))
4484 rc = -EFAULT;
4485 } else
4486 if (rc == IPA_RC_FFFF)
4487 rc = -EFAULT;
4488
4489 out_free:
4490 kfree(priv.buffer);
4491 out:
4492 return rc;
4493 }
4494 EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4495
4496 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4497 {
4498 switch (card->info.type) {
4499 case QETH_CARD_TYPE_IQD:
4500 return 2;
4501 default:
4502 return 0;
4503 }
4504 }
4505
4506 static void qeth_determine_capabilities(struct qeth_card *card)
4507 {
4508 int rc;
4509 int length;
4510 char *prcd;
4511 struct ccw_device *ddev;
4512 int ddev_offline = 0;
4513
4514 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4515 ddev = CARD_DDEV(card);
4516 if (!ddev->online) {
4517 ddev_offline = 1;
4518 rc = ccw_device_set_online(ddev);
4519 if (rc) {
4520 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4521 goto out;
4522 }
4523 }
4524
4525 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4526 if (rc) {
4527 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4528 dev_name(&card->gdev->dev), rc);
4529 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4530 goto out_offline;
4531 }
4532 qeth_configure_unitaddr(card, prcd);
4533 if (ddev_offline)
4534 qeth_configure_blkt_default(card, prcd);
4535 kfree(prcd);
4536
4537 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4538 if (rc)
4539 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4540
4541 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4542 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4543 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4544 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4545 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4546 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4547 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4548 dev_info(&card->gdev->dev,
4549 "Completion Queueing supported\n");
4550 } else {
4551 card->options.cq = QETH_CQ_NOTAVAILABLE;
4552 }
4553
4554
4555 out_offline:
4556 if (ddev_offline == 1)
4557 ccw_device_set_offline(ddev);
4558 out:
4559 return;
4560 }
4561
4562 static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4563 struct qdio_buffer **in_sbal_ptrs,
4564 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4565 int i;
4566
4567 if (card->options.cq == QETH_CQ_ENABLED) {
4568 int offset = QDIO_MAX_BUFFERS_PER_Q *
4569 (card->qdio.no_in_queues - 1);
4570 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4571 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4572 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4573 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4574 }
4575
4576 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4577 }
4578 }
4579
4580 static int qeth_qdio_establish(struct qeth_card *card)
4581 {
4582 struct qdio_initialize init_data;
4583 char *qib_param_field;
4584 struct qdio_buffer **in_sbal_ptrs;
4585 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4586 struct qdio_buffer **out_sbal_ptrs;
4587 int i, j, k;
4588 int rc = 0;
4589
4590 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4591
4592 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4593 GFP_KERNEL);
4594 if (!qib_param_field) {
4595 rc = -ENOMEM;
4596 goto out_free_nothing;
4597 }
4598
4599 qeth_create_qib_param_field(card, qib_param_field);
4600 qeth_create_qib_param_field_blkt(card, qib_param_field);
4601
4602 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
4603 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4604 GFP_KERNEL);
4605 if (!in_sbal_ptrs) {
4606 rc = -ENOMEM;
4607 goto out_free_qib_param;
4608 }
4609 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4610 in_sbal_ptrs[i] = (struct qdio_buffer *)
4611 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
4612 }
4613
4614 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4615 GFP_KERNEL);
4616 if (!queue_start_poll) {
4617 rc = -ENOMEM;
4618 goto out_free_in_sbals;
4619 }
4620 for (i = 0; i < card->qdio.no_in_queues; ++i)
4621 queue_start_poll[i] = card->discipline->start_poll;
4622
4623 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
4624
4625 out_sbal_ptrs =
4626 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4627 sizeof(void *), GFP_KERNEL);
4628 if (!out_sbal_ptrs) {
4629 rc = -ENOMEM;
4630 goto out_free_queue_start_poll;
4631 }
4632 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4633 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4634 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
4635 card->qdio.out_qs[i]->bufs[j]->buffer);
4636 }
4637
4638 memset(&init_data, 0, sizeof(struct qdio_initialize));
4639 init_data.cdev = CARD_DDEV(card);
4640 init_data.q_format = qeth_get_qdio_q_format(card);
4641 init_data.qib_param_field_format = 0;
4642 init_data.qib_param_field = qib_param_field;
4643 init_data.no_input_qs = card->qdio.no_in_queues;
4644 init_data.no_output_qs = card->qdio.no_out_queues;
4645 init_data.input_handler = card->discipline->input_handler;
4646 init_data.output_handler = card->discipline->output_handler;
4647 init_data.queue_start_poll_array = queue_start_poll;
4648 init_data.int_parm = (unsigned long) card;
4649 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4650 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
4651 init_data.output_sbal_state_array = card->qdio.out_bufstates;
4652 init_data.scan_threshold =
4653 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4654
4655 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4656 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
4657 rc = qdio_allocate(&init_data);
4658 if (rc) {
4659 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4660 goto out;
4661 }
4662 rc = qdio_establish(&init_data);
4663 if (rc) {
4664 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4665 qdio_free(CARD_DDEV(card));
4666 }
4667 }
4668
4669 switch (card->options.cq) {
4670 case QETH_CQ_ENABLED:
4671 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4672 break;
4673 case QETH_CQ_DISABLED:
4674 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4675 break;
4676 default:
4677 break;
4678 }
4679 out:
4680 kfree(out_sbal_ptrs);
4681 out_free_queue_start_poll:
4682 kfree(queue_start_poll);
4683 out_free_in_sbals:
4684 kfree(in_sbal_ptrs);
4685 out_free_qib_param:
4686 kfree(qib_param_field);
4687 out_free_nothing:
4688 return rc;
4689 }
4690
4691 static void qeth_core_free_card(struct qeth_card *card)
4692 {
4693
4694 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4695 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4696 qeth_clean_channel(&card->read);
4697 qeth_clean_channel(&card->write);
4698 if (card->dev)
4699 free_netdev(card->dev);
4700 kfree(card->ip_tbd_list);
4701 qeth_free_qdio_buffers(card);
4702 unregister_service_level(&card->qeth_service_level);
4703 kfree(card);
4704 }
4705
4706 static struct ccw_device_id qeth_ids[] = {
4707 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4708 .driver_info = QETH_CARD_TYPE_OSD},
4709 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4710 .driver_info = QETH_CARD_TYPE_IQD},
4711 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4712 .driver_info = QETH_CARD_TYPE_OSN},
4713 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4714 .driver_info = QETH_CARD_TYPE_OSM},
4715 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4716 .driver_info = QETH_CARD_TYPE_OSX},
4717 {},
4718 };
4719 MODULE_DEVICE_TABLE(ccw, qeth_ids);
4720
4721 static struct ccw_driver qeth_ccw_driver = {
4722 .driver = {
4723 .owner = THIS_MODULE,
4724 .name = "qeth",
4725 },
4726 .ids = qeth_ids,
4727 .probe = ccwgroup_probe_ccwdev,
4728 .remove = ccwgroup_remove_ccwdev,
4729 };
4730
4731 int qeth_core_hardsetup_card(struct qeth_card *card)
4732 {
4733 int retries = 0;
4734 int rc;
4735
4736 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4737 atomic_set(&card->force_alloc_skb, 0);
4738 qeth_get_channel_path_desc(card);
4739 retry:
4740 if (retries)
4741 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4742 dev_name(&card->gdev->dev));
4743 ccw_device_set_offline(CARD_DDEV(card));
4744 ccw_device_set_offline(CARD_WDEV(card));
4745 ccw_device_set_offline(CARD_RDEV(card));
4746 rc = ccw_device_set_online(CARD_RDEV(card));
4747 if (rc)
4748 goto retriable;
4749 rc = ccw_device_set_online(CARD_WDEV(card));
4750 if (rc)
4751 goto retriable;
4752 rc = ccw_device_set_online(CARD_DDEV(card));
4753 if (rc)
4754 goto retriable;
4755 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
4756 retriable:
4757 if (rc == -ERESTARTSYS) {
4758 QETH_DBF_TEXT(SETUP, 2, "break1");
4759 return rc;
4760 } else if (rc) {
4761 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4762 if (++retries > 3)
4763 goto out;
4764 else
4765 goto retry;
4766 }
4767 qeth_determine_capabilities(card);
4768 qeth_init_tokens(card);
4769 qeth_init_func_level(card);
4770 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4771 if (rc == -ERESTARTSYS) {
4772 QETH_DBF_TEXT(SETUP, 2, "break2");
4773 return rc;
4774 } else if (rc) {
4775 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4776 if (--retries < 0)
4777 goto out;
4778 else
4779 goto retry;
4780 }
4781 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4782 if (rc == -ERESTARTSYS) {
4783 QETH_DBF_TEXT(SETUP, 2, "break3");
4784 return rc;
4785 } else if (rc) {
4786 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4787 if (--retries < 0)
4788 goto out;
4789 else
4790 goto retry;
4791 }
4792 card->read_or_write_problem = 0;
4793 rc = qeth_mpc_initialize(card);
4794 if (rc) {
4795 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4796 goto out;
4797 }
4798
4799 card->options.ipa4.supported_funcs = 0;
4800 card->options.adp.supported_funcs = 0;
4801 card->info.diagass_support = 0;
4802 qeth_query_ipassists(card, QETH_PROT_IPV4);
4803 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4804 qeth_query_setadapterparms(card);
4805 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4806 qeth_query_setdiagass(card);
4807 return 0;
4808 out:
4809 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4810 "an error on the device\n");
4811 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4812 dev_name(&card->gdev->dev), rc);
4813 return rc;
4814 }
4815 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4816
4817 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4818 struct qdio_buffer_element *element,
4819 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4820 {
4821 struct page *page = virt_to_page(element->addr);
4822 if (*pskb == NULL) {
4823 if (qethbuffer->rx_skb) {
4824 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4825 *pskb = qethbuffer->rx_skb;
4826 qethbuffer->rx_skb = NULL;
4827 } else {
4828 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4829 if (!(*pskb))
4830 return -ENOMEM;
4831 }
4832
4833 skb_reserve(*pskb, ETH_HLEN);
4834 if (data_len <= QETH_RX_PULL_LEN) {
4835 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4836 data_len);
4837 } else {
4838 get_page(page);
4839 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4840 element->addr + offset, QETH_RX_PULL_LEN);
4841 skb_fill_page_desc(*pskb, *pfrag, page,
4842 offset + QETH_RX_PULL_LEN,
4843 data_len - QETH_RX_PULL_LEN);
4844 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4845 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4846 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4847 (*pfrag)++;
4848 }
4849 } else {
4850 get_page(page);
4851 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4852 (*pskb)->data_len += data_len;
4853 (*pskb)->len += data_len;
4854 (*pskb)->truesize += data_len;
4855 (*pfrag)++;
4856 }
4857
4858
4859 return 0;
4860 }
4861
4862 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4863 struct qeth_qdio_buffer *qethbuffer,
4864 struct qdio_buffer_element **__element, int *__offset,
4865 struct qeth_hdr **hdr)
4866 {
4867 struct qdio_buffer_element *element = *__element;
4868 struct qdio_buffer *buffer = qethbuffer->buffer;
4869 int offset = *__offset;
4870 struct sk_buff *skb = NULL;
4871 int skb_len = 0;
4872 void *data_ptr;
4873 int data_len;
4874 int headroom = 0;
4875 int use_rx_sg = 0;
4876 int frag = 0;
4877
4878 /* qeth_hdr must not cross element boundaries */
4879 if (element->length < offset + sizeof(struct qeth_hdr)) {
4880 if (qeth_is_last_sbale(element))
4881 return NULL;
4882 element++;
4883 offset = 0;
4884 if (element->length < sizeof(struct qeth_hdr))
4885 return NULL;
4886 }
4887 *hdr = element->addr + offset;
4888
4889 offset += sizeof(struct qeth_hdr);
4890 switch ((*hdr)->hdr.l2.id) {
4891 case QETH_HEADER_TYPE_LAYER2:
4892 skb_len = (*hdr)->hdr.l2.pkt_length;
4893 break;
4894 case QETH_HEADER_TYPE_LAYER3:
4895 skb_len = (*hdr)->hdr.l3.length;
4896 headroom = ETH_HLEN;
4897 break;
4898 case QETH_HEADER_TYPE_OSN:
4899 skb_len = (*hdr)->hdr.osn.pdu_length;
4900 headroom = sizeof(struct qeth_hdr);
4901 break;
4902 default:
4903 break;
4904 }
4905
4906 if (!skb_len)
4907 return NULL;
4908
4909 if (((skb_len >= card->options.rx_sg_cb) &&
4910 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4911 (!atomic_read(&card->force_alloc_skb))) ||
4912 (card->options.cq == QETH_CQ_ENABLED)) {
4913 use_rx_sg = 1;
4914 } else {
4915 skb = dev_alloc_skb(skb_len + headroom);
4916 if (!skb)
4917 goto no_mem;
4918 if (headroom)
4919 skb_reserve(skb, headroom);
4920 }
4921
4922 data_ptr = element->addr + offset;
4923 while (skb_len) {
4924 data_len = min(skb_len, (int)(element->length - offset));
4925 if (data_len) {
4926 if (use_rx_sg) {
4927 if (qeth_create_skb_frag(qethbuffer, element,
4928 &skb, offset, &frag, data_len))
4929 goto no_mem;
4930 } else {
4931 memcpy(skb_put(skb, data_len), data_ptr,
4932 data_len);
4933 }
4934 }
4935 skb_len -= data_len;
4936 if (skb_len) {
4937 if (qeth_is_last_sbale(element)) {
4938 QETH_CARD_TEXT(card, 4, "unexeob");
4939 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4940 dev_kfree_skb_any(skb);
4941 card->stats.rx_errors++;
4942 return NULL;
4943 }
4944 element++;
4945 offset = 0;
4946 data_ptr = element->addr;
4947 } else {
4948 offset += data_len;
4949 }
4950 }
4951 *__element = element;
4952 *__offset = offset;
4953 if (use_rx_sg && card->options.performance_stats) {
4954 card->perf_stats.sg_skbs_rx++;
4955 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4956 }
4957 return skb;
4958 no_mem:
4959 if (net_ratelimit()) {
4960 QETH_CARD_TEXT(card, 2, "noskbmem");
4961 }
4962 card->stats.rx_dropped++;
4963 return NULL;
4964 }
4965 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4966
4967 static void qeth_unregister_dbf_views(void)
4968 {
4969 int x;
4970 for (x = 0; x < QETH_DBF_INFOS; x++) {
4971 debug_unregister(qeth_dbf[x].id);
4972 qeth_dbf[x].id = NULL;
4973 }
4974 }
4975
4976 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
4977 {
4978 char dbf_txt_buf[32];
4979 va_list args;
4980
4981 if (level > id->level)
4982 return;
4983 va_start(args, fmt);
4984 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4985 va_end(args);
4986 debug_text_event(id, level, dbf_txt_buf);
4987 }
4988 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4989
4990 static int qeth_register_dbf_views(void)
4991 {
4992 int ret;
4993 int x;
4994
4995 for (x = 0; x < QETH_DBF_INFOS; x++) {
4996 /* register the areas */
4997 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4998 qeth_dbf[x].pages,
4999 qeth_dbf[x].areas,
5000 qeth_dbf[x].len);
5001 if (qeth_dbf[x].id == NULL) {
5002 qeth_unregister_dbf_views();
5003 return -ENOMEM;
5004 }
5005
5006 /* register a view */
5007 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5008 if (ret) {
5009 qeth_unregister_dbf_views();
5010 return ret;
5011 }
5012
5013 /* set a passing level */
5014 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5015 }
5016
5017 return 0;
5018 }
5019
5020 int qeth_core_load_discipline(struct qeth_card *card,
5021 enum qeth_discipline_id discipline)
5022 {
5023 int rc = 0;
5024 mutex_lock(&qeth_mod_mutex);
5025 switch (discipline) {
5026 case QETH_DISCIPLINE_LAYER3:
5027 card->discipline = try_then_request_module(
5028 symbol_get(qeth_l3_discipline), "qeth_l3");
5029 break;
5030 case QETH_DISCIPLINE_LAYER2:
5031 card->discipline = try_then_request_module(
5032 symbol_get(qeth_l2_discipline), "qeth_l2");
5033 break;
5034 }
5035 if (!card->discipline) {
5036 dev_err(&card->gdev->dev, "There is no kernel module to "
5037 "support discipline %d\n", discipline);
5038 rc = -EINVAL;
5039 }
5040 mutex_unlock(&qeth_mod_mutex);
5041 return rc;
5042 }
5043
5044 void qeth_core_free_discipline(struct qeth_card *card)
5045 {
5046 if (card->options.layer2)
5047 symbol_put(qeth_l2_discipline);
5048 else
5049 symbol_put(qeth_l3_discipline);
5050 card->discipline = NULL;
5051 }
5052
5053 static const struct device_type qeth_generic_devtype = {
5054 .name = "qeth_generic",
5055 .groups = qeth_generic_attr_groups,
5056 };
5057 static const struct device_type qeth_osn_devtype = {
5058 .name = "qeth_osn",
5059 .groups = qeth_osn_attr_groups,
5060 };
5061
5062 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5063 {
5064 struct qeth_card *card;
5065 struct device *dev;
5066 int rc;
5067 unsigned long flags;
5068 char dbf_name[20];
5069
5070 QETH_DBF_TEXT(SETUP, 2, "probedev");
5071
5072 dev = &gdev->dev;
5073 if (!get_device(dev))
5074 return -ENODEV;
5075
5076 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
5077
5078 card = qeth_alloc_card();
5079 if (!card) {
5080 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
5081 rc = -ENOMEM;
5082 goto err_dev;
5083 }
5084
5085 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5086 dev_name(&gdev->dev));
5087 card->debug = debug_register(dbf_name, 2, 1, 8);
5088 if (!card->debug) {
5089 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5090 rc = -ENOMEM;
5091 goto err_card;
5092 }
5093 debug_register_view(card->debug, &debug_hex_ascii_view);
5094
5095 card->read.ccwdev = gdev->cdev[0];
5096 card->write.ccwdev = gdev->cdev[1];
5097 card->data.ccwdev = gdev->cdev[2];
5098 dev_set_drvdata(&gdev->dev, card);
5099 card->gdev = gdev;
5100 gdev->cdev[0]->handler = qeth_irq;
5101 gdev->cdev[1]->handler = qeth_irq;
5102 gdev->cdev[2]->handler = qeth_irq;
5103
5104 rc = qeth_determine_card_type(card);
5105 if (rc) {
5106 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5107 goto err_dbf;
5108 }
5109 rc = qeth_setup_card(card);
5110 if (rc) {
5111 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
5112 goto err_dbf;
5113 }
5114
5115 if (card->info.type == QETH_CARD_TYPE_OSN)
5116 gdev->dev.type = &qeth_osn_devtype;
5117 else
5118 gdev->dev.type = &qeth_generic_devtype;
5119
5120 switch (card->info.type) {
5121 case QETH_CARD_TYPE_OSN:
5122 case QETH_CARD_TYPE_OSM:
5123 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5124 if (rc)
5125 goto err_dbf;
5126 rc = card->discipline->setup(card->gdev);
5127 if (rc)
5128 goto err_disc;
5129 case QETH_CARD_TYPE_OSD:
5130 case QETH_CARD_TYPE_OSX:
5131 default:
5132 break;
5133 }
5134
5135 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5136 list_add_tail(&card->list, &qeth_core_card_list.list);
5137 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5138
5139 qeth_determine_capabilities(card);
5140 return 0;
5141
5142 err_disc:
5143 qeth_core_free_discipline(card);
5144 err_dbf:
5145 debug_unregister(card->debug);
5146 err_card:
5147 qeth_core_free_card(card);
5148 err_dev:
5149 put_device(dev);
5150 return rc;
5151 }
5152
5153 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5154 {
5155 unsigned long flags;
5156 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5157
5158 QETH_DBF_TEXT(SETUP, 2, "removedv");
5159
5160 if (card->discipline) {
5161 card->discipline->remove(gdev);
5162 qeth_core_free_discipline(card);
5163 }
5164
5165 debug_unregister(card->debug);
5166 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5167 list_del(&card->list);
5168 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5169 qeth_core_free_card(card);
5170 dev_set_drvdata(&gdev->dev, NULL);
5171 put_device(&gdev->dev);
5172 return;
5173 }
5174
5175 static int qeth_core_set_online(struct ccwgroup_device *gdev)
5176 {
5177 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5178 int rc = 0;
5179 int def_discipline;
5180
5181 if (!card->discipline) {
5182 if (card->info.type == QETH_CARD_TYPE_IQD)
5183 def_discipline = QETH_DISCIPLINE_LAYER3;
5184 else
5185 def_discipline = QETH_DISCIPLINE_LAYER2;
5186 rc = qeth_core_load_discipline(card, def_discipline);
5187 if (rc)
5188 goto err;
5189 rc = card->discipline->setup(card->gdev);
5190 if (rc)
5191 goto err;
5192 }
5193 rc = card->discipline->set_online(gdev);
5194 err:
5195 return rc;
5196 }
5197
5198 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5199 {
5200 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5201 return card->discipline->set_offline(gdev);
5202 }
5203
5204 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5205 {
5206 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5207 if (card->discipline && card->discipline->shutdown)
5208 card->discipline->shutdown(gdev);
5209 }
5210
5211 static int qeth_core_prepare(struct ccwgroup_device *gdev)
5212 {
5213 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5214 if (card->discipline && card->discipline->prepare)
5215 return card->discipline->prepare(gdev);
5216 return 0;
5217 }
5218
5219 static void qeth_core_complete(struct ccwgroup_device *gdev)
5220 {
5221 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5222 if (card->discipline && card->discipline->complete)
5223 card->discipline->complete(gdev);
5224 }
5225
5226 static int qeth_core_freeze(struct ccwgroup_device *gdev)
5227 {
5228 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5229 if (card->discipline && card->discipline->freeze)
5230 return card->discipline->freeze(gdev);
5231 return 0;
5232 }
5233
5234 static int qeth_core_thaw(struct ccwgroup_device *gdev)
5235 {
5236 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5237 if (card->discipline && card->discipline->thaw)
5238 return card->discipline->thaw(gdev);
5239 return 0;
5240 }
5241
5242 static int qeth_core_restore(struct ccwgroup_device *gdev)
5243 {
5244 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5245 if (card->discipline && card->discipline->restore)
5246 return card->discipline->restore(gdev);
5247 return 0;
5248 }
5249
5250 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5251 .driver = {
5252 .owner = THIS_MODULE,
5253 .name = "qeth",
5254 },
5255 .setup = qeth_core_probe_device,
5256 .remove = qeth_core_remove_device,
5257 .set_online = qeth_core_set_online,
5258 .set_offline = qeth_core_set_offline,
5259 .shutdown = qeth_core_shutdown,
5260 .prepare = qeth_core_prepare,
5261 .complete = qeth_core_complete,
5262 .freeze = qeth_core_freeze,
5263 .thaw = qeth_core_thaw,
5264 .restore = qeth_core_restore,
5265 };
5266
5267 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5268 const char *buf, size_t count)
5269 {
5270 int err;
5271
5272 err = ccwgroup_create_dev(qeth_core_root_dev,
5273 &qeth_core_ccwgroup_driver, 3, buf);
5274
5275 return err ? err : count;
5276 }
5277 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5278
5279 static struct attribute *qeth_drv_attrs[] = {
5280 &driver_attr_group.attr,
5281 NULL,
5282 };
5283 static struct attribute_group qeth_drv_attr_group = {
5284 .attrs = qeth_drv_attrs,
5285 };
5286 static const struct attribute_group *qeth_drv_attr_groups[] = {
5287 &qeth_drv_attr_group,
5288 NULL,
5289 };
5290
5291 static struct {
5292 const char str[ETH_GSTRING_LEN];
5293 } qeth_ethtool_stats_keys[] = {
5294 /* 0 */{"rx skbs"},
5295 {"rx buffers"},
5296 {"tx skbs"},
5297 {"tx buffers"},
5298 {"tx skbs no packing"},
5299 {"tx buffers no packing"},
5300 {"tx skbs packing"},
5301 {"tx buffers packing"},
5302 {"tx sg skbs"},
5303 {"tx sg frags"},
5304 /* 10 */{"rx sg skbs"},
5305 {"rx sg frags"},
5306 {"rx sg page allocs"},
5307 {"tx large kbytes"},
5308 {"tx large count"},
5309 {"tx pk state ch n->p"},
5310 {"tx pk state ch p->n"},
5311 {"tx pk watermark low"},
5312 {"tx pk watermark high"},
5313 {"queue 0 buffer usage"},
5314 /* 20 */{"queue 1 buffer usage"},
5315 {"queue 2 buffer usage"},
5316 {"queue 3 buffer usage"},
5317 {"rx poll time"},
5318 {"rx poll count"},
5319 {"rx do_QDIO time"},
5320 {"rx do_QDIO count"},
5321 {"tx handler time"},
5322 {"tx handler count"},
5323 {"tx time"},
5324 /* 30 */{"tx count"},
5325 {"tx do_QDIO time"},
5326 {"tx do_QDIO count"},
5327 {"tx csum"},
5328 {"tx lin"},
5329 {"cq handler count"},
5330 {"cq handler time"}
5331 };
5332
5333 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
5334 {
5335 switch (stringset) {
5336 case ETH_SS_STATS:
5337 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5338 default:
5339 return -EINVAL;
5340 }
5341 }
5342 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
5343
5344 void qeth_core_get_ethtool_stats(struct net_device *dev,
5345 struct ethtool_stats *stats, u64 *data)
5346 {
5347 struct qeth_card *card = dev->ml_priv;
5348 data[0] = card->stats.rx_packets -
5349 card->perf_stats.initial_rx_packets;
5350 data[1] = card->perf_stats.bufs_rec;
5351 data[2] = card->stats.tx_packets -
5352 card->perf_stats.initial_tx_packets;
5353 data[3] = card->perf_stats.bufs_sent;
5354 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5355 - card->perf_stats.skbs_sent_pack;
5356 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5357 data[6] = card->perf_stats.skbs_sent_pack;
5358 data[7] = card->perf_stats.bufs_sent_pack;
5359 data[8] = card->perf_stats.sg_skbs_sent;
5360 data[9] = card->perf_stats.sg_frags_sent;
5361 data[10] = card->perf_stats.sg_skbs_rx;
5362 data[11] = card->perf_stats.sg_frags_rx;
5363 data[12] = card->perf_stats.sg_alloc_page_rx;
5364 data[13] = (card->perf_stats.large_send_bytes >> 10);
5365 data[14] = card->perf_stats.large_send_cnt;
5366 data[15] = card->perf_stats.sc_dp_p;
5367 data[16] = card->perf_stats.sc_p_dp;
5368 data[17] = QETH_LOW_WATERMARK_PACK;
5369 data[18] = QETH_HIGH_WATERMARK_PACK;
5370 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5371 data[20] = (card->qdio.no_out_queues > 1) ?
5372 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5373 data[21] = (card->qdio.no_out_queues > 2) ?
5374 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5375 data[22] = (card->qdio.no_out_queues > 3) ?
5376 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5377 data[23] = card->perf_stats.inbound_time;
5378 data[24] = card->perf_stats.inbound_cnt;
5379 data[25] = card->perf_stats.inbound_do_qdio_time;
5380 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5381 data[27] = card->perf_stats.outbound_handler_time;
5382 data[28] = card->perf_stats.outbound_handler_cnt;
5383 data[29] = card->perf_stats.outbound_time;
5384 data[30] = card->perf_stats.outbound_cnt;
5385 data[31] = card->perf_stats.outbound_do_qdio_time;
5386 data[32] = card->perf_stats.outbound_do_qdio_cnt;
5387 data[33] = card->perf_stats.tx_csum;
5388 data[34] = card->perf_stats.tx_lin;
5389 data[35] = card->perf_stats.cq_cnt;
5390 data[36] = card->perf_stats.cq_time;
5391 }
5392 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5393
5394 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5395 {
5396 switch (stringset) {
5397 case ETH_SS_STATS:
5398 memcpy(data, &qeth_ethtool_stats_keys,
5399 sizeof(qeth_ethtool_stats_keys));
5400 break;
5401 default:
5402 WARN_ON(1);
5403 break;
5404 }
5405 }
5406 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5407
5408 void qeth_core_get_drvinfo(struct net_device *dev,
5409 struct ethtool_drvinfo *info)
5410 {
5411 struct qeth_card *card = dev->ml_priv;
5412 if (card->options.layer2)
5413 strcpy(info->driver, "qeth_l2");
5414 else
5415 strcpy(info->driver, "qeth_l3");
5416
5417 strcpy(info->version, "1.0");
5418 strcpy(info->fw_version, card->info.mcl_level);
5419 sprintf(info->bus_info, "%s/%s/%s",
5420 CARD_RDEV_ID(card),
5421 CARD_WDEV_ID(card),
5422 CARD_DDEV_ID(card));
5423 }
5424 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5425
5426 int qeth_core_ethtool_get_settings(struct net_device *netdev,
5427 struct ethtool_cmd *ecmd)
5428 {
5429 struct qeth_card *card = netdev->ml_priv;
5430 enum qeth_link_types link_type;
5431
5432 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5433 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5434 else
5435 link_type = card->info.link_type;
5436
5437 ecmd->transceiver = XCVR_INTERNAL;
5438 ecmd->supported = SUPPORTED_Autoneg;
5439 ecmd->advertising = ADVERTISED_Autoneg;
5440 ecmd->duplex = DUPLEX_FULL;
5441 ecmd->autoneg = AUTONEG_ENABLE;
5442
5443 switch (link_type) {
5444 case QETH_LINK_TYPE_FAST_ETH:
5445 case QETH_LINK_TYPE_LANE_ETH100:
5446 ecmd->supported |= SUPPORTED_10baseT_Half |
5447 SUPPORTED_10baseT_Full |
5448 SUPPORTED_100baseT_Half |
5449 SUPPORTED_100baseT_Full |
5450 SUPPORTED_TP;
5451 ecmd->advertising |= ADVERTISED_10baseT_Half |
5452 ADVERTISED_10baseT_Full |
5453 ADVERTISED_100baseT_Half |
5454 ADVERTISED_100baseT_Full |
5455 ADVERTISED_TP;
5456 ecmd->speed = SPEED_100;
5457 ecmd->port = PORT_TP;
5458 break;
5459
5460 case QETH_LINK_TYPE_GBIT_ETH:
5461 case QETH_LINK_TYPE_LANE_ETH1000:
5462 ecmd->supported |= SUPPORTED_10baseT_Half |
5463 SUPPORTED_10baseT_Full |
5464 SUPPORTED_100baseT_Half |
5465 SUPPORTED_100baseT_Full |
5466 SUPPORTED_1000baseT_Half |
5467 SUPPORTED_1000baseT_Full |
5468 SUPPORTED_FIBRE;
5469 ecmd->advertising |= ADVERTISED_10baseT_Half |
5470 ADVERTISED_10baseT_Full |
5471 ADVERTISED_100baseT_Half |
5472 ADVERTISED_100baseT_Full |
5473 ADVERTISED_1000baseT_Half |
5474 ADVERTISED_1000baseT_Full |
5475 ADVERTISED_FIBRE;
5476 ecmd->speed = SPEED_1000;
5477 ecmd->port = PORT_FIBRE;
5478 break;
5479
5480 case QETH_LINK_TYPE_10GBIT_ETH:
5481 ecmd->supported |= SUPPORTED_10baseT_Half |
5482 SUPPORTED_10baseT_Full |
5483 SUPPORTED_100baseT_Half |
5484 SUPPORTED_100baseT_Full |
5485 SUPPORTED_1000baseT_Half |
5486 SUPPORTED_1000baseT_Full |
5487 SUPPORTED_10000baseT_Full |
5488 SUPPORTED_FIBRE;
5489 ecmd->advertising |= ADVERTISED_10baseT_Half |
5490 ADVERTISED_10baseT_Full |
5491 ADVERTISED_100baseT_Half |
5492 ADVERTISED_100baseT_Full |
5493 ADVERTISED_1000baseT_Half |
5494 ADVERTISED_1000baseT_Full |
5495 ADVERTISED_10000baseT_Full |
5496 ADVERTISED_FIBRE;
5497 ecmd->speed = SPEED_10000;
5498 ecmd->port = PORT_FIBRE;
5499 break;
5500
5501 default:
5502 ecmd->supported |= SUPPORTED_10baseT_Half |
5503 SUPPORTED_10baseT_Full |
5504 SUPPORTED_TP;
5505 ecmd->advertising |= ADVERTISED_10baseT_Half |
5506 ADVERTISED_10baseT_Full |
5507 ADVERTISED_TP;
5508 ecmd->speed = SPEED_10;
5509 ecmd->port = PORT_TP;
5510 }
5511
5512 return 0;
5513 }
5514 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5515
5516 static int __init qeth_core_init(void)
5517 {
5518 int rc;
5519
5520 pr_info("loading core functions\n");
5521 INIT_LIST_HEAD(&qeth_core_card_list.list);
5522 rwlock_init(&qeth_core_card_list.rwlock);
5523 mutex_init(&qeth_mod_mutex);
5524
5525 rc = qeth_register_dbf_views();
5526 if (rc)
5527 goto out_err;
5528 qeth_core_root_dev = root_device_register("qeth");
5529 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5530 if (rc)
5531 goto register_err;
5532 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5533 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5534 if (!qeth_core_header_cache) {
5535 rc = -ENOMEM;
5536 goto slab_err;
5537 }
5538 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5539 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5540 if (!qeth_qdio_outbuf_cache) {
5541 rc = -ENOMEM;
5542 goto cqslab_err;
5543 }
5544 rc = ccw_driver_register(&qeth_ccw_driver);
5545 if (rc)
5546 goto ccw_err;
5547 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5548 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5549 if (rc)
5550 goto ccwgroup_err;
5551
5552 return 0;
5553
5554 ccwgroup_err:
5555 ccw_driver_unregister(&qeth_ccw_driver);
5556 ccw_err:
5557 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5558 cqslab_err:
5559 kmem_cache_destroy(qeth_core_header_cache);
5560 slab_err:
5561 root_device_unregister(qeth_core_root_dev);
5562 register_err:
5563 qeth_unregister_dbf_views();
5564 out_err:
5565 pr_err("Initializing the qeth device driver failed\n");
5566 return rc;
5567 }
5568
5569 static void __exit qeth_core_exit(void)
5570 {
5571 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5572 ccw_driver_unregister(&qeth_ccw_driver);
5573 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5574 kmem_cache_destroy(qeth_core_header_cache);
5575 root_device_unregister(qeth_core_root_dev);
5576 qeth_unregister_dbf_views();
5577 pr_info("core functions removed\n");
5578 }
5579
5580 module_init(qeth_core_init);
5581 module_exit(qeth_core_exit);
5582 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5583 MODULE_DESCRIPTION("qeth core functions");
5584 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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