projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
aacraid: Use pci_enable_msix_range()
[deliverable/linux.git] / drivers / scsi / aacraid / aacraid.h
1 #ifndef dprintk
2 # define dprintk(x)
3 #endif
4 /* eg: if (nblank(dprintk(x))) */
5 #define _nblank(x) #x
6 #define nblank(x) _nblank(x)[0]
7
8 #include <linux/interrupt.h>
9 #include <linux/pci.h>
10
11 /*------------------------------------------------------------------------------
12 * D E F I N E S
13 *----------------------------------------------------------------------------*/
14
15 #define AAC_MAX_MSIX 32 /* vectors */
16 #define AAC_PCI_MSI_ENABLE 0x8000
17
18 enum {
19 AAC_ENABLE_INTERRUPT = 0x0,
20 AAC_DISABLE_INTERRUPT,
21 AAC_ENABLE_MSIX,
22 AAC_DISABLE_MSIX,
23 AAC_CLEAR_AIF_BIT,
24 AAC_CLEAR_SYNC_BIT,
25 AAC_ENABLE_INTX
26 };
27
28 #define AAC_INT_MODE_INTX (1<<0)
29 #define AAC_INT_MODE_MSI (1<<1)
30 #define AAC_INT_MODE_AIF (1<<2)
31 #define AAC_INT_MODE_SYNC (1<<3)
32
33 #define AAC_INT_ENABLE_TYPE1_INTX 0xfffffffb
34 #define AAC_INT_ENABLE_TYPE1_MSIX 0xfffffffa
35 #define AAC_INT_DISABLE_ALL 0xffffffff
36
37 /* Bit definitions in IOA->Host Interrupt Register */
38 #define PMC_TRANSITION_TO_OPERATIONAL (1<<31)
39 #define PMC_IOARCB_TRANSFER_FAILED (1<<28)
40 #define PMC_IOA_UNIT_CHECK (1<<27)
41 #define PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE (1<<26)
42 #define PMC_CRITICAL_IOA_OP_IN_PROGRESS (1<<25)
43 #define PMC_IOARRIN_LOST (1<<4)
44 #define PMC_SYSTEM_BUS_MMIO_ERROR (1<<3)
45 #define PMC_IOA_PROCESSOR_IN_ERROR_STATE (1<<2)
46 #define PMC_HOST_RRQ_VALID (1<<1)
47 #define PMC_OPERATIONAL_STATUS (1<<31)
48 #define PMC_ALLOW_MSIX_VECTOR0 (1<<0)
49
50 #define PMC_IOA_ERROR_INTERRUPTS (PMC_IOARCB_TRANSFER_FAILED | \
51 PMC_IOA_UNIT_CHECK | \
52 PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE | \
53 PMC_IOARRIN_LOST | \
54 PMC_SYSTEM_BUS_MMIO_ERROR | \
55 PMC_IOA_PROCESSOR_IN_ERROR_STATE)
56
57 #define PMC_ALL_INTERRUPT_BITS (PMC_IOA_ERROR_INTERRUPTS | \
58 PMC_HOST_RRQ_VALID | \
59 PMC_TRANSITION_TO_OPERATIONAL | \
60 PMC_ALLOW_MSIX_VECTOR0)
61 #define PMC_GLOBAL_INT_BIT2 0x00000004
62 #define PMC_GLOBAL_INT_BIT0 0x00000001
63
64 #ifndef AAC_DRIVER_BUILD
65 # define AAC_DRIVER_BUILD 40709
66 # define AAC_DRIVER_BRANCH "-ms"
67 #endif
68 #define MAXIMUM_NUM_CONTAINERS 32
69
70 #define AAC_NUM_MGT_FIB 8
71 #define AAC_NUM_IO_FIB (1024 - AAC_NUM_MGT_FIB)
72 #define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB)
73
74 #define AAC_MAX_LUN (8)
75
76 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
77 #define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256)
78
79 #define AAC_DEBUG_INSTRUMENT_AIF_DELETE
80
81 /*
82 * These macros convert from physical channels to virtual channels
83 */
84 #define CONTAINER_CHANNEL (0)
85 #define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL)
86 #define CONTAINER_TO_ID(cont) (cont)
87 #define CONTAINER_TO_LUN(cont) (0)
88
89 #define PMC_DEVICE_S6 0x28b
90 #define PMC_DEVICE_S7 0x28c
91 #define PMC_DEVICE_S8 0x28d
92 #define PMC_DEVICE_S9 0x28f
93
94 #define aac_phys_to_logical(x) ((x)+1)
95 #define aac_logical_to_phys(x) ((x)?(x)-1:0)
96
97 /* #define AAC_DETAILED_STATUS_INFO */
98
99 struct diskparm
100 {
101 int heads;
102 int sectors;
103 int cylinders;
104 };
105
106
107 /*
108 * Firmware constants
109 */
110
111 #define CT_NONE 0
112 #define CT_OK 218
113 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */
114 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */
115
116 /*
117 * Host side memory scatter gather list
118 * Used by the adapter for read, write, and readdirplus operations
119 * We have separate 32 and 64 bit version because even
120 * on 64 bit systems not all cards support the 64 bit version
121 */
122 struct sgentry {
123 __le32 addr; /* 32-bit address. */
124 __le32 count; /* Length. */
125 };
126
127 struct user_sgentry {
128 u32 addr; /* 32-bit address. */
129 u32 count; /* Length. */
130 };
131
132 struct sgentry64 {
133 __le32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
134 __le32 count; /* Length. */
135 };
136
137 struct user_sgentry64 {
138 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
139 u32 count; /* Length. */
140 };
141
142 struct sgentryraw {
143 __le32 next; /* reserved for F/W use */
144 __le32 prev; /* reserved for F/W use */
145 __le32 addr[2];
146 __le32 count;
147 __le32 flags; /* reserved for F/W use */
148 };
149
150 struct user_sgentryraw {
151 u32 next; /* reserved for F/W use */
152 u32 prev; /* reserved for F/W use */
153 u32 addr[2];
154 u32 count;
155 u32 flags; /* reserved for F/W use */
156 };
157
158 struct sge_ieee1212 {
159 u32 addrLow;
160 u32 addrHigh;
161 u32 length;
162 u32 flags;
163 };
164
165 /*
166 * SGMAP
167 *
168 * This is the SGMAP structure for all commands that use
169 * 32-bit addressing.
170 */
171
172 struct sgmap {
173 __le32 count;
174 struct sgentry sg[1];
175 };
176
177 struct user_sgmap {
178 u32 count;
179 struct user_sgentry sg[1];
180 };
181
182 struct sgmap64 {
183 __le32 count;
184 struct sgentry64 sg[1];
185 };
186
187 struct user_sgmap64 {
188 u32 count;
189 struct user_sgentry64 sg[1];
190 };
191
192 struct sgmapraw {
193 __le32 count;
194 struct sgentryraw sg[1];
195 };
196
197 struct user_sgmapraw {
198 u32 count;
199 struct user_sgentryraw sg[1];
200 };
201
202 struct creation_info
203 {
204 u8 buildnum; /* e.g., 588 */
205 u8 usec; /* e.g., 588 */
206 u8 via; /* e.g., 1 = FSU,
207 * 2 = API
208 */
209 u8 year; /* e.g., 1997 = 97 */
210 __le32 date; /*
211 * unsigned Month :4; // 1 - 12
212 * unsigned Day :6; // 1 - 32
213 * unsigned Hour :6; // 0 - 23
214 * unsigned Minute :6; // 0 - 60
215 * unsigned Second :6; // 0 - 60
216 */
217 __le32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */
218 };
219
220
221 /*
222 * Define all the constants needed for the communication interface
223 */
224
225 /*
226 * Define how many queue entries each queue will have and the total
227 * number of entries for the entire communication interface. Also define
228 * how many queues we support.
229 *
230 * This has to match the controller
231 */
232
233 #define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response
234 #define HOST_HIGH_CMD_ENTRIES 4
235 #define HOST_NORM_CMD_ENTRIES 8
236 #define ADAP_HIGH_CMD_ENTRIES 4
237 #define ADAP_NORM_CMD_ENTRIES 512
238 #define HOST_HIGH_RESP_ENTRIES 4
239 #define HOST_NORM_RESP_ENTRIES 512
240 #define ADAP_HIGH_RESP_ENTRIES 4
241 #define ADAP_NORM_RESP_ENTRIES 8
242
243 #define TOTAL_QUEUE_ENTRIES \
244 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
245 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
246
247
248 /*
249 * Set the queues on a 16 byte alignment
250 */
251
252 #define QUEUE_ALIGNMENT 16
253
254 /*
255 * The queue headers define the Communication Region queues. These
256 * are physically contiguous and accessible by both the adapter and the
257 * host. Even though all queue headers are in the same contiguous block
258 * they will be represented as individual units in the data structures.
259 */
260
261 struct aac_entry {
262 __le32 size; /* Size in bytes of Fib which this QE points to */
263 __le32 addr; /* Receiver address of the FIB */
264 };
265
266 /*
267 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped
268 * adjacently and in that order.
269 */
270
271 struct aac_qhdr {
272 __le64 header_addr;/* Address to hand the adapter to access
273 to this queue head */
274 __le32 *producer; /* The producer index for this queue (host address) */
275 __le32 *consumer; /* The consumer index for this queue (host address) */
276 };
277
278 /*
279 * Define all the events which the adapter would like to notify
280 * the host of.
281 */
282
283 #define HostNormCmdQue 1 /* Change in host normal priority command queue */
284 #define HostHighCmdQue 2 /* Change in host high priority command queue */
285 #define HostNormRespQue 3 /* Change in host normal priority response queue */
286 #define HostHighRespQue 4 /* Change in host high priority response queue */
287 #define AdapNormRespNotFull 5
288 #define AdapHighRespNotFull 6
289 #define AdapNormCmdNotFull 7
290 #define AdapHighCmdNotFull 8
291 #define SynchCommandComplete 9
292 #define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */
293
294 /*
295 * Define all the events the host wishes to notify the
296 * adapter of. The first four values much match the Qid the
297 * corresponding queue.
298 */
299
300 #define AdapNormCmdQue 2
301 #define AdapHighCmdQue 3
302 #define AdapNormRespQue 6
303 #define AdapHighRespQue 7
304 #define HostShutdown 8
305 #define HostPowerFail 9
306 #define FatalCommError 10
307 #define HostNormRespNotFull 11
308 #define HostHighRespNotFull 12
309 #define HostNormCmdNotFull 13
310 #define HostHighCmdNotFull 14
311 #define FastIo 15
312 #define AdapPrintfDone 16
313
314 /*
315 * Define all the queues that the adapter and host use to communicate
316 * Number them to match the physical queue layout.
317 */
318
319 enum aac_queue_types {
320 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */
321 HostHighCmdQueue, /* Adapter to host high priority command traffic */
322 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */
323 AdapHighCmdQueue, /* Host to adapter high priority command traffic */
324 HostNormRespQueue, /* Adapter to host normal priority response traffic */
325 HostHighRespQueue, /* Adapter to host high priority response traffic */
326 AdapNormRespQueue, /* Host to adapter normal priority response traffic */
327 AdapHighRespQueue /* Host to adapter high priority response traffic */
328 };
329
330 /*
331 * Assign type values to the FSA communication data structures
332 */
333
334 #define FIB_MAGIC 0x0001
335 #define FIB_MAGIC2 0x0004
336 #define FIB_MAGIC2_64 0x0005
337
338 /*
339 * Define the priority levels the FSA communication routines support.
340 */
341
342 #define FsaNormal 1
343
344 /* transport FIB header (PMC) */
345 struct aac_fib_xporthdr {
346 u64 HostAddress; /* FIB host address w/o xport header */
347 u32 Size; /* FIB size excluding xport header */
348 u32 Handle; /* driver handle to reference the FIB */
349 u64 Reserved[2];
350 };
351
352 #define ALIGN32 32
353
354 /*
355 * Define the FIB. The FIB is the where all the requested data and
356 * command information are put to the application on the FSA adapter.
357 */
358
359 struct aac_fibhdr {
360 __le32 XferState; /* Current transfer state for this CCB */
361 __le16 Command; /* Routing information for the destination */
362 u8 StructType; /* Type FIB */
363 u8 Unused; /* Unused */
364 __le16 Size; /* Size of this FIB in bytes */
365 __le16 SenderSize; /* Size of the FIB in the sender
366 (for response sizing) */
367 __le32 SenderFibAddress; /* Host defined data in the FIB */
368 union {
369 __le32 ReceiverFibAddress;/* Logical address of this FIB for
370 the adapter (old) */
371 __le32 SenderFibAddressHigh;/* upper 32bit of phys. FIB address */
372 __le32 TimeStamp; /* otherwise timestamp for FW internal use */
373 } u;
374 u32 Handle; /* FIB handle used for MSGU commnunication */
375 u32 Previous; /* FW internal use */
376 u32 Next; /* FW internal use */
377 };
378
379 struct hw_fib {
380 struct aac_fibhdr header;
381 u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data
382 };
383
384 /*
385 * FIB commands
386 */
387
388 #define TestCommandResponse 1
389 #define TestAdapterCommand 2
390 /*
391 * Lowlevel and comm commands
392 */
393 #define LastTestCommand 100
394 #define ReinitHostNormCommandQueue 101
395 #define ReinitHostHighCommandQueue 102
396 #define ReinitHostHighRespQueue 103
397 #define ReinitHostNormRespQueue 104
398 #define ReinitAdapNormCommandQueue 105
399 #define ReinitAdapHighCommandQueue 107
400 #define ReinitAdapHighRespQueue 108
401 #define ReinitAdapNormRespQueue 109
402 #define InterfaceShutdown 110
403 #define DmaCommandFib 120
404 #define StartProfile 121
405 #define TermProfile 122
406 #define SpeedTest 123
407 #define TakeABreakPt 124
408 #define RequestPerfData 125
409 #define SetInterruptDefTimer 126
410 #define SetInterruptDefCount 127
411 #define GetInterruptDefStatus 128
412 #define LastCommCommand 129
413 /*
414 * Filesystem commands
415 */
416 #define NuFileSystem 300
417 #define UFS 301
418 #define HostFileSystem 302
419 #define LastFileSystemCommand 303
420 /*
421 * Container Commands
422 */
423 #define ContainerCommand 500
424 #define ContainerCommand64 501
425 #define ContainerRawIo 502
426 #define ContainerRawIo2 503
427 /*
428 * Scsi Port commands (scsi passthrough)
429 */
430 #define ScsiPortCommand 600
431 #define ScsiPortCommand64 601
432 /*
433 * Misc house keeping and generic adapter initiated commands
434 */
435 #define AifRequest 700
436 #define CheckRevision 701
437 #define FsaHostShutdown 702
438 #define RequestAdapterInfo 703
439 #define IsAdapterPaused 704
440 #define SendHostTime 705
441 #define RequestSupplementAdapterInfo 706
442 #define LastMiscCommand 707
443
444 /*
445 * Commands that will target the failover level on the FSA adapter
446 */
447
448 enum fib_xfer_state {
449 HostOwned = (1<<0),
450 AdapterOwned = (1<<1),
451 FibInitialized = (1<<2),
452 FibEmpty = (1<<3),
453 AllocatedFromPool = (1<<4),
454 SentFromHost = (1<<5),
455 SentFromAdapter = (1<<6),
456 ResponseExpected = (1<<7),
457 NoResponseExpected = (1<<8),
458 AdapterProcessed = (1<<9),
459 HostProcessed = (1<<10),
460 HighPriority = (1<<11),
461 NormalPriority = (1<<12),
462 Async = (1<<13),
463 AsyncIo = (1<<13), // rpbfix: remove with new regime
464 PageFileIo = (1<<14), // rpbfix: remove with new regime
465 ShutdownRequest = (1<<15),
466 LazyWrite = (1<<16), // rpbfix: remove with new regime
467 AdapterMicroFib = (1<<17),
468 BIOSFibPath = (1<<18),
469 FastResponseCapable = (1<<19),
470 ApiFib = (1<<20), /* Its an API Fib */
471 /* PMC NEW COMM: There is no more AIF data pending */
472 NoMoreAifDataAvailable = (1<<21)
473 };
474
475 /*
476 * The following defines needs to be updated any time there is an
477 * incompatible change made to the aac_init structure.
478 */
479
480 #define ADAPTER_INIT_STRUCT_REVISION 3
481 #define ADAPTER_INIT_STRUCT_REVISION_4 4 // rocket science
482 #define ADAPTER_INIT_STRUCT_REVISION_6 6 /* PMC src */
483 #define ADAPTER_INIT_STRUCT_REVISION_7 7 /* Denali */
484
485 struct aac_init
486 {
487 __le32 InitStructRevision;
488 __le32 Sa_MSIXVectors;
489 __le32 fsrev;
490 __le32 CommHeaderAddress;
491 __le32 FastIoCommAreaAddress;
492 __le32 AdapterFibsPhysicalAddress;
493 __le32 AdapterFibsVirtualAddress;
494 __le32 AdapterFibsSize;
495 __le32 AdapterFibAlign;
496 __le32 printfbuf;
497 __le32 printfbufsiz;
498 __le32 HostPhysMemPages; /* number of 4k pages of host
499 physical memory */
500 __le32 HostElapsedSeconds; /* number of seconds since 1970. */
501 /*
502 * ADAPTER_INIT_STRUCT_REVISION_4 begins here
503 */
504 __le32 InitFlags; /* flags for supported features */
505 #define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001
506 #define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010
507 #define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020
508 #define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED 0x00000040
509 #define INITFLAGS_FAST_JBOD_SUPPORTED 0x00000080
510 #define INITFLAGS_NEW_COMM_TYPE2_SUPPORTED 0x00000100
511 __le32 MaxIoCommands; /* max outstanding commands */
512 __le32 MaxIoSize; /* largest I/O command */
513 __le32 MaxFibSize; /* largest FIB to adapter */
514 /* ADAPTER_INIT_STRUCT_REVISION_5 begins here */
515 __le32 MaxNumAif; /* max number of aif */
516 /* ADAPTER_INIT_STRUCT_REVISION_6 begins here */
517 __le32 HostRRQ_AddrLow;
518 __le32 HostRRQ_AddrHigh; /* Host RRQ (response queue) for SRC */
519 };
520
521 enum aac_log_level {
522 LOG_AAC_INIT = 10,
523 LOG_AAC_INFORMATIONAL = 20,
524 LOG_AAC_WARNING = 30,
525 LOG_AAC_LOW_ERROR = 40,
526 LOG_AAC_MEDIUM_ERROR = 50,
527 LOG_AAC_HIGH_ERROR = 60,
528 LOG_AAC_PANIC = 70,
529 LOG_AAC_DEBUG = 80,
530 LOG_AAC_WINDBG_PRINT = 90
531 };
532
533 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b
534 #define FSAFS_NTC_FIB_CONTEXT 0x030c
535
536 struct aac_dev;
537 struct fib;
538 struct scsi_cmnd;
539
540 struct adapter_ops
541 {
542 /* Low level operations */
543 void (*adapter_interrupt)(struct aac_dev *dev);
544 void (*adapter_notify)(struct aac_dev *dev, u32 event);
545 void (*adapter_disable_int)(struct aac_dev *dev);
546 void (*adapter_enable_int)(struct aac_dev *dev);
547 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4);
548 int (*adapter_check_health)(struct aac_dev *dev);
549 int (*adapter_restart)(struct aac_dev *dev, int bled);
550 void (*adapter_start)(struct aac_dev *dev);
551 /* Transport operations */
552 int (*adapter_ioremap)(struct aac_dev * dev, u32 size);
553 irq_handler_t adapter_intr;
554 /* Packet operations */
555 int (*adapter_deliver)(struct fib * fib);
556 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba);
557 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count);
558 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua);
559 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd);
560 /* Administrative operations */
561 int (*adapter_comm)(struct aac_dev * dev, int comm);
562 };
563
564 /*
565 * Define which interrupt handler needs to be installed
566 */
567
568 struct aac_driver_ident
569 {
570 int (*init)(struct aac_dev *dev);
571 char * name;
572 char * vname;
573 char * model;
574 u16 channels;
575 int quirks;
576 };
577 /*
578 * Some adapter firmware needs communication memory
579 * below 2gig. This tells the init function to set the
580 * dma mask such that fib memory will be allocated where the
581 * adapter firmware can get to it.
582 */
583 #define AAC_QUIRK_31BIT 0x0001
584
585 /*
586 * Some adapter firmware, when the raid card's cache is turned off, can not
587 * split up scatter gathers in order to deal with the limits of the
588 * underlying CHIM. This limit is 34 scatter gather elements.
589 */
590 #define AAC_QUIRK_34SG 0x0002
591
592 /*
593 * This adapter is a slave (no Firmware)
594 */
595 #define AAC_QUIRK_SLAVE 0x0004
596
597 /*
598 * This adapter is a master.
599 */
600 #define AAC_QUIRK_MASTER 0x0008
601
602 /*
603 * Some adapter firmware perform poorly when it must split up scatter gathers
604 * in order to deal with the limits of the underlying CHIM. This limit in this
605 * class of adapters is 17 scatter gather elements.
606 */
607 #define AAC_QUIRK_17SG 0x0010
608
609 /*
610 * Some adapter firmware does not support 64 bit scsi passthrough
611 * commands.
612 */
613 #define AAC_QUIRK_SCSI_32 0x0020
614
615 /*
616 * The adapter interface specs all queues to be located in the same
617 * physically contiguous block. The host structure that defines the
618 * commuication queues will assume they are each a separate physically
619 * contiguous memory region that will support them all being one big
620 * contiguous block.
621 * There is a command and response queue for each level and direction of
622 * commuication. These regions are accessed by both the host and adapter.
623 */
624
625 struct aac_queue {
626 u64 logical; /*address we give the adapter */
627 struct aac_entry *base; /*system virtual address */
628 struct aac_qhdr headers; /*producer,consumer q headers*/
629 u32 entries; /*Number of queue entries */
630 wait_queue_head_t qfull; /*Event to wait on if q full */
631 wait_queue_head_t cmdready; /*Cmd ready from the adapter */
632 /* This is only valid for adapter to host command queues. */
633 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */
634 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */
635 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */
636 /* only valid for command queues which receive entries from the adapter. */
637 /* Number of entries on outstanding queue. */
638 atomic_t numpending;
639 struct aac_dev * dev; /* Back pointer to adapter structure */
640 };
641
642 /*
643 * Message queues. The order here is important, see also the
644 * queue type ordering
645 */
646
647 struct aac_queue_block
648 {
649 struct aac_queue queue[8];
650 };
651
652 /*
653 * SaP1 Message Unit Registers
654 */
655
656 struct sa_drawbridge_CSR {
657 /* Offset | Name */
658 __le32 reserved[10]; /* 00h-27h | Reserved */
659 u8 LUT_Offset; /* 28h | Lookup Table Offset */
660 u8 reserved1[3]; /* 29h-2bh | Reserved */
661 __le32 LUT_Data; /* 2ch | Looup Table Data */
662 __le32 reserved2[26]; /* 30h-97h | Reserved */
663 __le16 PRICLEARIRQ; /* 98h | Primary Clear Irq */
664 __le16 SECCLEARIRQ; /* 9ah | Secondary Clear Irq */
665 __le16 PRISETIRQ; /* 9ch | Primary Set Irq */
666 __le16 SECSETIRQ; /* 9eh | Secondary Set Irq */
667 __le16 PRICLEARIRQMASK;/* a0h | Primary Clear Irq Mask */
668 __le16 SECCLEARIRQMASK;/* a2h | Secondary Clear Irq Mask */
669 __le16 PRISETIRQMASK; /* a4h | Primary Set Irq Mask */
670 __le16 SECSETIRQMASK; /* a6h | Secondary Set Irq Mask */
671 __le32 MAILBOX0; /* a8h | Scratchpad 0 */
672 __le32 MAILBOX1; /* ach | Scratchpad 1 */
673 __le32 MAILBOX2; /* b0h | Scratchpad 2 */
674 __le32 MAILBOX3; /* b4h | Scratchpad 3 */
675 __le32 MAILBOX4; /* b8h | Scratchpad 4 */
676 __le32 MAILBOX5; /* bch | Scratchpad 5 */
677 __le32 MAILBOX6; /* c0h | Scratchpad 6 */
678 __le32 MAILBOX7; /* c4h | Scratchpad 7 */
679 __le32 ROM_Setup_Data; /* c8h | Rom Setup and Data */
680 __le32 ROM_Control_Addr;/* cch | Rom Control and Address */
681 __le32 reserved3[12]; /* d0h-ffh | reserved */
682 __le32 LUT[64]; /* 100h-1ffh | Lookup Table Entries */
683 };
684
685 #define Mailbox0 SaDbCSR.MAILBOX0
686 #define Mailbox1 SaDbCSR.MAILBOX1
687 #define Mailbox2 SaDbCSR.MAILBOX2
688 #define Mailbox3 SaDbCSR.MAILBOX3
689 #define Mailbox4 SaDbCSR.MAILBOX4
690 #define Mailbox5 SaDbCSR.MAILBOX5
691 #define Mailbox6 SaDbCSR.MAILBOX6
692 #define Mailbox7 SaDbCSR.MAILBOX7
693
694 #define DoorbellReg_p SaDbCSR.PRISETIRQ
695 #define DoorbellReg_s SaDbCSR.SECSETIRQ
696 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
697
698
699 #define DOORBELL_0 0x0001
700 #define DOORBELL_1 0x0002
701 #define DOORBELL_2 0x0004
702 #define DOORBELL_3 0x0008
703 #define DOORBELL_4 0x0010
704 #define DOORBELL_5 0x0020
705 #define DOORBELL_6 0x0040
706
707
708 #define PrintfReady DOORBELL_5
709 #define PrintfDone DOORBELL_5
710
711 struct sa_registers {
712 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */
713 };
714
715
716 #define Sa_MINIPORT_REVISION 1
717
718 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
719 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
720 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
721 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
722
723 /*
724 * Rx Message Unit Registers
725 */
726
727 struct rx_mu_registers {
728 /* Local | PCI*| Name */
729 __le32 ARSR; /* 1300h | 00h | APIC Register Select Register */
730 __le32 reserved0; /* 1304h | 04h | Reserved */
731 __le32 AWR; /* 1308h | 08h | APIC Window Register */
732 __le32 reserved1; /* 130Ch | 0Ch | Reserved */
733 __le32 IMRx[2]; /* 1310h | 10h | Inbound Message Registers */
734 __le32 OMRx[2]; /* 1318h | 18h | Outbound Message Registers */
735 __le32 IDR; /* 1320h | 20h | Inbound Doorbell Register */
736 __le32 IISR; /* 1324h | 24h | Inbound Interrupt
737 Status Register */
738 __le32 IIMR; /* 1328h | 28h | Inbound Interrupt
739 Mask Register */
740 __le32 ODR; /* 132Ch | 2Ch | Outbound Doorbell Register */
741 __le32 OISR; /* 1330h | 30h | Outbound Interrupt
742 Status Register */
743 __le32 OIMR; /* 1334h | 34h | Outbound Interrupt
744 Mask Register */
745 __le32 reserved2; /* 1338h | 38h | Reserved */
746 __le32 reserved3; /* 133Ch | 3Ch | Reserved */
747 __le32 InboundQueue;/* 1340h | 40h | Inbound Queue Port relative to firmware */
748 __le32 OutboundQueue;/*1344h | 44h | Outbound Queue Port relative to firmware */
749 /* * Must access through ATU Inbound
750 Translation Window */
751 };
752
753 struct rx_inbound {
754 __le32 Mailbox[8];
755 };
756
757 #define INBOUNDDOORBELL_0 0x00000001
758 #define INBOUNDDOORBELL_1 0x00000002
759 #define INBOUNDDOORBELL_2 0x00000004
760 #define INBOUNDDOORBELL_3 0x00000008
761 #define INBOUNDDOORBELL_4 0x00000010
762 #define INBOUNDDOORBELL_5 0x00000020
763 #define INBOUNDDOORBELL_6 0x00000040
764
765 #define OUTBOUNDDOORBELL_0 0x00000001
766 #define OUTBOUNDDOORBELL_1 0x00000002
767 #define OUTBOUNDDOORBELL_2 0x00000004
768 #define OUTBOUNDDOORBELL_3 0x00000008
769 #define OUTBOUNDDOORBELL_4 0x00000010
770
771 #define InboundDoorbellReg MUnit.IDR
772 #define OutboundDoorbellReg MUnit.ODR
773
774 struct rx_registers {
775 struct rx_mu_registers MUnit; /* 1300h - 1347h */
776 __le32 reserved1[2]; /* 1348h - 134ch */
777 struct rx_inbound IndexRegs;
778 };
779
780 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
781 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
782 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
783 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
784
785 /*
786 * Rkt Message Unit Registers (same as Rx, except a larger reserve region)
787 */
788
789 #define rkt_mu_registers rx_mu_registers
790 #define rkt_inbound rx_inbound
791
792 struct rkt_registers {
793 struct rkt_mu_registers MUnit; /* 1300h - 1347h */
794 __le32 reserved1[1006]; /* 1348h - 22fch */
795 struct rkt_inbound IndexRegs; /* 2300h - */
796 };
797
798 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
799 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
800 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
801 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
802
803 /*
804 * PMC SRC message unit registers
805 */
806
807 #define src_inbound rx_inbound
808
809 struct src_mu_registers {
810 /* PCI*| Name */
811 __le32 reserved0[6]; /* 00h | Reserved */
812 __le32 IOAR[2]; /* 18h | IOA->host interrupt register */
813 __le32 IDR; /* 20h | Inbound Doorbell Register */
814 __le32 IISR; /* 24h | Inbound Int. Status Register */
815 __le32 reserved1[3]; /* 28h | Reserved */
816 __le32 OIMR; /* 34h | Outbound Int. Mask Register */
817 __le32 reserved2[25]; /* 38h | Reserved */
818 __le32 ODR_R; /* 9ch | Outbound Doorbell Read */
819 __le32 ODR_C; /* a0h | Outbound Doorbell Clear */
820 __le32 reserved3[6]; /* a4h | Reserved */
821 __le32 OMR; /* bch | Outbound Message Register */
822 __le32 IQ_L; /* c0h | Inbound Queue (Low address) */
823 __le32 IQ_H; /* c4h | Inbound Queue (High address) */
824 __le32 ODR_MSI; /* c8h | MSI register for sync./AIF */
825 };
826
827 struct src_registers {
828 struct src_mu_registers MUnit; /* 00h - cbh */
829 union {
830 struct {
831 __le32 reserved1[130789]; /* cch - 7fc5fh */
832 struct src_inbound IndexRegs; /* 7fc60h */
833 } tupelo;
834 struct {
835 __le32 reserved1[973]; /* cch - fffh */
836 struct src_inbound IndexRegs; /* 1000h */
837 } denali;
838 } u;
839 };
840
841 #define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR))
842 #define src_readl(AEP, CSR) readl(&((AEP)->regs.src.bar0->CSR))
843 #define src_writeb(AEP, CSR, value) writeb(value, \
844 &((AEP)->regs.src.bar0->CSR))
845 #define src_writel(AEP, CSR, value) writel(value, \
846 &((AEP)->regs.src.bar0->CSR))
847 #if defined(writeq)
848 #define src_writeq(AEP, CSR, value) writeq(value, \
849 &((AEP)->regs.src.bar0->CSR))
850 #endif
851
852 #define SRC_ODR_SHIFT 12
853 #define SRC_IDR_SHIFT 9
854
855 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
856
857 struct aac_fib_context {
858 s16 type; // used for verification of structure
859 s16 size;
860 u32 unique; // unique value representing this context
861 ulong jiffies; // used for cleanup - dmb changed to ulong
862 struct list_head next; // used to link context's into a linked list
863 struct semaphore wait_sem; // this is used to wait for the next fib to arrive.
864 int wait; // Set to true when thread is in WaitForSingleObject
865 unsigned long count; // total number of FIBs on FibList
866 struct list_head fib_list; // this holds fibs and their attachd hw_fibs
867 };
868
869 struct sense_data {
870 u8 error_code; /* 70h (current errors), 71h(deferred errors) */
871 u8 valid:1; /* A valid bit of one indicates that the information */
872 /* field contains valid information as defined in the
873 * SCSI-2 Standard.
874 */
875 u8 segment_number; /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */
876 u8 sense_key:4; /* Sense Key */
877 u8 reserved:1;
878 u8 ILI:1; /* Incorrect Length Indicator */
879 u8 EOM:1; /* End Of Medium - reserved for random access devices */
880 u8 filemark:1; /* Filemark - reserved for random access devices */
881
882 u8 information[4]; /* for direct-access devices, contains the unsigned
883 * logical block address or residue associated with
884 * the sense key
885 */
886 u8 add_sense_len; /* number of additional sense bytes to follow this field */
887 u8 cmnd_info[4]; /* not used */
888 u8 ASC; /* Additional Sense Code */
889 u8 ASCQ; /* Additional Sense Code Qualifier */
890 u8 FRUC; /* Field Replaceable Unit Code - not used */
891 u8 bit_ptr:3; /* indicates which byte of the CDB or parameter data
892 * was in error
893 */
894 u8 BPV:1; /* bit pointer valid (BPV): 1- indicates that
895 * the bit_ptr field has valid value
896 */
897 u8 reserved2:2;
898 u8 CD:1; /* command data bit: 1- illegal parameter in CDB.
899 * 0- illegal parameter in data.
900 */
901 u8 SKSV:1;
902 u8 field_ptr[2]; /* byte of the CDB or parameter data in error */
903 };
904
905 struct fsa_dev_info {
906 u64 last;
907 u64 size;
908 u32 type;
909 u32 config_waiting_on;
910 unsigned long config_waiting_stamp;
911 u16 queue_depth;
912 u8 config_needed;
913 u8 valid;
914 u8 ro;
915 u8 locked;
916 u8 deleted;
917 char devname[8];
918 struct sense_data sense_data;
919 u32 block_size;
920 };
921
922 struct fib {
923 void *next; /* this is used by the allocator */
924 s16 type;
925 s16 size;
926 /*
927 * The Adapter that this I/O is destined for.
928 */
929 struct aac_dev *dev;
930 /*
931 * This is the event the sendfib routine will wait on if the
932 * caller did not pass one and this is synch io.
933 */
934 struct semaphore event_wait;
935 spinlock_t event_lock;
936
937 u32 done; /* gets set to 1 when fib is complete */
938 fib_callback callback;
939 void *callback_data;
940 u32 flags; // u32 dmb was ulong
941 /*
942 * And for the internal issue/reply queues (we may be able
943 * to merge these two)
944 */
945 struct list_head fiblink;
946 void *data;
947 struct hw_fib *hw_fib_va; /* Actual shared object */
948 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/
949 };
950
951 /*
952 * Adapter Information Block
953 *
954 * This is returned by the RequestAdapterInfo block
955 */
956
957 struct aac_adapter_info
958 {
959 __le32 platform;
960 __le32 cpu;
961 __le32 subcpu;
962 __le32 clock;
963 __le32 execmem;
964 __le32 buffermem;
965 __le32 totalmem;
966 __le32 kernelrev;
967 __le32 kernelbuild;
968 __le32 monitorrev;
969 __le32 monitorbuild;
970 __le32 hwrev;
971 __le32 hwbuild;
972 __le32 biosrev;
973 __le32 biosbuild;
974 __le32 cluster;
975 __le32 clusterchannelmask;
976 __le32 serial[2];
977 __le32 battery;
978 __le32 options;
979 __le32 OEM;
980 };
981
982 struct aac_supplement_adapter_info
983 {
984 u8 AdapterTypeText[17+1];
985 u8 Pad[2];
986 __le32 FlashMemoryByteSize;
987 __le32 FlashImageId;
988 __le32 MaxNumberPorts;
989 __le32 Version;
990 __le32 FeatureBits;
991 u8 SlotNumber;
992 u8 ReservedPad0[3];
993 u8 BuildDate[12];
994 __le32 CurrentNumberPorts;
995 struct {
996 u8 AssemblyPn[8];
997 u8 FruPn[8];
998 u8 BatteryFruPn[8];
999 u8 EcVersionString[8];
1000 u8 Tsid[12];
1001 } VpdInfo;
1002 __le32 FlashFirmwareRevision;
1003 __le32 FlashFirmwareBuild;
1004 __le32 RaidTypeMorphOptions;
1005 __le32 FlashFirmwareBootRevision;
1006 __le32 FlashFirmwareBootBuild;
1007 u8 MfgPcbaSerialNo[12];
1008 u8 MfgWWNName[8];
1009 __le32 SupportedOptions2;
1010 __le32 StructExpansion;
1011 /* StructExpansion == 1 */
1012 __le32 FeatureBits3;
1013 __le32 SupportedPerformanceModes;
1014 __le32 ReservedForFutureGrowth[80];
1015 };
1016 #define AAC_FEATURE_FALCON cpu_to_le32(0x00000010)
1017 #define AAC_FEATURE_JBOD cpu_to_le32(0x08000000)
1018 /* SupportedOptions2 */
1019 #define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001)
1020 #define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002)
1021 #define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004)
1022 #define AAC_OPTION_DOORBELL_RESET cpu_to_le32(0x00004000)
1023 /* 4KB sector size */
1024 #define AAC_OPTION_VARIABLE_BLOCK_SIZE cpu_to_le32(0x00040000)
1025 /* 240 simple volume support */
1026 #define AAC_OPTION_SUPPORTED_240_VOLUMES cpu_to_le32(0x10000000)
1027 #define AAC_SIS_VERSION_V3 3
1028 #define AAC_SIS_SLOT_UNKNOWN 0xFF
1029
1030 #define GetBusInfo 0x00000009
1031 struct aac_bus_info {
1032 __le32 Command; /* VM_Ioctl */
1033 __le32 ObjType; /* FT_DRIVE */
1034 __le32 MethodId; /* 1 = SCSI Layer */
1035 __le32 ObjectId; /* Handle */
1036 __le32 CtlCmd; /* GetBusInfo */
1037 };
1038
1039 struct aac_bus_info_response {
1040 __le32 Status; /* ST_OK */
1041 __le32 ObjType;
1042 __le32 MethodId; /* unused */
1043 __le32 ObjectId; /* unused */
1044 __le32 CtlCmd; /* unused */
1045 __le32 ProbeComplete;
1046 __le32 BusCount;
1047 __le32 TargetsPerBus;
1048 u8 InitiatorBusId[10];
1049 u8 BusValid[10];
1050 };
1051
1052 /*
1053 * Battery platforms
1054 */
1055 #define AAC_BAT_REQ_PRESENT (1)
1056 #define AAC_BAT_REQ_NOTPRESENT (2)
1057 #define AAC_BAT_OPT_PRESENT (3)
1058 #define AAC_BAT_OPT_NOTPRESENT (4)
1059 #define AAC_BAT_NOT_SUPPORTED (5)
1060 /*
1061 * cpu types
1062 */
1063 #define AAC_CPU_SIMULATOR (1)
1064 #define AAC_CPU_I960 (2)
1065 #define AAC_CPU_STRONGARM (3)
1066
1067 /*
1068 * Supported Options
1069 */
1070 #define AAC_OPT_SNAPSHOT cpu_to_le32(1)
1071 #define AAC_OPT_CLUSTERS cpu_to_le32(1<<1)
1072 #define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2)
1073 #define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3)
1074 #define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4)
1075 #define AAC_OPT_RAID50 cpu_to_le32(1<<5)
1076 #define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6)
1077 #define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7)
1078 #define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8)
1079 #define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9)
1080 #define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10)
1081 #define AAC_OPT_ALARM cpu_to_le32(1<<11)
1082 #define AAC_OPT_NONDASD cpu_to_le32(1<<12)
1083 #define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13)
1084 #define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14)
1085 #define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16)
1086 #define AAC_OPT_NEW_COMM cpu_to_le32(1<<17)
1087 #define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18)
1088 #define AAC_OPT_NEW_COMM_TYPE1 cpu_to_le32(1<<28)
1089 #define AAC_OPT_NEW_COMM_TYPE2 cpu_to_le32(1<<29)
1090 #define AAC_OPT_NEW_COMM_TYPE3 cpu_to_le32(1<<30)
1091 #define AAC_OPT_NEW_COMM_TYPE4 cpu_to_le32(1<<31)
1092
1093 /* MSIX context */
1094 struct aac_msix_ctx {
1095 int vector_no;
1096 struct aac_dev *dev;
1097 };
1098
1099 struct aac_dev
1100 {
1101 struct list_head entry;
1102 const char *name;
1103 int id;
1104
1105 /*
1106 * negotiated FIB settings
1107 */
1108 unsigned max_fib_size;
1109 unsigned sg_tablesize;
1110 unsigned max_num_aif;
1111
1112 /*
1113 * Map for 128 fib objects (64k)
1114 */
1115 dma_addr_t hw_fib_pa;
1116 struct hw_fib *hw_fib_va;
1117 struct hw_fib *aif_base_va;
1118 /*
1119 * Fib Headers
1120 */
1121 struct fib *fibs;
1122
1123 struct fib *free_fib;
1124 spinlock_t fib_lock;
1125
1126 struct aac_queue_block *queues;
1127 /*
1128 * The user API will use an IOCTL to register itself to receive
1129 * FIBs from the adapter. The following list is used to keep
1130 * track of all the threads that have requested these FIBs. The
1131 * mutex is used to synchronize access to all data associated
1132 * with the adapter fibs.
1133 */
1134 struct list_head fib_list;
1135
1136 struct adapter_ops a_ops;
1137 unsigned long fsrev; /* Main driver's revision number */
1138
1139 resource_size_t base_start; /* main IO base */
1140 resource_size_t dbg_base; /* address of UART
1141 * debug buffer */
1142
1143 resource_size_t base_size, dbg_size; /* Size of
1144 * mapped in region */
1145
1146 struct aac_init *init; /* Holds initialization info to communicate with adapter */
1147 dma_addr_t init_pa; /* Holds physical address of the init struct */
1148
1149 u32 *host_rrq; /* response queue
1150 * if AAC_COMM_MESSAGE_TYPE1 */
1151
1152 dma_addr_t host_rrq_pa; /* phys. address */
1153 /* index into rrq buffer */
1154 u32 host_rrq_idx[AAC_MAX_MSIX];
1155 atomic_t rrq_outstanding[AAC_MAX_MSIX];
1156 u32 fibs_pushed_no;
1157 struct pci_dev *pdev; /* Our PCI interface */
1158 void * printfbuf; /* pointer to buffer used for printf's from the adapter */
1159 void * comm_addr; /* Base address of Comm area */
1160 dma_addr_t comm_phys; /* Physical Address of Comm area */
1161 size_t comm_size;
1162
1163 struct Scsi_Host *scsi_host_ptr;
1164 int maximum_num_containers;
1165 int maximum_num_physicals;
1166 int maximum_num_channels;
1167 struct fsa_dev_info *fsa_dev;
1168 struct task_struct *thread;
1169 int cardtype;
1170 /*
1171 *This lock will protect the two 32-bit
1172 *writes to the Inbound Queue
1173 */
1174 spinlock_t iq_lock;
1175
1176 /*
1177 * The following is the device specific extension.
1178 */
1179 #ifndef AAC_MIN_FOOTPRINT_SIZE
1180 # define AAC_MIN_FOOTPRINT_SIZE 8192
1181 # define AAC_MIN_SRC_BAR0_SIZE 0x400000
1182 # define AAC_MIN_SRC_BAR1_SIZE 0x800
1183 # define AAC_MIN_SRCV_BAR0_SIZE 0x100000
1184 # define AAC_MIN_SRCV_BAR1_SIZE 0x400
1185 #endif
1186 union
1187 {
1188 struct sa_registers __iomem *sa;
1189 struct rx_registers __iomem *rx;
1190 struct rkt_registers __iomem *rkt;
1191 struct {
1192 struct src_registers __iomem *bar0;
1193 char __iomem *bar1;
1194 } src;
1195 } regs;
1196 volatile void __iomem *base, *dbg_base_mapped;
1197 volatile struct rx_inbound __iomem *IndexRegs;
1198 u32 OIMR; /* Mask Register Cache */
1199 /*
1200 * AIF thread states
1201 */
1202 u32 aif_thread;
1203 struct aac_adapter_info adapter_info;
1204 struct aac_supplement_adapter_info supplement_adapter_info;
1205 /* These are in adapter info but they are in the io flow so
1206 * lets break them out so we don't have to do an AND to check them
1207 */
1208 u8 nondasd_support;
1209 u8 jbod;
1210 u8 cache_protected;
1211 u8 dac_support;
1212 u8 needs_dac;
1213 u8 raid_scsi_mode;
1214 u8 comm_interface;
1215 # define AAC_COMM_PRODUCER 0
1216 # define AAC_COMM_MESSAGE 1
1217 # define AAC_COMM_MESSAGE_TYPE1 3
1218 # define AAC_COMM_MESSAGE_TYPE2 4
1219 u8 raw_io_interface;
1220 u8 raw_io_64;
1221 u8 printf_enabled;
1222 u8 in_reset;
1223 u8 msi;
1224 int management_fib_count;
1225 spinlock_t manage_lock;
1226 spinlock_t sync_lock;
1227 int sync_mode;
1228 struct fib *sync_fib;
1229 struct list_head sync_fib_list;
1230 u32 doorbell_mask;
1231 u32 max_msix; /* max. MSI-X vectors */
1232 u32 vector_cap; /* MSI-X vector capab.*/
1233 int msi_enabled; /* MSI/MSI-X enabled */
1234 struct msix_entry msixentry[AAC_MAX_MSIX];
1235 struct aac_msix_ctx aac_msix[AAC_MAX_MSIX]; /* context */
1236 u8 adapter_shutdown;
1237 };
1238
1239 #define aac_adapter_interrupt(dev) \
1240 (dev)->a_ops.adapter_interrupt(dev)
1241
1242 #define aac_adapter_notify(dev, event) \
1243 (dev)->a_ops.adapter_notify(dev, event)
1244
1245 #define aac_adapter_disable_int(dev) \
1246 (dev)->a_ops.adapter_disable_int(dev)
1247
1248 #define aac_adapter_enable_int(dev) \
1249 (dev)->a_ops.adapter_enable_int(dev)
1250
1251 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \
1252 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
1253
1254 #define aac_adapter_check_health(dev) \
1255 (dev)->a_ops.adapter_check_health(dev)
1256
1257 #define aac_adapter_restart(dev,bled) \
1258 (dev)->a_ops.adapter_restart(dev,bled)
1259
1260 #define aac_adapter_start(dev) \
1261 ((dev)->a_ops.adapter_start(dev))
1262
1263 #define aac_adapter_ioremap(dev, size) \
1264 (dev)->a_ops.adapter_ioremap(dev, size)
1265
1266 #define aac_adapter_deliver(fib) \
1267 ((fib)->dev)->a_ops.adapter_deliver(fib)
1268
1269 #define aac_adapter_bounds(dev,cmd,lba) \
1270 dev->a_ops.adapter_bounds(dev,cmd,lba)
1271
1272 #define aac_adapter_read(fib,cmd,lba,count) \
1273 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count)
1274
1275 #define aac_adapter_write(fib,cmd,lba,count,fua) \
1276 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua)
1277
1278 #define aac_adapter_scsi(fib,cmd) \
1279 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd)
1280
1281 #define aac_adapter_comm(dev,comm) \
1282 (dev)->a_ops.adapter_comm(dev, comm)
1283
1284 #define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
1285 #define FIB_CONTEXT_FLAG (0x00000002)
1286 #define FIB_CONTEXT_FLAG_WAIT (0x00000004)
1287 #define FIB_CONTEXT_FLAG_FASTRESP (0x00000008)
1288
1289 /*
1290 * Define the command values
1291 */
1292
1293 #define Null 0
1294 #define GetAttributes 1
1295 #define SetAttributes 2
1296 #define Lookup 3
1297 #define ReadLink 4
1298 #define Read 5
1299 #define Write 6
1300 #define Create 7
1301 #define MakeDirectory 8
1302 #define SymbolicLink 9
1303 #define MakeNode 10
1304 #define Removex 11
1305 #define RemoveDirectoryx 12
1306 #define Rename 13
1307 #define Link 14
1308 #define ReadDirectory 15
1309 #define ReadDirectoryPlus 16
1310 #define FileSystemStatus 17
1311 #define FileSystemInfo 18
1312 #define PathConfigure 19
1313 #define Commit 20
1314 #define Mount 21
1315 #define UnMount 22
1316 #define Newfs 23
1317 #define FsCheck 24
1318 #define FsSync 25
1319 #define SimReadWrite 26
1320 #define SetFileSystemStatus 27
1321 #define BlockRead 28
1322 #define BlockWrite 29
1323 #define NvramIoctl 30
1324 #define FsSyncWait 31
1325 #define ClearArchiveBit 32
1326 #define SetAcl 33
1327 #define GetAcl 34
1328 #define AssignAcl 35
1329 #define FaultInsertion 36 /* Fault Insertion Command */
1330 #define CrazyCache 37 /* Crazycache */
1331
1332 #define MAX_FSACOMMAND_NUM 38
1333
1334
1335 /*
1336 * Define the status returns. These are very unixlike although
1337 * most are not in fact used
1338 */
1339
1340 #define ST_OK 0
1341 #define ST_PERM 1
1342 #define ST_NOENT 2
1343 #define ST_IO 5
1344 #define ST_NXIO 6
1345 #define ST_E2BIG 7
1346 #define ST_ACCES 13
1347 #define ST_EXIST 17
1348 #define ST_XDEV 18
1349 #define ST_NODEV 19
1350 #define ST_NOTDIR 20
1351 #define ST_ISDIR 21
1352 #define ST_INVAL 22
1353 #define ST_FBIG 27
1354 #define ST_NOSPC 28
1355 #define ST_ROFS 30
1356 #define ST_MLINK 31
1357 #define ST_WOULDBLOCK 35
1358 #define ST_NAMETOOLONG 63
1359 #define ST_NOTEMPTY 66
1360 #define ST_DQUOT 69
1361 #define ST_STALE 70
1362 #define ST_REMOTE 71
1363 #define ST_NOT_READY 72
1364 #define ST_BADHANDLE 10001
1365 #define ST_NOT_SYNC 10002
1366 #define ST_BAD_COOKIE 10003
1367 #define ST_NOTSUPP 10004
1368 #define ST_TOOSMALL 10005
1369 #define ST_SERVERFAULT 10006
1370 #define ST_BADTYPE 10007
1371 #define ST_JUKEBOX 10008
1372 #define ST_NOTMOUNTED 10009
1373 #define ST_MAINTMODE 10010
1374 #define ST_STALEACL 10011
1375
1376 /*
1377 * On writes how does the client want the data written.
1378 */
1379
1380 #define CACHE_CSTABLE 1
1381 #define CACHE_UNSTABLE 2
1382
1383 /*
1384 * Lets the client know at which level the data was committed on
1385 * a write request
1386 */
1387
1388 #define CMFILE_SYNCH_NVRAM 1
1389 #define CMDATA_SYNCH_NVRAM 2
1390 #define CMFILE_SYNCH 3
1391 #define CMDATA_SYNCH 4
1392 #define CMUNSTABLE 5
1393
1394 #define RIO_TYPE_WRITE 0x0000
1395 #define RIO_TYPE_READ 0x0001
1396 #define RIO_SUREWRITE 0x0008
1397
1398 #define RIO2_IO_TYPE 0x0003
1399 #define RIO2_IO_TYPE_WRITE 0x0000
1400 #define RIO2_IO_TYPE_READ 0x0001
1401 #define RIO2_IO_TYPE_VERIFY 0x0002
1402 #define RIO2_IO_ERROR 0x0004
1403 #define RIO2_IO_SUREWRITE 0x0008
1404 #define RIO2_SGL_CONFORMANT 0x0010
1405 #define RIO2_SG_FORMAT 0xF000
1406 #define RIO2_SG_FORMAT_ARC 0x0000
1407 #define RIO2_SG_FORMAT_SRL 0x1000
1408 #define RIO2_SG_FORMAT_IEEE1212 0x2000
1409
1410 struct aac_read
1411 {
1412 __le32 command;
1413 __le32 cid;
1414 __le32 block;
1415 __le32 count;
1416 struct sgmap sg; // Must be last in struct because it is variable
1417 };
1418
1419 struct aac_read64
1420 {
1421 __le32 command;
1422 __le16 cid;
1423 __le16 sector_count;
1424 __le32 block;
1425 __le16 pad;
1426 __le16 flags;
1427 struct sgmap64 sg; // Must be last in struct because it is variable
1428 };
1429
1430 struct aac_read_reply
1431 {
1432 __le32 status;
1433 __le32 count;
1434 };
1435
1436 struct aac_write
1437 {
1438 __le32 command;
1439 __le32 cid;
1440 __le32 block;
1441 __le32 count;
1442 __le32 stable; // Not used
1443 struct sgmap sg; // Must be last in struct because it is variable
1444 };
1445
1446 struct aac_write64
1447 {
1448 __le32 command;
1449 __le16 cid;
1450 __le16 sector_count;
1451 __le32 block;
1452 __le16 pad;
1453 __le16 flags;
1454 struct sgmap64 sg; // Must be last in struct because it is variable
1455 };
1456 struct aac_write_reply
1457 {
1458 __le32 status;
1459 __le32 count;
1460 __le32 committed;
1461 };
1462
1463 struct aac_raw_io
1464 {
1465 __le32 block[2];
1466 __le32 count;
1467 __le16 cid;
1468 __le16 flags; /* 00 W, 01 R */
1469 __le16 bpTotal; /* reserved for F/W use */
1470 __le16 bpComplete; /* reserved for F/W use */
1471 struct sgmapraw sg;
1472 };
1473
1474 struct aac_raw_io2 {
1475 __le32 blockLow;
1476 __le32 blockHigh;
1477 __le32 byteCount;
1478 __le16 cid;
1479 __le16 flags; /* RIO2 flags */
1480 __le32 sgeFirstSize; /* size of first sge el. */
1481 __le32 sgeNominalSize; /* size of 2nd sge el. (if conformant) */
1482 u8 sgeCnt; /* only 8 bits required */
1483 u8 bpTotal; /* reserved for F/W use */
1484 u8 bpComplete; /* reserved for F/W use */
1485 u8 sgeFirstIndex; /* reserved for F/W use */
1486 u8 unused[4];
1487 struct sge_ieee1212 sge[1];
1488 };
1489
1490 #define CT_FLUSH_CACHE 129
1491 struct aac_synchronize {
1492 __le32 command; /* VM_ContainerConfig */
1493 __le32 type; /* CT_FLUSH_CACHE */
1494 __le32 cid;
1495 __le32 parm1;
1496 __le32 parm2;
1497 __le32 parm3;
1498 __le32 parm4;
1499 __le32 count; /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */
1500 };
1501
1502 struct aac_synchronize_reply {
1503 __le32 dummy0;
1504 __le32 dummy1;
1505 __le32 status; /* CT_OK */
1506 __le32 parm1;
1507 __le32 parm2;
1508 __le32 parm3;
1509 __le32 parm4;
1510 __le32 parm5;
1511 u8 data[16];
1512 };
1513
1514 #define CT_POWER_MANAGEMENT 245
1515 #define CT_PM_START_UNIT 2
1516 #define CT_PM_STOP_UNIT 3
1517 #define CT_PM_UNIT_IMMEDIATE 1
1518 struct aac_power_management {
1519 __le32 command; /* VM_ContainerConfig */
1520 __le32 type; /* CT_POWER_MANAGEMENT */
1521 __le32 sub; /* CT_PM_* */
1522 __le32 cid;
1523 __le32 parm; /* CT_PM_sub_* */
1524 };
1525
1526 #define CT_PAUSE_IO 65
1527 #define CT_RELEASE_IO 66
1528 struct aac_pause {
1529 __le32 command; /* VM_ContainerConfig */
1530 __le32 type; /* CT_PAUSE_IO */
1531 __le32 timeout; /* 10ms ticks */
1532 __le32 min;
1533 __le32 noRescan;
1534 __le32 parm3;
1535 __le32 parm4;
1536 __le32 count; /* sizeof(((struct aac_pause_reply *)NULL)->data) */
1537 };
1538
1539 struct aac_srb
1540 {
1541 __le32 function;
1542 __le32 channel;
1543 __le32 id;
1544 __le32 lun;
1545 __le32 timeout;
1546 __le32 flags;
1547 __le32 count; // Data xfer size
1548 __le32 retry_limit;
1549 __le32 cdb_size;
1550 u8 cdb[16];
1551 struct sgmap sg;
1552 };
1553
1554 /*
1555 * This and associated data structs are used by the
1556 * ioctl caller and are in cpu order.
1557 */
1558 struct user_aac_srb
1559 {
1560 u32 function;
1561 u32 channel;
1562 u32 id;
1563 u32 lun;
1564 u32 timeout;
1565 u32 flags;
1566 u32 count; // Data xfer size
1567 u32 retry_limit;
1568 u32 cdb_size;
1569 u8 cdb[16];
1570 struct user_sgmap sg;
1571 };
1572
1573 #define AAC_SENSE_BUFFERSIZE 30
1574
1575 struct aac_srb_reply
1576 {
1577 __le32 status;
1578 __le32 srb_status;
1579 __le32 scsi_status;
1580 __le32 data_xfer_length;
1581 __le32 sense_data_size;
1582 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE
1583 };
1584 /*
1585 * SRB Flags
1586 */
1587 #define SRB_NoDataXfer 0x0000
1588 #define SRB_DisableDisconnect 0x0004
1589 #define SRB_DisableSynchTransfer 0x0008
1590 #define SRB_BypassFrozenQueue 0x0010
1591 #define SRB_DisableAutosense 0x0020
1592 #define SRB_DataIn 0x0040
1593 #define SRB_DataOut 0x0080
1594
1595 /*
1596 * SRB Functions - set in aac_srb->function
1597 */
1598 #define SRBF_ExecuteScsi 0x0000
1599 #define SRBF_ClaimDevice 0x0001
1600 #define SRBF_IO_Control 0x0002
1601 #define SRBF_ReceiveEvent 0x0003
1602 #define SRBF_ReleaseQueue 0x0004
1603 #define SRBF_AttachDevice 0x0005
1604 #define SRBF_ReleaseDevice 0x0006
1605 #define SRBF_Shutdown 0x0007
1606 #define SRBF_Flush 0x0008
1607 #define SRBF_AbortCommand 0x0010
1608 #define SRBF_ReleaseRecovery 0x0011
1609 #define SRBF_ResetBus 0x0012
1610 #define SRBF_ResetDevice 0x0013
1611 #define SRBF_TerminateIO 0x0014
1612 #define SRBF_FlushQueue 0x0015
1613 #define SRBF_RemoveDevice 0x0016
1614 #define SRBF_DomainValidation 0x0017
1615
1616 /*
1617 * SRB SCSI Status - set in aac_srb->scsi_status
1618 */
1619 #define SRB_STATUS_PENDING 0x00
1620 #define SRB_STATUS_SUCCESS 0x01
1621 #define SRB_STATUS_ABORTED 0x02
1622 #define SRB_STATUS_ABORT_FAILED 0x03
1623 #define SRB_STATUS_ERROR 0x04
1624 #define SRB_STATUS_BUSY 0x05
1625 #define SRB_STATUS_INVALID_REQUEST 0x06
1626 #define SRB_STATUS_INVALID_PATH_ID 0x07
1627 #define SRB_STATUS_NO_DEVICE 0x08
1628 #define SRB_STATUS_TIMEOUT 0x09
1629 #define SRB_STATUS_SELECTION_TIMEOUT 0x0A
1630 #define SRB_STATUS_COMMAND_TIMEOUT 0x0B
1631 #define SRB_STATUS_MESSAGE_REJECTED 0x0D
1632 #define SRB_STATUS_BUS_RESET 0x0E
1633 #define SRB_STATUS_PARITY_ERROR 0x0F
1634 #define SRB_STATUS_REQUEST_SENSE_FAILED 0x10
1635 #define SRB_STATUS_NO_HBA 0x11
1636 #define SRB_STATUS_DATA_OVERRUN 0x12
1637 #define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13
1638 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14
1639 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15
1640 #define SRB_STATUS_REQUEST_FLUSHED 0x16
1641 #define SRB_STATUS_DELAYED_RETRY 0x17
1642 #define SRB_STATUS_INVALID_LUN 0x20
1643 #define SRB_STATUS_INVALID_TARGET_ID 0x21
1644 #define SRB_STATUS_BAD_FUNCTION 0x22
1645 #define SRB_STATUS_ERROR_RECOVERY 0x23
1646 #define SRB_STATUS_NOT_STARTED 0x24
1647 #define SRB_STATUS_NOT_IN_USE 0x30
1648 #define SRB_STATUS_FORCE_ABORT 0x31
1649 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32
1650
1651 /*
1652 * Object-Server / Volume-Manager Dispatch Classes
1653 */
1654
1655 #define VM_Null 0
1656 #define VM_NameServe 1
1657 #define VM_ContainerConfig 2
1658 #define VM_Ioctl 3
1659 #define VM_FilesystemIoctl 4
1660 #define VM_CloseAll 5
1661 #define VM_CtBlockRead 6
1662 #define VM_CtBlockWrite 7
1663 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */
1664 #define VM_SliceBlockWrite 9
1665 #define VM_DriveBlockRead 10 /* raw access to physical devices */
1666 #define VM_DriveBlockWrite 11
1667 #define VM_EnclosureMgt 12 /* enclosure management */
1668 #define VM_Unused 13 /* used to be diskset management */
1669 #define VM_CtBlockVerify 14
1670 #define VM_CtPerf 15 /* performance test */
1671 #define VM_CtBlockRead64 16
1672 #define VM_CtBlockWrite64 17
1673 #define VM_CtBlockVerify64 18
1674 #define VM_CtHostRead64 19
1675 #define VM_CtHostWrite64 20
1676 #define VM_DrvErrTblLog 21
1677 #define VM_NameServe64 22
1678 #define VM_NameServeAllBlk 30
1679
1680 #define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */
1681
1682 /*
1683 * Descriptive information (eg, vital stats)
1684 * that a content manager might report. The
1685 * FileArray filesystem component is one example
1686 * of a content manager. Raw mode might be
1687 * another.
1688 */
1689
1690 struct aac_fsinfo {
1691 __le32 fsTotalSize; /* Consumed by fs, incl. metadata */
1692 __le32 fsBlockSize;
1693 __le32 fsFragSize;
1694 __le32 fsMaxExtendSize;
1695 __le32 fsSpaceUnits;
1696 __le32 fsMaxNumFiles;
1697 __le32 fsNumFreeFiles;
1698 __le32 fsInodeDensity;
1699 }; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1700
1701 struct aac_blockdevinfo {
1702 __le32 block_size;
1703 };
1704
1705 union aac_contentinfo {
1706 struct aac_fsinfo filesys;
1707 struct aac_blockdevinfo bdevinfo;
1708 };
1709
1710 /*
1711 * Query for Container Configuration Status
1712 */
1713
1714 #define CT_GET_CONFIG_STATUS 147
1715 struct aac_get_config_status {
1716 __le32 command; /* VM_ContainerConfig */
1717 __le32 type; /* CT_GET_CONFIG_STATUS */
1718 __le32 parm1;
1719 __le32 parm2;
1720 __le32 parm3;
1721 __le32 parm4;
1722 __le32 parm5;
1723 __le32 count; /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */
1724 };
1725
1726 #define CFACT_CONTINUE 0
1727 #define CFACT_PAUSE 1
1728 #define CFACT_ABORT 2
1729 struct aac_get_config_status_resp {
1730 __le32 response; /* ST_OK */
1731 __le32 dummy0;
1732 __le32 status; /* CT_OK */
1733 __le32 parm1;
1734 __le32 parm2;
1735 __le32 parm3;
1736 __le32 parm4;
1737 __le32 parm5;
1738 struct {
1739 __le32 action; /* CFACT_CONTINUE, CFACT_PAUSE or CFACT_ABORT */
1740 __le16 flags;
1741 __le16 count;
1742 } data;
1743 };
1744
1745 /*
1746 * Accept the configuration as-is
1747 */
1748
1749 #define CT_COMMIT_CONFIG 152
1750
1751 struct aac_commit_config {
1752 __le32 command; /* VM_ContainerConfig */
1753 __le32 type; /* CT_COMMIT_CONFIG */
1754 };
1755
1756 /*
1757 * Query for Container Configuration Status
1758 */
1759
1760 #define CT_GET_CONTAINER_COUNT 4
1761 struct aac_get_container_count {
1762 __le32 command; /* VM_ContainerConfig */
1763 __le32 type; /* CT_GET_CONTAINER_COUNT */
1764 };
1765
1766 struct aac_get_container_count_resp {
1767 __le32 response; /* ST_OK */
1768 __le32 dummy0;
1769 __le32 MaxContainers;
1770 __le32 ContainerSwitchEntries;
1771 __le32 MaxPartitions;
1772 __le32 MaxSimpleVolumes;
1773 };
1774
1775
1776 /*
1777 * Query for "mountable" objects, ie, objects that are typically
1778 * associated with a drive letter on the client (host) side.
1779 */
1780
1781 struct aac_mntent {
1782 __le32 oid;
1783 u8 name[16]; /* if applicable */
1784 struct creation_info create_info; /* if applicable */
1785 __le32 capacity;
1786 __le32 vol; /* substrate structure */
1787 __le32 obj; /* FT_FILESYS, etc. */
1788 __le32 state; /* unready for mounting,
1789 readonly, etc. */
1790 union aac_contentinfo fileinfo; /* Info specific to content
1791 manager (eg, filesystem) */
1792 __le32 altoid; /* != oid <==> snapshot or
1793 broken mirror exists */
1794 __le32 capacityhigh;
1795 };
1796
1797 #define FSCS_NOTCLEAN 0x0001 /* fsck is necessary before mounting */
1798 #define FSCS_READONLY 0x0002 /* possible result of broken mirror */
1799 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */
1800 #define FSCS_NOT_READY 0x0008 /* Array spinning up to fulfil request */
1801
1802 struct aac_query_mount {
1803 __le32 command;
1804 __le32 type;
1805 __le32 count;
1806 };
1807
1808 struct aac_mount {
1809 __le32 status;
1810 __le32 type; /* should be same as that requested */
1811 __le32 count;
1812 struct aac_mntent mnt[1];
1813 };
1814
1815 #define CT_READ_NAME 130
1816 struct aac_get_name {
1817 __le32 command; /* VM_ContainerConfig */
1818 __le32 type; /* CT_READ_NAME */
1819 __le32 cid;
1820 __le32 parm1;
1821 __le32 parm2;
1822 __le32 parm3;
1823 __le32 parm4;
1824 __le32 count; /* sizeof(((struct aac_get_name_resp *)NULL)->data) */
1825 };
1826
1827 struct aac_get_name_resp {
1828 __le32 dummy0;
1829 __le32 dummy1;
1830 __le32 status; /* CT_OK */
1831 __le32 parm1;
1832 __le32 parm2;
1833 __le32 parm3;
1834 __le32 parm4;
1835 __le32 parm5;
1836 u8 data[16];
1837 };
1838
1839 #define CT_CID_TO_32BITS_UID 165
1840 struct aac_get_serial {
1841 __le32 command; /* VM_ContainerConfig */
1842 __le32 type; /* CT_CID_TO_32BITS_UID */
1843 __le32 cid;
1844 };
1845
1846 struct aac_get_serial_resp {
1847 __le32 dummy0;
1848 __le32 dummy1;
1849 __le32 status; /* CT_OK */
1850 __le32 uid;
1851 };
1852
1853 /*
1854 * The following command is sent to shut down each container.
1855 */
1856
1857 struct aac_close {
1858 __le32 command;
1859 __le32 cid;
1860 };
1861
1862 struct aac_query_disk
1863 {
1864 s32 cnum;
1865 s32 bus;
1866 s32 id;
1867 s32 lun;
1868 u32 valid;
1869 u32 locked;
1870 u32 deleted;
1871 s32 instance;
1872 s8 name[10];
1873 u32 unmapped;
1874 };
1875
1876 struct aac_delete_disk {
1877 u32 disknum;
1878 u32 cnum;
1879 };
1880
1881 struct fib_ioctl
1882 {
1883 u32 fibctx;
1884 s32 wait;
1885 char __user *fib;
1886 };
1887
1888 struct revision
1889 {
1890 u32 compat;
1891 __le32 version;
1892 __le32 build;
1893 };
1894
1895
1896 /*
1897 * Ugly - non Linux like ioctl coding for back compat.
1898 */
1899
1900 #define CTL_CODE(function, method) ( \
1901 (4<< 16) | ((function) << 2) | (method) \
1902 )
1903
1904 /*
1905 * Define the method codes for how buffers are passed for I/O and FS
1906 * controls
1907 */
1908
1909 #define METHOD_BUFFERED 0
1910 #define METHOD_NEITHER 3
1911
1912 /*
1913 * Filesystem ioctls
1914 */
1915
1916 #define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED)
1917 #define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED)
1918 #define FSACTL_DELETE_DISK 0x163
1919 #define FSACTL_QUERY_DISK 0x173
1920 #define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED)
1921 #define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED)
1922 #define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED)
1923 #define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED)
1924 #define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED)
1925 #define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER)
1926 #define FSACTL_GET_CONTAINERS 2131
1927 #define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED)
1928
1929
1930 struct aac_common
1931 {
1932 /*
1933 * If this value is set to 1 then interrupt moderation will occur
1934 * in the base commuication support.
1935 */
1936 u32 irq_mod;
1937 u32 peak_fibs;
1938 u32 zero_fibs;
1939 u32 fib_timeouts;
1940 /*
1941 * Statistical counters in debug mode
1942 */
1943 #ifdef DBG
1944 u32 FibsSent;
1945 u32 FibRecved;
1946 u32 NoResponseSent;
1947 u32 NoResponseRecved;
1948 u32 AsyncSent;
1949 u32 AsyncRecved;
1950 u32 NormalSent;
1951 u32 NormalRecved;
1952 #endif
1953 };
1954
1955 extern struct aac_common aac_config;
1956
1957
1958 /*
1959 * The following macro is used when sending and receiving FIBs. It is
1960 * only used for debugging.
1961 */
1962
1963 #ifdef DBG
1964 #define FIB_COUNTER_INCREMENT(counter) (counter)++
1965 #else
1966 #define FIB_COUNTER_INCREMENT(counter)
1967 #endif
1968
1969 /*
1970 * Adapter direct commands
1971 * Monitor/Kernel API
1972 */
1973
1974 #define BREAKPOINT_REQUEST 0x00000004
1975 #define INIT_STRUCT_BASE_ADDRESS 0x00000005
1976 #define READ_PERMANENT_PARAMETERS 0x0000000a
1977 #define WRITE_PERMANENT_PARAMETERS 0x0000000b
1978 #define HOST_CRASHING 0x0000000d
1979 #define SEND_SYNCHRONOUS_FIB 0x0000000c
1980 #define COMMAND_POST_RESULTS 0x00000014
1981 #define GET_ADAPTER_PROPERTIES 0x00000019
1982 #define GET_DRIVER_BUFFER_PROPERTIES 0x00000023
1983 #define RCV_TEMP_READINGS 0x00000025
1984 #define GET_COMM_PREFERRED_SETTINGS 0x00000026
1985 #define IOP_RESET 0x00001000
1986 #define IOP_RESET_ALWAYS 0x00001001
1987 #define RE_INIT_ADAPTER 0x000000ee
1988
1989 /*
1990 * Adapter Status Register
1991 *
1992 * Phase Staus mailbox is 32bits:
1993 * <31:16> = Phase Status
1994 * <15:0> = Phase
1995 *
1996 * The adapter reports is present state through the phase. Only
1997 * a single phase should be ever be set. Each phase can have multiple
1998 * phase status bits to provide more detailed information about the
1999 * state of the board. Care should be taken to ensure that any phase
2000 * status bits that are set when changing the phase are also valid
2001 * for the new phase or be cleared out. Adapter software (monitor,
2002 * iflash, kernel) is responsible for properly maintining the phase
2003 * status mailbox when it is running.
2004 *
2005 * MONKER_API Phases
2006 *
2007 * Phases are bit oriented. It is NOT valid to have multiple bits set
2008 */
2009
2010 #define SELF_TEST_FAILED 0x00000004
2011 #define MONITOR_PANIC 0x00000020
2012 #define KERNEL_UP_AND_RUNNING 0x00000080
2013 #define KERNEL_PANIC 0x00000100
2014 #define FLASH_UPD_PENDING 0x00002000
2015 #define FLASH_UPD_SUCCESS 0x00004000
2016 #define FLASH_UPD_FAILED 0x00008000
2017 #define FWUPD_TIMEOUT (5 * 60)
2018
2019 /*
2020 * Doorbell bit defines
2021 */
2022
2023 #define DoorBellSyncCmdAvailable (1<<0) /* Host -> Adapter */
2024 #define DoorBellPrintfDone (1<<5) /* Host -> Adapter */
2025 #define DoorBellAdapterNormCmdReady (1<<1) /* Adapter -> Host */
2026 #define DoorBellAdapterNormRespReady (1<<2) /* Adapter -> Host */
2027 #define DoorBellAdapterNormCmdNotFull (1<<3) /* Adapter -> Host */
2028 #define DoorBellAdapterNormRespNotFull (1<<4) /* Adapter -> Host */
2029 #define DoorBellPrintfReady (1<<5) /* Adapter -> Host */
2030 #define DoorBellAifPending (1<<6) /* Adapter -> Host */
2031
2032 /* PMC specific outbound doorbell bits */
2033 #define PmDoorBellResponseSent (1<<1) /* Adapter -> Host */
2034
2035 /*
2036 * For FIB communication, we need all of the following things
2037 * to send back to the user.
2038 */
2039
2040 #define AifCmdEventNotify 1 /* Notify of event */
2041 #define AifEnConfigChange 3 /* Adapter configuration change */
2042 #define AifEnContainerChange 4 /* Container configuration change */
2043 #define AifEnDeviceFailure 5 /* SCSI device failed */
2044 #define AifEnEnclosureManagement 13 /* EM_DRIVE_* */
2045 #define EM_DRIVE_INSERTION 31
2046 #define EM_DRIVE_REMOVAL 32
2047 #define EM_SES_DRIVE_INSERTION 33
2048 #define EM_SES_DRIVE_REMOVAL 26
2049 #define AifEnBatteryEvent 14 /* Change in Battery State */
2050 #define AifEnAddContainer 15 /* A new array was created */
2051 #define AifEnDeleteContainer 16 /* A container was deleted */
2052 #define AifEnExpEvent 23 /* Firmware Event Log */
2053 #define AifExeFirmwarePanic 3 /* Firmware Event Panic */
2054 #define AifHighPriority 3 /* Highest Priority Event */
2055 #define AifEnAddJBOD 30 /* JBOD created */
2056 #define AifEnDeleteJBOD 31 /* JBOD deleted */
2057
2058 #define AifCmdJobProgress 2 /* Progress report */
2059 #define AifJobCtrZero 101 /* Array Zero progress */
2060 #define AifJobStsSuccess 1 /* Job completes */
2061 #define AifJobStsRunning 102 /* Job running */
2062 #define AifCmdAPIReport 3 /* Report from other user of API */
2063 #define AifCmdDriverNotify 4 /* Notify host driver of event */
2064 #define AifDenMorphComplete 200 /* A morph operation completed */
2065 #define AifDenVolumeExtendComplete 201 /* A volume extend completed */
2066 #define AifReqJobList 100 /* Gets back complete job list */
2067 #define AifReqJobsForCtr 101 /* Gets back jobs for specific container */
2068 #define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */
2069 #define AifReqJobReport 103 /* Gets back a specific job report or list of them */
2070 #define AifReqTerminateJob 104 /* Terminates job */
2071 #define AifReqSuspendJob 105 /* Suspends a job */
2072 #define AifReqResumeJob 106 /* Resumes a job */
2073 #define AifReqSendAPIReport 107 /* API generic report requests */
2074 #define AifReqAPIJobStart 108 /* Start a job from the API */
2075 #define AifReqAPIJobUpdate 109 /* Update a job report from the API */
2076 #define AifReqAPIJobFinish 110 /* Finish a job from the API */
2077
2078 /* PMC NEW COMM: Request the event data */
2079 #define AifReqEvent 200
2080
2081 /* RAW device deleted */
2082 #define AifRawDeviceRemove 203
2083
2084 /*
2085 * Adapter Initiated FIB command structures. Start with the adapter
2086 * initiated FIBs that really come from the adapter, and get responded
2087 * to by the host.
2088 */
2089
2090 struct aac_aifcmd {
2091 __le32 command; /* Tell host what type of notify this is */
2092 __le32 seqnum; /* To allow ordering of reports (if necessary) */
2093 u8 data[1]; /* Undefined length (from kernel viewpoint) */
2094 };
2095
2096 /**
2097 * Convert capacity to cylinders
2098 * accounting for the fact capacity could be a 64 bit value
2099 *
2100 */
2101 static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
2102 {
2103 sector_div(capacity, divisor);
2104 return capacity;
2105 }
2106
2107 /* SCp.phase values */
2108 #define AAC_OWNER_MIDLEVEL 0x101
2109 #define AAC_OWNER_LOWLEVEL 0x102
2110 #define AAC_OWNER_ERROR_HANDLER 0x103
2111 #define AAC_OWNER_FIRMWARE 0x106
2112
2113 int aac_acquire_irq(struct aac_dev *dev);
2114 void aac_free_irq(struct aac_dev *dev);
2115 const char *aac_driverinfo(struct Scsi_Host *);
2116 struct fib *aac_fib_alloc(struct aac_dev *dev);
2117 int aac_fib_setup(struct aac_dev *dev);
2118 void aac_fib_map_free(struct aac_dev *dev);
2119 void aac_fib_free(struct fib * context);
2120 void aac_fib_init(struct fib * context);
2121 void aac_printf(struct aac_dev *dev, u32 val);
2122 int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
2123 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
2124 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
2125 int aac_fib_complete(struct fib * context);
2126 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
2127 struct aac_dev *aac_init_adapter(struct aac_dev *dev);
2128 void aac_src_access_devreg(struct aac_dev *dev, int mode);
2129 int aac_get_config_status(struct aac_dev *dev, int commit_flag);
2130 int aac_get_containers(struct aac_dev *dev);
2131 int aac_scsi_cmd(struct scsi_cmnd *cmd);
2132 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
2133 #ifndef shost_to_class
2134 #define shost_to_class(shost) &shost->shost_dev
2135 #endif
2136 ssize_t aac_get_serial_number(struct device *dev, char *buf);
2137 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
2138 int aac_rx_init(struct aac_dev *dev);
2139 int aac_rkt_init(struct aac_dev *dev);
2140 int aac_nark_init(struct aac_dev *dev);
2141 int aac_sa_init(struct aac_dev *dev);
2142 int aac_src_init(struct aac_dev *dev);
2143 int aac_srcv_init(struct aac_dev *dev);
2144 int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
2145 void aac_define_int_mode(struct aac_dev *dev);
2146 unsigned int aac_response_normal(struct aac_queue * q);
2147 unsigned int aac_command_normal(struct aac_queue * q);
2148 unsigned int aac_intr_normal(struct aac_dev *dev, u32 Index,
2149 int isAif, int isFastResponse,
2150 struct hw_fib *aif_fib);
2151 int aac_reset_adapter(struct aac_dev * dev, int forced);
2152 int aac_check_health(struct aac_dev * dev);
2153 int aac_command_thread(void *data);
2154 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
2155 int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size);
2156 struct aac_driver_ident* aac_get_driver_ident(int devtype);
2157 int aac_get_adapter_info(struct aac_dev* dev);
2158 int aac_send_shutdown(struct aac_dev *dev);
2159 int aac_probe_container(struct aac_dev *dev, int cid);
2160 int _aac_rx_init(struct aac_dev *dev);
2161 int aac_rx_select_comm(struct aac_dev *dev, int comm);
2162 int aac_rx_deliver_producer(struct fib * fib);
2163 char * get_container_type(unsigned type);
2164 extern int numacb;
2165 extern int acbsize;
2166 extern char aac_driver_version[];
2167 extern int startup_timeout;
2168 extern int aif_timeout;
2169 extern int expose_physicals;
2170 extern int aac_reset_devices;
2171 extern int aac_msi;
2172 extern int aac_commit;
2173 extern int update_interval;
2174 extern int check_interval;
2175 extern int aac_check_reset;
Linux kernel - Deliverables
This page took 0.119576 seconds and 5 git commands to generate.