ncr5380: Introduce unbound workqueue
[deliverable/linux.git] / drivers / scsi / dtc.c
1
2 #define PSEUDO_DMA
3 #define DONT_USE_INTR
4 #define UNSAFE /* Leave interrupts enabled during pseudo-dma I/O */
5 #define DMA_WORKS_RIGHT
6
7
8 /*
9 * DTC 3180/3280 driver, by
10 * Ray Van Tassle rayvt@comm.mot.com
11 *
12 * taken from ...
13 * Trantor T128/T128F/T228 driver by...
14 *
15 * Drew Eckhardt
16 * Visionary Computing
17 * (Unix and Linux consulting and custom programming)
18 * drew@colorado.edu
19 * +1 (303) 440-4894
20 */
21
22 /*
23 * The card is detected and initialized in one of several ways :
24 * 1. Autoprobe (default) - since the board is memory mapped,
25 * a BIOS signature is scanned for to locate the registers.
26 * An interrupt is triggered to autoprobe for the interrupt
27 * line.
28 *
29 * 2. With command line overrides - dtc=address,irq may be
30 * used on the LILO command line to override the defaults.
31 *
32 */
33
34 /*----------------------------------------------------------------*/
35 /* the following will set the monitor border color (useful to find
36 where something crashed or gets stuck at */
37 /* 1 = blue
38 2 = green
39 3 = cyan
40 4 = red
41 5 = magenta
42 6 = yellow
43 7 = white
44 */
45 #if 0
46 #define rtrc(i) {inb(0x3da); outb(0x31, 0x3c0); outb((i), 0x3c0);}
47 #else
48 #define rtrc(i) {}
49 #endif
50
51
52 #include <linux/module.h>
53 #include <linux/signal.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/stat.h>
57 #include <linux/string.h>
58 #include <linux/init.h>
59 #include <linux/interrupt.h>
60 #include <linux/io.h>
61 #include <scsi/scsi_host.h>
62 #include "dtc.h"
63 #define AUTOPROBE_IRQ
64 #include "NCR5380.h"
65
66 /*
67 * The DTC3180 & 3280 boards are memory mapped.
68 *
69 */
70
71 /*
72 */
73 /* Offset from DTC_5380_OFFSET */
74 #define DTC_CONTROL_REG 0x100 /* rw */
75 #define D_CR_ACCESS 0x80 /* ro set=can access 3280 registers */
76 #define CSR_DIR_READ 0x40 /* rw direction, 1 = read 0 = write */
77
78 #define CSR_RESET 0x80 /* wo Resets 53c400 */
79 #define CSR_5380_REG 0x80 /* ro 5380 registers can be accessed */
80 #define CSR_TRANS_DIR 0x40 /* rw Data transfer direction */
81 #define CSR_SCSI_BUFF_INTR 0x20 /* rw Enable int on transfer ready */
82 #define CSR_5380_INTR 0x10 /* rw Enable 5380 interrupts */
83 #define CSR_SHARED_INTR 0x08 /* rw Interrupt sharing */
84 #define CSR_HOST_BUF_NOT_RDY 0x04 /* ro Host buffer not ready */
85 #define CSR_SCSI_BUF_RDY 0x02 /* ro SCSI buffer ready */
86 #define CSR_GATED_5380_IRQ 0x01 /* ro Last block xferred */
87 #define CSR_INT_BASE (CSR_SCSI_BUFF_INTR | CSR_5380_INTR)
88
89
90 #define DTC_BLK_CNT 0x101 /* rw
91 * # of 128-byte blocks to transfer */
92
93
94 #define D_CR_ACCESS 0x80 /* ro set=can access 3280 registers */
95
96 #define DTC_SWITCH_REG 0x3982 /* ro - DIP switches */
97 #define DTC_RESUME_XFER 0x3982 /* wo - resume data xfer
98 * after disconnect/reconnect*/
99
100 #define DTC_5380_OFFSET 0x3880 /* 8 registers here, see NCR5380.h */
101
102 /*!!!! for dtc, it's a 128 byte buffer at 3900 !!! */
103 #define DTC_DATA_BUF 0x3900 /* rw 128 bytes long */
104
105 static struct override {
106 unsigned int address;
107 int irq;
108 } overrides
109 #ifdef OVERRIDE
110 [] __initdata = OVERRIDE;
111 #else
112 [4] __initdata = {
113 { 0, IRQ_AUTO }, { 0, IRQ_AUTO }, { 0, IRQ_AUTO }, { 0, IRQ_AUTO }
114 };
115 #endif
116
117 #define NO_OVERRIDES ARRAY_SIZE(overrides)
118
119 static struct base {
120 unsigned long address;
121 int noauto;
122 } bases[] __initdata = {
123 { 0xcc000, 0 },
124 { 0xc8000, 0 },
125 { 0xdc000, 0 },
126 { 0xd8000, 0 }
127 };
128
129 #define NO_BASES ARRAY_SIZE(bases)
130
131 static const struct signature {
132 const char *string;
133 int offset;
134 } signatures[] = {
135 {"DATA TECHNOLOGY CORPORATION BIOS", 0x25},
136 };
137
138 #define NO_SIGNATURES ARRAY_SIZE(signatures)
139
140 #ifndef MODULE
141 /*
142 * Function : dtc_setup(char *str, int *ints)
143 *
144 * Purpose : LILO command line initialization of the overrides array,
145 *
146 * Inputs : str - unused, ints - array of integer parameters with ints[0]
147 * equal to the number of ints.
148 *
149 */
150
151 static int __init dtc_setup(char *str)
152 {
153 static int commandline_current;
154 int i;
155 int ints[10];
156
157 get_options(str, ARRAY_SIZE(ints), ints);
158 if (ints[0] != 2)
159 printk("dtc_setup: usage dtc=address,irq\n");
160 else if (commandline_current < NO_OVERRIDES) {
161 overrides[commandline_current].address = ints[1];
162 overrides[commandline_current].irq = ints[2];
163 for (i = 0; i < NO_BASES; ++i)
164 if (bases[i].address == ints[1]) {
165 bases[i].noauto = 1;
166 break;
167 }
168 ++commandline_current;
169 }
170 return 1;
171 }
172
173 __setup("dtc=", dtc_setup);
174 #endif
175
176 /*
177 * Function : int dtc_detect(struct scsi_host_template * tpnt)
178 *
179 * Purpose : detects and initializes DTC 3180/3280 controllers
180 * that were autoprobed, overridden on the LILO command line,
181 * or specified at compile time.
182 *
183 * Inputs : tpnt - template for this SCSI adapter.
184 *
185 * Returns : 1 if a host adapter was found, 0 if not.
186 *
187 */
188
189 static int __init dtc_detect(struct scsi_host_template * tpnt)
190 {
191 static int current_override, current_base;
192 struct Scsi_Host *instance;
193 unsigned int addr;
194 void __iomem *base;
195 int sig, count;
196
197 for (count = 0; current_override < NO_OVERRIDES; ++current_override) {
198 addr = 0;
199 base = NULL;
200
201 if (overrides[current_override].address) {
202 addr = overrides[current_override].address;
203 base = ioremap(addr, 0x2000);
204 if (!base)
205 addr = 0;
206 } else
207 for (; !addr && (current_base < NO_BASES); ++current_base) {
208 dprintk(NDEBUG_INIT, "dtc: probing address 0x%08x\n",
209 (unsigned int)bases[current_base].address);
210 if (bases[current_base].noauto)
211 continue;
212 base = ioremap(bases[current_base].address, 0x2000);
213 if (!base)
214 continue;
215 for (sig = 0; sig < NO_SIGNATURES; ++sig) {
216 if (check_signature(base + signatures[sig].offset, signatures[sig].string, strlen(signatures[sig].string))) {
217 addr = bases[current_base].address;
218 dprintk(NDEBUG_INIT, "dtc: detected board\n");
219 goto found;
220 }
221 }
222 iounmap(base);
223 }
224
225 dprintk(NDEBUG_INIT, "dtc: addr = 0x%08x\n", addr);
226
227 if (!addr)
228 break;
229
230 found:
231 instance = scsi_register(tpnt, sizeof(struct NCR5380_hostdata));
232 if (instance == NULL)
233 goto out_unmap;
234
235 instance->base = addr;
236 ((struct NCR5380_hostdata *)(instance)->hostdata)->base = base;
237
238 if (NCR5380_init(instance, 0))
239 goto out_unregister;
240
241 NCR5380_maybe_reset_bus(instance);
242
243 NCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR); /* Enable int's */
244 if (overrides[current_override].irq != IRQ_AUTO)
245 instance->irq = overrides[current_override].irq;
246 else
247 instance->irq = NCR5380_probe_irq(instance, DTC_IRQS);
248
249 /* Compatibility with documented NCR5380 kernel parameters */
250 if (instance->irq == 255)
251 instance->irq = NO_IRQ;
252
253 #ifndef DONT_USE_INTR
254 /* With interrupts enabled, it will sometimes hang when doing heavy
255 * reads. So better not enable them until I finger it out. */
256 if (instance->irq != NO_IRQ)
257 if (request_irq(instance->irq, dtc_intr, 0,
258 "dtc", instance)) {
259 printk(KERN_ERR "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq);
260 instance->irq = NO_IRQ;
261 }
262
263 if (instance->irq == NO_IRQ) {
264 printk(KERN_WARNING "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no);
265 printk(KERN_WARNING "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
266 }
267 #else
268 if (instance->irq != NO_IRQ)
269 printk(KERN_WARNING "scsi%d : interrupts not used. Might as well not jumper it.\n", instance->host_no);
270 instance->irq = NO_IRQ;
271 #endif
272 dprintk(NDEBUG_INIT, "scsi%d : irq = %d\n",
273 instance->host_no, instance->irq);
274
275 ++current_override;
276 ++count;
277 }
278 return count;
279
280 out_unregister:
281 scsi_unregister(instance);
282 out_unmap:
283 iounmap(base);
284 return count;
285 }
286
287 /*
288 * Function : int dtc_biosparam(Disk * disk, struct block_device *dev, int *ip)
289 *
290 * Purpose : Generates a BIOS / DOS compatible H-C-S mapping for
291 * the specified device / size.
292 *
293 * Inputs : size = size of device in sectors (512 bytes), dev = block device
294 * major / minor, ip[] = {heads, sectors, cylinders}
295 *
296 * Returns : always 0 (success), initializes ip
297 *
298 */
299
300 /*
301 * XXX Most SCSI boards use this mapping, I could be incorrect. Some one
302 * using hard disks on a trantor should verify that this mapping corresponds
303 * to that used by the BIOS / ASPI driver by running the linux fdisk program
304 * and matching the H_C_S coordinates to what DOS uses.
305 */
306
307 static int dtc_biosparam(struct scsi_device *sdev, struct block_device *dev,
308 sector_t capacity, int *ip)
309 {
310 int size = capacity;
311
312 ip[0] = 64;
313 ip[1] = 32;
314 ip[2] = size >> 11;
315 return 0;
316 }
317
318
319 /****************************************************************
320 * Function : int NCR5380_pread (struct Scsi_Host *instance,
321 * unsigned char *dst, int len)
322 *
323 * Purpose : Fast 5380 pseudo-dma read function, reads len bytes to
324 * dst
325 *
326 * Inputs : dst = destination, len = length in bytes
327 *
328 * Returns : 0 on success, non zero on a failure such as a watchdog
329 * timeout.
330 */
331
332 static inline int NCR5380_pread(struct Scsi_Host *instance, unsigned char *dst, int len)
333 {
334 unsigned char *d = dst;
335 int i; /* For counting time spent in the poll-loop */
336 struct NCR5380_hostdata *hostdata = shost_priv(instance);
337
338 i = 0;
339 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
340 NCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE);
341 if (instance->irq == NO_IRQ)
342 NCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ);
343 else
344 NCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ | CSR_INT_BASE);
345 NCR5380_write(DTC_BLK_CNT, len >> 7); /* Block count */
346 rtrc(1);
347 while (len > 0) {
348 rtrc(2);
349 while (NCR5380_read(DTC_CONTROL_REG) & CSR_HOST_BUF_NOT_RDY)
350 ++i;
351 rtrc(3);
352 memcpy_fromio(d, hostdata->base + DTC_DATA_BUF, 128);
353 d += 128;
354 len -= 128;
355 rtrc(7);
356 /*** with int's on, it sometimes hangs after here.
357 * Looks like something makes HBNR go away. */
358 }
359 rtrc(4);
360 while (!(NCR5380_read(DTC_CONTROL_REG) & D_CR_ACCESS))
361 ++i;
362 NCR5380_write(MODE_REG, 0); /* Clear the operating mode */
363 rtrc(0);
364 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
365 if (i > hostdata->spin_max_r)
366 hostdata->spin_max_r = i;
367 return (0);
368 }
369
370 /****************************************************************
371 * Function : int NCR5380_pwrite (struct Scsi_Host *instance,
372 * unsigned char *src, int len)
373 *
374 * Purpose : Fast 5380 pseudo-dma write function, transfers len bytes from
375 * src
376 *
377 * Inputs : src = source, len = length in bytes
378 *
379 * Returns : 0 on success, non zero on a failure such as a watchdog
380 * timeout.
381 */
382
383 static inline int NCR5380_pwrite(struct Scsi_Host *instance, unsigned char *src, int len)
384 {
385 int i;
386 struct NCR5380_hostdata *hostdata = shost_priv(instance);
387
388 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
389 NCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE);
390 /* set direction (write) */
391 if (instance->irq == NO_IRQ)
392 NCR5380_write(DTC_CONTROL_REG, 0);
393 else
394 NCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR);
395 NCR5380_write(DTC_BLK_CNT, len >> 7); /* Block count */
396 for (i = 0; len > 0; ++i) {
397 rtrc(5);
398 /* Poll until the host buffer can accept data. */
399 while (NCR5380_read(DTC_CONTROL_REG) & CSR_HOST_BUF_NOT_RDY)
400 ++i;
401 rtrc(3);
402 memcpy_toio(hostdata->base + DTC_DATA_BUF, src, 128);
403 src += 128;
404 len -= 128;
405 }
406 rtrc(4);
407 while (!(NCR5380_read(DTC_CONTROL_REG) & D_CR_ACCESS))
408 ++i;
409 rtrc(6);
410 /* Wait until the last byte has been sent to the disk */
411 while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
412 ++i;
413 rtrc(7);
414 /* Check for parity error here. fixme. */
415 NCR5380_write(MODE_REG, 0); /* Clear the operating mode */
416 rtrc(0);
417 if (i > hostdata->spin_max_w)
418 hostdata->spin_max_w = i;
419 return (0);
420 }
421
422 MODULE_LICENSE("GPL");
423
424 #include "NCR5380.c"
425
426 static int dtc_release(struct Scsi_Host *shost)
427 {
428 struct NCR5380_hostdata *hostdata = shost_priv(shost);
429
430 if (shost->irq != NO_IRQ)
431 free_irq(shost->irq, shost);
432 NCR5380_exit(shost);
433 scsi_unregister(shost);
434 iounmap(hostdata->base);
435 return 0;
436 }
437
438 static struct scsi_host_template driver_template = {
439 .name = "DTC 3180/3280 ",
440 .detect = dtc_detect,
441 .release = dtc_release,
442 .proc_name = "dtc3x80",
443 .show_info = dtc_show_info,
444 .write_info = dtc_write_info,
445 .info = dtc_info,
446 .queuecommand = dtc_queue_command,
447 .eh_abort_handler = dtc_abort,
448 .eh_bus_reset_handler = dtc_bus_reset,
449 .bios_param = dtc_biosparam,
450 .can_queue = CAN_QUEUE,
451 .this_id = 7,
452 .sg_tablesize = SG_ALL,
453 .cmd_per_lun = CMD_PER_LUN,
454 .use_clustering = DISABLE_CLUSTERING,
455 };
456 #include "scsi_module.c"
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